Manufacturing method of contact structure
By forming an ion implantation region through the dielectric layer in the semiconductor structure and forming contact holes simultaneously, the problem of easy damage to the metal layer at the bottom of the contact hole with shallow depth is solved, and the performance and reliability of the contact structure are improved.
Patent Information
- Application Number
- CN202411568006.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-05
- Publication Date
- 2025-02-18
AI Technical Summary
In the process of synchronously forming contact holes of different depths, the metal layer at the bottom of the contact hole with shallow depths is easily damaged by over-engraving, affecting the contact performance and reliability of the contact structure.
By forming an ion implantation region through the first dielectric layer and the second dielectric layer directly above the first metal layer, a suitable ion implantation dose and energy are selected, and the first contact hole and the second contact hole are synchronized to make the Its formation time is almost the same, avoiding over-etching of the metal layer.
It effectively avoids damage to the metal layer during the synchronous formation of contact holes, and improves the contact performance and reliability of the contact structure.
Smart Images
Figure CN119480794A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductor integrated circuit manufacturing and relates to a method for manufacturing a contact structure. Background Art
[0002] With the development of semiconductor integrated circuits, the size of semiconductor devices is getting smaller and smaller, and the requirements for processes are getting higher and higher. At present, for a contact structure involving two metal layers of different depths interconnected, a first through hole and a second through hole are usually formed simultaneously to expose the upper / lower metal layer respectively, such as Figure 1-2 FIG. 1 is a schematic diagram of a structure after simultaneously forming through holes of different depths in a metal interconnect structure and Figure 1 Figure 1 is a SEM image of the bottom of the metal plug filling the second through hole, including wafer 01, first dielectric layer 011, second dielectric layer 012, third dielectric layer 013, first metal layer 014, second metal layer 015, first through hole 02, second through hole 03 and metal plug 04. Since the dielectric layer above the first metal layer is thicker than the second metal layer, when the first through hole and the second through hole are formed simultaneously, the second through hole will be etched first. After the second through hole is formed, the etching continues to form the first through hole, which will cause the second metal layer to be etched for too long and cause damage, affecting the contact performance and reliability of the contact structure.
[0003] Therefore, there is an urgent need to find a method for manufacturing a contact structure that avoids damaging the metal layer exposed at the bottom of the contact hole with a shallower depth during the process of simultaneously forming contact holes with different depths. Summary of the invention
[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for manufacturing a contact structure, which is used to solve the problem that the metal layer at the bottom of the shallower contact hole is easily damaged by over-etching during the process of simultaneously forming contact holes with depth differences in the prior art.
[0005] To achieve the above object and other related objects, the present invention provides a method for manufacturing a contact structure, comprising the following steps:
[0006] A semiconductor structure is provided, the semiconductor structure at least comprising a substrate, a first metal layer, a first dielectric layer, a second metal layer and a second dielectric layer, the first metal layer is located on the upper surface of the substrate, the first dielectric layer covers the exposed surface of the first metal layer and the upper surface of the substrate, the second metal layer is located on the upper surface of the first dielectric layer, the second dielectric layer covers the exposed surface of the second metal layer and the upper surface of the first dielectric layer, and the projections of the first metal layer and the second metal layer in the vertical direction are separated by a preset distance;
[0007] forming an ion implantation region penetrating the second dielectric layer and the first dielectric layer, and selecting an ion implantation dose and energy of the ion implantation region based on the material, thickness and effective density of the first dielectric layer and the second dielectric layer above the first metal layer;
[0008] Simultaneously forming a first contact hole penetrating the ion implantation region and exposing the first metal layer at the bottom thereof, and a second contact hole penetrating the second dielectric layer above the second metal layer;
[0009] A first plug filling the first contact hole and a second plug filling the second contact hole are simultaneously formed.
[0010] Optionally, the substrate includes a substrate wafer and a third dielectric layer stacked in sequence, the first dielectric layer covers an upper surface of the third dielectric layer, and the first metal layer is located on an upper surface of the third dielectric layer.
[0011] Optionally, a material of the first dielectric layer is the same as a material of the second dielectric layer.
[0012] Optionally, before forming the ion implantation area, a step of forming a patterned first shielding layer on the upper surface of the second dielectric layer is also included, wherein a first opening is formed in the patterned first shielding layer, and the first opening exposes the upper surface of the second dielectric layer in the area directly above the first metal layer.
[0013] Optionally, after forming the ion implantation area and before forming the first contact hole, the step also includes forming a patterned second shielding layer on the upper surface of the second dielectric layer, a second opening and a third opening being formed in the patterned second shielding layer, the second opening exposing the upper surface of the ion implantation area, and the third opening exposing the upper surface of the second dielectric layer in the area directly above the second metal layer.
[0014] Optionally, a method for simultaneously forming the first contact hole and the second contact hole includes wet etching and dry etching.
[0015] Optionally, a size of the ion implantation region is not larger than a size of the first metal layer, and a size of the first contact hole is smaller than a size of the first metal layer.
[0016] Optionally, a ratio of a difference between a time for forming the first contact hole and a time for forming the second contact hole to a time for forming the first contact hole is not greater than 5%.
[0017] Optionally, before selecting the dose and energy of ion implantation for forming the ion implantation area, the step also includes testing the etching rate of the second dielectric layer etched by the etchant for subsequently forming the contact hole, and the relationship R=f(n,ρ) between the etching rate of the etchant for etching the ion implantation area and the doping dose of the ion implantation area, so as to select the ion implantation dose injected into the ion implantation area, wherein R is the etching rate of the ion implantation area, n is the doping dose for forming the ion implantation area, and ρ is the effective density of the first dielectric layer and the second dielectric layer directly above the first metal layer.
[0018] Optionally, after forming the first plug and the second plug, the method further includes forming a third metal layer electrically connecting the first plug and the second plug.
[0019] As described above, the method for manufacturing the contact structure of the present invention forms an ion implantation region that penetrates the first dielectric layer and the second dielectric layer directly above the first metal layer, and the ion implantation energy for forming the ion implantation region is selected based on the thickness, material and effective density of the first dielectric layer and the second dielectric layer directly above the first metal layer, and the average etching rate of the formed ion implantation region is determined based on the depth of the second contact hole, the etching rate of the second dielectric layer and the depth of the first contact hole, and the ion implantation dose of the ion implantation region is calculated based on the relationship between the average etching rate of the ion implantation region, the ion implantation dose and the effective density of the first dielectric layer and the second dielectric layer, thereby making the time for forming the first contact hole and the second contact hole almost the same, avoiding damage to the first metal layer and the second metal layer in the process of synchronously forming the first contact hole and the second contact hole, improving the contact performance and reliability of the contact structure, and having a high industrial utilization value. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 The schematic diagram shows a cross-sectional structure after simultaneously forming through holes of different depths in a metal interconnect structure.
[0021] Figure 2 Display as Figure 1 SEM image of the bottom of the metal plug filling the second through hole.
[0022] Figure 3 Shown is a process flow chart of a method for manufacturing a contact structure of the present invention.
[0023] Figure 4 A schematic structural diagram of a semiconductor structure showing a method for manufacturing a contact structure of the present invention.
[0024] Figure 5 It is a schematic diagram showing the structure after forming the first shielding layer in the method for manufacturing the contact structure of the present invention.
[0025] Figure 6 It is a schematic diagram of the structure after forming the ion implantation region in the method for manufacturing the contact structure of the present invention.
[0026] Figure 7 It is a schematic diagram showing the structure after removing the first shielding layer in the method for manufacturing the contact structure of the present invention.
[0027] Figure 8 It is a schematic diagram showing the structure after forming the second shielding layer in the method for manufacturing the contact structure of the present invention.
[0028] Fig. 9 It is a schematic structural diagram showing the method for manufacturing the contact structure of the present invention after the first contact hole and the second contact hole are formed simultaneously.
[0029] Fig.10 It is a schematic structural diagram showing the method for manufacturing the contact structure of the present invention after forming the third metal layer.
[0030] Description of Figure Numbers
[0031] 01 Wafer
[0032] 011 First dielectric layer
[0033] 012 Second dielectric layer
[0034] 013 The third dielectric layer
[0035] 014 First metal layer
[0036] 015 Second Metal Layer
[0037] 02 First through hole
[0038] 03 Second through hole
[0039] 04 Metal plug
[0040] 1 Semiconductor structure
[0041] 11 Substrate
[0042] 111 Substrate Wafer
[0043] 112 third dielectric layer
[0044] 12. First Metal Layer
[0045] 13. First dielectric layer
[0046] 14 Second Metal Layer
[0047] 15 Second dielectric layer
[0048] 16 Ion implantation area
[0049] 17 First contact hole
[0050] 18 Second contact hole
[0051] 2 First shielding layer
[0052] 21 First Opening
[0053] 3 Second shielding layer
[0054] 31 Second Opening
[0055] 32 The third opening
[0056] 4 First plug
[0057] 5 Second plug
[0058] 6 Third Metal Layer DETAILED DESCRIPTION
[0059] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0060] See also Figures 3 to 10 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0061] This embodiment provides a method for manufacturing a contact structure. Figures 3 to 10 ,like Figure 3 FIG. 1 is a process flow chart of a method for manufacturing the contact structure, comprising the following steps:
[0062] S1: Provide a semiconductor structure, the semiconductor structure at least comprising a substrate, a first metal layer, a first dielectric layer, a second metal layer and a second dielectric layer, the first metal layer is located on the upper surface of the substrate, the first dielectric layer covers the exposed surface of the first metal layer and the upper surface of the substrate, the second metal layer is located on the upper surface of the first dielectric layer, the second dielectric layer covers the exposed surface of the second metal layer and the upper surface of the first dielectric layer, and the projections of the first metal layer and the second metal layer in the vertical direction are separated by a preset distance;
[0063] S2: forming an ion implantation region penetrating the second dielectric layer and the first dielectric layer, and selecting the ion implantation dose and energy of the ion implantation region based on the material, thickness and density of the first dielectric layer and the second dielectric layer above the first metal layer;
[0064] S3: Simultaneously forming a first contact hole penetrating the ion implantation region and exposing the first metal layer at the bottom thereof, and a second contact hole penetrating the second dielectric layer above the second metal layer;
[0065] S4: synchronously forming a first plug filling the first contact hole and a second plug filling the second contact hole.
[0066] See also Figures 4 to 6 , performing step S1 and step S2: providing a semiconductor structure 1, the semiconductor structure 1 at least comprising a substrate 11, a first metal layer 12, a first dielectric layer 13, a second metal layer 14 and a second dielectric layer 15, the first metal layer 12 is located on the upper surface of the substrate 11, the first dielectric layer 13 covers the exposed surface of the first metal layer 12 and the upper surface of the substrate 11, the second metal layer 14 is located on the upper surface of the first dielectric layer 13, the second dielectric layer 15 covers the exposed surface of the second metal layer 14 and the upper surface of the first dielectric layer 13, and the projections of the first metal layer 12 and the second metal layer 14 in the vertical direction are separated by a preset distance; forming an ion implantation region 16 penetrating the second dielectric layer 15 and the first dielectric layer 13, and the ion implantation dose and energy of the ion implantation region 16 are selected based on the material, thickness and effective density of the first dielectric layer 13 and the second dielectric layer 15 above the first metal layer 12.
[0067] Specifically, the substrate 11 is usually a process platform for forming the first dielectric layer 13 and the first metal layer 12 .
[0068] As an example, Figure 4 As shown, it is a structural schematic diagram of the semiconductor structure 1, the substrate 11 includes a substrate wafer 111 and a third dielectric layer 112 stacked in sequence, the first dielectric layer 13 covers the upper surface of the third dielectric layer 112, and the first metal layer 12 is located on the upper surface of the third dielectric layer 112.
[0069] It should be noted that the substrate wafer 111 includes at least one semiconductor device, and the type and number of the semiconductor device can be selected according to actual conditions; the size, thickness and shape of the substrate wafer 111 can be selected according to actual conditions; the thickness of the third dielectric layer 112 can be selected according to actual conditions.
[0070] Specifically, the material of the third dielectric layer 112 includes silicon oxide, silicon nitride, silicon oxynitride or other suitable dielectric materials.
[0071] It should be noted that the first metal layer 12 can be a partial structure for leading out the electrode of the semiconductor device in the substrate wafer 111, or it can be an electrode part of an electronic device combined with the semiconductor device in the substrate wafer 111, and when the first metal layer 12 is used to lead out the electrode of the semiconductor device in the substrate wafer 111, a lead-out structure electrically connecting the first metal layer 12 and the electrode of the semiconductor device in the substrate wafer 111 must also be provided in the third dielectric layer 112.
[0072] Specifically, since the first dielectric layer 13 covers the exposed surface of the first metal layer 12, the first metal layer 12 is usually formed on the upper surface of the third dielectric layer 112, and then the first dielectric layer 13 covering the exposed upper surface of the third dielectric layer 112 and the exposed surface of the first metal layer 12 is formed.
[0073] Specifically, the material of the first metal layer 12 includes titanium nitride, tungsten, titanium, gold, silver, copper, nickel, aluminum or other suitable conductive materials; the material of the first dielectric layer 13 includes silicon oxide, silicon nitride, silicon oxynitride, epoxy resin, polyimide or other suitable dielectric materials. For example, silicon oxide can be used as the first dielectric layer 13.
[0074] Specifically, under the condition of ensuring the performance of the contact structure, the thickness of the first dielectric layer 13 can be selected according to actual conditions; the size, shape and thickness of the first metal layer 12 can be selected according to actual conditions.
[0075] Specifically, while ensuring the performance of the contact structure, the size, shape and thickness of the second metal layer 14 can be selected according to actual conditions; the thickness of the second dielectric layer 15 can be selected according to actual conditions. Preferably, the first metal layer 12 and the second metal layer 14 have the same thickness.
[0076] Specifically, the material of the second metal layer 14 includes titanium nitride, tungsten, titanium, gold, silver, copper, nickel, aluminum or other suitable conductive materials.
[0077] As an example, the material of the first dielectric layer 13 is the same as that of the second dielectric layer 15 to facilitate the control of the time of the subsequent contact hole formation process and avoid the difficulty in calculating the ion implantation dose in the ion implantation area due to the different materials of the two dielectric layers.
[0078] Specifically, under the condition of ensuring the performance of the contact structure, the distance between the projections of the first metal layer 12 and the second metal layer 14 in the vertical direction can be selected according to actual conditions. The vertical direction here refers to the direction in which the first dielectric layer 13 and the second dielectric layer 15 are stacked.
[0079] As an example, Figure 5As shown, it is a schematic diagram of the structure after the first shielding layer 2 is formed. Before the ion implantation area 16 is formed, it also includes the step of forming a patterned first shielding layer 2 on the upper surface of the second dielectric layer 15. A first opening 21 is formed in the patterned first shielding layer 2. The first opening 21 exposes the upper surface of the second dielectric layer 15 in the area directly above the first metal layer 12.
[0080] Specifically, the first shielding layer 2 may be a photoresist layer or a composite film layer of a photoresist layer and a hard mask layer, or may be a hard mask layer. Preferably, the first shielding layer 2 is a photoresist layer.
[0081] Specifically, the method for forming the patterned first shielding layer 2 is a common photolithography process, which will not be described in detail here.
[0082] It should be noted that the ion implantation area 16 is formed by injecting ions into the semiconductor structure 1 based on the first opening 21 in the patterned first shielding layer 2. The first shielding layer 2 is used to block ions from entering the semiconductor structure 1 in the shielded area. The thickness of the first shielding layer 2 can be selected according to actual conditions and is no longer restricted here; the size and shape of the first opening 21 can be selected according to actual conditions and are no longer restricted here.
[0083] Specifically, Figure 6 As shown, it is a schematic diagram of the structure after the ion implantation area 16 is formed, and the ions implanted into the semiconductor structure 1 based on the first opening 21 in the patterned first shielding layer 2 include argon ions, hydrogen ions, fluorine ions or other suitable ions. Preferably, argon ions are used as the ions for ion implantation into the semiconductor structure 1 exposed at the bottom of the first opening 21.
[0084] Specifically, ion implantation is performed on the first dielectric layer 13 and the second dielectric layer 15 directly below the first opening 21 to destroy the unit cell structure of the first dielectric layer 13 and the second dielectric layer 15 in the area directly below the first opening 21, break the chemical bonds between atoms, and accelerate the longitudinal reaction rate between the ion implantation area 16 and the etchant for subsequently forming the contact hole. At the same time, the energy of the ion implantation is selected based on the material and effective density of the first dielectric layer 13 and the second dielectric layer 15 and the thickness of the first dielectric layer 13 and the second dielectric layer 15, so that the unit cell structure of the first dielectric layer 13 and the second dielectric layer 15 between the bottom surface of the first opening 21 and the first metal layer 12 is destroyed by ions.
[0085] Specifically, the dose of ion implantation is selected based on the material and effective density of the first dielectric layer 13 and the second dielectric layer 15, the thickness of the second dielectric layer 15 above the second metal layer 14, and the etchant for subsequently forming the contact hole. The dose of ion implantation determines the doping concentration of the ion implantation area 16, which in turn determines the degree of damage to the cell structure of the first dielectric layer 13 and the second dielectric layer 15 in the ion implantation area. The more severe the ion damage, the faster the reaction rate between the first dielectric layer 13 and the second dielectric layer 15 in the ion implantation area 16 and the etchant for subsequently forming the contact hole.
[0086] As an example, before selecting the dose and energy of ion implantation for forming the ion implantation region 16, a step is also included to test the etching rate of the etchant for subsequently forming the contact hole to etch the second dielectric layer 15, the relationship between the etching rate of the etchant for etching the ion implantation region 16 and the doping dose of the ion implantation region R=f(n,ρ), so as to select the ion implantation dose in the ion implantation region 16, wherein R is the etching rate of the ion implantation region 16, n is the doping dose for forming the ion implantation region 16, and ρ is the effective density of the first dielectric layer 13 and the second dielectric layer 15 directly above the first metal layer 12. The effective density here generally refers to the average density of the first dielectric layer 13 and the second dielectric layer 15 above the first metal layer 12.
[0087] It should be noted that the relationship between the etching rate of the etchant in the ion implantation area 16 and the doping dose in the ion implantation area 16 needs to be obtained through experiments. Since the relationship is related to factors such as the material of the first dielectric layer 13 and the second dielectric layer 15, the effective density of the first dielectric layer 13 and the second dielectric layer 15, the doping dose in the ion implantation area 16, the ambient temperature of the etching process and the ratio of the effective ingredients in the etchant, the clear relationship is not listed here.
[0088] Specifically, by determining the relationship between the doping dose of the ion implanted region 16 and the etching rate of the etchant for subsequently forming the contact hole at a preset temperature and the reaction rate of the etchant with the second dielectric layer 15 at a preset temperature, and then based on the ratio of the sum of the thicknesses of the first dielectric layer 13 and the second dielectric layer 15 above the first metal layer 12 to the thickness of the second dielectric layer 15 above the second metal layer 14, the ratio of the average etching rate of the etchant for subsequently forming the contact hole in etching the ion implanted region 16 to the etching rate of the second dielectric layer 15 is determined, and then the doping dose for forming the ion implanted region 16 can be inferred based on the relationship between the doping dose of the ion implanted region 16 and the average etching rate of the ion implanted region 16.
[0089] It should be noted that the size, shape and thickness of the ion implantation region 16 are related to the actual process conditions and are not limited here.
[0090] Please see again Figures 7 to 10 , perform step S3 and step S4: simultaneously form a first contact hole 17 penetrating the ion implantation region 16 and exposing the first metal layer 12 at the bottom, and a second contact hole 18 penetrating the second dielectric layer 15 above the second metal layer 14; and simultaneously form a first plug 4 filling the first contact hole 17 and a second plug 5 filling the second contact hole 18.
[0091] It should be noted that if Figure 7 As shown, it is a schematic diagram of the structure after removing the first shielding layer 2. After forming the ion implantation area and before forming the first contact hole 17 and the second contact hole 18, it also includes a step of removing the first shielding layer 2. The method for removing the first shielding layer 2 is usually a common photoresist stripping method, which will not be repeated here.
[0092] As an example, Figure 8 As shown, it is a schematic diagram of the structure after the second shielding layer 3 is formed. After the ion implantation area 16 is formed and before the first contact hole 17 is formed, it also includes the step of forming a patterned second shielding layer 3 on the upper surface of the second dielectric layer 15. A second opening 31 and a third opening 32 are formed in the patterned second shielding layer 3. The second opening 31 exposes the upper surface of the ion implantation area 16, and the third opening 32 exposes the upper surface of the second dielectric layer 15 in the area directly above the second metal layer 14.
[0093] Specifically, the second shielding layer 3 may be a photoresist layer or a composite film layer of a photoresist layer and a hard mask layer, or may be a hard mask layer. Preferably, the second shielding layer 3 is a photoresist layer.
[0094] Specifically, the method for forming the patterned second shielding layer 3 is a common photolithography process, which will not be described in detail here.
[0095] As an example, Fig. 9 , which is a schematic diagram of the structure after the first contact hole 17 and the second contact hole 18 are formed simultaneously, and the method of forming the first contact hole 17 and the second contact hole 18 simultaneously includes wet etching, dry etching or other suitable methods. Preferably, the first contact hole 17 and the second contact hole 18 are formed simultaneously by dry etching with good anisotropy.
[0096] It should be noted that the first contact hole 17 and the second contact hole 18 are formed based on the second opening 31 and the third opening 32, which are obtained by simultaneously etching the ion implantation region 16 exposed on the bottom surface of the second opening 31 and the second dielectric layer 15 exposed on the bottom surface of the third opening 32 with the same etchant. The thickness of the second shielding layer 3 can be selected according to actual conditions; the size and shape of the second opening 31 can be selected according to actual conditions; the size and shape of the third opening 32 can be selected according to actual conditions; the type and composition of the etchant for synchronously forming the first contact hole 17 and the second contact hole 18 can be selected according to actual conditions. Preferably, the second opening 31 and the third opening 32 have the same size and shape.
[0097] As an example, the size of the ion implantation region 16 is not larger than the size of the first metal layer 12 , and the size of the first contact hole 17 is smaller than the size of the first metal layer 12 .
[0098] Specifically, by making the size of the ion implantation area 16 no larger than the size of the first metal layer 12, ions are prevented from being implanted into the area around the first metal layer 12. When forming the first contact hole 17, the area around the first metal layer 12 is etched, affecting the contact performance and reliability of the contact structure.
[0099] Specifically, the size of the first contact hole 17 is smaller than that of the first metal layer 12 to avoid the first contact hole 17 being too large and affecting the reliability of the contact structure. Similarly, the size of the second contact hole 18 is also smaller than that of the second metal layer 14 .
[0100] Specifically, the size of the first contact hole 17 is usually smaller than that of the ion implantation area 16. While ensuring the performance of the contact structure, the size of the first contact hole 17 may also be larger than that of the ion implantation area 16. In this embodiment, the size of the first contact hole 17 is smaller than that of the ion implantation area 16.
[0101] As an example, the ratio of the difference between the time for forming the first contact hole 17 and the time for forming the second contact hole 18 to the time for forming the first contact hole 17 is not greater than 5%.
[0102] Specifically, in the process of synchronously etching the ion implantation region 16 exposed by the second opening 31 and the second dielectric layer 15 exposed by the third opening 32, there are many factors that affect the etching rate between the two, and it is difficult to make the time for forming the first contact hole 17 and the time for forming the second contact hole 18 exactly the same. By making the time difference between forming the first contact hole 17 and forming the second contact hole 18 no greater than 5%, the process difficulty can be reduced and the metal layer at the bottom of the contact hole etched first can be avoided from being damaged. For example, the etching rate of the actual formation of the first contact hole 17 is slightly greater than the theoretical value, resulting in the first contact hole 17 being etched earlier than the second contact hole 18. Within the time difference of no more than 5%, the etchant can be avoided from damaging the first metal layer 12. Alternatively, the etching rate of the actual formation of the first contact hole 17 is slightly less than the theoretical value, resulting in the second contact hole 18 being etched earlier than the first contact hole 17. Within the time difference of no more than 5%, the etchant can be avoided from damaging the second metal layer 14, thereby ensuring the quality of the first metal layer 12 and the second metal layer 14.
[0103] It should be noted that after the first contact hole 17 and the second contact hole 18 are formed synchronously, before the first plug 4 and the second plug 5 are formed synchronously, a step of removing the second shielding layer 3 is also included. The method for removing the second shielding layer 3 is usually a common photoresist stripping method, which will not be repeated here.
[0104] As an example, the material of the first plug 4 and the second plug 5 includes tungsten or other suitable conductive materials.
[0105] Specifically, the method of synchronously forming the first plug 4 and the second plug 5 includes chemical vapor deposition, physical vapor deposition, atomic layer deposition, magnetron sputtering or other suitable methods.
[0106] Specifically, since the depth of the first contact hole 17 is usually greater than that of the second contact hole 18, in the process of simultaneously forming the first plug 4 and the second plug 5, a thicker filling material layer will usually be formed on the upper surface of the second dielectric layer 15. After the first contact hole 17 is completely filled, the filling material layer covering the upper surface of the second dielectric layer 15 needs to be removed.
[0107] Specifically, the method for removing the filling material layer covering the upper surface of the second dielectric layer 15 includes chemical mechanical polishing, dry etching, wet etching or other suitable methods. In this embodiment, since the upper surface of the filling material layer portion directly above the second contact hole 18 is lower than the upper surface of the filling material layer portion directly above the second dielectric layer 15, and the upper surface of the filling material layer portion directly above the first contact hole 17 is lower than the upper surface of the filling material layer portion directly above the second contact hole 18, it is usually necessary to firstly polish the upper surface of the filling material layer using a chemical mechanical polishing process, and then completely remove the filling material layer portion higher than the upper surface of the second dielectric layer using an etching process. Alternatively, the filling material layer portion higher than the upper surface of the second dielectric layer 15 may be directly polished using a chemical mechanical polishing process to obtain the first plug 4 filling the first contact hole 17 and the second plug 5 filling the second contact hole 18.
[0108] As an example, Fig.10 , which is a schematic diagram of the structure after the third metal layer 6 is formed. After the first plug 4 and the second plug 5 are formed, the step of forming the third metal layer 6 electrically connecting the first plug 4 and the second plug 5 is also included.
[0109] Specifically, the third metal layer 6 is electrically connected to the first metal layer 12 and the second metal layer 14 through the first plug 4 and the second plug 5 respectively, and forms a metal interconnection structure.
[0110] Specifically, the method of forming the third metal layer 6 includes chemical vapor deposition, physical vapor deposition, atomic layer deposition, magnetron sputtering or other suitable methods.
[0111] It should be noted that the size, shape and thickness of the third metal layer 6 can be selected according to actual conditions and are not limited here.
[0112] Specifically, the material of the third metal layer 6 includes titanium nitride, tungsten, titanium, gold, silver, copper, nickel, aluminum or other suitable conductive materials.
[0113] Specifically, the average etching rate of the ion implantation area 16 to be formed is determined based on the ratio of the depth of the second contact hole 18 to the depth of the first contact hole 17 and the etching rate of the second dielectric layer 15, and the energy of the injected ions for forming the ion implantation area 16 is selected based on the sum of the thicknesses of the first dielectric layer 13 and the second dielectric layer 14 directly above the first metal layer 12. Based on the effective density of the first dielectric layer 13 and the second dielectric layer 15, the material of the first dielectric layer 13 and the second dielectric layer 15, and the relationship between the dose of the injected ions in the ion implantation area 16 and the average etching rate of the ion implantation area 16, the ion dose for forming the ion implantation area 16 is reversely deduced, and then the precise control of the etching rate of the ion implantation area 16 can be achieved.
[0114] Specifically, before forming the first contact hole 17 and the second contact hole 18, an ion implantation region 16 of the second dielectric layer 15 and the first dielectric layer 13 that penetrates the area directly above the first metal layer 12 is formed in the semiconductor structure 1 to accelerate the etching rate of forming the first contact hole 17, and make the ratio of the etching rate of forming the first contact hole 17 to the etching rate of forming the second contact hole 18 equal to the ratio of the depth of the first contact hole 17 to the depth of the second contact hole 18. As a result, the time for etching to form the first contact hole 17 and the time for etching to form the second contact hole 18 can be almost the same, thereby avoiding over-etching and damage of the second metal layer 14 or the first metal layer 12 during the process of synchronously forming the first contact hole 17 and the second contact hole 18, thereby ensuring the quality of the first metal layer 12 and the second metal layer 14, and improving the contact performance and reliability of the contact structure.
[0115] In summary, the manufacturing method of the contact structure of the present invention determines the average etching rate of forming the first contact hole based on the etching rate of the second dielectric layer, the depth of the first contact hole and the depth of the second contact hole through the manufacturing process of the contact hole, and then determines the ion implantation dose of the ion implantation area based on the relationship between the material and effective density of the first dielectric layer and the second dielectric layer, the ion implantation dose of the ion implantation area and the average etching rate of the ion implantation area, and then determines the energy of the ion implantation based on the thickness of the first dielectric layer and the second dielectric layer directly above the first metal layer, and forms the ion implantation area of the first dielectric layer and the second dielectric layer directly above the first metal layer based on the determined ion implantation energy and dose, and then makes the time of forming the first contact hole and etching the second contact hole almost the same, avoiding the damage of the first metal layer and the second metal layer in the process of synchronously forming the first contact hole and the second contact hole, ensuring the quality of the first metal layer and the second metal layer, and improving the contact performance and reliability of the contact structure. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.
[0116] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for manufacturing a contact structure, characterized in that: The following steps are involved: A semiconductor structure is provided, the semiconductor structure at least comprising a substrate, a first metal layer, a first dielectric layer, a second metal layer and a second dielectric layer, the first metal layer is located on the upper surface of the substrate, the first dielectric layer covers the exposed surface of the first metal layer and the upper surface of the substrate, the second metal layer is located on the upper surface of the first dielectric layer, the second dielectric layer covers the exposed surface of the second metal layer and the upper surface of the first dielectric layer, and the projections of the first metal layer and the second metal layer in the vertical direction are separated by a preset distance; forming an ion implantation region penetrating the second dielectric layer and the first dielectric layer, and selecting an ion implantation dose and energy of the ion implantation region based on the material, thickness and density of the first dielectric layer and the second dielectric layer above the first metal layer; Simultaneously forming a first contact hole penetrating the ion implantation region and exposing the first metal layer at the bottom thereof, and a second contact hole penetrating the second dielectric layer above the second metal layer; A first plug filling the first contact hole and a second plug filling the second contact hole are simultaneously formed.
2. The method for manufacturing a contact structure according to claim 1, characterized in that: The substrate includes a substrate wafer and a third dielectric layer stacked in sequence, the first dielectric layer covers an upper surface of the third dielectric layer, and the first metal layer is located on an upper surface of the third dielectric layer.
3. The method for manufacturing a contact structure according to claim 1, characterized in that: The material of the first dielectric layer is the same as that of the second dielectric layer.
4. The method for manufacturing a contact structure according to claim 1, characterized in that: Before forming the ion implantation area, the method further includes forming a patterned first shielding layer on the upper surface of the second dielectric layer, wherein a first opening is formed in the patterned first shielding layer, and the first opening exposes the upper surface of the second dielectric layer directly above the first metal layer.
5. The method for manufacturing a contact structure according to claim 1, characterized in that: After forming the ion implantation area and before forming the first contact hole, the method further includes forming a patterned second shielding layer on the upper surface of the second dielectric layer, wherein a second opening and a third opening are formed in the patterned second shielding layer, wherein the second opening exposes the upper surface of the ion implantation area, and the third opening exposes the upper surface of the second dielectric layer in the area directly above the second metal layer.
6. The method for manufacturing a contact structure according to claim 1, characterized in that: The method of simultaneously forming the first contact hole and the second contact hole includes wet etching and dry etching.
7. The method for manufacturing a contact structure according to claim 1, characterized in that: The size of the ion implantation region is not larger than the size of the first metal layer, and the size of the first contact hole is smaller than the size of the first metal layer.
8. The method for manufacturing a contact structure according to claim 1, characterized in that: A ratio of a difference between a time for forming the first contact hole and a time for forming the second contact hole to a time for forming the first contact hole is not greater than 5%.
9. The method for manufacturing a contact structure according to claim 1, characterized in that: Before selecting the dose and energy of ion implantation for forming the ion implantation area, the method also includes testing the etching rate of the second dielectric layer etched by the etchant for subsequently forming the contact hole, and the relationship R=f(n,ρ) between the etching rate of the etchant for etching the ion implantation area and the doping dose of the ion implantation area, so as to select the ion implantation dose injected into the ion implantation area, wherein R is the etching rate of the ion implantation area, n is the doping dose for forming the ion implantation area, and ρ is the effective density of the first dielectric layer and the second dielectric layer directly above the first metal layer.
10. The method for manufacturing a contact structure according to claim 1, characterized in that: After forming the first plug and the second plug, the method further includes forming a third metal layer electrically connecting the first plug and the second plug.