Semiconductor metal packaging substrate and manufacturing process thereof

Abstract

The invention discloses a semiconductor metal packaging substrate and a manufacturing process thereof, the semiconductor metal packaging substrate comprises a substrate body and a first packaging layer, the substrate body is provided with a chip mounting position and a support mounting position, and the chip mounting position is covered by the support mounting position; a mounting groove is formed in the first support, a cavity is defined by the mounting groove and the substrate body, the chip mounting position is located in the cavity, and the chip body is not in contact with the groove wall of the mounting groove; a first positioning hole is preset in the part, outside the chip mounting position, of the first bracket, a positioning groove extending to the cavity is formed in the substrate body by taking the first positioning hole as a reference, one end of the positioning groove is communicated with the first positioning hole, and the other end of the positioning groove is communicated with the cavity; the first packaging layer covers the first support and partially extends into the first positioning hole. The positioning groove is communicated with the first positioning hole, so that the pressure increased by heating the cavity is released, and the potential damage to the chip body is further reduced. Therefore, the semiconductor metal packaging substrate and the manufacturing process thereof can effectively improve the quality of the packaged chip.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging technology, and in particular to a semiconductor metal packaging substrate and a manufacturing process thereof. Background Art

[0002] Semiconductor packaging technology is a key process for protecting, connecting and supporting the manufactured integrated circuit chips. Specifically, it involves encapsulating the exposed chips in a protective shell, which can provide the necessary support for the chip's electrical connection and heat dissipation. It can be seen that the packaging process plays a vital role in the performance and stability of electronic products.

[0003] In the existing packaging process, the chip is fixed on the substrate by welding, wire bonding, etc., and then the chip and substrate are covered with plastic packaging materials to protect the chip from the external environment. In the actual packaging process, the chip is easily directly subjected to the pressure of the plastic packaging material, especially during high-pressure plastic packaging. This kind of pressure can cause physical damage to the chip, such as cracks or micro-damage on the chip surface, and even micro-displacement of the chip, which greatly affects the performance and life of the product and affects the stability of the electrical connection. Summary of the invention

[0004] The purpose of the present invention is to provide a semiconductor metal packaging substrate and a manufacturing process thereof, so as to solve the technical problem that the chip is prone to physical damage and micro displacement in the packaging process in the prior art.

[0005] To achieve this object, the present invention adopts the following technical solutions: A semiconductor metal packaging substrate comprises a substrate body and a first packaging layer, wherein the substrate body is provided with a chip mounting position for placing a chip body and a bracket mounting position for setting a first bracket, and the chip mounting position is covered by the bracket mounting position; The first bracket is formed with a mounting groove, the mounting groove and the substrate body form a cavity, the chip mounting position is located in the cavity, and the chip body does not contact the groove wall of the mounting groove; The first bracket is preset with a first positioning hole at a portion outside the chip mounting position, and the substrate body is provided with a positioning groove extending to the cavity based on the first positioning hole, so that one end of the positioning groove is connected to the first positioning hole, and the other end is connected to the cavity; The first packaging layer covers the first bracket and partially extends into the first positioning hole.

[0006] Optionally, after the first bracket is arranged at the bracket installation position, a second positioning hole is opened on the substrate body corresponding to the first positioning hole; and the positioning groove is formed by expanding the second positioning hole.

[0007] Optionally, the first bracket includes a bracket body formed with the mounting groove, the bracket body is provided with a mounting edge portion protruding outwardly from the edge of the groove opening of the mounting groove, and the mounting edge portion is bonded to the bracket mounting position; Wherein, the area where the bracket body is projected onto the substrate body covers the chip mounting position.

[0008] Optionally, before the first bracket is arranged at the bracket installation position, the installation groove is filled with an etching glue layer, and the etching glue layer forms a chip initial groove for the chip body to be embedded; the etching glue layer does not extend beyond the installation groove, and the chip body is flush with the notch edge of the installation groove; After the chip body and the first bracket are arranged on the substrate body, the etching glue layer is removed by the etching liquid flowing through the positioning groove.

[0009] Optionally, the substrate body has a jumper hole in the chip mounting position, and the jumper hole extends from one surface of the substrate body to another surface of the substrate body; the chip body is located on one surface of the substrate body, and the chip body is electrically connected to the other surface of the substrate body through a jumper portion passing through the jumper hole.

[0010] Optionally, a second bracket is further provided outside the other plate surface of the substrate body, at least a portion of the second bracket extends into the cavity through the positioning groove, and at least another portion of the second bracket covers the outside of the jumper portion.

[0011] Optionally, the second bracket includes a bracket parallel portion which is parallel to the substrate body and spaced apart; the bracket parallel portion is provided with a bracket rib portion, and the bracket rib portion extends to another plate surface of the substrate body; the bracket parallel portion, the bracket rib portion, another plate surface of the substrate body and the jumper hole are surrounded to form a jumper cavity; The bracket retaining edge portion is also provided with positioning columns corresponding to each of the positioning grooves, and the positioning columns pass through the positioning grooves and extend into the cavity.

[0012] Optionally, a second packaging layer is further provided, wherein the second packaging layer covers the second bracket and partially extends into the first positioning hole.

[0013] Optionally, the other surface of the substrate body is provided with external bumps outside the second packaging layer, and the external bumps are electrically connected to the jumper part through an internal circuit pattern of the substrate body.

[0014] A process for manufacturing a semiconductor metal packaging substrate, for preparing the semiconductor metal packaging substrate as described above, comprising: Providing a substrate body, wherein the substrate body is provided with a chip mounting position and a bracket mounting position covering the chip mounting position; The chip body is mounted on the chip mounting position, and the first bracket is bonded on the bracket mounting position, wherein the first bracket is pre-set with a first positioning hole at a portion outside the chip mounting position; the first bracket and the substrate body enclose a cavity for accommodating the chip body; A second positioning hole is formed by drilling a hole from one side of the substrate body through the first positioning hole, and a second positioning hole groove is processed from the other side of the substrate body to form a positioning groove extending to the cavity; The substrate body is plastic-sealed from one side of the substrate body to form a first packaging layer covering the first bracket.

[0015] Compared with the prior art, the present invention has the following beneficial effects: the semiconductor metal packaging substrate and its manufacturing process provided by the present invention first pre-install the chip body and the first bracket on the substrate body, the chip body is located on the chip mounting position, the first bracket is located on the bracket mounting position, and the chip mounting position is covered by the bracket mounting position, which means that the chip body can be covered by the first bracket, and the chip body is not in direct contact with the first bracket, so as to avoid the subsequent first packaging layer from directly squeezing the chip body during the molding process, and avoid micro-damage or micro-displacement of the chip body; at the same time, the positioning groove is formed with the first positioning hole as the reference, which can ensure the overall positioning accuracy, and use the positioning groove to communicate with the first positioning hole to release the gas overflowed during the cooling process of the first packaging layer, and use the positioning groove to communicate with the first positioning hole to release the pressure increased by the heat in the cavity, thereby further reducing the potential damage to the chip body. Therefore, the present semiconductor metal packaging substrate and its manufacturing process can effectively improve the stability of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0017] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which the present invention can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical contents disclosed by the present invention.

[0018] Figure 1is a schematic structural diagram of a chip body and a first bracket in an embodiment of the present invention; Figure 2 is a schematic diagram of a first molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Figure 3 is a schematic diagram of a second molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Figure 4 is a first top view structural schematic diagram of a semiconductor metal package substrate in an embodiment of the present invention; Figure 5 is a second top view structural schematic diagram of the semiconductor metal package substrate in an embodiment of the present invention; Figure 6 is a schematic diagram of a third molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Figure 7 is a schematic diagram of a fourth molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Figure 8 is a schematic diagram of a fifth molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Fig. 9 is a schematic diagram of a sixth molding structure of a semiconductor metal packaging substrate in an embodiment of the present invention; Illustration: 001, cavity; 002, jumper cavity; 100, substrate body; 101, chip mounting position; 102, bracket mounting position; 103, second positioning hole; 104, positioning groove; 105, jumper hole; 200, chip body; 300, first bracket; 301, mounting groove; 302, first positioning hole; 310, bracket body; 320, mounting edge; 330, movable plug; 400, first packaging layer; 500, second bracket; 510, bracket parallel portion; 520, bracket retaining edge portion; 530, positioning column; 600, second packaging layer; 700, etching glue layer; 701, initial groove; 800, jumper portion. DETAILED DESCRIPTION

[0019] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] In the description of the present invention, it should be understood that the terms "upper", "lower", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally arranged component at the same time.

[0021] The technical solution of the present invention is further described below with reference to the accompanying drawings and through specific implementation methods.

[0022] Embodiment 1: The semiconductor metal packaging substrate provided in this embodiment is suitable for scenarios where an integrated circuit chip (hereinafter referred to as the chip body 200) is packaged and protected, and can realize the packaging of the chip body 200 on the substrate body 100. It is suitable for scenarios such as sensor preparation and MEMS (Micro-Electro-Mechanical System) preparation. In this embodiment, the structure of the semiconductor metal packaging substrate is improved, so that the stability and life of the semiconductor metal packaging substrate are improved.

[0023] like Figure 4 , Figure 5 and Figure 7 As shown, the semiconductor metal package substrate in this embodiment includes a substrate body 100 and a first package layer 400; the substrate body 100 is provided with a chip mounting position 101 for placing the chip body 200 and a bracket mounting position 102 for setting the first bracket 300, and the chip mounting position 101 is covered by the bracket mounting position 102. The first package layer 400 is formed on the substrate body 100 and the first bracket 300 by compression molding, compression lamination, plastic sealing and other processes, and the above processes are well known to those skilled in the art, and can form a package structure by cooling the plastic, and will not be specifically expanded in this embodiment.

[0024] like Figure 1 and Figure 7As shown, the first bracket 300 is formed with a mounting groove 301, and the mounting groove 301 and the substrate body 100 form a cavity 001, the chip mounting position 101 is located in the cavity 001, and the chip body 200 does not contact the groove wall of the mounting groove 301; the first bracket 300 is preset with a first positioning hole 302 outside the chip mounting position 101, and the substrate body 100 is provided with a positioning groove 104 extending to the cavity 001 based on the first positioning hole 302, so that one end of the positioning groove 104 is connected to the first positioning hole 302, and the other end is connected to the cavity 001. The first packaging layer 400 covers the first bracket 300 and partially extends into the first positioning hole 302.

[0025] Specifically, for the semiconductor metal packaging substrate in this embodiment, the chip body 200 and the first bracket 300 are pre-installed on the substrate body 100, the chip body 200 is located at the chip mounting position 101, the first bracket 300 is located on the bracket mounting position 102, and the chip mounting position 101 is covered by the bracket mounting position 102, which means that the chip body 200 can be covered by the first bracket 300, and the chip body 200 is not in direct contact with the first bracket 300, thereby avoiding direct squeezing of the chip body 200 by the subsequent first packaging layer 400 during the molding process, and avoiding micro-damage or micro-displacement of the chip body 200; at the same time, the positioning groove 104 is formed with the first positioning hole 302 as the reference, which can ensure the overall positioning accuracy, and use the positioning groove 104 to communicate with the first positioning hole 302 to release the gas overflowed during the cooling process of the first packaging layer 400, and use the positioning groove 104 to communicate with the first positioning hole 302 to release the pressure increased by heat in the cavity 001, thereby further reducing the potential damage to the chip body 200. Therefore, the semiconductor metal packaging substrate can effectively improve the stability and life of the chip.

[0026] Furthermore, if Figures 2 to 3 , Figures 4 to 5 As shown, after the first bracket 300 is set at the bracket installation position 102, the substrate body 100 is provided with a second positioning hole 103 corresponding to the first positioning hole 302; the positioning groove 104 is formed by expanding the second positioning hole 103. It is understandable that the second positioning hole 103 can be formed by drilling from one side of the substrate body 100 through the first positioning hole 302 by a drilling process. The aperture of the second positioning hole 103 can be smaller than the aperture of the first positioning hole 302 and is only used for the calibration of the positioning groove 104. Then, the second positioning hole 103 is grooved from the other side of the substrate body 100 to form the positioning groove 104 extending to the cavity 001, as shown in FIG. Figure 6 and Figure 7As shown, at this time, one end of the positioning groove 104 is aligned with the first positioning hole 302, and the other end extends to the cavity 001. It can be understood that, by adopting the above processing method, when the chip body 200 is installed on the substrate body 100, it is not necessary to align the holes, and only the installation of the chip body 200 is considered. Then, the positioning groove 104 is formed based on the first positioning hole 302, which can improve the overall accuracy, reduce the difficulty of alignment, and improve the molding stability.

[0027] In this embodiment, if Figure 1 , Figure 2 and Figure 4 As shown, the first bracket 300 includes a bracket body 310 formed with a mounting groove 301, and the bracket body 310 is provided with a mounting edge portion 320 protruding outwardly at the edge of the groove of the mounting groove 301, and the mounting edge portion 320 is bonded to the bracket mounting position 102; wherein, the area of ​​the bracket body 310 projected on the substrate body 100 covers the chip mounting position 101. The first bracket 300 is arranged in a "J" shape as a whole, and has the advantages of high stability and strong pressure bearing capacity, and can effectively disperse the pressure in the subsequent plastic packaging process.

[0028] like Figure 2 , Figure 3 , Figure 6 and Figure 7 As shown, before the first bracket 300 is set at the bracket mounting position 102, the mounting groove 301 is filled with an etching glue layer 700, and the etching glue layer 700 forms a chip initial groove 701 for the chip body 200 to be embedded; the etching glue layer 700 does not exceed the mounting groove 301, and the chip body 200 is flush with the groove edge of the mounting groove 301; after the chip body 200 and the first bracket 300 are set on the substrate body 100, the etching glue layer 700 is removed by the etching liquid flowing through the positioning groove 104.

[0029] It is understandable that the etching glue layer 700 can be pre-formed in the mounting groove 301 by injection molding, coating and other processes, and form an initial groove 701 for the chip body 200 to be embedded. Therefore, after the first bracket 300 is bonded to the bracket mounting position 102, the positioning and installation of the chip body 200 and the first bracket 300 are completed; then, as Figure 6 and Figure 7As shown, the first positioning hole 302 is blocked by the movable plug 330, and the etching liquid is injected into the installation groove 301 through the positioning groove 104, that is, the etching glue layer 700 is removed, and the cavity 001 is formed, ensuring that the chip body 200 is not in contact with the installation groove 301, so as to ensure that the chip body 200 is not directly subjected to the plastic packaging pressure during the subsequent plastic packaging process. In addition, it should be emphasized that the positioning groove 104 in the above-mentioned embodiment, on the one hand, plays the role of an inlet and outlet in the process of removing the etching glue layer 700, and on the other hand, plays the role of releasing gas and pressure during the molding process of the first packaging layer 400, ensuring that the chip body 200 is not directly subjected to pressure in the limited space of the semiconductor metal packaging substrate, and can quickly release pressure, so that the structure of the semiconductor metal packaging substrate is more compact. Among them, the combination of the etching liquid and the etching glue layer 700 in this embodiment can be a combination of organic matter such as acrylic resin and acetone solvent, etc., using a principle similar to photoresist etching, which is not repeated in this embodiment.

[0030] On the basis of the above-mentioned implementation, the semiconductor metal package substrate adopts a packaging structure of a positive jumper, which can make the structure of the semiconductor metal package substrate more compact and more stable. Figures 2 to 9 As shown, the substrate body 100 is provided with a jumper hole 105 in the chip mounting position 101, and the jumper hole 105 extends from one board surface of the substrate body 100 to another board surface of the substrate body 100; the chip body 200 is located on one board surface of the substrate body 100, and the chip body 200 is electrically connected to the other board surface of the substrate body 100 through a jumper portion 800 passing through the jumper hole 105.

[0031] In addition, since the positioning groove 104 plays a role in exhaust and pressure relief during the molding process of the first packaging layer 400, the size of the jumper hole 105 that originally needs to bear part of the exhaust and pressure relief function can be designed to be smaller, that is, the setting of the positioning groove 104 is used to make up for the defects caused by the reduction in the size of the jumper hole 105, which means that the overall rigidity of the substrate body 100 is higher, thereby improving the overall stability.

[0032] Furthermore, a second bracket 500 is disposed outside the other board surface of the substrate body 100 , and at least a portion of the second bracket 500 extends into the cavity 001 through the positioning groove 104 , and at least another portion of the second bracket 500 covers the outside of the jumper portion 800 .

[0033] Specifically, the second bracket 500 includes a bracket parallel portion 510 that is parallel to the substrate body 100 and spaced apart; the bracket parallel portion 510 is provided with a bracket rib portion 520, and the bracket rib portion 520 extends to the other board surface of the substrate body 100; the bracket parallel portion 510, the bracket rib portion 520, the other board surface of the substrate body 100 and the jumper hole 105 are arranged to form a jumper cavity 002; the bracket rib portion 520 is also provided with positioning columns 530 corresponding to each positioning groove 104, and the positioning columns 530 extend through the positioning groove 104 to the cavity 001.

[0034] Furthermore, a second packaging layer 600 is also included, and the second packaging layer 600 covers the second bracket 500 and partially extends into the first positioning hole 302. The second bracket 500 can be a metal bracket, a ceramic bracket, a plastic bracket, etc., with an inner layer coated with an insulating layer.

[0035] In the above-mentioned implementation, the materials of the first encapsulation layer 400 and the second encapsulation layer 600 may be epoxy resin, or other optional encapsulation plastics, which are not specifically limited in this embodiment.

[0036] In the above embodiment, the other board surface of the substrate body 100 is provided with external bumps (not shown) outside the second packaging layer 600, and the external bumps are electrically connected to the jumper part 800 through the internal circuit pattern of the substrate body 100. At this time, most areas of the chip body 200 can be covered by the packaging layer, greatly improving the overall stability.

[0037] Embodiment 2: The manufacturing process of the semiconductor metal package substrate in this embodiment is used to prepare the semiconductor metal package substrate in Embodiment 1, and includes: S100, providing a substrate body 100, on which a chip mounting position 101 and a bracket mounting position 102 covering the chip mounting position 101 are disposed; S200, installing the chip body 200 on the chip mounting position 101, bonding the first bracket 300 on the bracket mounting position 102, and the first bracket 300 is preset with a first positioning hole 302 at a portion outside the chip mounting position 101; the first bracket 300 and the substrate body 100 enclose a cavity 001 for accommodating the chip body 200; S300, forming a second positioning hole 103 by drilling a hole from one side of the substrate body 100 through the first positioning hole 302, and groove processing the second positioning hole 103 from the other side of the substrate body 100 to form a positioning groove 104 extending to the cavity 001; S400 , compression molding the substrate body 100 from one side of the substrate body 100 to form a first packaging layer 400 covering the first bracket 300 .

[0038] As another optional implementation, a positioning groove 104 matching the first positioning hole 302 may be preset on the substrate body 100 . The difference from the above implementation is that step S300 may be omitted.

[0039] Furthermore, before step S200, the method further includes: Step S110, providing a first bracket 300, the first bracket 300 includes a bracket body 310 formed with a mounting groove 301, and the bracket body 310 is provided with a mounting edge portion 320 protruding outwardly from the edge of the groove of the mounting groove 301; S120, filling the mounting groove 301 with an etching glue layer 700, etching the glue layer 700 to form an initial groove 701 for embedding the chip body 200, and embedding the chip body 200 into the initial groove 701; Step S200 specifically includes: S201, bonding the mounting edge portion 320 of the first bracket 300 to the bracket mounting position 102, and the chip body 200 is correspondingly arranged at the chip mounting position 101; it should be noted that at this time, the cavity 001 is filled with an etching glue layer 700; After step S300, the method further includes: S310, using the movable plug 330 to block the first positioning hole 302; S320 , injecting etching solution into the cavity 001 through the positioning groove 104 to remove the etching glue layer 700 .

[0040] Furthermore, after step S201, the method further includes: S202, using the jumper part 800 to electrically connect the pins of the chip body 200 to the other side of the substrate body 100, so that the chip body 200 is connected to the internal circuit pattern of the substrate body 100; at the same time, the external bumps (not shown) arranged on the other board surface of the substrate body 100 outside the second packaging layer 600 can be electrically connected to the jumper part 800 through the internal circuit pattern of the substrate body 100; it should be pointed out that the external bumps and the internal circuit pattern are both design elements preset in the substrate body 100, and their formation is well known to those skilled in the art, and will not be specifically expanded in this embodiment.

[0041] After step S400, the method further includes: S510, insert the positioning column 530 of the second bracket 500 through the positioning groove 104 into the cavity 001, so that the bracket retaining edge portion 520 is flush with the other board surface of the substrate body 100, and a gap is left between the bracket parallel portion 510 and the other board surface of the substrate body 100, so that the bracket parallel portion 510, the bracket retaining edge portion 520, the other board surface of the substrate body 100 and the jumper hole 105 are surrounded to form a jumper cavity 002; S520 , the substrate body 100 is compression molded from the other side of the substrate body 100 to form a second packaging layer 600 covering the second bracket 500 . The molding method of the second packaging layer 600 is the same as that of the first packaging layer 400 , which will not be described in detail in this embodiment.

[0042] S300, forming a second positioning hole 103 by drilling a hole from one side of the substrate body 100 through the first positioning hole 302, and groove processing the second positioning hole 103 from the other side of the substrate body 100 to form a positioning groove 104 extending to the cavity 001; S400, compression molding the substrate body 100 from one side of the substrate body 100 to form a first packaging layer 400 covering the first bracket 300; Next, in order to facilitate the understanding of those skilled in the art, a manufacturing process of a semiconductor metal packaging substrate in this embodiment is introduced: like Figure 1 and Figure 2 As shown, S100, providing a substrate body 100, on which a chip mounting position 101 and a bracket mounting position 102 covering the chip mounting position 101 are disposed; S110, providing a first bracket 300, the first bracket 300 comprising a bracket body 310 formed with a mounting groove 301, the bracket body 310 is provided with a mounting edge portion 320 protruding outwardly from the edge of the groove of the mounting groove 301; the mounting edge portion 320 is preset with a first positioning hole 302; A second bracket 500 is provided, and the second bracket 500 includes a bracket parallel portion 510 which is parallel to and spaced from the substrate body 100; a bracket rib portion 520 is protrudingly provided on the bracket parallel portion 510, and a positioning column 530 is protrudingly provided on the bracket rib portion 520 corresponding to each positioning groove 104; S120, filling the mounting groove 301 with an etching glue layer 700, etching the glue layer 700 to form an initial groove 701 for embedding the chip body 200, and embedding the chip body 200 into the initial groove 701; S201, bonding the mounting edge portion 320 of the first bracket 300 to the bracket mounting position 102; at this time, the chip body 200 is adaptively arranged at the chip mounting position 101; it should be noted that at this time, the cavity 001 is filled with an etching glue layer 700; S202, using the jumper 800 to electrically connect the pins of the chip body 200 to the other side of the substrate body 100, so that the chip body 200 is connected to the internal circuit pattern of the substrate body 100; like Figure 3 As shown, S300, a second positioning hole 103 is formed by drilling a hole from one side of the substrate body 100 through the first positioning hole 302, and a groove is processed on the second positioning hole 103 from the other side of the substrate body 100 to form a positioning groove 104 extending to the cavity 001; like Figures 4 to 6 As shown, S310, using the movable plug 330 to block the first positioning hole 302; S320, injecting etching liquid into the cavity 001 through the positioning groove 104 to remove the etching glue layer 700; S330, pulling out the movable plug 330; like Figure 7 As shown, S400, the substrate body 100 is compression molded from one side of the substrate body 100 to form a first packaging layer 400 covering the first bracket 300; like Figure 8 As shown, S510, insert the positioning column 530 of the second bracket 500 through the positioning groove 104 into the cavity 001, so that the bracket retaining edge portion 520 is flush with the other board surface of the substrate body 100, and a gap is left between the bracket parallel portion 510 and the other board surface of the substrate body 100, thereby allowing the bracket parallel portion 510, the bracket retaining edge portion 520, the other board surface of the substrate body 100 and the jumper hole 105 to surround and form a jumper cavity 002; like Fig. 9 As shown, S520 , the substrate body 100 is compression molded from the other side of the substrate body 100 to form a second packaging layer 600 covering the second bracket 500 .

[0043] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor metal packaging substrate, characterized in that: Comprising a substrate body (100) and a first packaging layer (400), the substrate body (100) being provided with a chip mounting position (101) for placing a chip body (200) and a bracket mounting position (102) for setting a first bracket (300), the chip mounting position (101) being covered by the bracket mounting position (102); The first bracket (300) is formed with a mounting groove (301), the mounting groove (301) and the substrate body (100) enclose a cavity (001), the chip mounting position (101) is located in the cavity (001), and the chip body (200) does not contact the groove wall of the mounting groove (301); A first positioning hole (302) is preset on a portion of the first bracket (300) outside the chip mounting position (101); a positioning groove (104) extending to the cavity (001) is opened on the substrate body (100) based on the first positioning hole (302), so that one end of the positioning groove (104) is connected to the first positioning hole (302) and the other end is connected to the cavity (001); The first packaging layer (400) covers the first bracket (300) and partially extends into the first positioning hole (302).

2. The semiconductor metal packaging substrate according to claim 1, characterized in that: When the first bracket (300) is arranged at the bracket installation position (102), a second positioning hole (103) is opened in the base plate body (100) corresponding to the first positioning hole (302); and the positioning groove (104) is formed by expanding the second positioning hole (103).

3. The semiconductor metal packaging substrate according to claim 1, characterized in that: The first bracket (300) comprises a bracket body (310) formed with the mounting groove (301), the bracket body (310) being provided with a mounting edge portion (320) protruding outwardly from the edge of the groove opening of the mounting groove (301), and the mounting edge portion (320) being bonded to the bracket mounting position (102); Wherein, the area where the support body (310) is projected onto the substrate body (100) covers the chip mounting position (101).

4. The semiconductor metal packaging substrate according to claim 3, characterized in that: When the first bracket (300) is arranged before the bracket installation position (102), the installation groove (301) is filled with an etching glue layer (700), and the etching glue layer (700) forms a chip initial groove (701) for the chip body (200) to be embedded; the etching glue layer (700) does not extend beyond the installation groove (301), and the chip body (200) is flush with the notch edge of the installation groove (301); After the chip body (200) and the first bracket (300) are arranged on the substrate body (100), the etching glue layer (700) is removed by the etching liquid flowing through the positioning groove (104).

5. The semiconductor metal packaging substrate according to claim 4, characterized in that: The substrate body (100) is provided with a jumper hole (105) in the chip mounting position (101), and the jumper hole (105) extends from one board surface of the substrate body (100) to another board surface of the substrate body (100); the chip body (200) is located on one board surface of the substrate body (100), and the chip body (200) is electrically connected to the other board surface of the substrate body (100) via a jumper portion (800) passing through the jumper hole (105).

6. The semiconductor metal packaging substrate according to claim 5, characterized in that: A second bracket (500) is also provided outside the other plate surface of the substrate body (100), at least a portion of the second bracket (500) extends into the cavity (001) through the positioning groove (104), and at least another portion of the second bracket (500) covers the outside of the jumper portion (800).

7. The semiconductor metal packaging substrate according to claim 6, characterized in that: The second bracket (500) comprises a bracket parallel portion (510) which is parallel to and spaced from the substrate body (100); the bracket parallel portion (510) is provided with a bracket retaining edge portion (520) protruding therefrom, and the bracket retaining edge portion (520) extends to another plate surface of the substrate body (100); the bracket parallel portion (510), the bracket retaining edge portion (520), another plate surface of the substrate body (100) and the jumper hole (105) are arranged to form a jumper cavity (002); The bracket retaining edge portion (520) is also provided with a positioning column (530) corresponding to each of the positioning grooves (104), and the positioning column (530) passes through the positioning groove (104) and extends into the cavity (001).

8. The semiconductor metal packaging substrate according to claim 6, characterized in that: A second packaging layer (600) is also provided, wherein the second packaging layer (600) covers the second bracket (500) and partially extends into the first positioning hole (302).

9. The semiconductor metal packaging substrate according to claim 8, characterized in that: The other board surface of the substrate body (100) is provided with an external bump outside the second packaging layer (600), and the external bump is electrically connected to the jumper part (800) through the internal circuit pattern of the substrate body (100).

10. A process for manufacturing a semiconductor metal packaging substrate, characterized in that: For preparing the semiconductor metal packaging substrate as claimed in claim 1, comprising: Providing a substrate body, wherein the substrate body is provided with a chip mounting position and a bracket mounting position covering the chip mounting position; The chip body is mounted on the chip mounting position, and the first bracket is bonded on the bracket mounting position, wherein the first bracket is pre-set with a first positioning hole at a portion outside the chip mounting position; the first bracket and the substrate body form a cavity for accommodating the chip body; A second positioning hole is formed by drilling a hole from one side of the substrate body through the first positioning hole, and a second positioning hole groove is processed from the other side of the substrate body to form a positioning groove extending to the cavity; The substrate body is plastic-sealed from one side of the substrate body to form a first packaging layer covering the first bracket.

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