Power supply control system and method of GNSS (Global Navigation Satellite System) receiver and GNSS receiver

By adopting a simplified power control system and field reconfigurable chip in GNSS receivers, the problems of low integration and insufficient stability of existing GNSS receivers are solved, and higher integration, stability and functional expansion capabilities are achieved .

CN119483262APending Publication Date: 2025-02-18COMNAV TECH
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Patent Information

Application Number
CN202411858215.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

The existing GNSS receiver hardware system has low integration, complex circuits, and many types of electronic devices, resulting in low system stability and difficulty in expanding new functions.

Method used

Adopt a GNSS receiver power control system including power input module, power management module and power load module. The field reconfigurable chip is used to simplify the hardware circuit structure, reduce the number of peripheral circuit devices, and reconfigure multiple chips through field reconfigurable chips. Key functions achieve high integration and intelligence.

Benefits of technology

By simplifying the hardware circuit structure and reducing the number of devices, the cost of the whole machine is reduced, the integration and stability of the whole machine is improved, the functional expansion capabilities are reserved, and the technical confidentiality is improved.

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Abstract

The invention provides a power supply control system and method of a GNSS receiver and the GNSS receiver, the system comprises a power supply input module, a power supply management module and a power supply load module, the input end of the power supply input module is connected with an external power supply, and the power supply input module supplies power to the power supply load module through the power supply management module; the power supply load module is used for supplying power to each load; the power supply detection end of the field reconfigurable chip is connected with the output end of the power supply input module, the output end of the field reconfigurable chip is connected with the control end of the power supply management module, and the power supply management module is configured to respond to an output control signal of the field reconfigurable chip to control on-off of a power supply path; and the control module is communicated with the field reconfigurable chip. According to the invention, the hardware circuit structure design is simplified, the number of peripheral circuit devices is reduced, the cost of the whole machine is reduced, and the integration level of the whole machine is improved.
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Description

Technical Field

[0001] The present application relates to the field of navigation technology, and in particular to a power control system and method for a GNSS receiver and a GNSS receiver. Background Art

[0002] GNSS (Global Navigation Satellite System) receiver is an electronic measuring instrument used in the field of surveying and mapping science and technology. It can receive satellite signals to provide a full range of accurate and reliable positioning services. At present, high-end receivers can achieve centimeter-level high-precision positioning effects, and have the advantages of portability, miniaturization, and full functions, which has greatly promoted the development of high-tech fields such as geographic information, surveying and mapping, drones, and unmanned driving.

[0003] The hardware system of a GNSS receiver is an important foundation for the operation of the device. Its integration and reliability will directly determine the quality of the product. From the perspective of hardware system design, the existing mainstream receivers on the market have several obvious shortcomings:

[0004] (1) The circuit integration level inside the receiver is low and the circuit system involved is complex.

[0005] (2) There are many types of electronic devices inside the receiver, which is not conducive to improving system stability.

[0006] (3) Once the circuit structure inside the receiver is finalized, it is difficult to expand new functions and modify the hardware. Summary of the invention

[0007] In view of the problems in the prior art, the purpose of the present application is to provide a power control system, method and GNSS receiver for a GNSS receiver, which simplifies the hardware circuit structure design, reduces the number of peripheral circuit components, reduces the cost of the whole machine, and improves the integration of the whole machine.

[0008] The present application provides a power control system for a GNSS receiver, including:

[0009] A power input module, a power management module and a power load module. The input end of the power input module is connected to an external power supply. The power input module supplies power to the power load module through the power management module. The power load module is used to supply power to various loads.

[0010] A field reconfigurable chip, wherein a power detection terminal of the field reconfigurable chip is connected to an output terminal of the power input module, and the output terminal of the field reconfigurable chip is connected to a control terminal of the power management module, and the power management module is configured to control the on-off of the power supply path in response to an output control signal of the field reconfigurable chip;

[0011] A control module communicates with the field reconfigurable chip.

[0012] In some embodiments, the power management module includes at least one switch transistor, and a control terminal of the switch transistor is connected to an output terminal of the field reconfigurable chip.

[0013] In some embodiments, the power load module includes a voltage conversion unit for converting an input voltage into a voltage required by each load and then supplying power to the load.

[0014] In some embodiments, the voltage conversion unit includes a BUCK step-down circuit.

[0015] In some embodiments, the system further includes a system key module configured to send a key detection signal to the field reconfigurable chip in response to a key operation action.

[0016] In some embodiments, the field reconfigurable chip includes a normal power input pin, a power detection pin, a key detection pin, a signal input pin, and a signal output pin;

[0017] The power detection pin is connected to the output end of the power input module, and the key detection pin is connected to the output end of the system key module.

[0018] In some embodiments, the signal output pins of the field reconfigurable chip include switch control pins and control module control pins. The switch control pins are used to output output control signals to the power management module, and the control module control pins are used to output power-on signals or power-off signals to the control module. The power management module is configured to control the power supply path to be turned on in response to the output control signal corresponding to power-on, and to control the power supply path to be turned off in response to the output control signal corresponding to power-off.

[0019] In some embodiments, the field reconfigurable chip includes a watchdog signal input pin, and the watchdog signal input pin is connected to the control module.

[0020] The embodiment of the present application further provides a power control method for a GNSS receiver, using the power control system of the GNSS receiver described above, the method comprising the following steps:

[0021] The field reconfigurable chip determines whether a power-on condition is met, where the power-on condition includes the power detection terminal detecting an external power input and / or receiving a key detection signal corresponding to power-on from a system key module;

[0022] If the power-on conditions are met, the field reconfigurable chip sends an output control signal to the power management module, the power management module controls the power supply path to be turned on, and the power input module supplies power to each load through the power load module;

[0023] The field reconfigurable chip determines whether a shutdown condition is met, where the shutdown condition includes receiving a key detection signal corresponding to shutdown from a system key module and / or receiving a software shutdown signal from a control module;

[0024] If the shutdown condition is met, the field reconfigurable chip sends an output control signal to the power management module, and the power management module controls the power supply path to be disconnected.

[0025] An embodiment of the present application also provides a GNSS receiver, comprising the above-mentioned power control system.

[0026] The power control system, method and GNSS receiver provided by the present application have the following advantages:

[0027] By adopting the present application, the field reconfigurable chip is used as the core module, which simplifies the hardware circuit structure design, reduces the number of peripheral circuit devices, improves the stability of the receiver, reduces the hardware design cost, and thus reduces the cost of the whole machine and improves the integration of the whole machine. Since the field reconfigurable chip is used as the core module, the logic design inside the chip is not easy to be cracked, which improves the technical confidentiality of the receiver; the field reconfigurable chip has multiple key functions of power control and has high integration and intelligence. The power control system reserves the function expansion capability, and the field reconfigurable chip can be repeatedly customized and burned according to different needs. Different needs only require the replacement of different reconfigurable chips to achieve productization, without repeatedly changing the motherboard design, reducing the economic cost and time cost of the project hardware revision. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings.

[0029] Figure 1 is a structural block diagram of a power control system of a GNSS receiver according to an embodiment of the present application;

[0030] Figure 2 This is a structural block diagram of a power control system of a GNSS receiver after adding a system button module according to an embodiment of the present application;

[0031] Figure 3 It is a schematic diagram of the working principle of a power control system of a GNSS receiver according to an embodiment of the present application;

[0032] Figure 4 is a schematic diagram of a field reconfigurable chip according to an embodiment of the present application;

[0033] Figure 5 This is a system power on / off control circuit diagram of an embodiment of the present application;

[0034] Figure 6 and Figure 7 is a peripheral circuit diagram of a field reconfigurable chip according to an embodiment of the present application;

[0035] Figure 8 It is a flow chart of a power control method of a GNSS receiver according to an embodiment of the present application. DETAILED DESCRIPTION

[0036] The example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided so that the present application will be comprehensive and complete, and the concept of the example embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their repeated descriptions will be omitted. "Or" and "or" in the specification may both mean "and" or "or". Although the terms "upper", "lower", "between", etc. may be used in this specification to describe different exemplary features and elements of the present application, these terms are used herein only for convenience, such as according to the directions of the examples described in the accompanying drawings. Nothing in this specification should be construed as requiring a specific three-dimensional direction of the structure to fall within the scope of the present application. Although "first" or "second" etc. are used in this specification to represent certain features, they are only used to represent the function, and are not used as a limitation on the number and importance of specific features.

[0037] The GNSS receivers in the prior art have the defects of low integration, complex circuit system, many types of electronic components, low system stability, and difficulty in expanding new functions. In order to solve the technical problems in the prior art, the present application provides a power control system of a GNSS receiver and a GNSS receiver including the same. A GNSS receiver is an electronic device for receiving and processing signals from a global navigation satellite system. A GNSS receiver generally includes: an antenna, a radio frequency front end, an analog-to-digital converter, a digital signal processing unit, a memory, and a power control system. The power control system of a GNSS receiver is used to control the startup and shutdown of the GNSS system and control the power supply process from an external power supply to various electrical loads.

[0038] like Figure 1 As shown, the power control system of the GNSS receiver of the embodiment of the present application includes a power input module M100, a power management module M200, a power load module M300, a field reconfigurable chip M400 and a control module M500. Among them, the input end of the power input module M100 is connected to an external power supply. The power input module M100 supplies power to the power load module M300 through the power management module M200, and the power load module M300 is used to supply power to various loads.

[0039] The power detection terminal of the field reconfigurable chip M400 is connected to the output terminal of the power input module M100 to detect whether there is external power input in the power input module M100. The output terminal of the field reconfigurable chip M400 is connected to the control terminal of the power management module M200. The field reconfigurable chip M400 can communicate with the control module M500.

[0040] A field reconfigurable chip is an integrated circuit chip that can reconfigure its own functions and internal circuit structure in the actual operating environment of the GNSS receiver. A field reconfigurable chip can realize a variety of different functions at different times or according to different application requirements, and has higher flexibility and adaptability. Field reconfigurable chips usually use programmable logic device technology, such as field programmable gate arrays and complex programmable logic devices, in which the programmable elements can define their functions and connection methods through configuration data. When the field reconfigurable chip needs to be reconfigured, the external configuration data is loaded into the configuration memory inside the chip. Once the configuration data is written, it will change the functions of the internal logic units of the chip and the connection relationship between them, thereby realizing the reconstruction of the chip function.

[0041] In this embodiment, the control module M500 is implemented using an MCU (Micro-Controller Unit) as the main control of the power control system. The control module M500 can realize the reconstruction of the field reconfigurable chip M400 by communicating with the field reconfigurable chip M400 (such as through serial communication or other communication methods). As the core component of the power control system, the field reconfigurable chip M400 integrates multiple transistors and integrated circuits, and can realize DC source power-on, button power-on, software shutdown, hardware shutdown, watchdog function, etc. The control module M500 is the software part, which can complete the complex functions of the power control system, such as logic control, data calculation, data storage, etc.

[0042] The power management module M200 is configured to control the on-off of the power supply path in response to the output control signal of the field reconfigurable chip M400. In this embodiment, the power management module M200 includes at least one switching transistor (such as a combination of a power-type NMOS tube and a power-type PMOS tube), and the control end of the switching transistor is connected to the output end of the field reconfigurable chip M400. By controlling the on and off of the switching transistor, the on and off of the power supply path between the power input module M100 and the power load module M300 can be controlled. The field reconfigurable chip M400 can be configured to send an output control signal to the power management module M200 to control its on-power supply path when an external power input is detected through the power detection end and / or when a software power-on signal is received from the control module M500, so that the external power input by the power input module M100 can supply power to each load through the power load module M300.

[0043] In this embodiment, the input end of the power input module M100 is connected to the inlet of an external DC power supply to supply power to the entire power control system. The supply voltage range of the external power supply is 5V-28V, and the maximum current does not exceed 3A. The power input module M100 may also include a filtering circuit, a protection circuit, etc. The power load module M300 includes a voltage conversion unit, which is used to convert the input voltage to the voltage required by each load and then supply power to the load. The voltage conversion unit includes a BUCK buck circuit. The BUCK buck circuit is a direct current-to-direct current (DC-DC) conversion circuit, which is used to reduce the input DC voltage to a lower DC output voltage. The load here refers to the various power-consuming modules in the GNSS receiver.

[0044] like Figure 2As shown, in this embodiment, the power control system of the GNSS receiver also includes a system key module M600, which is configured to send a key detection signal to the field reconfigurable chip M400 in response to a key operation action. A power switch button can be set on the GNSS receiver. When the receiver is not started, the power switch button is pressed for the first time, and the system key module M600 sends a key detection signal corresponding to power on to the field reconfigurable chip M400. When the receiver is in a working state, the power switch button is pressed for the second time, and the system key module M600 sends a key detection signal corresponding to power off to the field reconfigurable chip M400. When the field reconfigurable chip M400 receives the key detection signal corresponding to power on, it sends an output control signal to the power management module M200 to turn on the power supply path, so as to realize key power on. When the field reconfigurable chip M400 receives the key detection signal corresponding to power off, it sends an output control signal to the power management module M200 to disconnect the power supply path, so as to realize hardware shutdown. In another embodiment, a power-on button and a power-off button may be respectively provided on the GNSS receiver, and the system button module M600 sends different button detection signals to the field reconfigurable chip M400 by detecting operation signals of different buttons.

[0045] Figure 3 It is a schematic diagram of the working principle of the power control system of the GNSS receiver of this embodiment. The field reconfigurable chip is the core control device of the power control system, which contains a lower-level integrated circuit inside, and its functions can be changed on-site according to the functional requirements of the system. The normal power input part is the power supply provided by the system to the reconfigurable chip, which can ensure the normal operation of the chip and complete the system's power on and off functions. The power detection part is used to determine whether the system is externally powered by a DC power supply. If the system is externally powered by a DC power supply, the internal logic will perform the power-on operation. The power detection part is connected to the power input module through the power detection end of the field reconfigurable chip to realize the corresponding function. The key detection part is used to determine the key status of the human-computer interaction system of the system. If different key level changes are detected, the internal logic will perform key power-on and hardware shutdown operations. The signal input part is the source of the control signal from the system to the field reconfigurable chip. The signal output part is the control signal output of the field reconfigurable chip to the subsequent circuit (power management module).

[0046] Key-press power-on means that after the system key module sends a key detection signal corresponding to power-on (such as a high level lasting 0.8s) to the field reconfigurable chip, the field reconfigurable chip controls the power management module to power on the system. Hardware shutdown means that after the system key module sends a key detection signal corresponding to shutdown (such as a high level lasting 10s) to the field reconfigurable chip, the field reconfigurable chip controls the power management module to power off the system. The field reconfigurable chip can also implement self-startup. When the power detection end detects external input power, it controls the power management module to power on the system. The field reconfigurable chip can also implement software shutdown. Software shutdown means that after the control module sends a software shutdown signal to the field reconfigurable chip, the field reconfigurable chip controls the power management module to power off the software.

[0047] Figure 4 It is a schematic diagram of a field reconfigurable chip of an embodiment of the present application. The field reconfigurable chip includes a normal power input pin (pin 1 provides a stable voltage to the field reconfigurable chip through the normal power input VCC, and pin 8 is a ground loop pin), a power detection pin (pin 6, which corresponds to the power detection end, is connected to the output end of the power input module, and is used to detect whether there is an external DC power input), a key detection pin (pin 5, used to receive the key detection signal of the system key module), a signal input pin (pin 2, pin 3, pin 10) and a signal output pin (pin 9, pin 11, pin 13, pin 14). The normal power input VCC comes from the lithium battery in the GNSS receiver, and provides a normal power input to the required module with extremely low power consumption. The power detection pin is connected to the output end of the power input module, and the key detection pin is connected to the output end of the system key module.

[0048] In this embodiment, the signal output pins of the field reconfigurable chip include a switch control pin and a control module control pin. The switch control pin is pin 12, which outputs an output control signal corresponding to power on or an output control signal corresponding to power off to the power management module according to the current state. The power management module is configured to control the power supply path to be turned on in response to the output control signal (PWR_CTL) corresponding to power on, and to control the power supply path to be disconnected in response to the output control signal corresponding to power off. The control module control pins are pins 13 and 9, pin 13 is used to control the power-on level timing of the MCU during the power-on process, and pin 13 is used to send a shutdown signal to the MCU.

[0049] In this embodiment, the field reconfigurable chip includes a watchdog signal input pin (pin 2), which is connected to the control module. The watchdog signal input pin is used to receive the "feed the dog" signal of the control module. During system operation, the watchdog timer in the field reconfigurable chip starts counting down from an initial value. If the correct "feed the dog" signal is not received through this input pin before the timer countdown ends (overflows), the watchdog circuit will consider that the system has failed, thereby triggering a reset or other pre-set exception handling mechanism. By integrating the watchdog function in the field reconfigurable chip, the watchdog signal input pin of the chip monitors the control module in real time to prevent the software system program from running dead.

[0050] By adopting the power control system of the GNSS receiver, the power control system is optimized and designed, the integration of the whole machine is improved, and a field reconfigurable chip is used to replace the traditional power control circuit (the traditional power control circuit contains more than 20 passive components, MOS tubes, chips, etc.), which simplifies the hardware schematic diagram and reduces the PCB layout area. This solution simplifies the components of the power control system of the GNSS receiver, further reduces the failure risk caused by various components, and is conducive to improving the operation stability of the power control system. This solution reserves the function expansion capability for the power control system of the GNSS receiver. The field reconfigurable chip can be repeatedly customized and burned according to different needs. Different needs only require the replacement of different reconfigurable chips to achieve productization, without repeatedly changing the motherboard design, reducing the hardware design cost, and reducing the economic cost and time cost of the project hardware revision. Since the field reconfigurable chip is used as the core module, the logic design inside the chip is not easy to be cracked, which improves the technical confidentiality of the receiver; the field reconfigurable chip has multiple key functions of power control, with high integration and intelligence. Therefore, the hardware system integration of the GNSS receiver using this power control system is greatly improved, and the hardware function scalability is enhanced, which will greatly enhance the competitiveness of the receiver.

[0051] Figure 5 1 is a system power on / off control circuit diagram of an embodiment of the present application. Figure 5As shown, the power management module includes a switching transistor Q2 and a switching transistor Q1 as well as resistors, capacitors, diodes and other devices that cooperate with the switching transistors. The types of each switching transistor can be selected as needed, and the parameters of each component can be selected as needed. The gate of the switching transistor Q2 corresponds to the control end of the power management module, and its input is the output control signal PWR_CTR of the switch control pin (pin 12) of the field reconfigurable chip. PP_CTL is the network name of the power-on signal of pin 12. VINMAIN represents the main input voltage output by the power input module, corresponding to the external input power supply. VSYS represents the system voltage, corresponding to the input end of the power load module. The on-off of the power supply path from VINMAIN to VSYS is controlled by controlling the on-off of the switching transistor Q1. The on-off of the switching transistor Q1 is controlled by the switching transistor Q3. VCC_3V3_GNSS refers to the system power generated after the system is powered on. Figure 5 The left middle part is equipped with an alternative power-on / off circuit, which performs the same power-on / off control function as the reconfigurable chip and is reserved only as a hardware alternative. Diode D2 is used to isolate the key detection signal KEY_POWER and the VCC_3V3_GNSS power supply. The logic of using this part of the circuit to perform power-on is: the key detection signal KEY_POWER is input first, so that the system backstage (power management module) is instantly turned on to generate the VCC_3V3_GNSS power supply, and then the user releases the key detection signal KEY_POWER, the VCC_3V3_GNSS power supply will continue to pull up to keep the system powered on. At this time, there will be a period of time when the two power supplies exist at the same time, and diode D2 is required for isolation. A capacitor is provided in the lower left part of the circuit to reduce the input power ripple. Capacitors C38, C39 and C40 form an RC delay circuit with resistor R39, the purpose of which is to design a 1S delay power-on process for the key to prevent the user from accidentally touching the key and triggering the key function and causing power-on. Therefore, the alternative on / off circuit is connected to the control terminal of the power management module through the RC delay circuit.

[0052] Figure 6 and Figure 7 FIG. 1 is a peripheral circuit diagram of a field reconfigurable chip according to an embodiment of the present application. Figure 6As shown, the output terminal VINCG of the power input module is input to pin 6 of the field reconfigurable chip through resistor R266, resistor R5856 and diode D114. VINCG represents the front-stage external DC power supply. KEY_POWER represents the key detection signal, which is input to pin 5 of the field reconfigurable chip. VCC_CHG represents the normal power input provided by the built-in lithium battery, which is input to pin 1 of the field reconfigurable chip. VCC_3V3 represents the system power generated after the system is powered on. Pin 12 is a switch control pin, which is used to send the output control signal PWR_CTL to the power management module to control the on and off of the switching transistor. Pin 13 is a control module control pin, which is used to control the power-on level timing of the MCU during the boot process, and will generate a level of a specific waveform. Pin 9 is a control module control pin, which is used to output the output control signal OFF_SYS to the control module to shut down the control module. Through the peripheral circuit design, the power-on and power-off logic is realized as follows: when the external power is input to pin 6 through the power input module, the field reconfigurable chip directly controls the power management module to conduct and power on, and the control module is turned on, that is, power-on self-start. Therefore, when the external power is connected, the system power-on signal PWR_CTL can be directly pulled high without pressing a button, and the system is turned on and powered on. When there is no external power input, the GNSS receiver is only powered by the battery, and the user needs to press a button to generate a key detection signal to turn it on.

[0053] Pin 10 of the field reconfigurable chip is used to indicate the MCU power on / off status. Figure 7 The circuit diagram of the MCU providing the on / off state indication signal M_DET to the field reconfigurable chip is used to feedback the current on / off state of the MCU to the field reconfigurable chip. Among them, LDO5_1V8 refers to the power output generated after the MCU works normally. The existence of this power output indicates that the MCU starts normally, and the switch transistor Q47 is controlled to generate the on / off state indication signal M_DET, which is input to the pin 10 of the field reconfigurable chip.

[0054] like Figure 8 As shown, the embodiment of the present application further provides a power control method for a GNSS receiver, using the power control system of the GNSS receiver described above, the method comprises the following steps:

[0055] S100: The field reconfigurable chip determines whether a power-on condition is met, where the power-on condition includes the power detection terminal detecting an external power input and / or receiving a key detection signal corresponding to power-on from a system key module;

[0056] If the power-on condition is met, then S200: the field reconfigurable chip sends an output control signal to the power management module, the power management module controls the power supply path to be turned on, and the power input module supplies power to each load through the power load module; wherein, when the power detection end detects the external power input, the self-starting function can be realized through step S200; when the key detection signal corresponding to the power-on is received from the system key module, the hardware power-on function can be realized through step S200;

[0057] S300: The field reconfigurable chip determines whether a shutdown condition is met, where the shutdown condition includes receiving a shutdown corresponding key detection signal from the system key module and / or receiving a software shutdown signal from the control module;

[0058] If the shutdown condition is met, then S400: the field reconfigurable chip sends an output control signal to the power management module, and the power management module controls the power supply path to be disconnected. When a key detection signal corresponding to shutdown is received from the system key module, the hardware shutdown function can be implemented through step S400; when a software shutdown signal is received from the control module, the software shutdown function can be implemented through step S400.

[0059] In summary, the power control system, method and GNSS receiver provided by the present application have the following advantages:

[0060] By adopting the present application, the field reconfigurable chip is used as the core module, which simplifies the hardware circuit structure design, reduces the number of peripheral circuit devices, improves the stability of the receiver, reduces the hardware design cost, and thus reduces the cost of the whole machine and improves the integration of the whole machine. Since the field reconfigurable chip is used as the core module, the logic design inside the chip is not easy to be cracked, which improves the technical confidentiality of the receiver; the field reconfigurable chip has multiple key functions of power control and has high integration and intelligence. The power control system reserves the function expansion capability, and the field reconfigurable chip can be repeatedly customized and burned according to different needs. Different needs only require the replacement of different reconfigurable chips to achieve productization, without repeatedly changing the motherboard design, reducing the economic cost and time cost of the project hardware revision.

[0061] The above content is a further detailed description of the present application in combination with specific preferred implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. A power control system for a GNSS receiver, characterized in that: include: A power input module, a power management module and a power load module, wherein the input end of the power input module is connected to an external power source, the power input module supplies power to the power load module through the power management module, and the power load module is used to supply power to various loads; A field reconfigurable chip, wherein a power detection terminal of the field reconfigurable chip is connected to an output terminal of the power input module, an output terminal of the field reconfigurable chip is connected to a control terminal of the power management module, and the power management module is configured to control the on-off of a power supply path in response to an output control signal of the field reconfigurable chip; A control module is provided, wherein the control module communicates with the field reconfigurable chip.

2. The power control system of the GNSS receiver according to claim 1, characterized in that: The power management module includes at least one switch transistor, and a control end of the switch transistor is connected to an output end of the field reconfigurable chip.

3. The power control system of the GNSS receiver according to claim 1, characterized in that: The power load module includes a voltage conversion unit, which is used to convert the input voltage into the voltage required by each load and then supply power to the load.

4. The power control system of the GNSS receiver according to claim 3, characterized in that: The voltage conversion unit includes a BUCK step-down circuit.

5. The power control system of the GNSS receiver according to claim 1, characterized in that: It also includes a system key module configured to send a key detection signal to the field reconfigurable chip in response to a key operation action.

6. The power control system of the GNSS receiver according to claim 5, characterized in that: The field reconfigurable chip includes a normal power input pin, a power detection pin, a key detection pin, a signal input pin and a signal output pin; The power detection pin is connected to the output end of the power input module, and the key detection pin is connected to the output end of the system key module.

7. The power control system of the GNSS receiver according to claim 6, characterized in that: The signal output pins of the field reconfigurable chip include switch control pins and control module control pins, the switch control pins are used to output output control signals to the power management module, the control module control pins are used to output power-on signals or power-off signals to the control module, and the power management module is configured to control the power supply path to be turned on in response to the output control signal corresponding to power-on, and to control the power supply path to be turned off in response to the output control signal corresponding to power-off.

8. The power control system of the GNSS receiver according to claim 1, characterized in that: The field reconfigurable chip comprises a watchdog signal input pin, and the watchdog signal input pin is connected to the control module.

9. A power control method for a GNSS receiver, characterized in that: The power supply control system of the GNSS receiver according to any one of claims 5 to 7 is adopted, and the method comprises the following steps: The field reconfigurable chip determines whether a power-on condition is met, wherein the power-on condition includes the power detection terminal detecting an external power input and / or receiving a key detection signal corresponding to power-on from the system key module; If the power-on condition is met, the field reconfigurable chip sends an output control signal to the power management module, the power management module controls the power supply path to be turned on, and the power input module supplies power to each load through the power load module; The field reconfigurable chip determines whether a shutdown condition is met, wherein the shutdown condition includes receiving a key detection signal corresponding to shutdown from the system key module and / or receiving a software shutdown signal from the control module; If the shutdown condition is met, the field reconfigurable chip sends an output control signal to the power management module, and the power management module controls the power supply path to be disconnected.

10. A GNSS receiver, characterized in that: A power supply control system comprising any one of claims 1 to 8.