Complementary metal oxide semiconductor (CMOS)-like inverter constructed based on reconfigurable transistor and modulation method of CMOS-like inverter

Abstract

The invention relates to the technical field of reconfigurable transistors, in particular to a CMOS-like inverter constructed based on a reconfigurable transistor and a modulation method of the CMOS-like inverter. The invention discloses a CMOS-like inverter constructed based on a reconfigurable transistor. The CMOS-like inverter comprises a transistor assembly and a TENG assembly. The heterogeneous transistor part and the standard field effect transistor part are formed in the transistor assembly through a multilayer design, and the TENG is coupled with the transistor assembly, so that on one hand, the TENG is utilized to initiate charge movement and modulate the standard field effect transistor part, and on the other hand, the TENG is utilized to initiate charge movement and cooperate with UV light to generate photoelectric reaction on the heterogeneous transistor part, so that the modulation efficiency is improved. And the type and the concentration of the current carriers are regulated and controlled so as to modulate the heterogeneous transistor part, so that the N-P type or P-N type CMOS phase inverter is modulated. According to the CMOS-like inverter, modulation can be carried out according to requirements, and direct interaction between external motion and a device is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of reconfigurable transistors, and in particular to: 1. a CMOS-like inverter constructed based on a reconfigurable transistor; 2. a method for modulating the CMOS-like inverter. Background Art

[0002] The CMOS inverter is a commonly used digital circuit element, which is manufactured using complementary metal-oxide-semiconductor (CMOS) technology.

[0003] The core structure of the CMOS inverter consists of a PMOS transistor and an NMOS transistor, which are connected in a complementary and symmetrical form, with one acting as a pull-up transistor and the other as a pull-down transistor. This structure enables the CMOS inverter to achieve the logic inversion of the output signal by switching the on and off states of the two transistors under the control of the input signal.

[0004] As the size of silicon-based transistors approaches the physical limit, semiconductor technology with new concepts and new materials has become the focus. In order to improve information processing performance, it is necessary to develop electronic devices based on new physical principles. Therefore, the inventors designed a CMOS-like inverter based on reconfigurable transistors, which can modulate the state according to demand. Summary of the invention

[0005] In order to solve the existing problem of needing to develop an inverter based on a new physical principle, the present invention provides a CMOS-like inverter constructed based on a reconfigurable transistor and a modulation method thereof.

[0006] The present invention is implemented by the following technical solutions:

[0007] In a first aspect, the present invention discloses a CMOS-like inverter constructed based on a reconfigurable transistor, including: a transistor component and a TENG component.

[0008] The transistor assembly includes: a conductive substrate, a gate insulating layer, an h-BN layer, a channel layer, a drain, a source, and an output electrode. The conductive substrate, the gate insulating layer, and the h-BN layer are stacked in sequence. The h-BN layer is smaller than the gate insulating layer and is arranged near one end of the gate insulating layer. A portion of the channel layer is stacked on the side of the h-BN layer facing away from the gate insulating layer to form a heterogeneous transistor portion. Another portion of the channel layer is stacked on the side of the gate insulating layer facing away from the conductive substrate to form a standard field effect transistor portion. The conductive substrate serves as the gate G; the drain, the source, and the output electrode are connected to the side of the channel layer facing away from the gate insulating layer and are separated from each other. The drain is arranged corresponding to the standard field effect transistor portion; the source is arranged corresponding to the heterogeneous transistor portion. The output electrode is located between the drain and the source and serves as the output of a CMOS-like inverter. The drain and the source have a potential difference. The channel layer is a bipolar material.

[0009] The TENG component is used as the input of the CMOS-like inverter. The TENG component includes: a static friction layer and a dynamic friction layer. The static friction layer is electrically connected to the conductive substrate. The dynamic friction layer is electrically connected to the source. The static friction layer and the dynamic friction layer have different electron binding capabilities. The dynamic friction layer is used to move under the action of an external force to change the distance between the dynamic friction layer and the static friction layer.

[0010] When the standard field effect transistor portion is modulated to a P-type and the heterogeneous transistor portion is modulated to an N-type, the standard field effect transistor portion serves as a pull-up transistor of a CMOS-like inverter, and the heterogeneous transistor portion serves as a pull-down transistor of the CMOS-like inverter;

[0011] Alternatively, when the standard field effect transistor portion is modulated to N-type and the heterogeneous transistor portion is modulated to P-type, the standard field effect transistor portion serves as a pull-down transistor of a CMOS-like inverter and the heterogeneous transistor portion serves as a pull-up transistor of the CMOS-like inverter.

[0012] The implementation of the CMOS-like inverter based on reconfigurable transistors is a method or process according to an embodiment of the present disclosure.

[0013] In a second aspect, the present invention discloses a modulation method for a CMOS-like inverter, which is applied to a CMOS-like inverter constructed based on a reconfigurable transistor as disclosed in the first aspect.

[0014] The modulation method of the CMOS-like inverter comprises the following steps:

[0015] Step 1: Through UV light irradiation and the cooperation of TENG components, the heterojunction transistor part is modulated into P-type or N-type;

[0016] Step 2: If the heterojunction transistor part is modulated to P-type, the dynamic friction layer is moved away from the static friction layer by external force, so that the heterojunction transistor part remains P-type and the standard field effect transistor part is modulated to N-type, thereby obtaining a quasi-CMOS inverter in which the heterojunction transistor part is used as a pull-up tube and the standard field effect transistor part is used as a pull-down tube;

[0017] If the heterojunction transistor portion is modulated to N-type, the dynamic friction layer is brought close to the static friction layer through external force, so that the heterojunction transistor portion remains N-type and the standard field effect transistor portion is modulated to P-type, thereby obtaining a CMOS-like inverter in which the heterojunction transistor portion serves as a pull-down tube and the standard field effect transistor portion serves as a pull-up tube.

[0018] The modulation method of this type of CMOS inverter is implemented according to the method or process of the embodiment of the present disclosure.

[0019] The present invention has the following beneficial effects:

[0020] 1. The present invention forms a heterogeneous transistor part and a standard field effect transistor part in a transistor component through a multi-layer design, and couples TENG and the transistor component. On the one hand, TENG is used to induce charge movement to modulate the standard field effect transistor part. On the other hand, TENG is used to induce charge movement and cooperate with UV light to produce a photoelectric reaction on the heterogeneous transistor part, and the carrier type and concentration are controlled to achieve modulation of the heterogeneous transistor part, thereby modulating an NP-type or PN-type CMOS-like inverter.

[0021] 2. The present invention provides a CMOS-like inverter based on a reconfigurable transistor, which can be modulated according to demand and realizes direct interaction between external motion and the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 A schematic diagram of the structure of a CMOS-like inverter based on a reconfigurable transistor provided in Example 1 of the present invention;

[0024] Figure 2 for Figure 1 Schematic diagram of a heterojunction transistor portion and a standard field effect transistor portion formed by a CMOS-like inverter constructed based on a reconfigurable transistor;

[0025] Figure 3A schematic diagram of a process of application example 1 of the modulation method of a CMOS-like inverter provided in embodiment 2 of the present invention;

[0026] Figure 4 The transfer characteristic curve of the heterojunction transistor portion modulated to N-type in Example 1 provided in Embodiment 2 of the present invention;

[0027] Figure 5 An output signal diagram of the CMOS-like inverter in Example 1 provided in Embodiment 2 of the present invention;

[0028] Figure 6 A process schematic diagram of application example 2 of the modulation method of a CMOS-like inverter according to embodiment 2 of the present invention;

[0029] Figure 7 A transfer characteristic curve in which the heterojunction transistor portion is modulated to N-type in Example 2 provided in Embodiment 2 of the present invention;

[0030] Figure 8 This is an output signal diagram of the CMOS-like inverter in Example 2 provided in Embodiment 2 of the present invention.

[0031] In the accompanying drawings, the components represented by the reference numerals are listed as follows:

[0032] 10. Conductive substrate; 20. Gate insulation layer; 31. Channel layer; 32. Drain; 33. Source; 34. h-BN layer; 35. Output electrode; 40. TENG component; 41. Static friction layer; 42. Dynamic friction layer; 43. Conductive layer 2; 50. External power supply. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0034] Example 1

[0035] See also Figure 1 , this embodiment 1 provides a structural schematic diagram of a CMOS-like inverter constructed based on a reconfigurable transistor, which includes: a transistor component and a TENG component 40.

[0036] 1. The transistor assembly adopts a reconfigurable transistor design, including: a conductive substrate 10, a gate insulating layer 20, an h-BN layer 34, a channel layer 31, a drain 32 (i.e. Figure 1 D), source 33 (ie Figure 1 S in), output electrode 35 (i.e. Figure 1 V out ).

[0037] The conductive substrate 10 , the gate insulating layer 20 , and the h-BN layer 34 are stacked in sequence.

[0038] like Figure 2 As shown, the h-BN layer 34 is smaller than the gate insulating layer 20 and is disposed near one end of the gate insulating layer 20. A portion of the channel layer 31 is stacked on the side of the h-BN layer 34 facing away from the gate insulating layer 20 to form a heterogeneous transistor portion; another portion of the channel layer 31 is stacked on the side of the gate insulating layer 20 facing away from the conductive substrate 10 to form a standard field effect transistor portion.

[0039] The conductive substrate 10 serves as a gate (i.e. Figure 1 The drain 32, source 33, and output electrode 35 are connected to the side of the channel layer 31 facing away from the gate insulating layer 20 and are separated from each other. It should be noted that the drain 32, source 33, and output electrode 35 form an ohmic contact with the channel layer 31.

[0040] Among them, the drain 32 corresponds to the standard field effect transistor part setting; the source 33 corresponds to the heterogeneous transistor part setting; the output electrode 35 is located between the drain 32 and the source 33 (finally also corresponds to the standard field effect transistor part setting), and serves as the output of the CMOS-like inverter.

[0041] The drain 32 and the source 33 have a potential difference (generally achieved by connecting to an external power supply 50; the external power supply 50 serves as a working power supply for the drain 32 and the source 33. The specific connection method can be set as: the drain 32 is electrically connected to the positive pole of the external power supply 50, and the source 33 is electrically connected to the negative pole of the external power supply 50).

[0042] The channel layer 31 is a bipolar material, which, on the one hand, will exhibit corresponding polarity when subjected to voltage alone, and on the other hand, can undergo photoelectric reaction with UV light, absorb ultraviolet photons and thereby generate a large number of photoexcited electron-hole pairs.

[0043] For the above components, the conductive substrate 10 can be made of common conductive materials such as silicon, copper, and aluminum. The gate insulating layer 20 can be made of insulating materials such as silicon dioxide, hafnium oxide, and aluminum oxide; the channel layer 31 can be made of bipolar materials such as molybdenum telluride, black phosphorus, and tungsten selenide; the h-BN layer 34 is made of hexagonal boron nitride; the drain 32, the source 33, and the output electrode 35 can be made of metal materials, such as one or more alloys of chromium, gold, aluminum, titanium, and palladium.

[0044] 2. The TENG component 40 serves as the input of a CMOS-like inverter.

[0045] The TENG component 40 includes a static friction layer 41 and a dynamic friction layer 42. The static friction layer 41 is electrically connected to the conductive substrate 10. The dynamic friction layer 42 is electrically connected to the source electrode 33. The dynamic friction layer 42 is used to move under the action of an external force to change the distance between the dynamic friction layer 42 and the static friction layer 41.

[0046] The static friction layer 41 and the dynamic friction layer 42 have different electron binding capabilities; it should be noted that the greater the difference in the electron binding capabilities between the two, the better.

[0047] Considering the working principle of the TENG component 40, there are several ways to connect it with the transistor component:

[0048] 201. If the static friction layer 41 is a conductive material, it is disposed on a side of the conductive substrate 10 facing away from the gate insulating layer 20, so that the static friction layer 41 and the conductive substrate 10 directly form a contact-type electrical connection.

[0049] If the static friction layer 41 is an insulating material, a conductive layer 1 is provided on the side facing the conductive substrate 10; the conductive layer 1 is electrically connected to the conductive substrate 10 (the conductive layer 1 can be directly attached to the conductive substrate 10), so that the static friction layer 41 is electrically connected to the conductive substrate 10 by utilizing the conductive layer 1.

[0050] 202. If the dynamic friction layer 42 is an insulating material, a conductive layer 2 43 is provided on the side facing away from the static friction layer 41; the conductive layer 2 43 is electrically connected to the source 33 (the conductive layer 2 43 can be connected to the source 33 through a wire), so that the dynamic friction layer 42 and the source 33 are electrically connected through the conductive layer 2 43.

[0051] If the dynamic friction layer 42 is made of a conductive material, there is no need to provide the second conductive layer 43 , and the dynamic friction layer 42 can be connected to the source electrode 33 through a wire to form an electrical connection between the dynamic friction layer 42 and the source electrode 33 .

[0052] Of course, considering the stability of the dynamic friction layer 42, an insulating base may be further provided to support the dynamic friction layer 42. If the dynamic friction layer 42 is made of insulating material, the side of the conductive layer 43 facing away from the dynamic friction layer 42 is connected to the insulating base; if the dynamic friction layer 42 is made of conductive material, the side of the dynamic friction layer 42 facing away from the static friction layer 41 is connected to the insulating base.

[0053] In this embodiment 1, the TENG component 40 is configured as follows:

[0054] like Figure 1 As shown, the static friction layer 41 is a conductive material, which can be any one of copper, gold, aluminum, and silver; the dynamic friction layer 42 is an insulating material, which can be any one of PTFE, PVDF, Kapton, and nylon; the material of the conductive layer 43 is any one of copper, gold, aluminum, and silver.

[0055] In the above structure:

[0056] 1. The TENG component 40 regulates the voltage applied to the gate and the direction of electron flow at the source 33:

[0057] A. If the electron binding capacity of the static friction layer 41 is smaller than that of the dynamic friction layer 42, when the dynamic friction layer 42 gradually moves away from the static friction layer 41, a positive gate voltage is applied to the gate, and electrons flow from the static friction layer 41 to the source 33;

[0058] B. If the electron binding capacity of the static friction layer 41 is greater than that of the dynamic friction layer 42, when the dynamic friction layer 42 gradually approaches the static friction layer 41, a positive gate voltage is applied to the gate, and electrons flow from the static friction layer 41 to the source 33;

[0059] C. If the electron binding capacity of the static friction layer 41 is smaller than that of the dynamic friction layer 42, when the dynamic friction layer 42 gradually approaches the static friction layer 41, a negative gate voltage is applied to the gate, and electrons flow from the source 33 to the static friction layer 41;

[0060] D. If the electron binding ability of the static friction layer 41 is greater than that of the dynamic friction layer 42 , when the dynamic friction layer 42 gradually moves away from the static friction layer 41 , a negative gate voltage is applied to the gate, and electrons flow from the source 33 to the static friction layer 41 .

[0061] 2. The polarity of a standard field effect transistor is only affected by the voltage applied to the gate:

[0062] If a positive gate voltage is applied to the gate, the standard field effect transistor section is modulated to N-type;

[0063] If a negative gate voltage is applied to the gate, the standard field effect transistor portion is modulated into a P-type.

[0064] 3. The polarity of the heterojunction transistor is affected by the voltage applied to the gate and UV light irradiation:

[0065] If a positive gate voltage is applied to the gate, combined with UV light irradiation, the heterojunction transistor portion is modulated into a P-type;

[0066] When a negative gate voltage is applied to the gate and UV light is irradiated, the heterojunction transistor portion is modulated into an N-type.

[0067] It should be noted that the greater the voltage applied to the gate, the deeper the modulation.

[0068] Therefore, the CMOS-like inverter based on the reconfigurable transistor provided in this embodiment 1 has two usage states:

[0069] Ⅰ. When the standard field effect transistor portion is modulated to a P-type and the heterogeneous transistor portion is modulated to an N-type, the standard field effect transistor portion serves as a pull-up transistor of a CMOS-like inverter and the heterogeneous transistor portion serves as a pull-down transistor of the CMOS-like inverter;

[0070] II. When the standard field effect transistor portion is modulated to N-type and the heterogeneous transistor portion is modulated to P-type, the standard field effect transistor portion serves as a pull-down transistor of a CMOS-like inverter and the heterogeneous transistor portion serves as a pull-up transistor of a CMOS-like inverter.

[0071] Therefore, in order to ensure the use of the CMOS-like inverter, it is necessary to pre-use the TENG component 40 in conjunction with the UV light applied to the channel layer 31 to modulate the heterogeneous transistor part into P-type or N-type; then use the TENG component 40 as the input of the CMOS-like inverter to achieve signal reversal.

[0072] Example 2

[0073] This embodiment 2 discloses a modulation method for a CMOS-like inverter, which is applied to the CMOS-like inverter based on a reconfigurable transistor disclosed in embodiment 1.

[0074] Specifically, the modulation method comprises the following steps:

[0075] Step 1: Modulate the heterojunction transistor portion to P-type or N-type through UV light irradiation (which can be provided by a UV light generator) and the cooperation of the TENG component 40;

[0076] Specifically, step one includes:

[0077] S101, firstly, the dynamic friction layer 42 is brought into contact with the static friction layer 41 by an external force, and then the dynamic friction layer 42 is moved to a position D0 away from the static friction layer 41, and then the dynamic friction layer 42 and the static friction layer 41 are short-circuited to achieve positive and negative charge balance; wherein D0 represents a balance distance;

[0078] S102, grounding the source electrode 33, keeping the static friction layer 41 and the dynamic friction layer 42 at a distance D0, so that no voltage is applied to the gate G and no electrons move between the source electrode 33 and the dynamic friction layer 42;

[0079] S103, using an external force to move the dynamic friction layer 42 away from the static friction layer 41, and irradiating the channel layer 31 with UV light until the heterojunction transistor portion is modulated to a P-type;

[0080] Alternatively, the dynamic friction layer 42 is brought close to the static friction layer 41 by an external force, and the channel layer 31 is irradiated with UV light until the heterojunction transistor portion is modulated to an N-type.

[0081] Step 1 is to control the TENG component 40 and UV light irradiation accordingly according to the four modulation conditions A, B, C, and D recorded in Example 1.

[0082] Of course, after the heterojunction transistor portion reaches the desired modulation requirement, step 4 may be added to stop UV light irradiation and reset the dynamic friction layer 42 to a position D0 away from the static friction layer 41 .

[0083] Step 2: If the heterojunction transistor part is modulated to P-type, the dynamic friction layer 42 is moved away from the static friction layer 41 by external force, so that the heterojunction transistor part remains P-type and the standard field effect transistor part is modulated to N-type, thereby obtaining a quasi-CMOS inverter in which the heterojunction transistor part is used as a pull-up transistor and the standard field effect transistor part is used as a pull-down transistor;

[0084] If the heterojunction transistor portion is modulated to N-type, the dynamic friction layer 42 is brought close to the static friction layer 41 through external force, so that the heterojunction transistor portion remains N-type and the standard field effect transistor portion is modulated to P-type, thereby obtaining a CMOS-like inverter in which the heterojunction transistor portion serves as a pull-down tube and the standard field effect transistor portion serves as a pull-up tube.

[0085] It should be noted that since there is no UV light irradiation at this time, the polarity of the heterogeneous transistor part that has completed the modulation will not change. At this time, only the polarity of the standard field effect transistor part is modulated under the action of the TENG component 40.

[0086] In order to specifically illustrate the two situations of step 2, this embodiment 2 provides two examples: example 1 and example 2.

[0087] The CMOS-like inverters based on reconfigurable transistors in both examples use the following material choices:

[0088] Conductive substrate 10: silicon (Si); gate insulating layer 20: silicon dioxide (SiO2); h-BN layer 34: hexagonal boron nitride (h-BN); channel layer 31: molybdenum telluride (MoTe2); drain electrode 32: chromium-gold alloy; source electrode 33: chromium-gold alloy; output electrode 35: chromium-gold alloy; static friction layer 41: copper (Cu); dynamic friction layer 42: PTFE; conductive layer 2 43: copper (Cu).

[0089] Example 1

[0090] See also Figure 3 , which shows the process of obtaining a CMOS-like inverter with a standard field effect transistor part as a pull-up tube and a heterogeneous transistor part as a pull-down tube:

[0091] First, the dynamic friction layer 42 is brought into contact with the static friction layer 41 by an external force, and then the dynamic friction layer 42 is moved to a position D0 away from the static friction layer 41, and then the dynamic friction layer 42 and the static friction layer 41 are short-circuited (that is, the dynamic friction layer 42 and the conductive layer 43 are short-circuited) to achieve positive and negative charge balance.

[0092] like Figure 3 As shown in (I), the source electrode 33 is grounded, and the static friction layer 41 and the dynamic friction layer 42 are kept at a distance D0; since the PTFE in the dynamic friction layer 42 and the copper in the static friction layer 41 have different electron binding abilities, the static friction layer 41 is positively charged and the dynamic friction layer 42 is negatively charged; but since the positive and negative charges are bound to each other, it will not affect the transistor components, so no voltage is applied to the gate, and no electrons move between the source electrode 33 and the dynamic friction layer 42.

[0093] like Figure 3 As shown in (II), the dynamic friction layer 42 is brought close to the static friction layer 41 by external force, and the two have a corresponding approach distance -D, and part of the electrons in the static friction layer 41 move to the conductive substrate 10, so that the conductive substrate 10 is negatively charged, which is equivalent to applying a negative gate voltage to the gate; at the same time, the channel layer 31 is irradiated with UV light; due to the photoelectric reaction of the channel layer 31 under the irradiation of UV light, a large number of photoexcited electrons (i.e. Figure 3 e)-photogenerated holes (i.e. Figure 3 h) pair in the heterojunction; and UV light irradiation can excite defect states at the interface of the gate insulating layer 20 and the h-BN layer 34 at the heterojunction transistor portion. Then, the photogenerated holes will be driven by the electric field perpendicular to the channel layer 31, and then be captured and fixed in the defect state, and act as carriers, thereby modulating the heterojunction transistor portion to N-type.

[0094] Among them, the greater the negative gate voltage, the more photogenerated holes are captured and fixed, the greater the concentration of carriers, and the deeper the heterojunction transistor portion is modulated into N-type.

[0095] It should be noted that, since a negative gate voltage is applied to the gate at this time, the standard field effect transistor portion will be modulated to a P type based on the standard field effect.

[0096] like Figure 3 As shown in (III), the UV light irradiation is stopped and the dynamic friction layer 42 is reset to a position D0 away from the static friction layer 41; after the mechanical displacement and the light pulse are removed, the photogenerated holes captured and fixed in the defect state do not escape, but are still stored in the defect state, forming an effective local positive gate voltage for the heterojunction transistor portion, and generating a stable electron doping effect in the heterojunction transistor portion, thereby keeping the heterojunction transistor portion N-type.

[0097] It should be noted that, since there is no mechanical displacement at this time, no voltage is applied to the gate, and no electrons move between the source 33 and the dynamic friction layer 42, then based on the standard field effect, the standard field effect transistor part will be restored to non-polarity.

[0098] like Figure 3 As shown in (Ⅳ), the dynamic friction layer 42 is brought close to the static friction layer 41 by external force, and the two generate a corresponding approach distance -D; Figure 3 (II) Similarly, a negative gate voltage is applied to the gate; on the one hand, due to the absence of UV light irradiation, the heterojunction transistor portion remains N-type and acts as a pull-down transistor; on the other hand, based on the standard field effect, the standard field effect transistor portion is modulated to P-type and acts as a pull-up transistor. In this way, the input signal generated by the TENG component 40 will pass through the pull-up and pull-down tubes, and output the opposite signal from the output electrode 35.

[0099] In addition, see Figure 4 , which shows the transfer characteristic curve of the heterojunction transistor portion being modulated to N-type, which conforms to the characteristics of N-type, illustrating the effect of the modulation of the heterojunction transistor portion. Figure 5 , which shows the output signal diagram of the CMOS-like inverter, which illustrates that the CMOS-like inverter of Example 1 can achieve the function of inverting the signal.

[0100] Example 2

[0101] See also Figure 6 , which shows the process of obtaining a CMOS-like inverter with a heterojunction transistor part as a pull-up transistor and a standard field effect transistor part as a pull-down transistor:

[0102] First, the dynamic friction layer 42 is brought into contact with the static friction layer 41 by an external force, and then the dynamic friction layer 42 is moved to a position D0 away from the static friction layer 41, and then the dynamic friction layer 42 and the static friction layer 41 are short-circuited (that is, the dynamic friction layer 42 and the conductive layer 43 are short-circuited) to achieve positive and negative charge balance.

[0103] like Figure 6 As shown in (I), the source electrode 33 is grounded, and the static friction layer 41 and the dynamic friction layer 42 are kept at a distance D0; since the PTFE in the dynamic friction layer 42 and the copper in the static friction layer 41 have different electron binding abilities, the static friction layer 41 is positively charged and the dynamic friction layer 42 is negatively charged; but since the positive and negative charges are bound to each other, it will not affect the transistor components, so no voltage is applied to the gate, and no electrons move between the source electrode 33 and the dynamic friction layer 42.

[0104] like Figure 6As shown in (II), the dynamic friction layer 42 is moved away from the static friction layer 41 by external force, and the two generate a corresponding separation distance +D. Part of the electrons in the conductive substrate 10 move to the static friction layer 41 to neutralize the excess positive charge, so that the conductive substrate 10 is positively charged, which is equivalent to applying a positive gate voltage to the gate. At the same time, UV light is irradiated to the channel layer 31. Because the channel layer 31 undergoes a photoelectric reaction under UV light irradiation to generate a large number of photoexcited electrons (i.e. Figure 6 e)-photogenerated holes (i.e. Figure 6 h) pair in the figure; and UV light irradiation can excite defect states at the interface of the gate insulating layer 20 and the h-BN layer 34 at the heterojunction transistor portion. Then, the photoexcited electrons will be driven by the electric field perpendicular to the channel layer 31, and then be captured and fixed in the defect state, and act as carriers, thereby modulating the heterojunction transistor portion to a P type.

[0105] Among them, the larger the positive gate voltage, the more photoexcited electrons are captured and fixed, the greater the concentration of carriers, and the deeper the degree to which the heterojunction transistor portion is modulated into the P type.

[0106] It should be noted that, since a positive gate voltage is applied to the gate at this time, the standard field effect transistor portion will be modulated to N-type based on the standard field effect.

[0107] like Figure 6 As shown in (III), the UV light generator is turned off, and the dynamic friction layer 42 is reset to a position D0 away from the static friction layer 41; after removing the mechanical displacement and the light pulse, the photoexcited electrons captured and fixed in the defect state do not escape, but remain stored in the defect state, forming an effective local negative gate voltage for the heterojunction transistor portion, and generating a stable electron doping effect in the heterojunction transistor portion, thereby keeping the heterojunction transistor portion P-type.

[0108] It should be noted that, since there is no mechanical displacement at this time, no voltage is applied to the gate, and no electrons move between the source 33 and the dynamic friction layer 42, then based on the standard field effect, the standard field effect transistor part will be restored to non-polarity.

[0109] like Figure 6 As shown in (Ⅳ), the dynamic friction layer 42 is moved away from the static friction layer 41 by external force, and the two generate a corresponding distance +D; Figure 6 (II) Similarly, a positive gate voltage is applied to the gate; on the one hand, due to the absence of UV light irradiation, the heterojunction transistor portion remains P-type and acts as a pull-up tube; on the other hand, based on the standard field effect, the standard field effect transistor portion is modulated to N-type and acts as a pull-down tube. In this way, the input signal generated by the TENG component 40 will pass through the pull-up tube and the pull-down tube, and output the opposite signal from the output electrode 35.

[0110] In addition, see Figure 7, which shows the transfer characteristic curve of the heterojunction transistor portion being modulated to P-type, which conforms to the characteristics of P-type, illustrating the effect of the modulation of the heterojunction transistor portion. Figure 8 , which shows the output signal diagram of the CMOS-like inverter, which illustrates that the CMOS-like inverter of Example 2 is able to achieve the function of inverting the signal.

[0111] Example 3

[0112] This embodiment 3 discloses a computer device, including a memory and a processor. The memory stores a computer program. When the processor executes the computer program, the steps of the modulation method of the CMOS-like inverter disclosed in embodiment 2 are implemented.

[0113] This embodiment 3 also discloses a readable storage medium, in which computer program instructions are stored. When the computer program instructions are read and executed by a processor, the steps of the modulation method of the CMOS-like inverter disclosed in embodiment 2 are executed.

[0114] This embodiment 3 also discloses a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the modulation method of the CMOS-like inverter disclosed in the embodiment 2 are implemented.

[0115] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A CMOS-like inverter based on a reconfigurable transistor, characterized in that: include: A transistor component, comprising: a conductive substrate, a gate insulating layer, an h-BN layer, a channel layer, a drain, a source, and an output electrode; the conductive substrate, the gate insulating layer, and the h-BN layer are stacked in sequence; the h-BN layer is smaller than the gate insulating layer and is arranged close to one end of the gate insulating layer; a portion of the channel layer is stacked on a side of the h-BN layer facing away from the gate insulating layer to form a heterogeneous transistor portion; another portion of the channel layer is stacked on a side of the gate insulating layer facing away from the conductive substrate to form a standard field effect transistor portion; the conductive substrate serves as a gate G; the drain, the source, and the output electrode are connected to a side of the channel layer facing away from the gate insulating layer and are separated from each other; the drain is arranged corresponding to the standard field effect transistor portion; the source is arranged corresponding to the heterogeneous transistor portion; the output electrode is located between the drain and the source, and serves as the output of a CMOS-like inverter; the drain and the source have a potential difference; the channel layer is a bipolar material; as well as A TENG component, which serves as an input of a CMOS-like inverter; the TENG component comprises: a static friction layer and a dynamic friction layer; the static friction layer is electrically connected to a conductive substrate; the dynamic friction layer is electrically connected to a source electrode; the static friction layer and the dynamic friction layer have different electron binding abilities; the dynamic friction layer is used to move under the action of an external force to change the distance between the dynamic friction layer and the static friction layer; When the standard field effect transistor portion is modulated to a P-type and the heterogeneous transistor portion is modulated to an N-type, the standard field effect transistor portion serves as a pull-up transistor of a CMOS-like inverter, and the heterogeneous transistor portion serves as a pull-down transistor of the CMOS-like inverter; Alternatively, when the standard field effect transistor portion is modulated to N-type and the heterogeneous transistor portion is modulated to P-type, the standard field effect transistor portion serves as a pull-down transistor of a CMOS-like inverter and the heterogeneous transistor portion serves as a pull-up transistor of the CMOS-like inverter.

2. The CMOS-like inverter based on reconfigurable transistors according to claim 1, characterized in that: The static friction layer is a conductive material, and is arranged on a side of the conductive substrate facing away from the gate insulation layer; Alternatively, the static friction layer is an insulating material, and a conductive layer 1 is disposed on a side of the static friction layer facing the conductive substrate; the conductive layer 1 is electrically connected to the conductive substrate.

3. The CMOS-like inverter based on reconfigurable transistors according to claim 1, characterized in that: The dynamic friction layer is made of insulating material, and a second conductive layer is disposed on a side of the dynamic friction layer facing away from the static friction layer; the second conductive layer is electrically connected to the source electrode; Alternatively, the dynamic friction layer is a conductive material.

4. The CMOS-like inverter based on reconfigurable transistors according to claim 3, characterized in that: The TENG component also includes: an insulating substrate; the insulating substrate is used to support the dynamic friction layer.

5. The CMOS-like inverter based on reconfigurable transistors according to claim 4, characterized in that: If the dynamic friction layer is made of insulating material, the side of the conductive layer 2 facing away from the dynamic friction layer is connected to the insulating substrate; If the dynamic friction layer is made of a conductive material, a surface of the dynamic friction layer facing away from the static friction layer is connected to an insulating substrate.

6. The CMOS-like inverter based on reconfigurable transistors according to claim 1, characterized in that: The drain is electrically connected to the positive electrode of the external power source, and the source is electrically connected to the negative electrode of the external power source.

7. The CMOS-like inverter based on reconfigurable transistors according to claim 1, characterized in that: The conductive substrate is made of any one of silicon, copper and aluminum; Or / and, the material of the gate insulating layer is any one of silicon dioxide, hafnium oxide and aluminum oxide; Or / and, the material of the channel layer is any one of molybdenum telluride, black phosphorus, and tungsten selenide; Or / and, the materials of the drain electrode, source electrode and output electrode are one or more alloys of chromium, gold, aluminum, titanium and palladium; Or / and, the material of the static friction layer is any one of copper, gold, and aluminum; the material of the dynamic friction layer is any one of PTFE, PVDF, Kapton, and nylon.

8. A modulation method of a CMOS-like inverter, characterized in that: Applicable to a CMOS-like inverter based on a reconfigurable transistor as described in any one of claims 1 to 7; The modulation method of the CMOS-like inverter comprises the following steps: Step 1: Through UV light irradiation and the cooperation of TENG components, the heterojunction transistor part is modulated into P-type or N-type; Step 2: If the heterojunction transistor part is modulated to P-type, the dynamic friction layer is moved away from the static friction layer by external force, so that the heterojunction transistor part remains P-type and the standard field effect transistor part is modulated to N-type, thereby obtaining a quasi-CMOS inverter in which the heterojunction transistor part is used as a pull-up tube and the standard field effect transistor part is used as a pull-down tube; If the heterojunction transistor portion is modulated to N-type, the dynamic friction layer is brought close to the static friction layer through external force, so that the heterojunction transistor portion remains N-type and the standard field effect transistor portion is modulated to P-type, thereby obtaining a CMOS-like inverter in which the heterojunction transistor portion serves as a pull-down tube and the standard field effect transistor portion serves as a pull-up tube.

9. The modulation method of the CMOS-like inverter according to claim 8, characterized in that: Step one includes: S101, firstly, the dynamic friction layer is brought into contact with the static friction layer by an external force, and then the dynamic friction layer is moved to a position D0 away from the static friction layer, and then the dynamic friction layer and the static friction layer are short-circuited to achieve positive and negative charge balance; wherein D0 represents the balance distance; S102, grounding the source electrode, keeping the static friction layer and the dynamic friction layer at a distance D0, so that no voltage is applied to the gate G and no electrons move between the source electrode and the dynamic friction layer; S103, using an external force to move the dynamic friction layer away from the static friction layer, and irradiating the channel layer with UV light until the heterojunction transistor portion is modulated to a P-type; Alternatively, the dynamic friction layer is brought close to the static friction layer by an external force, and the channel layer is irradiated with UV light until the heterojunction transistor portion is modulated to an N-type.

10. The modulation method of the CMOS-like inverter according to claim 9, characterized in that: Step 1 also includes: S104, stop UV light irradiation, and reset the dynamic friction layer to a position D0 away from the static friction layer.

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