Retention performance test method and device, time-frequency equipment and storage medium

Abstract

The invention is suitable for the technical field of communication, and provides a retention performance test method and device, time frequency equipment and a storage medium, and the method comprises the steps: receiving a retention performance test instruction, the retention performance test instruction carries a retention performance test parameter, and the retention performance test parameter comprises at least one retention time period; starting a retention performance test in response to the retention performance test instruction; acquiring a target phase difference between the local clock signal and the reference source when the duration between the current moment and the starting moment of keeping the performance test reaches a keeping time period; and determining a test result of the holding time period according to the holding time period and the corresponding target phase difference.

Description

Technical Field

[0001] The present application belongs to the field of communications, and in particular, relates to a method and apparatus for holding performance testing, a time-frequency device, and a computer-readable storage medium. Background Art

[0002] During operation, the time-frequency device can refer to the external clock signal (also called the reference source) to calibrate the local clock signal. This process is also called clock training. After clock training is completed, the time-frequency device enters the locked state and controls the local clock signal to continue to follow the reference source. If the reference source is lost, the time-frequency device enters the hold state and controls the local clock signal by itself.

[0003] An important parameter of time-frequency equipment is the maintenance performance, which is generally expressed in t 1 / t 2 To indicate that, it means entering the hold state t 2 When the phase difference between the local clock signal and the reference source is t 1 , t 1 The unit of t is usually very small, such as seconds, milliseconds, microseconds, etc. 2 Relatively long, its unit is usually hours, such as 1 hour, 2 hours or 24 hours. The holdover performance reflects the accuracy and stability of the time and frequency equipment's control over the local clock signal.

[0004] In the related art, the holding performance test of the time-frequency device generally includes: firstly, the reference source is normally connected to the time-frequency device, and after entering the locked state, the connection between the reference source and the time-frequency device is disconnected, and the time-frequency device enters the holding state. 2 Then, observe the oscilloscope receiving the local clock signal and the reference source, and measure the phase difference t between the two. 1 , thus maintaining the performance. This process requires a lot of manual operation and is time-consuming, affecting the test efficiency of time-frequency equipment. Summary of the invention

[0005] The embodiments of the present application provide a hold performance test method and apparatus, a time-frequency device, and a computer-readable storage medium, which can solve the problem in the related art that the hold performance test of the time-frequency device affects the test efficiency.

[0006] In the first aspect, an embodiment of the present application provides a retention performance test method, the method comprising: receiving a retention performance test instruction, the retention performance test instruction carrying retention performance test parameters, the retention performance test parameters including at least one retention time period; starting a retention performance test in response to the retention performance test instruction; when the duration between the current moment and the start moment of the retention performance test reaches the retention time period, obtaining a target phase difference between a local clock signal and a reference source; determining a test result of the retention time period based on the retention time period and its corresponding target phase difference.

[0007] In the second aspect, an embodiment of the present application provides a retention performance testing device, which includes: a receiving module, used to receive a retention performance test instruction, the retention performance test instruction carries a retention performance test parameter, and the retention performance test parameter includes at least one retention time period; a starting module, responding to the retention performance test instruction to start the retention performance test; an acquisition module, used to acquire the target phase difference between the local clock signal and the reference source when the duration between the current moment and the start moment of the retention performance test reaches the retention time period; a determination module, used to determine the test result of the retention time period based on the retention time period and its corresponding target phase difference.

[0008] In a third aspect, an embodiment of the present application provides a time-frequency device, including a memory, a processor, and a computer program stored in the memory and executable by the processor, and when the processor executes the computer program, the retention performance test method described in the first aspect above is implemented.

[0009] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the retention performance testing method described in the first aspect above.

[0010] In a fifth aspect, an embodiment of the present application provides a computer program product. When the computer program product runs on a time-frequency device, the time-frequency device executes the retention performance test method described in the first aspect above.

[0011] Compared with the prior art, the embodiments of the present application have the following beneficial effects: by receiving a hold performance test instruction, the hold performance test instruction carries a hold performance test parameter, and the hold performance test parameter includes at least one hold time period; responding to the hold performance test instruction to start the hold performance test; when the duration between the current moment and the start moment of the hold performance test reaches the hold time period, obtaining the target phase difference between the local clock signal and the reference source; determining the test result of the hold time period according to the hold time period and its corresponding target phase difference. The oscilloscope is replaced by a software and / or hardware phase counter, and the hold performance test can be automatically executed through the hold performance test instruction without manual operation, thereby improving the test efficiency of the time-frequency equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0013] Figure 1 It is a structural diagram of a time-frequency device provided in an embodiment of the present application;

[0014] Figure 2 It is a flowchart of a retention performance testing method provided by an embodiment of the present application;

[0015] Figure 3 is a schematic diagram of a retention performance test provided by a specific example of the present application;

[0016] Figure 4 It is a specific flow chart of the retention performance test process provided by a specific embodiment of the present application;

[0017] Figure 5 It is a structural schematic diagram of a holding performance testing device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0018] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0019] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0020] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0021] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0022] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0023] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0024] Figure 1 FIG. 1 is a block diagram showing a partial structure of a time-frequency device provided in an embodiment of the present application. Figure 1 The time-frequency device includes: a processor 10, a memory 20, a satellite receiver 30 and a local clock source 40. The processor 10 is connected to the memory 20, the satellite receiver 30 and the local clock source 40. Those skilled in the art can understand that Figure 1 The structure of the time-frequency device shown in the figure does not constitute a limitation on the time-frequency device, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0025] Combine the following Figure 1 A detailed introduction to the various components of the time-frequency equipment:

[0026] The processor 10 is the control center of the time-frequency device, and can run the program stored in the memory 20 to perform various functions and process data. The processor 10 can be a central processing unit (CPU), and the processor 10 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), microcontroller units (MCU) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0027] The memory 20 is used to store an operating system, an application program, a boot loader, data, and other programs, such as program code of a computer program. The memory 20 can also be used to temporarily store data required and generated by executing the program. The memory 20 can include a high-speed random access memory, and can also include a non-volatile memory, such as a flash memory, a hard disk, a multimedia card, a card-type memory, etc.

[0028] In some embodiments, the processor 10 and the memory 20 may be integrated together.

[0029] The satellite receiver 30 is used to receive satellite signals. The satellite receiver 30 can directly output the satellite signals to the processor 10, and the processor 10 is responsible for decoding the satellite signals to obtain the message information and the pulse-second signal therein. Alternatively, the satellite receiver 30 can decode the satellite signals by itself to obtain the message information and the pulse-second signal therein, and then output the message information and the pulse-second signal to the processor 10.

[0030] The local clock source 40 generally includes a crystal oscillator, and is used to generate a local clock signal.

[0031] The retention performance test method provided by the embodiment of the present application can be implemented as a computer software program. For example, the embodiment of the present application provides a computer program product, which includes a computer program carried on a computer readable medium, and the computer program includes a program code for executing the method shown in the flowchart. When the computer program is executed by the processor 10, the various functions defined in the retention performance test method provided by the embodiment of the present application are implemented.

[0032] Figure 2A schematic flow chart of a retention performance test method provided in an embodiment of the present application is shown. As an example but not a limitation, the method can be applied to the above-mentioned time-frequency device.

[0033] S1: Receive the hold performance test instruction.

[0034] The hold performance test instruction carries the hold performance test parameters, which include at least one hold time period, i.e., t 2 Optionally, the hold performance test parameters also include a waiting time.

[0035] When the time-frequency device is able to receive the reference source, that is, when the reference source is valid, it controls the local clock signal to follow the reference source. The reference source, that is, the external clock signal, refers to the clock signal obtained from outside the time-frequency device. For example, the second pulse signal from the satellite can be received by a satellite receiver as a reference source.

[0036] When the reference source cannot be received, that is, when the reference source is invalid, the time and frequency device enters the holding state and controls the local clock signal by itself.

[0037] S2: Respond to the hold performance test instruction to start the hold performance test.

[0038] The start-up retention performance test is generally performed by switching from a locked state to a hold state. The moment of state switching is also the moment of starting the hold performance test, which may also be referred to as the start-up moment.

[0039] In the taming process and locking state, the time-frequency device uses a specific taming method to calculate and generate the real-time control amount of the local clock signal based on the deviation between the external clock signal and the local clock signal, and then uses the real-time control amount to control the local clock signal to follow the reference source. Starting from the start time, the hold state can be entered by stopping the output of the real-time control amount to the control circuit of the local clock source.

[0040] Since clock taming takes a certain amount of time, a waiting time can be set so that the retention performance test can be started after the local clock signal is stably locked. Specifically, a timer or polling method can be used to determine whether the time between the current moment and the initial moment reaches the waiting time, which is not limited here.

[0041] When the time between the current moment and the initial moment reaches the waiting time, it is determined whether the time-frequency device is in a locked state. The initial value of the initial moment can be the moment when the time-frequency device is powered on, or the moment when the retention performance test instruction is received, which is not limited here. If it is in a locked state, the current moment is used as the start moment to start the retention performance test, otherwise the initial moment is updated to the current moment to repeat the process.

[0042] S3: When the duration between the current moment and the start moment of the hold performance test reaches the hold time period, a target phase difference between the local clock signal and the reference source is obtained.

[0043] After the start-up time, the phase difference between the local clock signal and the reference source of each cycle is continuously obtained. Specifically, a phase counter can be configured in software and / or hardware. The clock source of the phase counter can be the clock source of the processor. The unit of the cycle of the clock source is generally microseconds or nanoseconds, which is much smaller than the cycle of the local / external clock signal. The input of the phase counter includes the local clock signal and the reference source. Specifically, the phase counter is started at the first changing edge of the local clock signal, and the counting is stopped and the counting result is output at the second changing edge of the reference source, and the phase difference is determined based on the counting result.

[0044] Then the phase difference can be calculated based on the counting result and the period of the clock source of the phase counter. Specifically, the first changing edge and the second changing edge can be one of the rising edge and the falling edge. If the first changing edge and the second changing edge are the same, the product of the counting result and the period of the clock source of the phase counter can be calculated to obtain the phase difference. If the first changing edge and the second changing edge are different, it is necessary to refer to the positive / negative sign of the above product and perform corresponding subtraction and / or addition calculations on the above product and the period and / or pulse width of the local / external clock signal to obtain the phase difference.

[0045] After starting the hold performance test, a timer or polling method can be used to determine whether the duration between the current moment and the start moment reaches (i.e., is greater than or equal to) the hold time period, without limitation. When the duration between the current moment and the start moment reaches the hold time period, the target phase difference is determined based on the latest phase difference.

[0046] The latest phase difference can be directly used as the target phase difference. However, according to the counting method of the above phase counter, the obtained phase difference is generally within + / - one cycle of the local / external clock signal. In other words, if the cycle of the local / external clock signal is used as the unit, the phase difference obtained from the output of the phase counter can only reflect the decimal part of the accumulated target phase difference of the local clock signal, but cannot reflect the integer part. Therefore, the latest phase difference can be used as the non-integer part of the target phase difference, and the integer part of the target phase difference can be determined based on the record of the phase difference.

[0047] Specifically, starting from the startup moment, the phase difference between the local and external clock signals can be continuously acquired and recorded every cycle, thereby forming a record of the phase difference, and a variable for recording the integer part is maintained according to the record. Specifically, the initial value of the variable is 0, and when the change trend of the phase difference in the record satisfies the jump from a positive number close to the cycle of the local / external clock signal to close to 0, the variable can be increased by 1 and the record can be cleared; when the change trend of the phase difference in the record satisfies the jump from a negative number close to the cycle of the local / external clock signal to close to 0, the variable can be reduced by 1 and the record can be cleared.

[0048] S4: Determine a test result of the holding time period according to the holding time period and its corresponding target phase difference.

[0049] Determining the test result means that the holding performance test of the holding time period has been completed, and the "target phase difference / holding time period" (here, " / " means division) can be output as the test result. If the number of holding time periods is one, this also means that the holding performance test of the time-frequency device has been completed; if the number of holding time periods is more than one, then completing the holding performance test of the longest holding time period means that the holding performance test of the time-frequency device has been completed. For example, if Figure 3 As shown, the target phase differences corresponding to the holding time periods of 1 hour, 2 hours, 4 hours, and 24 hours obtained by automatic testing are A, B, C, and D, respectively.

[0050] Through the implementation of this embodiment, a retention performance test instruction is received, the retention performance test instruction carries retention performance test parameters, and the retention performance test parameters include at least one retention time period; the retention performance test is started in response to the retention performance test instruction; when the duration between the current moment and the start moment of the retention performance test reaches the retention time period, the target phase difference between the local clock signal and the reference source is obtained; and the test result of the retention time period is determined according to the retention time period and its corresponding target phase difference. The oscilloscope is replaced by a software and / or hardware phase counter, and the retention performance test can be automatically executed through the retention performance test instruction without manual operation, thereby improving the test efficiency of the time-frequency equipment.

[0051] The following is an example of the complete process of maintaining the test performance test with the help of the attached figure. Figure 4 As shown, in a specific embodiment of the present application, the holding performance test process of the time-frequency device specifically includes.

[0052] S10: Power on and start.

[0053] S11: Receive a hold performance test instruction.

[0054] S12: When the time between the current moment and the initial moment reaches the waiting time, determine whether it is in a locked state.

[0055] If it is in the locked state, jump to S14, otherwise jump to S13.

[0056] S13: Update the initial time to the current time.

[0057] Jump to S12.

[0058] S14: Taking the current time as the start time, stop outputting the real-time control amount to the control circuit of the local clock source to enter the hold state.

[0059] S15: Obtain the phase difference between the local clock signal and the reference source in each cycle.

[0060] S16: When the duration between the current moment and the start moment reaches the holding time period, a target phase difference is determined according to the latest phase difference.

[0061] S17: Determine a test result of the holding time period according to the holding time period and its corresponding target phase difference.

[0062] Figure 5 A schematic structural diagram of a holding performance test device provided in an embodiment of the present application is shown. The holding performance test device includes a receiving module 11, a starting module 12, a determining module 13 and a determining module 14.

[0063] A receiving module 11 is used to receive a maintenance performance test instruction, the maintenance performance test instruction carries a maintenance performance test parameter, and the maintenance performance test parameter includes at least one maintenance time period;

[0064] A starting module 12, responding to a holding performance test instruction to start a holding performance test;

[0065] An acquisition module 13, configured to acquire a target phase difference between a local clock signal and a reference source when the duration between the current moment and the start moment of the retention performance test reaches the retention time period;

[0066] The determination module 14 is used to determine the test result of the holding time period according to the holding time period and its corresponding target phase difference.

[0067] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / modules / units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0068] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0069] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0070] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0071] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the camera / time-frequency device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), electric carrier signal, telecommunication signal and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0072] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0073] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0074] In the embodiments provided in the present application, it should be understood that the disclosed devices / network equipment and methods can be implemented in other ways. For example, the device / network equipment embodiments described above are merely schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0075] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0076] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for maintaining performance testing, characterized in that: The method comprises: Receiving a retention performance test instruction, the retention performance test instruction carrying a retention performance test parameter, the retention performance test parameter including at least one retention time period; Initiating the retention performance test in response to the retention performance test instruction; When the time between the current moment and the start moment of the retention performance test reaches the retention time period, obtaining a target phase difference between the local clock signal and the reference source; A test result of the holding time period is determined according to the holding time period and the corresponding target phase difference.

2. The method according to claim 1, characterized in that When the duration between the current moment and the start moment of the retention performance test reaches the retention time period, obtaining the target phase difference between the local clock signal and the reference source includes: After the start-up time, obtaining a phase difference between the local clock signal and the reference source in each cycle; When the duration between the current moment and the start moment reaches the holding time period, the target phase difference is determined according to the latest phase difference.

3. The method according to claim 2, characterized in that Determining the target phase difference according to the latest phase difference comprises: The integer part of the target phase difference is determined according to the record of the phase difference, and the latest phase difference is used as the non-integer part of the target phase difference.

4. The method according to claim 2, characterized in that The acquiring of the phase difference between the local clock signal and the reference source in each cycle comprises: The phase counter is started at a first changing edge of the local clock signal, and the counting is stopped at the second changing edge of the reference source and the counting result is output, wherein the first changing edge and the second changing edge are one of a rising edge and a falling edge; The phase difference is determined according to the counting result.

5. The method according to claim 4, characterized in that Determining the phase difference according to the counting result comprises: The phase difference is calculated according to the counting result and a period of a clock source of the phase counter.

6. The method according to claim 1, characterized in that The starting of the retention performance test in response to the retention performance test instruction comprises: In response to the hold performance test instruction, the output of the real-time control quantity to the control circuit of the local clock source is stopped to enter a hold state.

7. The method according to claim 1, characterized in that The retention performance test parameter also includes a waiting time, and before responding to the retention performance test instruction to start the retention performance test, the following step is also included: When the time between the current moment and the initial moment reaches the waiting time, determining whether the state is in a locked state; If it is in the locked state, the current time is used as the start time to start the retention performance test, otherwise the initial time is updated to the current time.

8. A holding performance testing device, characterized in that: The device comprises: A receiving module, configured to receive a retention performance test instruction, wherein the retention performance test instruction carries a retention performance test parameter, and the retention performance test parameter includes at least one retention time period; A starting module, responding to the holding performance test instruction to start the holding performance test; An acquisition module, configured to acquire a target phase difference between a local clock signal and a reference source when the duration between the current moment and the start moment of the retention performance test reaches the retention time period; A determination module is used to determine a test result of the holding time period according to the holding time period and the corresponding target phase difference.

9. A time-frequency device, comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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