Light-emitting assembly, preparation method thereof and display panel

Abstract

The invention discloses a light-emitting assembly, a preparation method thereof and a display panel, and relates to the technical field of display. The light-emitting assembly comprises a pin, a substrate, a driving unit, a light-emitting unit, a connecting liner located in the substrate and a connecting wire connected with the connecting liner through a first via hole of the substrate, and the connecting wire is further connected with the driving unit. Since the connection pad comprises the first metal layer and the second metal layer which are stacked in the direction away from the pin, and the thickness of the second metal layer is larger than that of the second metal layer, the thickness of the connection pad can be larger, namely the distance between the surface, away from the pin, of the connection pad and the surface, away from the pin, of the substrate is smaller; the flatness effect of the surface of the connection pad away from the pins and the surface of the substrate away from the pins is good. Therefore, even if the driving unit is arranged in the area where the first via hole is located, the performance of the driving unit can be ensured, the layout space can be fully utilized, and the layout of the driving unit is more flexible.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a light-emitting component and a preparation method thereof, and a display panel. Background Art

[0002] The display panel includes a display backplane and a plurality of light-emitting components connected to the display backplane, wherein the display backplane can provide driving signals for the light-emitting components to make the light-emitting components emit light, thereby realizing display.

[0003] In the related art, the light-emitting component includes a substrate, a light-emitting unit, a driving unit for driving the light-emitting unit to emit light, a connecting pad and a connecting wire. The connecting pad is located in the substrate and is connected to the connecting wire through a via on the substrate, and the connecting wire is also connected to the driving unit. In this way, the display backplane can provide a driving signal to the driving unit through the connecting pad, and then the driving unit drives the light-emitting unit to emit light based on the driving signal.

[0004] However, since the difference between the area where the connection pads are connected and the area where the connection pads are not connected is large, the flatness of the surface where the drive unit is installed is poor. Furthermore, when the drive unit is installed on the surface with poor flatness, the performance of the drive unit is poor. Summary of the invention

[0005] The present application provides a light-emitting component and a method for manufacturing the same, and a display panel, which can solve the problem of poor performance of the driving circuit in the related art. The technical solution is as follows:

[0006] In one aspect, a light emitting assembly is provided, comprising:

[0007] A light-emitting unit, a driving unit, a substrate and a pin, wherein the substrate is located at a side of the driving unit away from the light-emitting unit, the pin is located at a side of the driving unit away from the light-emitting unit, and the pin is electrically connected to the driving unit;

[0008] The light-emitting component further includes a connection pad and a connection trace, wherein the connection pad is located inside the substrate, and a side of the substrate away from the pin includes a first via hole, and the connection trace is electrically connected to the connection pad through the first via hole; the driving circuit is located on a side of the connection trace away from the substrate, and is electrically connected to the connection trace;

[0009] The connection pad includes a first metal layer and a second metal layer which are stacked, the second metal layer is closer to the light emitting unit than the first metal layer, and the thickness of the second metal layer is greater than that of the first metal layer.

[0010] Optionally, in the thickness direction of the connection pad, the minimum distance between a side of the portion of the connection line located in the first via hole away from the connection pad and the pin is a first distance, and the distance between a side of the portion of the connection line located outside the first via hole away from the connection pad and the pin is a second distance;

[0011] Wherein, a difference between the first distance and the second distance is less than or equal to 1 micrometer.

[0012] Optionally, in the thickness direction of the connection pad, the distance between the side of the connection pad close to the driving unit and the pin is a third distance, and the distance between the surface of the substrate close to the driving unit and the pin is a fourth distance;

[0013] Wherein, a difference between the third distance and the fourth distance is less than or equal to 1 micrometer.

[0014] Optionally, the connection pad has a first surface and a second surface opposite to each other, and the second surface is closer to the pin than the first surface;

[0015] The area of ​​the second surface is greater than that of the first surface, and the orthographic projection of the first surface on the reference plane is located inside the orthographic projection of the second surface on the reference plane, and the reference plane is parallel to the surface of the substrate.

[0016] Optionally, an area of ​​a cross section of the second metal layer parallel to the reference plane increases as a distance between the cross section and the pin increases;

[0017] The second metal layer includes the first surface, a third surface opposite to the first surface, and a fourth surface connecting the first surface and the third surface, the fourth surface includes a first line segment cut through a cross section passing through the center of the second metal layer, and the angle between the first line segment and the reference plane ranges from 70° to 80°.

[0018] Optionally, an area of ​​a cross section of the first metal layer parallel to the reference plane decreases as a distance between the cross section and the pin increases.

[0019] Optionally, the thickness of the substrate is greater than 5 micrometers, and the thickness of the connection pad is less than the thickness of the substrate.

[0020] Optionally, the material of the first metal layer is the same as the material of the second metal layer.

[0021] Optionally, a side of the substrate facing away from the driving unit includes a second via hole, a portion of the pin is located in the second via hole, and is electrically connected to the connection pad through the second via hole;

[0022] A side of the pin away from the connection pad protrudes out of the second via hole.

[0023] Optionally, the light-emitting unit includes: a first electrode, a second electrode, and a light-emitting portion electrically connected to the first electrode and the second electrode respectively;

[0024] The driving unit includes a third electrode, a fourth electrode and a driving circuit, the third electrode and the fourth electrode are both located on the side of the driving unit facing the light-emitting unit, the third electrode and the fourth electrode are electrically connected to the driving circuit respectively, the third electrode is electrically connected to the first electrode, and the fourth electrode is electrically connected to the second electrode.

[0025] Optionally, the light-emitting component includes a plurality of light-emitting units and the driving unit corresponding to the plurality of light-emitting units; the plurality of light-emitting units include a first color light-emitting unit, a second color light-emitting unit and a third color light-emitting unit, and the first color, the second color and the third color are different from each other;

[0026] The light-emitting unit further comprises a color filter layer, a color conversion layer and a light-emitting layer which are sequentially stacked in a direction away from the second substrate; the light-emitting color of the light-emitting layer is blue;

[0027] The light-emitting layer includes a first doped layer, a multi-quantum well layer and a second doped layer which are stacked, wherein the first doped layer is electrically connected to the first electrode, the second doped layer is electrically connected to the second electrode, and the light-emitting layer includes a first light-emitting portion, a second light-emitting portion and a third light-emitting portion.

[0028] Optionally, the driving circuit includes a plurality of thin film transistors and at least one storage capacitor, and each of the thin film transistors includes a gate, a source and a drain;

[0029] The pin is connected to a source electrode of a thin film transistor among the plurality of thin film transistors through the connection pad, and is used to provide the driving circuit with a data signal transmitted from a display backplane in the display panel;

[0030] Among the plurality of thin film transistors, there is a thin film transistor whose orthographic projection on the reference plane overlaps with the first via hole.

[0031] In another aspect, a light emitting assembly is provided, comprising:

[0032] A light-emitting unit, a driving unit, a substrate and a pin, wherein the substrate is located at a side of the driving unit away from the light-emitting unit, the pin is located at a side of the driving unit away from the light-emitting unit, and the pin is electrically connected to the driving unit;

[0033] The light-emitting component further includes a connection pad and a connection trace, wherein the connection pad is located inside the substrate, and a side of the substrate away from the pin includes a first via hole, and the connection trace is electrically connected to the connection pad through the first via hole; the driving circuit is located on a side of the connection trace away from the substrate, and is electrically connected to the connection trace;

[0034] The light emitting component further comprises: a flat structure layer located between the connecting wire and the driving unit, the flat structure layer having a third via hole, and the driving unit and the connecting wire are electrically connected through the third via hole;

[0035] In the thickness direction of the connection pad, the minimum distance between the side of the portion of the flat structure layer located in the first via hole away from the connection pad and the pin is a fifth distance, and the distance between the side of the portion of the flat structure layer located outside the first via hole away from the connection pad and the pin is a sixth distance;

[0036] Wherein, a difference between the fifth distance and the sixth distance is less than or equal to 1 micrometer.

[0037] Optionally, a side of the substrate facing away from the driving unit includes a second via hole, a portion of the pin is located in the second via hole, and is electrically connected to the connection pad through the second via hole;

[0038] A side of the pin away from the connection pad protrudes out of the second via hole.

[0039] Optionally, the driving circuit includes a plurality of thin film transistors and at least one storage capacitor, and each of the thin film transistors includes a gate, a source and a drain;

[0040] The pin is connected to a source electrode of a thin film transistor among the plurality of thin film transistors through the connection pad, and is used to provide the driving circuit with a data signal transmitted from a display backplane in the display panel;

[0041] Among the plurality of thin film transistors, there is a thin film transistor whose orthographic projection on the reference plane overlaps with the first via hole.

[0042] In another aspect, a method for preparing a light-emitting component is provided, the method comprising:

[0043] Obtain a first substrate, and a substrate, a connection pad, a connection trace and a driving unit located on the first substrate, wherein the substrate is located between the first substrate and the driving unit, the connection pad is located inside the substrate, one side of the substrate includes a first via hole, and the connection trace is electrically connected to the connection pad through the first via hole; the driving unit is located on a side of the connection trace away from the substrate, and is electrically connected to the connection trace;

[0044] Obtaining a second substrate and a light-emitting unit located on the second substrate;

[0045] Bonding the light emitting unit and the driving unit together through a bonding process, so that the substrate is located on a side of the driving unit away from the light emitting unit;

[0046] peeling the first substrate from one side of the driving unit;

[0047] A pin is formed on a side of the substrate away from the driving unit, and the pin is connected to the driving circuit through the connecting pad and the connecting wire;

[0048] The connection pad includes a first metal layer and a second metal layer which are stacked, the second metal layer is closer to the light emitting unit than the first metal layer, and the thickness of the second metal layer is greater than that of the first metal layer.

[0049] Optionally, obtaining a first substrate and a base located on the first substrate, connecting a pad, connecting a wiring and a driving unit, includes:

[0050] forming a release film and a seed film on the first substrate;

[0051] A photoresist layer is formed on a side of the seed film away from the first substrate, the photoresist layer having an opening, an area of ​​the side of the opening away from the first substrate is larger than an area of ​​the side of the opening close to the first substrate, and an orthographic projection of the side of the opening close to the first substrate on the first substrate is located within an orthographic projection of the side of the opening away from the first substrate on the first substrate;

[0052] forming a second metal layer connecting the pads in the opening by an electroplating process;

[0053] removing the photoresist layer;

[0054] Etching the seed film and the release film to form a first metal layer and the release layer, wherein the first metal layer and the release layer are located between the connection pad and the first substrate;

[0055] forming a base film on a side of the connection pad away from the first substrate;

[0056] forming a target insulating film on a side of the base film away from the first substrate;

[0057] Etching the base film and the target insulating film to form a first via hole to obtain a base and a target insulating layer, wherein the first via hole is used to expose at least a portion of the connection pad;

[0058] forming a connection line on a side of the target insulating layer away from the first substrate, wherein the connection line and the connection pad are electrically connected through the first via hole;

[0059] A driving unit is formed on a side of the connecting wire away from the first substrate, and the driving unit is electrically connected to the connecting wire.

[0060] In another aspect, a display panel is provided, the display panel comprising a display backplane, and a plurality of light-emitting components as described in the above aspects arranged in an array and located on one side of the display backplane;

[0061] The display backplane is used to provide a driving signal to a driving unit in the light-emitting component so that the driving unit drives the light-emitting unit to emit light.

[0062] The beneficial effects of the technical solution provided by this application include at least:

[0063] The present application discloses a light-emitting component and a preparation method thereof, and a display panel. The light-emitting component includes a pin, a substrate, a driving unit, and a light-emitting unit that are sequentially arranged. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. Since the connecting pad includes a first metal layer and a second metal layer stacked in a direction away from the pin, and the thickness of the second metal layer is greater than the thickness of the second metal layer, the thickness of the connecting pad can be thicker. Furthermore, the distance between the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is small, that is, the surface of the connecting pad away from the pin and the surface of the substrate away from the pin have a better flatness effect. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0065] Figure 1 It is a structural schematic diagram of a light-emitting component provided in an embodiment of the present application;

[0066] Figure 2 is a schematic diagram of a connection pad and a substrate provided in an embodiment of the present application;

[0067] Figure 3 is a structural schematic diagram of a light-emitting unit provided in an embodiment of the present application;

[0068] Figure 4 is a schematic diagram of the structure of another light-emitting unit provided in an embodiment of the present application;

[0069] Figure 5 It is a structural schematic diagram of a driving unit, a substrate, pins, a connecting pad and a connecting wiring provided in an embodiment of the present application;

[0070] Figure 6 is a flow chart of a method for preparing a light-emitting component provided in an embodiment of the present application;

[0071] Figure 7 It is a flow chart of obtaining a first substrate, a base located on the first substrate, a connection pad, a connection wiring and a driving unit provided in an embodiment of the present application;

[0072] Figure 8 is a schematic diagram of forming a release film provided in an embodiment of the present application;

[0073] Fig. 9 is a schematic diagram of a seed film provided in an embodiment of the present application;

[0074] Fig.10 is a schematic diagram of a photoresist layer provided in an embodiment of the present application;

[0075] Fig.11 is a schematic diagram of a second metal layer for forming a connection pad provided by an embodiment of the present application;

[0076] Fig.12 is a schematic diagram of removing a photoresist layer provided in an embodiment of the present application;

[0077] Fig.13 This is a schematic diagram of obtaining a first metal layer and a release layer provided in an embodiment of the present application;

[0078] Fig.14 is a schematic diagram of forming a base film provided in an embodiment of the present application;

[0079] Fig.15 is a schematic diagram of forming a target insulating film provided by an embodiment of the present application;

[0080] Fig.16 It is a schematic diagram of obtaining a substrate and a target insulating layer provided in an embodiment of the present application;

[0081] Fig.17 is a schematic diagram of forming a connection line provided in an embodiment of the present application;

[0082] Fig.18 is a schematic diagram of forming a driving unit provided in an embodiment of the present application;

[0083] Fig.19 is a schematic diagram of bonding a driving unit and a light-emitting unit provided in an embodiment of the present application;

[0084] Fig. 20 is a schematic diagram of peeling off a first substrate and a release layer provided in an embodiment of the present application;

[0085] Fig.21 is a schematic diagram of forming a pin provided in an embodiment of the present application;

[0086] Fig. 22 It is a schematic diagram of separation of a connection pad when peeling off a first substrate provided by an embodiment of the present application;

[0087] Fig.23 is a structural schematic diagram of another light-emitting component provided in an embodiment of the present application;

[0088] Fig.24 It is a schematic diagram of the structure of another driving unit, substrate, pins, connecting pads and connecting wiring provided in an embodiment of the present application;

[0089] Fig.25 Another flow chart of obtaining a first substrate, a base located on the first substrate, a connection pad, a connection wiring and a driving unit provided in an embodiment of the present application;

[0090] Fig.26 It is a schematic diagram of forming a release film and a liner film provided in an embodiment of the present application;

[0091] Fig. 27 It is a schematic diagram of obtaining a release layer and a connection pad provided in an embodiment of the present application;

[0092] Fig.28 is a schematic diagram of forming a base film provided in an embodiment of the present application;

[0093] Fig.29 is a schematic diagram of forming a target insulating film provided by an embodiment of the present application;

[0094] Fig.30 It is a schematic diagram of obtaining a substrate and a target insulating layer provided in an embodiment of the present application;

[0095] Fig.31 is another schematic diagram of forming a connection line provided in an embodiment of the present application;

[0096] Fig.32 is a schematic diagram of forming a flat structural layer provided in an embodiment of the present application;

[0097] Fig.33 is a schematic diagram of forming a driving unit provided in an embodiment of the present application;

[0098] Fig.34 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0099] Fig.35 This is a top view of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0100] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0101] A micro light emitting diode (Micro LED) display panel generally includes a display backplane, a driving unit integrated on the display backplane, and a light-emitting chip bonded to the driving unit. When preparing the Micro LED display panel, in order to achieve color display, it is necessary to transfer and bond light-emitting chips of different colors to a display backplane integrated with a driving unit, and light-emitting chips of the same color are transferred at the same time, and light-emitting chips of different colors are transferred in batches. That is, the number of transfers is the number of colors of the light-emitting chip. Optionally, the light-emitting chip includes light-emitting chips of three colors, such as a red (red, R) light-emitting chip, a green (green, G) light-emitting chip, and a blue (blue) light-emitting chip, and thus three transfers are required. This solution has a large number of transfers when preparing a Micro LED display panel, and the process is more complicated.

[0102] In addition, in order to reduce the manufacturing cost of Micro LED display panels, the size of the display backplane will not be designed to be too large (because if it is designed to be too large, if some of the light-emitting chips fail to emit light after transfer, the entire product will be scrapped, and the cost will be high). Therefore, if this solution needs to achieve large-size display, it can only be achieved through splicing, and the display effect is poor.

[0103] The red, green and blue micro display chip (RGB Micro LED) is bonded to a driving unit to form a new active-matrix light-emitting diode (AM-LED) chip with its own driving circuit. The AM-LED chip includes light-emitting chips of three colors, red, green and blue, and a driving unit for driving the light-emitting chip. Furthermore, depending on the size of the display panel that needs to be prepared, a corresponding number of AM-LED chips are used to perform one-time transfer bonding with the display backplane to achieve the preparation of a glass-based color light-emitting diode (LED) display panel. At the same time, this solution only requires one transfer process, and the process is relatively simple. In addition, large-size display can be achieved without splicing, which can improve the glass utilization rate of the display backplane, thereby reducing costs.

[0104] In addition, the AM-LED chip can achieve electrical / optical dual detection through detection technology, and screen out chips that meet the requirements of optical performance and driving performance. In this way, compared with the solution of integrating the driving circuit on the display backplane to form a display panel, it is more conducive to improving the chip yield on the display panel and is also convenient for repairing and replacing defective chips.

[0105] The driving circuit in the driving unit needs to be connected to the connection pads and pins inside the substrate, and the pins are bonded to the display backplane to achieve signal transmission. However, in the related art, the difference between the area where the connection pads are located and other areas where the connection pads are not set is large, which will cause the flatness of the surface where the driving circuit is set to be poor. Furthermore, when the driving unit is set on the surface with poor flatness, the performance of the driving unit is poor.

[0106] Figure 1 Schematic diagram of a light emitting component provided in an embodiment of the present application. Figure 1 The light emitting assembly 10 includes: a light emitting unit 101, a driving unit 102, a substrate 103 and a pin 104. The substrate 103 is located on a side of the driving unit 102 away from the light emitting unit 101, the pin 104 is located on a side of the driving unit 102 away from the light emitting unit 101, and the pin 104 is electrically connected to the driving unit 102.

[0107] Optionally, in an embodiment of the present application, the pin 104 included in the light-emitting component 10 can be used to receive a driving signal provided by the display backplane, so that the pin 104 can provide a driving signal to the driving unit 102, so that the driving unit 102 drives the light-emitting unit 101 to emit light.

[0108] For further reference, Figure 1 , the light emitting component 10 further includes a connection pad 105 and a connection trace 106. The connection pad 105 is located inside the substrate 103, that is, the connection pad 105 is embedded in the substrate 103. In addition, the side of the substrate 103 away from the pin 104 includes a first via K1, and the connection trace 106 is electrically connected to the connection pad 105 through the first via K1. The driving circuit 1023 is located on the side of the connection trace 106 away from the substrate 103, and is electrically connected to the connection trace 106. In addition, the side of the connection pad 105 close to the pin 104 is electrically connected to the pin 104, so that the pin 104 is connected to the driving circuit 1023 through the connection pad 105 and the connection trace 106.

[0109] Among them, the electrical connection between the connecting trace 106 and the connecting pad 105 through the first via K1 can mean: since the connecting pad 105 is located inside the substrate 103, the first via K1 can be designed to expose at least a portion of the side of the connecting pad 105 away from the pin 104, and the connecting trace 106 can be electrically connected to at least a portion of the connecting pad 105 exposed by the first via K1.

[0110] In the examples of this application, refer to Figure 1 The connection pad 105 includes a first metal layer 1051 and a second metal layer 1052 which are stacked, and the second metal layer 1052 is closer to the light emitting unit 101 than the first metal layer 1051. The thickness of the second metal layer 1052 is greater than that of the first metal layer 1051.

[0111] Since the connection pad 105 in the embodiment of the present application is a stacked structure of two metal layers, and the connection pad 105 includes a first metal layer 1051, and a second metal layer 1052 with a thicker thickness is designed on the first metal layer 1051, the thickness of the connection pad 105 can be thicker than that of a solution in which the connection pad 105 is a single metal layer, and the distance between the surface of the connection pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 can be reduced, thereby improving the flatness of the surface of the connection pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104. Therefore, when the driving unit 102 is arranged on the surface with a better flatness, the device or circuit in the driving unit 102 can be designed in the area where the connection pad 105 is located, thereby avoiding poor crystallization of the device film layer, ensuring the performance of the driving unit 102, and improving the process yield of the light-emitting component.

[0112] At the same time, since the devices or circuits in the driving unit 102 can be designed in the area where the connection pad 105 is located, more space can be provided for the device circuit design and layout of the driving unit 102, which provides favorable factors for device miniaturization and higher integration. In addition, since the distance between the surface of the connection pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 is small, the slope of the portion where the connection line 106 and the connection pad 105 are connected in the first via K1 can be relatively gentle, thereby avoiding the risk of disconnection of the connection line 106.

[0113] In summary, an embodiment of the present application provides a light-emitting component, which includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. Since the connecting pad includes a first metal layer and a second metal layer stacked in a direction away from the pin, and the thickness of the second metal layer is greater than the thickness of the second metal layer, the thickness of the connecting pad can be thicker. Furthermore, the distance between the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is small, that is, the surface of the connecting pad away from the pin and the surface of the substrate away from the pin have a better flatness effect. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0114] The material of the pin 104 may include a conductive material, such as a metal. Optionally, at least one of the pins 104 includes a first metal layer and a second metal layer stacked. The first metal layer is located between the second metal layer and the driving unit 103, that is, the first metal layer is closer to the driving unit 103 than the second metal layer.

[0115] The material of the first metal layer includes nickel (Ni), and the material of the second metal layer includes gold (Au). For example, the material of the first metal layer is nickel, and the material of the second metal layer is gold.

[0116] In the embodiment of the present application, when fixing the light-emitting component 10 and the display backplane included in the display panel, a welding process can be used to fix the pin 104 to the pad of the display backplane 20 through a gold deposition process, thereby achieving the connection between the light-emitting component 10 and the display backplane 20.

[0117] In the examples of this application, refer to Figure 1 A portion of the connection trace 106 is located in the first via hole K1 to connect to the connection pad 105, and another portion is located outside the first via hole K1 to connect to the drive unit 102. The connection trace 106 located in the first via hole K1 is directly located on the surface of the connection pad 105 away from the pin 104, and the connection trace 106 located outside the via hole is directly located on the surface of the substrate 103 away from the pin 104.

[0118] Since the surface of the connection pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 have better flatness, it can be ensured that after the connection trace 106 is formed, the surface of the connection trace 106 away from the pin 104 has better flatness. For example, in the thickness direction of the connection pad 105, the minimum distance between the side of the connection trace 106 located in the first via K1 away from the connection pad 105 and the pin 104 is the first distance d1. The distance between the side of the connection trace 106 located outside the first via K1 away from the connection pad 105 and the pin 104 is the second distance d2. The difference between the first distance d1 and the second distance d2 is less than or equal to 1 μm (micrometer).

[0119] In the embodiment of the present application, the setting surface of the driving unit 102 may at least include: a side of the portion of the connecting wire 106 located in the first via K1 away from the connecting pad 105, a side of the portion of the connecting wire 106 located outside the first via K1 away from the connecting pad 105, and a surface of the area of ​​the substrate 103 where the connecting wire 106 is not set away from the pin 104. On the setting surface of the driving unit 102, the minimum distance from the pin 104 is the above-mentioned first distance d1, and the maximum distance from the pin 104 is the above-mentioned second distance d2. In addition, the distance between the surface of the area of ​​the substrate 103 where the connecting wire 106 is not set away from the pin 104 and the pin 104 is greater than the first distance d1 and less than the second distance d2. Since the difference between the first distance d1 and the second distance d2 is less than or equal to 1μm, the flatness of the setting surface of the driving unit 102 can be ensured as much as possible, thereby ensuring the performance of the driving unit 102.

[0120] It should be noted that since the connection line 106 is obtained by patterning the line film after integral film formation, the film thickness of each area of ​​the connection line 106 is roughly the same, and only the thickness of the part that climbs on the side wall of the first via K1 may have a slight difference.

[0121] Further, in the thickness direction of the connection pad 105, the distance between the side of the connection pad 105 close to the driving unit 102 and the pin 104 is a third distance d3, and the distance between the surface of the substrate 103 close to the driving unit 102 and the pin 104 is a fourth distance d4. The difference between the third distance d3 and the fourth distance d4 is less than or equal to 1 μm, so that the difference between the first distance d1 and the second distance d2 is less than or equal to 1 μm. In addition, the side of the connection pad 105 close to the driving unit 102 may refer to the side of the connection pad 105 away from the pin 104, and the surface of the substrate 103 close to the driving unit 102 may refer to the surface of the substrate 103 where the connecting trace 106 is not set and away from the pin 104.

[0122] Figure 2 Schematic diagram of the structure of a substrate and a connection pad provided in an embodiment of the present application. Figure 2 It can be seen that the connection pad 105 has a first surface a1 and a second surface a2 opposite to each other, and the second surface a2 is closer to the pin 104 than the first surface a1. The area of ​​the second surface a2 is larger than the area of ​​the first surface a1, and the orthographic projection of the first surface a1 on the reference plane is located inside the orthographic projection of the second surface a2 on the reference plane. The reference plane is parallel to the surface of the substrate 103.

[0123] Optionally, the area of ​​the cross section of the second metal layer 1052 parallel to the reference plane increases with the increase of the distance between the cross section and the pin 104. That is, the second metal layer 1052 may be an inverted trapezoidal structure.

[0124] The second metal layer 1052 includes a first surface a1, a third surface a3 opposite to the first surface a1, and a fourth surface a4 connecting the first surface a1 and the third surface a3. The fourth surface a4 includes a first line segment cut through a cross section passing through the center of the second metal layer 1052. The angle α between the first line segment and the reference plane ranges from 70° (degrees) to 80°.

[0125] In the embodiment of the present application, during the preparation of the first metal layer 1051 and the second metal layer 1052 of the connection pad 105, a metal film may be formed first, and then the second metal layer 1052 may be formed. Then, a dry etching process may be used to etch the portion of the metal film not covered by the second metal layer 1052 by etching gas, so as to form the first metal layer 1051. By making the angle α between the first line segment of the side of the second metal layer 1052 and the reference plane range from 70° to 80°, the etching gas may react more easily with the metal film below the second metal layer 1052, so as to facilitate obtaining the first metal layer 1051.

[0126] Optionally, the area of ​​the cross section of the first metal layer 1051 parallel to the reference plane decreases as the distance between the cross section and the pin 104 increases. That is, the first metal layer 1051 may be a regular trapezoidal structure.

[0127] The first metal layer 1051 includes a second surface a2, a fifth surface a5 opposite to the second surface a2, and a sixth surface a6 connecting the second surface a2 and the fifth surface a5. The sixth surface a6 includes a second line segment obtained by cutting a cross section passing through the center of the first metal layer 1051. The second line segment may be a straight line segment or a substantially straight line segment, or due to process reasons, the second line segment may be an arcuate line segment with a curvature.

[0128] In the embodiment of the present application, the thickness h1 of the substrate 103 may be greater than 5 μm, and the thickness h2 of the connection pad 105 may be less than the thickness h1 of the substrate 103. The reason why the thickness h1 of the substrate 103 is greater than 5 μm is that if the thickness h1 of the substrate 103 is less than 5 μm, the uniformity of the film layer of the substrate 103 may be poor. In addition, the thickness h1 of the substrate 103 may be less than 6 μm. Generally, it is not necessary for the thickness of the substrate 103 to be too thick, and it is not convenient to achieve thinness and lightness if it is too thick, so the thickness h1 of the substrate 103 is selected to be less than 6 μm.

[0129] Optionally, the thickness h21 of the first metal layer 1051 of the connection pad 105 is in the range of 50 nm (nanometers) to 300 nm, and the thickness h22 of the second metal layer 1052 of the connection pad 105 is in the range of 4 μm to 6 μm.

[0130] Among them, the main function of the metal film (the metal film can be called a seed film) used to form the first metal layer 1051 is to introduce electric charge through the electroplating process, so that the metal film reacts with the electroplating solution, and then grows on one side of the metal film to obtain the second metal layer 1052. Therefore, in order to ensure the reliability of the reaction, it is necessary to ensure the uniformity of the film layer of the metal film. By making the thickness of the metal film greater than 50nm, the stable uniformity of the film resistivity of the metal film can be ensured. In addition, after the second metal layer 1052 is formed, the excess metal film needs to be etched away. Therefore, in order to reduce the etching difficulty of the etching process (the thickness of the metal film is too thick, which will cause damage to the film layer), the thickness of the metal film does not need to be designed to be too thick, usually less than 300nm. That is, the thickness of the metal film is in the range of 50nm to 300nm.

[0131] Furthermore, since the first metal layer 1051 is obtained by etching a metal film, the thickness range of the first metal layer 1051 can be the same as the thickness range of the metal film, that is, the thickness of the first metal layer 1051 is in the range of 50 nm to 300 nm.

[0132] In the embodiment of the present application, the main function of the second metal layer 1052 of the connecting pad 105 is to fill the via between the pin 104 and the connecting trace 106. Therefore, when the thickness of the substrate 103 is in the range of 5μm to 6 microns, the thickness of the connecting pad 105 can be in the range of 4μm to 6μm, so as to minimize the step difference between the side of the connecting pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104, so as to make the side of the connecting pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 as flat as possible.

[0133] Optionally, the material of the connecting wire 106 can be a metal material, for example, molybdenum (Mo). The thickness of the connecting wire 106 is in the range of 50nm to 200nm. Among them, the reason why the minimum thickness of the connecting wire 106 is selected to be 50nm is that: if the thickness of the connecting wire 106 is less than 50nm, the film uniformity of the connecting wire 106 may not be guaranteed (usually the thicker the thickness, the better the uniformity). At the same time, the reason why the maximum thickness of the connecting wire 106 is selected to be 200nm is that: the function of the connecting wire 106 is to achieve the overlap of the connecting pad 105 and the driving unit 102, so the resistivity requirements of the connecting wire 106 are relatively low, and there is no need to design a thicker thickness. And if the thickness of the connecting wire 106 is too thick, it will lead to higher costs, so the thickness of the connecting wire 106 can be 200nm. It should also be noted that if the connecting wire 106 is a wire for transmitting signals, it has certain requirements for resistivity, and it is necessary to adopt a wire with a thicker thickness (such as 300nm).

[0134] In the embodiment of the present application, the material of the metal film used determines the material of the second metal layer 1052 that can be grown on the metal film. The metal film is used to form the first metal layer 1051 (the material of the metal film is the same as that of the first metal layer 1051), so usually, the material of the second metal layer 1052 is the same as that of the first metal layer 1051.

[0135] Optionally, the material of the first metal layer 1051 includes one of copper (Cu), titanium (Ti), molybdenum (Mo) and gold (Au). Correspondingly, the material of the second metal layer 1052 includes one of copper (Cu), titanium (Ti), molybdenum (Mo) and gold (Au). For example, the material of the first metal layer 1051 is copper (Cu), and the material of the second metal layer 1052 is also copper (Cu).

[0136] In the embodiment of the present application, the side of the substrate 103 away from the driving unit 102 includes a second via K2, a portion of the pin 104 is located in the second via K2, and is electrically connected to the connection pad 105 through the second via K2. The side of the pin 104 away from the connection pad 105 protrudes from the second via K2.

[0137] refer to Figure 1 The light emitting unit 101 includes: a first electrode 1011, a second electrode 1012, and a light emitting portion 1013 electrically connected to the first electrode 1011 and the second electrode 1012. The materials of the first electrode 1011 and the second electrode 1012 both include metal.

[0138] The driving unit 102 includes: a third electrode 1021, a fourth electrode 1022 and a driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located on the side of the driving unit 102 facing the light-emitting unit 101, that is, the third electrode 1021 and the fourth electrode 1022 are closer to the light-emitting unit 101 than the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are electrically connected to the driving circuit 1023, respectively, the third electrode 1021 is electrically connected to the first electrode 1011, and the fourth electrode 1022 is electrically connected to the second electrode 1012. The materials of the third electrode 1021 and the fourth electrode 1022 also include metal.

[0139] refer to Figure 1 , the first electrode 1011 and the second electrode 1012 included in the light-emitting unit 101 are both located between the light-emitting portion 1013 and the driving circuit 1023. There is a gap between the driving circuit 1023 and the light-emitting portion 1013, and the first electrode 1011 and the second electrode 1012 are both located in the gap and in direct contact with the gas in the gap. That is, in the embodiment of the present application, the first electrode 1011 and the second electrode 1012 are spaced apart and insulated from each other by the gas in the gap, thereby preventing the first electrode 1011 and the second electrode 1012 from being damaged when connected.

[0140] In addition, the third electrode 1021 and the fourth electrode 1022 included in the driving unit 102 are also located between the light emitting portion 1013 and the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located in the gap and in direct contact with the gas in the gap. That is, the third electrode 1021 and the fourth electrode 1022 are spaced apart and insulated from each other by the gas in the gap, thereby preventing the third electrode 1021 and the fourth electrode 1022 from being damaged.

[0141] In the embodiment of the present application, the light emitting assembly 10 includes a plurality of light emitting units 101 and a driving unit 102 corresponding to the plurality of light emitting units 101. The driving unit 102 may include a plurality of driving circuits 1023 corresponding to the plurality of light emitting units 101, and some film layers in the plurality of driving circuits 1023 may be common film layers. That is, each driving circuit 1023 in the driving unit 102 may be used to drive a corresponding light emitting unit 101 to emit light.

[0142] Optionally, the plurality of light-emitting units 101 include a first color light-emitting unit, a second color light-emitting unit, and a third color light-emitting unit. The first color, the second color, and the third color are different from each other. For example, the first color is red (red, R), the second color is green (green, G), and the third color is blue (blue, B).

[0143] refer to Figure 1 It can be seen that the light emitting component 10 further includes a second substrate 107 . Figure 3 The light emitting unit 1013 in the light emitting unit 101 includes a color filter layer 10131 , a color conversion layer 10132 and a light emitting layer 10133 which are sequentially stacked in a direction away from the second substrate 107 .

[0144] The light emitting layer 10133 emits blue light. Figure 4 The light emitting layer 10133 includes a first doping layer 101331, a multi-quantum well layer 101332 and a second doping layer 101333. The first doping layer 101331 is electrically connected to the first electrode 1011, and the second doping layer 101333 is electrically connected to the second electrode 1012.

[0145] Optionally, the first doping layer 101331 may be an N-type doping layer, and the second doping layer 101333 may be a P-type doping layer. Accordingly, the first electrode 1011 may be referred to as an N-type electrode, and the second electrode 1012 may be referred to as a P-type electrode. Optionally, the material of the first doping layer 101331 may be N-type gallium nitride (GaN), and the first doping layer 101331 is denoted as N-GaN. The material of the second doping layer 101333 may be P-type gallium nitride (GaN), and the second doping layer 101333 is denoted as P-GaN.

[0146] Furthermore, the light-emitting layer 10133 includes a first light-emitting portion, a second light-emitting portion and a third light-emitting portion, that is, the light-emitting colors of the first light-emitting portion, the second light-emitting portion and the third light-emitting portion are all blue. Figure 4 Only one luminous part is shown.

[0147] The color conversion layer 10132 includes a first color conversion portion, a second color conversion portion and a transparent portion. Figure 4 Only one color conversion part 101321 is illustrated in the figure. The orthographic projection of the first color conversion part on the second substrate 107 overlaps with the orthographic projection of the first light-emitting part on the second substrate 107, and the first color conversion part is used to convert the light emitted by the first light-emitting part into a color corresponding to the first color conversion part (for example, into red). The orthographic projection of the second color conversion part on the second substrate 107 overlaps with the orthographic projection of the second light-emitting part on the first substrate B, and the second color conversion part is used to convert the light emitted by the second light-emitting part into a color corresponding to the second color conversion part (for example, into green). The orthographic projection of the third color conversion part 101321 on the second substrate 107 overlaps with the orthographic projection of the transparent part on the second substrate 107, and the transparent part is used to transmit the light emitted by the third light-emitting part.

[0148] Optionally, the color conversion layer 10132 also includes a spacer 101322 between any two adjacent structures among the first color conversion portion, the second color conversion portion and the transparent portion, and the spacer 101322 is used to distinguish and space different color conversion portions 101321 and transparent portions.

[0149] The color filter layer 10131 includes a first color block, a second color block, a third color block and a black matrix 101312. Figure 4 Only one color block 101311 is illustrated in the figure. The black matrix 101312 is located between adjacent color blocks 101311. The orthographic projection of the first color block on the second substrate 107 overlaps with the orthographic projection of the first color conversion part on the second substrate 107. The first color block is used to transmit the light of the corresponding color after the conversion by the first color conversion part, and block the light of other colors. The orthographic projection of the second color block on the second substrate 107 overlaps with the orthographic projection of the second color conversion part on the second substrate 107. The second color block is used to transmit the light of the corresponding color after the conversion by the second color conversion part, and block the light of other colors. The orthographic projection of the third color block on the second substrate 107 overlaps with the orthographic projection of the transparent part on the second substrate 107. The third color block is used to transmit the light of the corresponding color transmitted by the transparent part, and block the light of other colors.

[0150] For example, the first color block is a red color block, the second color block is a green color block, and the third color block is a blue color block.

[0151] In the examples of this application, refer to Figure 4 The second doping layer 101333 and the multi-quantum well layer 101332 are used to expose the target portion of the first doping layer 101331. The light emitting layer 101333 also includes a pad electrode 101334, a conductive layer 101335 and an insulating layer 101336.

[0152] The pad electrode 101334 is connected to the target portion of the first doping layer 101331, the conductive layer 101335 is located on the side of the second doping layer 101333 away from the second substrate 107, and the insulating layer 101336 is located on the side of the pad electrode 101334 and the conductive layer 101335 away from the second substrate 107. The insulating layer 101336 has a first target hole (N-type via) and a second target hole (P-type via). The first target hole is used to expose the pad electrode 101334, and the pad electrode 101334 and the first electrode 1011 are connected through the first target hole. The second target hole is used to expose the conductive layer 101335, and the conductive layer 101335 and the second electrode 1012 are connected through the second target hole. Optionally, the material of the conductive layer 101335 can be indium tin oxide (ITO), and the insulating layer 101336 can be a passivation layer (PVX).

[0153] refer to Figure 3 and Figure 4 It can also be seen that the light emitting unit 101 further includes: an adhesive layer 10134 and a buffer layer 10135. The adhesive layer 10134 and the buffer layer 10135 are both located between the color conversion layer 10132 and the light emitting layer 10133. The adhesive layer 10134 is used to bond the color conversion layer 10132 and the buffer layer 10135. The material of the buffer layer 10135 can be undoped GaN.

[0154] Optionally, the light emitting unit 101 may be a miniLED or a microLED.

[0155] In an embodiment of the present application, the driving circuit 1023 may include a plurality of thin film transistors (TFT) and at least one storage capacitor. Optionally, the driving circuit 1023 may include seven thin film transistors and one storage capacitor, that is, the driving circuit 1023 is a 7T1C driving circuit. Alternatively, the driving circuit 1023 may include other numbers of thin film transistors and other numbers of storage capacitors. The embodiment of the present application does not limit the number of thin film transistors included in the driving circuit 1023, and the number of storage capacitors included.

[0156] Each thin film transistor includes a gate, a source and a drain. The driving circuit 1023 includes a plurality of thin film transistors which are connected to each other to achieve the function of driving the light emitting unit 101 to emit light.

[0157] Optionally, the plurality of thin film transistors at least include a data writing transistor, the source of which is used to be connected to a data line of a display backplane in the display panel. The data line can transmit a data driving signal to the driving circuit 1023 through the data writing transistor.

[0158] In an embodiment of the present application, the pin 104 included in the light-emitting component can be connected to the source of the data writing transistor in the driving circuit 1023, and the data writing transistor is connected to the third electrode 1021 of the driving unit 102 through other thin film transistors, so that the data line included in the display backplane in the display panel transmits the data driving signal to the first electrode 1011 of the light-emitting unit 101 through the pin 104, the driving circuit 1023, and the third electrode 1021 in sequence.

[0159] It should be noted that, in order to enable the driving unit 102 to drive the light-emitting unit 101 to emit light, in addition to providing the data driving signal for the first electrode 1011 of the light-emitting unit 101, it is also necessary to provide a power signal (such as a VSS signal) for the second electrode 1012 of the light-emitting unit 101. Optionally, the display backplane can provide the same power signal for the multiple light-emitting components included in the display panel, so the power signal can be provided to the second electrode 1012 of the light-emitting unit 101 in the multiple light-emitting components 10 through the pin 104 (the pin 104 is not shown in the drawings) located in the peripheral area of ​​the display panel. Of course, the light-emitting component 10 can also be designed with a pin, and a connection pad and a connection line connected to the pin, so as to provide a power signal to the second electrode 1012 through the pin.

[0160] In the embodiment of the present application, the material of the substrate 103 can be polyimide (PI), and the substrate 103 can be called a PI substrate. Generally, metal is not deposited directly on the organic film layer as much as possible to avoid film layer separation. Therefore, in order to form the driving circuit 1023, an inorganic insulating layer needs to be formed on the substrate 103, as shown in FIG. Figure 5 The light emitting component 10 further includes a target insulating layer 108 between the connecting wire 106 and the substrate 103, and the target insulating layer 108 may cover the area where the connecting wire 106 is not provided. Further, the driving circuit 1023 may be formed on the side of the target insulating layer 108 and the connecting wire 106 away from the substrate 103.

[0161] Optionally, the target insulating layer 108 may be a passivation layer, and its material may be silicon oxide (SiO). The thickness of the target insulating layer 108 is in the range of 50 nm to 200 nm. The reason why the thickness of the target insulating layer 108 is greater than 50 nm is that the target insulating layer 108 can be prepared by a plasma enhanced chemical vapor deposition method. Considering the uniformity of the film layer prepared by the process, the thickness of the target insulating layer 108 needs to be greater than 50 nm. In addition, the reason why the thickness of the target insulating layer 108 is less than 200 nm is that vias need to be etched on the target insulating layer 108 for connection of the connection wiring 106 and the connection pad 105, so in order to reduce the difficulty of etching, the thickness is made less than 200 nm.

[0162] Optionally, the driving circuit 1023 includes a buffer layer (buffer+barrier) m1, an active layer (poly) m2, a first gate insulating layer (gate insulator, GI) m3, a first gate layer (gate) m4, a second gate insulating layer m5, a second gate layer (not shown in the figure), an inter-level dielectric layer (inter level dielectric, ILD) m6, a source and drain layer m7 and a planarization layer (planarization layer, PLN) m8, which are located on one side of the substrate 103 and stacked in sequence. The third electrode 1021 and the fourth electrode 1022 included in the driving unit 102 are located on the side of the planarization layer m8 away from the substrate 103.

[0163] The active layer m2 includes multiple active patterns corresponding to multiple thin film transistors, each active pattern includes a source region, a drain region and a channel region. The source and drain of the thin film transistor are located in the source-drain layer, and the source of the thin film transistor is connected to the source region, and the drain is connected to the drain region.

[0164] Optionally, the active pattern of one thin film transistor among the plurality of thin film transistors included in the driving circuit 1023 may overlap with the first via hole K1. Since the flatness of the setting surface of the driving circuit 1023 is good, even if the active pattern of the thin film transistor overlaps with the first via hole K1, it will not affect the crystallization process of the active pattern of the thin film transistor, which can provide more space for the device circuit design and layout of the driving unit 102, and provide favorable factors for device miniaturization and higher integration.

[0165] The first gate layer m4 includes a plurality of gate patterns corresponding to a plurality of thin film transistors. The channel region is an overlapping region of an orthographic projection of the gate pattern on the substrate 103 and an orthographic projection of the active pattern on the substrate 103 .

[0166] refer to Figure 5 The first gate layer m4 further includes a gate connection portion m41 connected to the connection wiring 106, and the gate connection portion m41 is used to connect to the connection wiring 106 and the source of the data writing transistor. In order to connect the connection wiring 106 and the gate connection portion m41, the buffer layer m1 and the first gate insulating layer m3 may also have a connection via. In addition, the gate connection portion may be located in the connection via of the buffer layer m1 and the first gate insulating layer m3.

[0167] In summary, an embodiment of the present application provides a light-emitting component, which includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. Since the connecting pad includes a first metal layer and a second metal layer stacked in a direction away from the pin, and the thickness of the second metal layer is greater than the thickness of the second metal layer, the thickness of the connecting pad can be thicker. Furthermore, the distance between the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is small, that is, the flatness effect of the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is better. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0168] Figure 6 is a flow chart of a method for preparing a light-emitting component provided in an embodiment of the present application. Figure 6 , the method comprising:

[0169] Step S101, obtaining a first substrate, a base on the first substrate, connecting pads, and connecting wiring and a driving unit.

[0170] In the embodiment of the present application, the base 103 is located between the first substrate B and the driving unit 102. The connecting pad 105 is located inside the base 103. One side of the base 103 includes a first via K1, and the connecting wire 106 is electrically connected to the connecting pad 105 through the first via K1. The driving unit 102 is located on a side of the connecting wire 106 away from the base 103, and is electrically connected to the connecting wire 106.

[0171] In the examples of this application, refer to Figure 7 , obtaining a first substrate, a base on the first substrate, connecting pads, and connecting wiring and a driving unit include:

[0172] Step S1011 , forming a release film n1 and a seed film n2 on a first substrate.

[0173] refer to Figure 8 First, a release film n1 is formed on the entire surface of the first substrate B. The release film n1 can be a high temperature resistant release layer (De-bonding layer, DBL). The main function of the release film n1 is to facilitate the subsequent peeling of the first substrate B. If the release film n1 is not designed, it may result in separation failure.

[0174] refer to Fig. 9A seed film n2 is formed on the entire surface of the release film n1 away from the first substrate B. The seed film n2 is used to introduce charges through the electroplating process, so that the seed film n2 reacts with the electroplating solution, and then the second metal layer 1052 is grown on one side of the seed film n2.

[0175] Therefore, in order to ensure the reliability of the reaction, it is necessary to ensure the uniformity of the film layer of the seed film n2. By making the thickness of the seed film n2 greater than 50nm, the stable uniformity of the film resistivity of the seed film n2 can be ensured. In addition, after forming the second metal layer 1052, the excess seed film n2 needs to be etched away to form the first metal layer 1051 (which can be called the seed layer). Therefore, in order to reduce the etching difficulty of the etching process (the thickness of the seed film n2 is too thick, which will cause damage to the first substrate B and the film layer), the thickness of the seed film n2 does not need to be designed to be too thick, usually less than 300nm. That is, the thickness of the seed film n2 is in the range of 50nm to 300nm.

[0176] Step S1012: forming a photoresist layer on a side of the seed film away from the first substrate.

[0177] refer to Fig.10 , the photoresist layer n3 has an opening n31, and the opening n31 is used to form the second metal layer 1052 connecting the pad 105. Moreover, the area of ​​the side of the opening n31 away from the first substrate B is larger than the area of ​​the side of the opening n31 close to the first substrate B, and the orthographic projection of the side of the opening n31 close to the first substrate B on the first substrate B is located within the orthographic projection of the side of the opening n31 away from the first substrate B on the first substrate B. That is, the opening n31 in the photoresist layer n3 can be an inverted trapezoidal opening n31.

[0178] Since the main function of the photoresist layer n3 is to serve as a barrier to form the second metal layer 1052 in the opening n31, the thickness h3 of the photoresist layer n3 needs to be greater than the thickness of the second metal layer 1052. Based on the thickness of the substrate 103 and the thickness of the second metal layer 1052, the thickness h3 of the photoresist layer n3 can be in the range of 5 μm to 10 μm.

[0179] The reason why the thickness of the photoresist layer n3 is greater than 5 μm is that: since the maximum thickness of the second metal layer 1052 to be formed is 5 μm, in order to ensure that the thickness of the photoresist layer n3 is greater than the thickness of the second metal layer 1052, the thickness of the photoresist layer n3 is selected to be greater than 5 μm. In addition, the reason why the thickness of the photoresist layer n3 is less than 10 μm is that: the thicker the thickness of the photoresist layer n3, the lower the resolution of the pattern, and the greater the difficulty in forming the opening n31 of the photoresist layer n3; and the thicker the thickness of the photoresist layer n3, the more difficult it is to ensure the uniformity of the angle between the side wall of the opening n31 and the reference plane (the reference plane is parallel to the bearing surface of the first substrate B). When the thickness of the photoresist layer n3 is in the range of 5 μm to 10 μm, the angle between the side wall of the opening n31 and the reference plane can be effectively controlled to be in the range of 70° to 80°, which is convenient for forming an inverted trapezoidal opening n31.

[0180] Step S1013: forming a second metal layer for connecting the pads in the opening by using an electroplating process.

[0181] In the embodiment of the present application, the entire structure formed in the above steps S1011 and S1012 can be placed in an electroplating solution. Fig.11 , the electroplating solution can react with the seed film n2 to grow in the opening n31 to obtain the second metal layer 1052. Since the second metal layer 1052 is formed in the opening n31, the angle between the first line segment of the side wall of the second metal layer 1052 and the reference plane ranges from 70° to 80°. The first line segment is a line segment obtained by cutting the side surface (fourth surface a4) of the second metal layer 1052 through the center of the second metal layer 1052.

[0182] Among them, the main function of the second metal layer 1052 is to fill the via between the pin 104 and the connecting trace 106. When the thickness of the subsequently formed substrate 103 is in the range of 5μm to 6 microns, the thickness of the connecting pad 105 can be in the range of 4μm to 6μm, so as to minimize the step difference between the side of the connecting pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104, so as to make the side of the connecting pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 as flat as possible.

[0183] Step S1014, removing the photoresist layer.

[0184] refer to Fig.12 , remove the photoresist layer n3 to obtain the first substrate B, the release film n1, the seed film n2 and the second metal layer 1052.

[0185] Step S1015 , etching the seed film and the release film n1 to form a first metal layer and a release layer.

[0186] refer to Fig.13 , the seed film n2 and the release film n1 are etched by dry etching process to remove the portion of the seed film n2 and the release film n1 that is not covered by the second metal layer 1052 on the side close to the first substrate B, thereby obtaining the first metal layer 1051 and the release layer n11. Among them, since the angle between the first line segment of the side wall of the second metal layer 1052 and the reference plane is in the range of 70° to 80°, the etching gas can more easily reach the bottom of the inverted trapezoid of the second metal layer 1052 (the dotted line position in the figure), thereby ensuring the etching effect on the seed film n2 and the release film n1.

[0187] Step S1016: forming a base film on a side of the connection pad away from the first substrate.

[0188] In the examples of this application, refer to Fig.14 A base film n4 is formed on the side of the connection pad 105 away from the first substrate B by a coating process, and the base film n4 is made slightly higher than the side of the connection pad 105 away from the first substrate B.

[0189] Optionally, the thickness of the substrate film n4 may be in the range of 5 μm to 6 μm. The reason why the thickness is greater than 5 μm is that if the thickness of the substrate 103 is less than 5 μm, the uniformity of the film layer of the substrate 103 may be poor. In addition, the reason why the thickness may be less than 6 μm is that it is not necessary for the thickness of the substrate 103 to be too thick, and it is not convenient to achieve thinness and lightness if it is too thick, so the thickness of the substrate 103 is selected to be less than 6 μm.

[0190] Step S1017: forming a target insulating film on a side of the base film away from the first substrate.

[0191] In the examples of this application, refer to Fig.15 A target insulating film n5 is formed on a side of the base film n4 away from the first substrate B by a deposition process. The material of the target insulating film n5 may be silicon oxide (SiO).

[0192] Optionally, the thickness of the target insulating film n5 is in the range of 50nm to 200nm. The reason why the thickness of the target insulating film n5 is greater than 50nm is that the target insulating film n5 can be prepared by plasma enhanced chemical vapor deposition. Considering the uniformity of the film layer prepared by the process, the thickness of the target insulating film n5 needs to be greater than 50nm. In addition, the reason why the thickness of the target insulating film n5 is less than 200nm is that a via needs to be etched on the target insulating film n5 for connection of the connection line 106 and the connection pad 105. Therefore, in order to reduce the difficulty of etching, the thickness is less than 200nm.

[0193] Step S1018: etching the base film and the target insulating film to form a first via hole to obtain a base and a target insulating layer.

[0194] In the examples of this application, refer to Fig.16 The first via hole K1 may expose a portion of the second metal layer 1052 of the connection pad 105. The etching of the base film n4 and the target insulating film n5 may be performed through a single etching process or a double etching process.

[0195] In the case of two etching processes, a mask plate may be used to etch the target insulating film n5 to obtain the target insulating layer 108 , and then the target insulating layer 108 is used as a hard mask to etch the base film n4 to obtain the base 103 .

[0196] Step S1019: forming a connecting trace on a side of the target insulating layer away from the first substrate.

[0197] In the examples of this application, refer to Fig.17 A portion of the connection trace 106 may be located in the first via hole K1 and electrically connected to the connection pad 105. Another portion of the connection trace 106 may be located outside the first via hole K1 to be connected to the driving unit 102 formed subsequently.

[0198] Optionally, the material of the connecting wire 106 can be a metal material, for example, molybdenum (Mo). The thickness of the connecting wire 106 is in the range of 50nm to 200nm. Among them, the reason why the minimum thickness of the connecting wire 106 is selected to be 50nm is that: if the thickness of the connecting wire 106 is less than 50nm, the film uniformity of the connecting wire 106 may not be guaranteed (usually the thicker the thickness, the better the uniformity). At the same time, the reason why the maximum thickness of the connecting wire 106 is selected to be 200nm is that: the function of the connecting wire 106 is to achieve the overlap of the connecting pad 105 and the driving unit 102, so the resistivity requirements of the connecting wire 106 are relatively low, and there is no need to design a thicker thickness. And if the thickness of the connecting wire 106 is too thick, it will lead to higher costs, so the thickness of the connecting wire 106 can be 200nm. It should also be noted that if the connecting wire 106 is a wire for transmitting signals, it has certain requirements for resistivity, and it is necessary to adopt a wire with a thicker thickness (such as 300nm).

[0199] Step S1020 , forming a driving unit on a side of the connecting line away from the first substrate.

[0200] In the examples of this application, refer to Fig.18 After the connection wiring 106 is formed, various film layers of the driving unit 102 are formed on a side of the connection wiring 106 away from the first substrate B.

[0201] The driving unit 102 includes: a third electrode 1021, a fourth electrode 1022 and a driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located on the side of the driving unit 102 facing the light-emitting unit 101, that is, the third electrode 1021 and the fourth electrode 1022 are closer to the light-emitting unit 101 than the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are electrically connected to the driving circuit 1023, respectively, the third electrode 1021 is electrically connected to the first electrode 1011, and the fourth electrode 1022 is electrically connected to the second electrode 1012. The materials of the third electrode 1021 and the fourth electrode 1022 both include metal.

[0202] Step S102: obtaining a second substrate and a light-emitting unit located on the second substrate.

[0203] refer to Figure 3 The light emitting unit 101 includes: a first electrode 1011, a second electrode 1012, and a light emitting portion 1013 electrically connected to the first electrode 1011 and the second electrode 1012. The materials of the first electrode 1011 and the second electrode 1012 also include metal.

[0204] Step S103: bonding the light emitting unit and the driving unit together through a bonding process.

[0205] In the examples of this application, refer to Fig.19 After the light emitting unit 101 and the driving unit 102 are bonded together by a bonding process, the substrate 103 can be located on a side of the driving unit 102 away from the light emitting unit 101. The third electrode 1021 can be electrically connected to the first electrode 1011, and the fourth electrode 1022 can be electrically connected to the second electrode 1012.

[0206] The first electrode 1011 and the second electrode 1012 included in the light-emitting unit 101 are both located between the light-emitting portion 1013 and the driving circuit 1023, and the third electrode 1021 and the fourth electrode 1022 included in the driving unit 102 are also both located between the light-emitting portion 1013 and the driving circuit 1023. The materials of the first electrode 10111, the second electrode 1012, the third electrode 1021 and the fourth electrode 1022 all include metal. For example, there is a gap between the driving circuit 1023 and the light-emitting portion 1013, and the first electrode 1011, the second electrode 1012, the third electrode 1021 and the fourth electrode 1022 are all located in the gap and are in direct contact with the gas in the gap.

[0207] That is, in the embodiment of the present application, the first electrode 1011 and the second electrode 1012 are spaced apart, and the third electrode 1021 and the fourth electrode 1022 are spaced apart. The first electrode 1011 and the second electrode 1012, as well as the third electrode 1021 and the fourth electrode 1022 are insulated from each other by the gas in the gap, so as to avoid damage to the connection between the first electrode 1011 and the second electrode 1012, and to avoid damage to the connection between the third electrode 1021 and the fourth electrode 1022.

[0208] Step S104: peeling the first substrate from one side of the base.

[0209] In the examples of this application, refer to Fig. 20 After bonding, the first substrate B can be peeled off from one side of the base 103 by laser liftoff (LLO). In addition, during the process of peeling the first substrate B from the base 103, the release layer n11 can be peeled off, and the second via K3 of the base 103 can be formed by the position of the original release layer n11.

[0210] Furthermore, after the first substrate B is peeled off from one side of the base 103, the second substrate 107 can also be thinned (the thickness of the second substrate 107 after thinning is less than the thickness of the second substrate 107 before thinning), so that the total thickness of the light-emitting component finally formed is thinner, which facilitates the realization of a lightweight display panel.

[0211] Step S105 , forming a lead on a side of the substrate away from the driving unit.

[0212] In the examples of this application, refer to Fig.21 , the entire assembly formed by the above steps S501 to S505 can be placed in a specific solution, and a pin 104 can be formed on a side of the substrate 103 away from the driving unit 102 by using an electroplating process or a chemical plating process. The pin 104 can be connected to the driving unit 102 through a connecting pad 105 and a connecting wire 106, so that the display backplane included in the display panel can provide a driving signal to the driving unit 102 through the pin 104, so that the driving unit 102 can drive the light-emitting unit 101 to emit light.

[0213] In the embodiment of the present application, the light-emitting unit 101 included in the light-emitting group 10 may be a pixel-level light-emitting diode (LED) chip, and the pixel-level LED chip may have a corresponding driving unit 102 with independent driving capability. Afterwards, by connecting multiple light-emitting components to the display backplane, the cost of the display panel is greatly reduced, and the subsequent maintenance cost is also reduced.

[0214] However, affected by the size of the LED chip (eg, the LED chip size is 315μm*315μm), dozens of TFTs and complementary metal oxide semiconductor (CMOS) logic devices need to be integrated inside a single 315μm*315μm chip, and are led out to the display backplane through the bottom pin 104.

[0215] In the related art, due to the large number of TFTs and the large step difference in the location of the first via hole K1 for connecting the pad 105, it is impossible to route and manufacture TFTs in this area. Therefore, filling the first via hole K1 as flat as possible can save a lot of area for design (the total pixel area is 315*315=99225μm 2 (square micrometers), total via area 30*30*9=8100um 2 (The number of vias is 9), accounting for about 8% of the area).

[0216] Furthermore, since the manufacturing process of the driving unit 102 involves a high temperature (450° C.) process for processing low temperature polysilicon (LTPS), there is currently no effective planarization solution for the first via K1. For example, resin cannot be used for planarization because the resin will be affected by high temperature and cause reduced stability.

[0217] In the embodiment of the present application, by designing the connecting pad 105, the flatness effect of the surface of the connecting pad 105 away from the pin 104 and the surface of the substrate 103 away from the pin 104 can be improved. When the driving unit 102 is arranged on the surface with better flatness, the performance of the driving unit 102 can be guaranteed while designing the devices or circuits in the driving unit 102 in the area where the connecting pad 105 is located, thereby improving the process yield of the light-emitting component.

[0218] In the related art, reference Fig. 22 Since the connection pad 105 is in a rectangular shape, it is easy to cause the connection pad 105 and the connection line 106 to separate (peeling) when peeling off the first substrate B. However, in the embodiment of the present application, since the second metal layer 1052 of the connection pad 105 is an inverted trapezoidal structure, the second metal layer 1052 can be firmly embedded in the base 103 (improving the connection firmness between the second metal layer 1052 and the connection line 106), and the second metal layer 1052 and the connection line 106 will not be separated when the first substrate B is subsequently peeled off.

[0219] In summary, the embodiment of the present application provides a method for preparing a light-emitting component, and the light-emitting component prepared by the method includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. Since the connecting pad includes a first metal layer and a second metal layer stacked in a direction away from the pin, and the thickness of the second metal layer is greater than the thickness of the second metal layer, the thickness of the connecting pad can be thicker. Furthermore, the distance between the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is small, that is, the flatness effect of the surface of the connecting pad away from the pin and the surface of the substrate away from the pin is better. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0220] Fig.23 is a schematic diagram of the structure of another light-emitting component provided in an embodiment of the present application. Fig.23 The light emitting assembly 10 comprises: a light emitting unit 101, a driving unit 102, a substrate 103 and a pin 104. The substrate 103 is located at a side of the driving unit 102 away from the light emitting unit 101, the pin 104 is located at a side of the driving unit 102 away from the light emitting unit 101, and the pin 104 is electrically connected to the driving unit 102.

[0221] Optionally, in an embodiment of the present application, the pin 104 included in the light-emitting component 10 can be used to receive a driving signal provided by the display backplane, so that the pin 104 can provide a driving signal to the driving unit 102, so that the driving unit 102 drives the light-emitting unit 101 to emit light.

[0222] For further reference, Fig.23 , the light emitting component 10 further includes a connection pad 105 and a connection trace 106. The connection pad 105 is located inside the substrate 103, that is, the connection pad 105 is embedded in the substrate 103. In addition, the side of the substrate 103 away from the pin 104 includes a first via K1, and the connection trace 106 is electrically connected to the connection pad 105 through the first via K1. The driving circuit 1023 is located on the side of the connection trace 106 away from the substrate 103, and is electrically connected to the connection trace 106. In addition, the side of the connection pad 105 close to the pin 104 is electrically connected to the pin 104, so that the pin 104 is connected to the driving circuit 1023 through the connection pad 105 and the connection trace 106.

[0223] Among them, the electrical connection between the connecting trace 106 and the connecting pad 105 through the first via K1 can mean: since the connecting pad 105 is located inside the substrate 103, the first via K1 can be designed to expose at least a portion of the side of the connecting pad 105 away from the pin 104, and the connecting trace 106 can be electrically connected to at least a portion of the connecting pad 105 exposed by the first via K1.

[0224] The light emitting component 10 further includes: a flat structure layer 109 located between the connecting wire 106 and the driving unit 102. The flat structure layer 109 has a third via hole ( Fig.23 The driving unit 102 and the connecting trace 106 are electrically connected through a third via hole.

[0225] Since the flat structure layer 109 is located on the side of the connection trace 106 away from the substrate 103, the surface of the connection trace 106 away from the substrate 103 can be flattened. For example, in the thickness direction of the connection pad 105, the minimum distance between the side of the flat structure layer 109 located in the first via K1 away from the connection pad 105 and the pin 104 is the fifth distance d5, and the distance between the side of the flat structure layer 109 located outside the first via K1 away from the connection pad 105 and the pin 104 is the sixth distance d6. The difference between the fifth distance d5 and the sixth distance d6 is less than or equal to 1 μm.

[0226] In the embodiment of the present application, the setting surface of the driving unit 102 is the surface of the flat structure layer 109 away from the substrate 103. By making the difference between the distance between the portion of the flat structure layer 109 located in the first via hole K1 and the portion located outside the via hole and the substrate 103 less than or equal to 1 μm, the flatness of the setting surface of the driving unit 102 can be ensured, thereby ensuring the performance of the driving unit 102.

[0227] Optionally, the surface of the planar structure layer 109 away from the substrate 103 may be a planar surface, that is, the difference between the fifth distance d5 and the sixth distance d6 is 0 μm. In this case, the planarization effect is optimal.

[0228] In summary, an embodiment of the present application provides a light-emitting component, which includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. In addition, the light-emitting component also includes a flat structural layer located on the side of the connecting wire away from the substrate, and the flat structural layer can have a flat effect. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0229] In the embodiment of the present application, the side of the substrate 103 away from the driving unit 102 includes a second via K2, a portion of the pin 104 is located in the second via K2, and is electrically connected to the connection pad 105 through the second via K2. The side of the pin 104 away from the connection pad 105 protrudes from the second via K2.

[0230] refer to Fig.23 The light emitting unit 101 includes: a first electrode 1011, a second electrode 1012, and a light emitting portion 1013 electrically connected to the first electrode 1011 and the second electrode 1012. The materials of the first electrode 1011 and the second electrode 1012 both include metal.

[0231] The driving unit 102 includes: a third electrode 1021, a fourth electrode 1022 and a driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located on the side of the driving unit 102 facing the light-emitting unit 101, that is, the third electrode 1021 and the fourth electrode 1022 are closer to the light-emitting unit 101 than the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are electrically connected to the driving circuit 1023, respectively, the third electrode 1021 is electrically connected to the first electrode 1011, and the fourth electrode 1022 is electrically connected to the second electrode 1012. The materials of the third electrode 1021 and the fourth electrode 1022 also include metal.

[0232] refer to Fig.23 , the first electrode 1011 and the second electrode 1012 included in the light-emitting unit 101 are both located between the light-emitting portion 1013 and the driving circuit 1023. There is a gap between the driving circuit 1023 and the light-emitting portion 1013, and the first electrode 1011 and the second electrode 1012 are both located in the gap and in direct contact with the gas in the gap. That is, in the embodiment of the present application, the first electrode 1011 and the second electrode 1012 are spaced apart and insulated from each other by the gas in the gap, thereby preventing the first electrode 1011 and the second electrode 1012 from being damaged when connected.

[0233] In addition, the third electrode 1021 and the fourth electrode 1022 included in the driving unit 102 are also located between the light emitting portion 1013 and the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located in the gap and in direct contact with the gas in the gap. That is, the third electrode 1021 and the fourth electrode 1022 are spaced apart and insulated from each other by the gas in the gap, thereby preventing the third electrode 1021 and the fourth electrode 1022 from being damaged.

[0234] In the embodiment of the present application, the light emitting assembly 10 includes a plurality of light emitting units 101 and a driving unit 102 corresponding to the plurality of light emitting units 101. The driving unit 102 may include a plurality of driving circuits 1023 corresponding to the plurality of light emitting units 101, and some film layers in the plurality of driving circuits 1023 may be common film layers. That is, each driving circuit 1023 in the driving unit 102 may be used to drive a corresponding light emitting unit 101 to emit light.

[0235] Optionally, the plurality of light-emitting units 101 include a first color light-emitting unit, a second color light-emitting unit, and a third color light-emitting unit. The first color, the second color, and the third color are different from each other. For example, the first color is red (red, R), the second color is green (green, G), and the third color is blue (blue, B).

[0236] refer to Figure 3 It can be seen that the light emitting component 10 further includes a second substrate 107. The light emitting unit 101 includes: a color filter layer 10131, a color conversion layer 10132 and a light emitting layer 10133 which are sequentially stacked in a direction away from the second substrate 107.

[0237] The light emitting layer 10133 emits blue light. Figure 4 The light emitting layer 10133 includes a first doping layer 101331, a multi-quantum well layer 101332 and a second doping layer 101333. The first doping layer 101331 is electrically connected to the first electrode 1011, and the second doping layer 101333 is electrically connected to the second electrode 1012.

[0238] Optionally, the first doping layer 101331 may be an N-type doping layer, and the second doping layer 101333 may be a P-type doping layer. Accordingly, the first electrode 1011 may be referred to as an N-type electrode, and the second electrode 1012 may be referred to as a P-type electrode. Optionally, the material of the first doping layer 101331 may be N-type gallium nitride (GaN), and the first doping layer 101331 is denoted as N-GaN. The material of the second doping layer 101333 may be P-type gallium nitride (GaN), and the second doping layer 101333 is denoted as P-GaN.

[0239] Furthermore, the light-emitting layer 10133 includes a first light-emitting portion, a second light-emitting portion and a third light-emitting portion, that is, the light-emitting colors of the first light-emitting portion, the second light-emitting portion and the third light-emitting portion are all blue. Figure 4 Only one luminous part is shown.

[0240] The color conversion layer 10132 includes a first color conversion portion, a second color conversion portion and a transparent portion. Figure 4Only one color conversion part 101321 is illustrated in the figure. The orthographic projection of the first color conversion part on the second substrate 107 overlaps with the orthographic projection of the first light-emitting part on the second substrate 107, and the first color conversion part is used to convert the light emitted by the first light-emitting part into a color corresponding to the first color conversion part (for example, into red). The orthographic projection of the second color conversion part on the second substrate 107 overlaps with the orthographic projection of the second light-emitting part on the first substrate B, and the second color conversion part is used to convert the light emitted by the second light-emitting part into a color corresponding to the second color conversion part (for example, into green). The orthographic projection of the third color conversion part 101321 on the second substrate 107 overlaps with the orthographic projection of the transparent part on the second substrate 107, and the transparent part is used to transmit the light emitted by the third light-emitting part.

[0241] Optionally, the color conversion layer 10132 also includes a spacer 101322 between any two adjacent structures among the first color conversion portion, the second color conversion portion and the transparent portion, and the spacer 101322 is used to distinguish and space different color conversion portions 101321 and transparent portions.

[0242] The color filter layer 10131 includes a first color block, a second color block, a third color block and a black matrix 101312. Figure 4 Only one color block 101311 is illustrated in the figure. The black matrix 101312 is located between adjacent color blocks 101311. The orthographic projection of the first color block on the second substrate 107 overlaps with the orthographic projection of the first color conversion part on the second substrate 107. The first color block is used to transmit the light of the corresponding color after the conversion by the first color conversion part, and block the light of other colors. The orthographic projection of the second color block on the second substrate 107 overlaps with the orthographic projection of the second color conversion part on the second substrate 107. The second color block is used to transmit the light of the corresponding color after the conversion by the second color conversion part, and block the light of other colors. The orthographic projection of the third color block on the second substrate 107 overlaps with the orthographic projection of the transparent part on the second substrate 107. The third color block is used to transmit the light of the corresponding color transmitted by the transparent part, and block the light of other colors.

[0243] For example, the first color block is a red color block, the second color block is a green color block, and the third color block is a blue color block.

[0244] In the examples of this application, refer to Figure 4 The second doping layer 101333 and the multi-quantum well layer 101332 are used to expose the target portion of the first doping layer 101331. The light emitting layer 101333 also includes a pad electrode 101334, a conductive layer 101335 and an insulating layer 101336.

[0245] The pad electrode 101334 is connected to the target portion of the first doping layer 101331, the conductive layer 101335 is located on the side of the second doping layer 101333 away from the first substrate B, and the insulating layer 101336 is located on the side of the pad electrode 101334 and the conductive layer 101335 away from the first substrate B. The insulating layer 101336 has a first target hole (N-type via) and a second target hole (P-type via). The first target hole is used to expose the pad electrode 101334, and the pad electrode 101334 and the first electrode 1011 are connected through the first target hole. The second target hole is used to expose the conductive layer 101335, and the conductive layer 101335 and the second electrode 1012 are connected through the second target hole. Optionally, the material of the conductive layer 101335 can be indium tin oxide (ITO), and the insulating layer 101336 can be a passivation layer (PVX).

[0246] refer to Figure 3 and Figure 4 It can also be seen that the light emitting unit 101 further includes: an adhesive layer 10134 and a buffer layer 10135. The adhesive layer 10134 and the buffer layer 10135 are both located between the color conversion layer 10132 and the light emitting layer 10133. The adhesive layer 10134 is used to bond the color conversion layer 10132 and the buffer layer 10135. The material of the buffer layer 10135 can be undoped GaN.

[0247] In the embodiment of the present application, the driving circuit 1023 may include a plurality of thin film transistors and at least one storage capacitor. Optionally, the driving circuit 1023 may include seven thin film transistors and one storage capacitor, that is, the driving circuit 1023 is a 7T1C driving circuit. Alternatively, the driving circuit 1023 may include other numbers of thin film transistors and other numbers of storage capacitors. The embodiment of the present application does not limit the number of thin film transistors included in the driving circuit 1023, and the number of storage capacitors included.

[0248] Each thin film transistor includes a gate, a source and a drain. The driving circuit 1023 includes a plurality of thin film transistors which are connected to each other to achieve the function of driving the light emitting unit 101 to emit light.

[0249] Optionally, the plurality of thin film transistors at least include a data writing transistor, the source of which is used to be connected to a data line of a display backplane in the display panel. The data line can transmit a data driving signal to the driving circuit 1023 through the data writing transistor.

[0250] In an embodiment of the present application, the pin 104 included in the light-emitting component 10 can be connected to the source of the data writing transistor in the driving circuit 1023, and the data writing transistor is connected to the third electrode 1021 of the driving unit 102 through other thin film transistors, so that the data line included in the display backplane in the display panel transmits the data driving signal to the first electrode 1011 of the light-emitting unit 101 through the pin 104, the driving circuit 1023, and the third electrode 1021 in sequence.

[0251] It should be noted that, in order for the driving unit 102 to drive the light-emitting unit 101 to emit light, in addition to the data driving signal provided to the first electrode 1011 of the light-emitting unit 101, a power signal (such as a VSS signal) is also provided to the second electrode 1012 of the light-emitting unit 101. Optionally, the display backplane may provide the same power signal to the multiple light-emitting components 10 included in the display panel, so the power signal may be provided to the second electrode 1012 of the light-emitting unit 101 in the multiple light-emitting components 10 through the pin 104 (the pin 104 is not shown in the drawings) located in the peripheral area of ​​the display panel.

[0252] In the embodiment of the present application, the material of the substrate 103 may be polyimide (PI), and the substrate 103 may be referred to as a PI substrate. Generally, metal is not deposited directly on the organic film layer as much as possible to avoid separation of the film layer. Therefore, in order to form the drive circuit 1023, an inorganic insulating layer 101336 is also required to be formed on the substrate 103. For example, the light-emitting component also includes a target insulating layer 108 between the connecting wire 106 and the substrate 103, and the target insulating layer 108 may cover an area where the connecting wire 106 is not provided. Further, the drive circuit 1023 may be formed on the side of the target insulating layer 108 and the connecting wire 106 away from the substrate 103.

[0253] Optionally, the target insulating layer 108 may be a passivation layer, and its material may be silicon oxide (SiO). The thickness of the target insulating layer 108 is in the range of 50 nm to 200 nm. The reason why the thickness of the target insulating layer 108 is greater than 50 nm is that the target insulating layer 108 can be prepared by a plasma enhanced chemical vapor deposition method. Considering the uniformity of the film layer prepared by the process, the thickness of the target insulating layer 108 needs to be greater than 50 nm. In addition, the reason why the thickness of the target insulating layer 108 is less than 200 nm is that vias need to be etched on the target insulating layer 108 for connection of the connection wiring 106 and the connection pad 105, so in order to reduce the difficulty of etching, the thickness is made less than 200 nm.

[0254] Optionally, the driving circuit 1023 includes a buffer layer (buffer+barrier) m1, an active layer (poly) m2, a first gate insulating layer (gate insulator, GI) m3, a first gate layer (gate) m4, a second gate insulating layer m5, a second gate layer (not shown in the figure), an inter-level dielectric layer (inter level dielectric, ILD) m6, a source and drain layer m7 and a planarization layer (planarization layer, PLN) m8, which are located on one side of the substrate 103 and stacked in sequence. The third electrode 1021 and the fourth electrode 1022 included in the driving unit 102 are located on the side of the planarization layer m8 away from the substrate 103.

[0255] The active layer m2 includes multiple active patterns corresponding to multiple thin film transistors, each active pattern includes a source region, a drain region and a channel region. The source and drain of the thin film transistor are located in the source-drain layer, and the source of the thin film transistor is connected to the source region, and the drain is connected to the drain region.

[0256] Optionally, the active pattern of one thin film transistor among the plurality of thin film transistors included in the driving circuit 1023 may overlap with the first via hole K1. Since the flatness of the setting surface of the driving circuit 1023 is good, even if the active pattern of the thin film transistor overlaps with the first via hole K1, it will not affect the crystallization process of the active pattern of the thin film transistor, which can provide more space for the device circuit design and layout of the driving unit 102, and provide favorable factors for device miniaturization and higher integration.

[0257] The first gate layer m4 includes a plurality of gate patterns corresponding to a plurality of thin film transistors. The channel region is an overlapping region of an orthographic projection of the gate pattern on the substrate 103 and an orthographic projection of the active pattern on the substrate 103 .

[0258] refer to Fig.24 The first gate layer m4 further includes a gate connection portion m41 connected to the connection wiring 106, and the gate connection portion m41 is used to connect to the connection wiring 106 and the source of the data writing transistor. In order to connect the connection wiring 106 and the gate connection portion m41, the buffer layer m1 and the first gate insulating layer m3 may also have a connection via. In addition, the gate connection portion m41 may be located in the connection via of the buffer layer m1 and the first gate insulating layer m3.

[0259] In summary, an embodiment of the present application provides a light-emitting component, which includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. In addition, the light-emitting component also includes a flat structural layer located on the side of the connecting wire away from the substrate, and the flat structural layer can have a flat effect. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0260] Another method for preparing a light-emitting component provided in an embodiment of the present application includes:

[0261] Step S201, obtaining a first substrate, a base on the first substrate, connecting pads, and connecting wiring and a driving unit.

[0262] In the embodiment of the present application, the base 103 is located between the first substrate B and the driving unit 102. The connecting pad 105 is located inside the base 103. One side of the base 103 includes a first via K1, and the connecting wire 106 is electrically connected to the connecting pad 105 through the first via K1. The driving unit 102 is located on a side of the connecting wire 106 away from the base 103, and is electrically connected to the connecting wire 106.

[0263] In the examples of this application, refer to Fig.25 , obtaining a first substrate, a base on the first substrate, connecting pads, and connecting wiring and a driving unit include:

[0264] Step S2011, forming a release film and a liner film n6 on the first substrate.

[0265] refer to Fig.26 , a release film n1 and a liner film n6 are sequentially formed on the first substrate B. The release film n1 can be a high temperature resistant release layer (De-bonding layer, DBL). The main function of the release film n1 is to facilitate the subsequent peeling of the first substrate B. If the release film n1 is not designed, it may result in separation. The liner film n6 can be used to form a connecting pad 105.

[0266] Step S2012: patterning the release film and the liner film to obtain a release layer and a connecting liner.

[0267] In the examples of this application, refer to Fig. 27, the release film n1 and the liner film n6 can be patterned. The patterning process includes: coating a photoresist on the side of the liner film n6 away from the first substrate B; exposing and developing the photoresist; etching the release film n1 and the liner film n6 and removing the remaining photoresist to obtain a release layer and a connection pad 105.

[0268] Step S2013: forming a base film on a side of the connection pad away from the first substrate.

[0269] In the examples of this application, refer to Fig.28 A base film n4 is formed on the side of the connection pad 105 away from the first substrate B by a coating process, and the base film n4 is made slightly higher than the side of the connection pad 105 away from the first substrate B.

[0270] Optionally, the thickness of the substrate film n4 may be in the range of 5 μm to 6 μm. The reason why the thickness is greater than 5 μm is that if the thickness of the substrate 103 is less than 5 μm, the uniformity of the film layer of the substrate 103 may be poor. In addition, the reason why the thickness may be less than 6 μm is that it is not necessary for the thickness of the substrate 103 to be too thick, and it is not convenient to achieve thinness and lightness if it is too thick, so the thickness of the substrate 103 is selected to be less than 6 μm.

[0271] Step S2014: forming a target insulating film on a side of the base film away from the first substrate.

[0272] In the examples of this application, refer to Fig.29 A target insulating film n5 is formed on a side of the base film n4 away from the first substrate B by a deposition process. The material of the target insulating film n5 may be silicon oxide (SiO).

[0273] Optionally, the thickness of the target insulating film n5 is in the range of 50nm to 200nm. The reason why the thickness of the target insulating film n5 is greater than 50nm is that the target insulating film n5 can be prepared by plasma enhanced chemical vapor deposition. Considering the uniformity of the film layer prepared by the process, the thickness of the target insulating film n5 needs to be greater than 50nm. In addition, the reason why the thickness of the target insulating film n5 is less than 200nm is that a via needs to be etched on the target insulating film n5 for connection of the connection line 106 and the connection pad 105. Therefore, in order to reduce the difficulty of etching, the thickness is less than 200nm.

[0274] Step S2015: etching the base film and the target insulating film to form a first via hole to obtain a base and a target insulating layer.

[0275] In the examples of this application, refer to Fig.30The first via hole K1 may expose a portion of the second metal layer 1052 of the connection pad 105. The etching of the base film n4 and the target insulating film n5 may be performed through a single etching process or a double etching process.

[0276] In the case of two etching processes, the target insulating film n5 may be etched using a mask to obtain the target insulating layer 108 , and then the target insulating layer 108 may be used as a hard mask to etch the base film n4 to obtain the base 103 .

[0277] Step S2016: forming a connecting trace on a side of the target insulating layer away from the first substrate.

[0278] In the examples of this application, refer to Fig.31 A portion of the connection trace 106 may be located in the first via hole K1 and electrically connected to the connection pad 105. Another portion of the connection trace 106 may be located outside the first via hole K1 to be connected to the driving unit 102 formed subsequently.

[0279] Optionally, the material of the connecting wire 106 can be a metal material, for example, molybdenum (Mo). The thickness of the connecting wire 106 is in the range of 50nm to 200nm. Among them, the reason why the minimum thickness of the connecting wire 106 is selected to be 50nm is that: if the thickness of the connecting wire 106 is less than 50nm, the film uniformity of the connecting wire 106 may not be guaranteed (usually the thicker the thickness, the better the uniformity). At the same time, the reason why the maximum thickness of the connecting wire 106 is selected to be 200nm is that: the function of the connecting wire 106 is to achieve the overlap of the connecting pad 105 and the driving unit 102, so the resistivity requirements of the connecting wire 106 are relatively low, and there is no need to design a thicker thickness. And if the thickness of the connecting wire 106 is too thick, it will lead to higher costs, so the thickness of the connecting wire 106 can be 200nm. It should also be noted that if the connecting wire 106 is a wire for transmitting signals, it has certain requirements for resistivity, and it is necessary to adopt a wire with a thicker thickness (such as 300nm).

[0280] Step S2017: Spin-coat the liquid solvent based on the dielectric material evenly on the surface of the connecting wiring and the substrate to obtain a flat structure layer.

[0281] In the examples of this application, refer to Fig.32, a flat structure layer 109 can be formed on the surface of the connection line 106 and the substrate 103. Since the flat structure layer 109 is located on the side of the connection line 106 away from the substrate 103, the surface of the connection line 106 away from the substrate 103 can be flattened. For example, in the thickness direction of the connection pad 105, the minimum distance between the side of the flat structure layer 109 located in the first via K1 away from the connection pad 105 and the pin 104 is the fifth distance d5, and the distance between the side of the flat structure layer 109 located outside the first via K1 away from the connection pad 105 and the pin 104 is the sixth distance d6. The difference between the fifth distance d5 and the sixth distance d6 is less than or equal to 1 μm.

[0282] In the embodiment of the present application, the setting surface of the driving unit 102 is the surface of the flat structure layer 109 away from the substrate 103. By making the difference between the distance between the portion of the flat structure layer 109 located in the first via hole K1 and the portion located outside the via hole and the substrate 103 less than or equal to 1 μm, the flatness of the setting surface of the driving unit 102 can be ensured, thereby ensuring the performance of the driving unit 102.

[0283] Optionally, the surface of the planar structure layer 109 away from the substrate 103 may be a planar surface, that is, the difference between the fifth distance d5 and the sixth distance d6 is 0 μm. In this case, the planarization effect is optimal.

[0284] In addition, the planar structure layer 109 further has a third via hole K3 , and the third via hole K3 can expose a portion of the connection wiring 106 , so that the subsequently formed driving unit 102 is electrically connected to the connection wiring 106 through the third via hole K3 .

[0285] Step S2018: forming a driving unit on a side of the planar structure layer away from the first substrate.

[0286] In the examples of this application, refer to Fig.33 After the connection wiring 106 is formed, various film layers of the driving unit 102 are formed on a side of the connection wiring 106 away from the first substrate B.

[0287] The driving unit 102 includes: a third electrode 1021, a fourth electrode 1022 and a driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are both located on the side of the driving unit 102 facing the light-emitting unit 101, that is, the third electrode 1021 and the fourth electrode 1022 are closer to the light-emitting unit 101 than the driving circuit 1023. The third electrode 1021 and the fourth electrode 1022 are electrically connected to the driving circuit 1023, respectively, the third electrode 1021 is electrically connected to the first electrode 1011, and the fourth electrode 1022 is electrically connected to the second electrode 1012. The materials of the third electrode 1021 and the fourth electrode 1022 both include metal.

[0288] Step S202: Obtain a second substrate and a light-emitting unit located on the second substrate.

[0289] Step S203: bonding the light emitting unit and the driving unit together through a bonding process.

[0290] Step S204: peeling the first substrate from one side of the base.

[0291] Step S205 , forming a lead on a side of the substrate away from the driving unit.

[0292] In the embodiment of the present application, the relevant contents of step S202 to step S205 can refer to the description of the above-mentioned step S102 to step S105, and the embodiment of the present application will not be repeated here.

[0293] In summary, an embodiment of the present application provides a method for preparing a light-emitting component, and the light-emitting component prepared by the method includes a pin, a substrate, a driving unit and a light-emitting unit arranged in sequence. In addition, the light-emitting component also includes a connecting pad located inside the substrate and connected to the pin, and a connecting wire connected to the connecting pad through a first via in the substrate, and the connecting wire is also connected to the driving unit. In addition, the light-emitting component also includes a flat structural layer located on the side of the connecting wire away from the substrate, and the flat structural layer can have a flat effect. Therefore, even if the driving unit is set in the area where the first via is located, the performance of the driving unit can be guaranteed, and the layout space can be fully utilized, and the layout of the driving unit is more flexible.

[0294] Fig.34 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application. Fig.34 The display panel 00 includes a display back panel 20 and a plurality of light-emitting components 10 .

[0295] refer to Fig.35The plurality of light emitting components 10 are located in the display area 00a of the display panel 00, and the plurality of light emitting components 10 are arranged in an array. The display backplane 20 is used to provide a driving signal to the driving unit 102 through the plurality of pins 104 in the light emitting components 10, so that the driving unit 102 drives the light emitting unit 101 to emit light.

[0296] Since the display panel can have substantially the same technical effects as the light-emitting components described in the previous embodiments, the technical effects of the display panel will not be repeatedly described here for the purpose of brevity.

[0297] The terms used in the embodiments of this application are only used to explain the embodiments of this application, and are not intended to limit this application. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this application should be the common meanings understood by people with general skills in the field to which this application belongs.

[0298] The terms used in the implementation mode of the present application are only used to explain the embodiments of the present application, and are not intended to limit the present application. Unless otherwise defined, the technical terms or scientific terms used in the implementation mode of the present application should be the common meanings understood by people with ordinary skills in the field to which the present application belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present application do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limit, but indicate that there is at least one. Words such as "include" or "include" and similar words mean that the elements or objects appearing in front of "include" or "include" include the elements or objects listed after "include" or "include" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0299] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A light emitting component, characterized in that: include: A light-emitting unit (101), a driving unit (102), a substrate (103) and a pin (104), wherein the substrate (103) is located on a side of the driving unit (102) away from the light-emitting unit (101), the pin (104) is located on a side of the driving unit (102) away from the light-emitting unit (101), and the pin (104) is electrically connected to the driving unit (102); The light-emitting component further comprises a connection pad (105) and a connection wire (106); the connection pad (105) is located inside the substrate (103); a side of the substrate (103) away from the pin (104) comprises a first via hole (K1); the connection wire (106) is electrically connected to the connection pad (105) through the first via hole (K1); the drive circuit (1023) is located on a side of the connection wire (106) away from the substrate (103), and is electrically connected to the connection wire (106); The connection pad (105) comprises a first metal layer (1051) and a second metal layer (1052) which are stacked, the second metal layer (1052) being closer to the light-emitting unit (101) than the first metal layer (1051), and the thickness of the second metal layer (1052) being greater than the thickness of the first metal layer (1051).

2. The light emitting assembly according to claim 1, characterized in that: In the thickness direction of the connection pad (105), the minimum distance between the side of the portion of the connection trace (106) located inside the first via hole (K1) away from the connection pad (105) and the pin (104) is a first distance (d1), and the distance between the side of the portion of the connection trace (106) located outside the first via hole (K1) away from the connection pad (105) and the pin (104) is a second distance (d2); Wherein, a difference between the first distance (d1) and the second distance (d2) is less than or equal to 1 micrometer.

3. The light emitting assembly according to claim 1, characterized in that: In the thickness direction of the connection pad (105), the distance between the side of the connection pad (105) close to the drive unit (102) and the pin (104) is a third distance (d3), and the distance between the surface of the substrate (103) close to the drive unit (102) and the pin (104) is a fourth distance (d4); Wherein, the difference between the third distance (d3) and the fourth distance (d4) is less than or equal to 1 micrometer.

4. The light emitting assembly according to claim 1, characterized in that: The connection pad (105) has a first surface (a1) and a second surface (a2) that are opposite to each other, and the second surface (a2) is closer to the pin (104) than the first surface (a1); The area of ​​the second surface (a2) is greater than the area of ​​the first surface (a1), and the orthographic projection of the first surface (a1) on the reference plane is located inside the orthographic projection of the second surface (a2) on the reference plane, and the reference plane is parallel to the surface of the substrate (103).

5. The light emitting assembly according to claim 4, characterized in that: The area of ​​the cross section of the second metal layer (1052) parallel to the reference plane increases as the distance between the cross section and the pin (104) increases; The second metal layer (1052) includes the first surface (a1), a third surface (a3) ​​opposite to the first surface (a1), and a fourth surface (a4) connecting the first surface (a1) and the third surface (a3), the fourth surface (a4) including a first line segment obtained by a cross section passing through the center of the second metal layer (1052), and an angle between the first line segment and the reference plane is in a range of 70° to 80°.

6. The light emitting assembly according to claim 4, characterized in that: The area of ​​the cross section of the first metal layer (1051) parallel to the reference plane decreases as the distance between the cross section and the pin (104) increases.

7. The light emitting assembly according to claim 1, characterized in that: The thickness of the substrate (103) is greater than 5 micrometers, and the thickness of the connection pad (105) is less than the thickness of the substrate (103).

8. The light emitting assembly according to claim 1, characterized in that: The material of the first metal layer (1051) is the same as the material of the second metal layer (1052).

9. The light emitting assembly according to any one of claims 1 to 8, characterized in that: The side of the substrate (103) facing away from the driving unit (102) comprises a second via hole (K2), a portion of the pin (104) is located in the second via hole (K2), and is electrically connected to the connection pad (105) through the second via hole (K2); A side of the pin (104) away from the connection pad (105) protrudes out of the second via hole (K2).

10. The light emitting assembly according to any one of claims 1 to 8, characterized in that: The light-emitting unit (101) comprises: a first electrode (1011), a second electrode (1012), and a light-emitting portion (1013) electrically connected to the first electrode (1011) and the second electrode (1012), respectively; The driving unit (102) comprises a third electrode (1021), a fourth electrode (1022) and a driving circuit (1023); the third electrode (1021) and the fourth electrode (1022) are both located on a side of the driving unit (102) facing the light-emitting unit (101); the third electrode (1021) and the fourth electrode (1022) are respectively electrically connected to the driving circuit (1023); the third electrode (1021) and the first electrode (1011) are electrically connected; and the fourth electrode (1022) and the second electrode (1012) are electrically connected.

11. The light emitting assembly according to any one of claims 1 to 8, characterized in that: The light-emitting component comprises a plurality of light-emitting units (101) and a driving unit (102) corresponding to the plurality of light-emitting units (101); the plurality of light-emitting units (101) comprise a first color light-emitting unit (101), a second color light-emitting unit (101) and a third color light-emitting unit (101), and the first color, the second color and the third color are different from each other; The light-emitting unit (101) further comprises a color filter layer (10131), a color conversion layer (10132) and a light-emitting layer (10133) which are sequentially stacked in a direction away from the second substrate (107); the light-emitting color of the light-emitting layer (10133) is blue; The light-emitting layer (10133) includes a first doped layer (101331), a multi-quantum well layer 101332 and a second doped layer (101333) which are stacked, wherein the first doped layer (101331) is electrically connected to the first electrode (1011), the second doped layer (101333) is electrically connected to the second electrode (1012), and the light-emitting layer (10133) includes a first light-emitting portion, a second light-emitting portion and a third light-emitting portion.

12. The light emitting assembly according to any one of claims 1 to 8, characterized in that: The driving circuit (1023) comprises a plurality of thin film transistors and at least one storage capacitor, each of the thin film transistors comprising a gate, a source and a drain; The pin (104) is connected to a source electrode of a thin film transistor among the plurality of thin film transistors through the connection pad (105), and is used to provide the driving circuit (1023) with a data signal transmitted from a display backplane in the display panel; Among the plurality of thin film transistors, there is a thin film transistor whose orthographic projection on the reference plane overlaps with the first via hole (K1).

13. A light emitting component, characterized in that: include: A light-emitting unit (101), a driving unit (102), a substrate (103) and a pin (104), wherein the substrate (103) is located on a side of the driving unit (102) away from the light-emitting unit (101), the pin (104) is located on a side of the driving unit (102) away from the light-emitting unit (101), and the pin (104) is electrically connected to the driving unit (102); The light-emitting component further comprises a connection pad (105) and a connection wire (106); the connection pad (105) is located inside the substrate (103); a side of the substrate (103) away from the pin (104) comprises a first via hole (K1); the connection wire (106) is electrically connected to the connection pad (105) through the first via hole (K1); the drive circuit (1023) is located on a side of the connection wire (106) away from the substrate (103), and is electrically connected to the connection wire (106); The light-emitting component further comprises: a flat structure layer (109) located between the connecting wire (106) and the driving unit (102), the flat structure layer (109) having a third via hole, and the driving unit (102) and the connecting wire (106) are electrically connected through the third via hole; In the thickness direction of the connection pad (105), the minimum distance between the side of the portion of the flat structure layer (109) located inside the first via hole (K1) away from the connection pad (105) and the pin (104) is a fifth distance (d5), and the distance between the side of the portion of the flat structure layer (109) located outside the first via hole (K1) away from the connection pad (105) and the pin (104) is a sixth distance (d6); Wherein, a difference between the fifth distance (d5) and the sixth distance (d6) is less than or equal to 1 micrometer.

14. The light emitting assembly according to claim 13, characterized in that: The side of the substrate (103) facing away from the driving unit (102) comprises a second via hole (K2), a portion of the pin (104) is located in the second via hole (K2), and is electrically connected to the connection pad (105) through the second via hole (K2); A side of the pin (104) away from the connection pad (105) protrudes out of the second via hole (K2).

15. The light emitting assembly according to claim 13, characterized in that: The driving circuit (1023) comprises a plurality of thin film transistors and at least one storage capacitor, each of the thin film transistors comprising a gate, a source and a drain; The pin (104) is connected to a source electrode of a thin film transistor among the plurality of thin film transistors through the connection pad (105), and is used to provide the driving circuit (1023) with a data signal transmitted from a display backplane in the display panel; Among the plurality of thin film transistors, there is a thin film transistor whose orthographic projection on the reference plane overlaps with the first via hole (K1).

16. A method for preparing a light-emitting component, characterized in that: The method comprises: Obtain a first substrate (B), and a substrate (103), a connecting pad (105), a connecting wire (106) and a driving unit (102) located on the first substrate (B), wherein the substrate (103) is located between the first substrate (B) and the driving unit (102), the connecting pad (105) is located inside the substrate (103), one side of the substrate (103) includes a first via hole (K1), and the connecting wire (106) is electrically connected to the connecting pad (105) through the first via hole (K1); the driving unit (102) is located on a side of the connecting wire (106) away from the substrate (103), and is electrically connected to the connecting wire (106); Obtaining a second substrate (107) and a light-emitting unit (101) located on the second substrate (107); The light-emitting unit (101) and the driving unit (102) are bonded and connected by a bonding process, so that the substrate (103) is located on a side of the driving unit (102) away from the light-emitting unit (101); peeling the first substrate (B) from one side of the driving unit (102); A pin (104) is formed on a side of the substrate (103) away from the driving unit (102), and the pin (104) is connected to the driving circuit (1023) via the connecting pad (105) and the connecting wire (106); The connection pad (105) comprises a first metal layer (1051) and a second metal layer (1052) which are stacked, the second metal layer (1052) being closer to the light-emitting unit (101) than the first metal layer (1051), and the thickness of the second metal layer (1052) being greater than the thickness of the first metal layer (1051).

17. The method according to claim 16, characterized in that The method of obtaining a first substrate (B) and a base (103) located on the first substrate (B), connecting a pad (105), connecting a wiring (106) and a driving unit (102) comprises: forming a release film (n1) and a seed film (n2) on the first substrate (B); A photoresist layer (n3) is formed on a side of the seed film (n2) away from the first substrate (B), the photoresist layer (n3) having an opening (n31), an area of ​​the side of the opening (n31) away from the first substrate (B) being larger than an area of ​​the side of the opening (n31) close to the first substrate (B), and an orthographic projection of the side of the opening (n31) close to the first substrate (B) on the first substrate (B) is located within an orthographic projection of the side of the opening (n31) away from the first substrate (B) on the first substrate (B); Using an electroplating process to form a second metal layer (1052) of the connection pad (105) in the opening (n31); removing the photoresist layer (n3); Etching the seed film (n2) and the release film (n1) to form a first metal layer (1051) and the release layer, wherein the first metal layer (1051) and the release layer are located between the connection pad (105) and the first substrate (B); forming a base film (n4) on a side of the connection pad (105) away from the first substrate (B); forming a target insulating film (n5) on a side of the base film (n4) away from the first substrate (B); The base film (n4) and the target insulating film (n5) are etched to form a first via hole (K1) to obtain a base (103) and a target insulating layer (108), wherein the first via hole (K1) is used to expose at least a portion of the connection pad (105); forming a connection line (106) on a side of the target insulating layer (108) away from the first substrate (B), wherein the connection line (106) and the connection pad (105) are electrically connected through the first via hole (K1); A driving unit (102) is formed on a side of the connecting wire (106) away from the first substrate (B), and the driving unit (102) and the connecting wire (106) are electrically connected.

18. A display panel, characterized in that: The display panel (00) comprises a display backplane (20), and a plurality of light emitting components (10) according to any one of claims 1 to 15, which are located on one side of the display backplane (20) and arranged in an array; The display back panel (20) is used to provide a driving signal to the driving unit (102) in the light-emitting component (10), so that the driving unit (102) drives the light-emitting unit (101) to emit light.

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