Solar cell module and preparation method thereof

By setting up an isolation wall in the substrate active area of ​​the perovskite solar cell module, separating it into multiple sub-active areas and setting up sub-cells, the yield and service life of large-area modules are solved, and a higher Performance and longer lifespan.

CN119486469APending Publication Date: 2025-02-18GUANGDONG JUHUA PRINTING DISPLAY TECH CO LTD
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Patent Information

Application Number
CN202311275480.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

When preparing large-area perovskite solar cell modules, there are problems such as low yield and short service life.

Method used

By setting a first separation wall in the active area of ​​the substrate, the active area is divided into a plurality of sub-active areas, and sub-cells are arranged in the sub-active area to form a parallel relationship to reduce the impact of defective sub-cells on the module. , while protecting the edge of the sub-battery to reduce carrier recombination.

Benefits of technology

The yield and service life of large-area solar cell modules are improved, irreversible damage to the edge of the battery by laser etching is avoided, and carrier recombination at the edge of the sub-cell is reduced.

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Abstract

The invention relates to a solar cell module and a preparation method thereof. The solar cell module comprises a substrate provided with an active region and an inactive region; the first isolation wall is located on the substrate and divides the active region into a plurality of sub active regions; and the plurality of sub-batteries are arranged in the sub-active regions. According to the solar cell module, the active region of the substrate is physically isolated by using the first isolation wall to form a plurality of mutually independent sub-active regions, and the sub-cells are arranged in the sub-active regions, so that the sub-cells in the same active region are connected in parallel; and the defective sub-batteries can be disconnected, so that the influence of the defective sub-batteries on the whole battery module is reduced. Meanwhile, the first isolation walls can effectively protect the edges of the sub-cells, irreversible damage caused by laser etching to the sub-cells is avoided, carrier recombination of the edges of the sub-cells can be reduced, the yield of the large-area solar cell module is greatly increased, and the service life of the large-area solar cell module is greatly prolonged.
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Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a solar cell module and a preparation method thereof. Background Art

[0002] Perovskite Solar Cell (PSC) has attracted extensive attention due to its abundant raw material reserves, low production cost, high photoelectric conversion efficiency, ability to be made into flexible devices, and ability to generate electricity under weak light. It is now in a critical period of mass production. The large area of ​​solar cells is the key to ensuring high power output, while the photoelectric conversion efficiency of a single device PSC declines sharply as the device area increases. Therefore, it is necessary to connect multiple small-area PSC devices in series or in parallel to obtain a high-power large-area PSC module while ensuring high photoelectric conversion efficiency.

[0003] However, when preparing large-area PSC modules, there are problems such as low yield and short service life. Summary of the invention

[0004] Based on this, it is necessary to provide a solar cell module and a preparation method thereof to improve the yield and service life of the solar cell module.

[0005] The above object of the present invention is achieved through the following technical solutions:

[0006] In a first aspect, the present invention provides a solar cell module, characterized in that it comprises:

[0007] A substrate having an active region and an inactive region;

[0008] A first isolation wall, located on the substrate and dividing the active area into a plurality of sub-active areas;

[0009] A plurality of sub-batteries are arranged in the sub-active area.

[0010] In one of the embodiments, it further includes a second isolation wall;

[0011] A plurality of the second isolation walls are sequentially arranged at intervals to separate the substrate into a plurality of the active areas and a plurality of the inactive areas;

[0012] A plurality of the first isolation walls are disposed in one active area, and the plurality of the first isolation walls are enclosed by the second isolation walls to divide the active area into a plurality of sub-active areas.

[0013] In one embodiment, the sub-cell includes a first electrode, a functional layer, and a second electrode which are stacked in sequence.

[0014] In one embodiment, the first electrodes are located on the substrate, and a slit is formed between two adjacent first electrodes.

[0015] In one embodiment, the second isolation wall includes a first blocking wall and a second blocking wall;

[0016] The first barrier wall fills and protrudes from the slit;

[0017] The second barrier wall is located on the first electrode.

[0018] In one embodiment, the first electrode extends into an adjacent inactive area;

[0019] The second electrode is located between two adjacent second barrier walls and covers the functional layer, another adjacent inactive area, the first barrier wall and the first isolation wall.

[0020] In one embodiment, along the direction from the first barrier wall to the second barrier wall, the width of the first barrier wall and the width of the second barrier wall are independently 10 μm to 50 μm.

[0021] In one of the embodiments, along the direction from one first isolation wall to another adjacent first isolation wall, the width of the first isolation wall is 10 μm to 50 μm.

[0022] In one embodiment, the heights of the first barrier wall, the second barrier wall and the first isolation wall are independently 1 μm to 5 μm.

[0023] In one embodiment, the first barrier wall, the second barrier wall and the first isolation wall are each independently made of photoresist.

[0024] In one embodiment, the shapes of the first barrier wall, the second barrier wall and the first isolation wall independently include one or more of a prism, a pyramid and a chamfered pyramid.

[0025] In one embodiment, along the direction from the first barrier wall to the second barrier wall, the width of the slit is 5 μm to 45 μm.

[0026] In one embodiment, along the direction from the first barrier wall to the second barrier wall, the ratio of the width of the first electrode located in the active area to the width of the first electrode located in the inactive area is (80-120):1.

[0027] In one embodiment, the distance between two adjacent first isolation walls is 5 mm to 20 mm.

[0028] In one embodiment, the functional layer includes an active layer, and the material of the active layer includes one or more of ABX3-type perovskite material, bis(2-phenylpyridine-C2,N)iridium(III) acetylacetonate and bis(4,6-difluorophenylpyridine-C2,N)picolinyliridium.

[0029] In one embodiment, the material of the second electrode includes one or more of gold, silver, copper, aluminum and carbon.

[0030] In one embodiment, the material of the first electrode includes a conductive metal oxide, and the conductive metal oxide includes one or more of fluorine-doped tin oxide, indium tin oxide, zinc aluminum oxide, indium zinc oxide, indium gallium zinc oxide, indium gallium tin oxide, indium zinc tin oxide, and indium gallium zinc tin oxide.

[0031] In one embodiment, the material of the substrate includes one or more of glass, metal and polymer.

[0032] A second aspect of the present invention provides a method for preparing a solar cell module, comprising the following steps:

[0033] Providing a substrate, wherein an active area and an inactive area are provided on the substrate;

[0034] Disposing a first isolation wall in the active area to separate the active area into a plurality of sub-active areas;

[0035] A sub-cell is arranged in the sub-active area.

[0036] In one embodiment, before the first isolation wall is provided in the active area, the following steps are also included:

[0037] Providing a conductive substrate, the conductive substrate comprising the substrate and a conductive layer disposed on the substrate;

[0038] The conductive layer is etched to form first electrodes that are spaced apart from each other, and a slit is formed between two adjacent first electrodes.

[0039] In one embodiment, providing a first isolation wall in the active area comprises the following steps:

[0040] forming an isolation layer to cover the first electrode and the slit;

[0041] Etching the isolation layer to form a first isolation wall and a second isolation wall;

[0042] Wherein, a plurality of the second isolation walls are sequentially arranged at intervals to separate the substrate into a plurality of the active areas and a plurality of the inactive areas;

[0043] A plurality of the first isolation walls are disposed in one active area, and the plurality of the first isolation walls are enclosed by the second isolation walls to divide the active area into a plurality of sub-active areas.

[0044] In one embodiment, the second isolation wall includes a first blocking wall and a second blocking wall;

[0045] The first barrier wall fills and protrudes from the slit;

[0046] The second barrier wall is located on the first electrode.

[0047] In one embodiment, a sub-cell is arranged in the sub-active region, comprising the following steps:

[0048] forming a functional layer on the first electrode of the sub-active region;

[0049] A second electrode is formed on the functional layer.

[0050] In one embodiment, forming a second electrode on the functional layer comprises the following steps:

[0051] The second electrode is formed between two adjacent second barrier walls to cover the functional layer, the inactive area, the first barrier wall and the first isolation wall.

[0052] In one embodiment, the method of forming the second electrode on the functional layer is an evaporation method.

[0053] In one of the embodiments, the method of forming the functional layer on the first electrode of the sub-active area is inkjet printing.

[0054] The present invention utilizes the first isolation wall to physically isolate the active area of ​​the substrate to form a plurality of mutually independent sub-active areas, and arranges sub-cells in the sub-active areas so that the sub-cells in the same active area form a parallel relationship, and the defective sub-cells can be disconnected to reduce their impact on the entire battery module. At the same time, the first isolation wall can effectively protect the edge of the sub-cell, avoid irreversible damage to it by laser etching, and reduce the carrier recombination at the edge of the sub-cell, greatly improving the yield and service life of the large-area solar cell module. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 It is a cross-sectional structural diagram of a PSC module in conventional technology;

[0056] Figure 2 is a top view of a solar cell module in one embodiment;

[0057] Figure 3 for Figure 2The schematic cross-sectional structure diagram of the solar cell module shown along the AA' section line;

[0058] Figure 4 for Figure 2 The schematic cross-sectional structure diagram of the solar cell module shown along the BB' section line;

[0059] Figure 5 is a flow chart of a method for preparing a solar cell module in one embodiment;

[0060] Figure 6 This is a schematic diagram of the cross-sectional structure of the device after step S1 is completed in one embodiment;

[0061] Figure 7 is a top view of the device after step S2 is completed in one embodiment;

[0062] Figure 8 for Figure 7 The cross-sectional structure diagram of the device shown along the AA' section line;

[0063] Fig. 9 This is a schematic diagram of the cross-sectional structure of the device after step S31 is completed in one embodiment;

[0064] Fig.10 is a top view of the device after step S32 is completed in one embodiment;

[0065] Fig.11 for Fig.10 The cross-sectional structure diagram of the device shown along the AA' section line;

[0066] Fig.12 for Fig.10 A schematic cross-sectional structure diagram of the device shown along the BB' cross-sectional line;

[0067] Fig.13 is a top view of the device after step S41 is completed in one embodiment;

[0068] Fig.14 for Fig.13 The cross-sectional structure diagram of the device shown along the AA' section line;

[0069] Fig.15 for Fig.13 The device shown is a schematic cross-sectional structure diagram along the BB' section line.

[0070] Figure numerals: substrate 11, conductive layer 12, first carrier transport layer 13, perovskite active layer 14, second carrier transport layer 15, back electrode layer 16, first slit P1, second slit P2, third slit P3; substrate 21, conductive layer 22, first electrode 23, active area 231, inactive area 232, sub-active area 233, slit 24, isolation layer 30, first blocking wall 31, second blocking wall 32, first isolation wall 33, first carrier transport layer 41, active layer 42, second carrier transport layer 43, second electrode 50. DETAILED DESCRIPTION

[0071] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0072] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0073] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0074] See also Figure 1 , which is a schematic diagram of the cross-sectional structure of a PSC module in conventional technology.

[0075] The preparation method of the PSC module comprises the following steps:

[0076] Providing a conductive substrate, the conductive substrate comprising a substrate 11 and a conductive layer 12 disposed on the substrate 11;

[0077] Performing a first laser scribing on the conductive layer 12 to form a first slit P1;

[0078] A perovskite functional layer is formed to cover the conductive layer 12 and the substrate 11; wherein the perovskite functional layer includes a first carrier transport layer 13, a perovskite active layer 14 and a second carrier transport layer 15 which are stacked in sequence;

[0079] Performing a second laser scribing on the perovskite functional layer to form a second slit P2;

[0080] forming a back electrode layer 16 to cover the perovskite functional layer and the second slit P2;

[0081] The back electrode layer 16 is subjected to a third laser scribing process to form a third slit P3.

[0082] It can be seen that in traditional technology, three laser scribings are usually used to physically isolate multiple strip-shaped sub-cells, and the strip-shaped sub-cells are connected in series to form a PSC module to achieve the purpose of increasing the battery voltage. However, the laser scribing method uses a local heating sublimation mechanism. The high-power laser used is likely to cause irreversible damage to the performance of the perovskite active layer around the second slit P2 and the third slit P3. At the same time, there is a serious problem of carrier recombination at the edge of the perovskite active layer, which will reduce the performance of the battery module and have a serious negative impact on the yield and service life of the PSC module.

[0083] Based on this, the first aspect of the present invention provides a solar cell module that can physically isolate multiple independent sub-cells without laser scribing. Figure 2 to Figure 4 ,in, Figure 2 is a top view of a solar cell module in one embodiment, Figure 3 for Figure 2 The schematic diagram of the cross-sectional structure of the solar cell module shown in FIG. Figure 4 for Figure 2 The schematic diagram of the cross-sectional structure of the solar cell module shown is along the BB' section line.

[0084] The solar cell module comprises:

[0085] The substrate 21 is provided with an active region 231 and an inactive region 232;

[0086] A first isolation wall 33 is located on the substrate 21 and divides the active area 231 into a plurality of sub-active areas 233;

[0087] A plurality of sub-cells are disposed in the sub-active region 233 .

[0088] The present invention utilizes the first isolation wall 33 to physically isolate the active area 231 of the substrate 11 to form a plurality of mutually independent sub-active areas 233, and arranges sub-cells in the sub-active areas 233, so that the sub-cells in the same active area form a parallel relationship, and the defective sub-cells therein can be disconnected to reduce their impact on the entire battery module. At the same time, the first isolation wall 33 can effectively protect the edges of the sub-cells, avoid irreversible damage to them caused by laser etching, and can reduce the carrier recombination at the edges of the sub-cells, greatly improving the yield and service life of large-area solar cell modules.

[0089] In some embodiments, the solar cell module further comprises a second isolation wall;

[0090] A plurality of second isolation walls are sequentially arranged at intervals to separate the substrate 11 into a plurality of active regions 231 and a plurality of inactive regions 232;

[0091] A plurality of first isolation walls 33 are disposed in an active area 231 , and the plurality of first isolation walls 33 and the second isolation walls surround the active area 231 to divide the active area 231 into a plurality of sub-active areas 233 .

[0092] By using the cooperation between the first isolation wall 33 and the second isolation wall, the substrate 11 can be reasonably physically isolated to form mutually independent sub-active regions 233, which is conducive to the parallel connection between sub-batteries.

[0093] In some embodiments, the sub-cell includes a first electrode 23, a functional layer, and a second electrode 50 which are sequentially stacked.

[0094] In some embodiments, the first electrodes 23 are located on the substrate 11 , and a slit 24 is formed between two adjacent first electrodes 23 .

[0095] In some embodiments, the second isolation wall includes a first blocking wall 31 and a second blocking wall 32;

[0096] The first barrier wall 31 fills and protrudes from the slit 24;

[0097] The second barrier wall 32 is located on the first electrode 23 .

[0098] The first barrier wall 31 fills and protrudes from the slit 24, which can protect the edge of the first electrode 23 and prevent the second electrode 50 of the same sub-cell from contacting the first electrode 23 and causing a short circuit; the second barrier wall 32 assists the first barrier wall in physical isolation and can regulate the area of ​​the active area 231.

[0099] In some embodiments, the first electrode 23 extends into an adjacent inactive region 232;

[0100] The second electrode 50 is located between two adjacent second barrier walls 32 , and covers the functional layer, another adjacent inactive region 232 , the first barrier wall 31 , and the first isolation wall 33 .

[0101] In this way, the second electrode 50 can be divided into strip structures by the second barrier wall 32 , and the sub-batteries on both sides of the second barrier wall 32 are connected in series, thereby achieving the function of increasing the battery voltage.

[0102] Optionally, two adjacent first electrodes 23 are parallel to each other and have an equal distance therebetween.

[0103] Optionally, two adjacent first blocking walls 31 are parallel to each other and have an equal distance therebetween.

[0104] Optionally, the second blocking wall 32 is parallel to the first blocking wall 31 , and the distances between two adjacent second blocking walls 32 are equal.

[0105] Optionally, the first isolation wall 33 is perpendicular to the first blocking wall 31 and the second blocking wall 32 , and the distances between two adjacent second blocking walls 33 are equal.

[0106] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32, the width of the first barrier wall 31 and the second barrier wall 32 are independently 10m to 50μm, for example, 10μm, 15μm, 20μm, 25μm, 30μm, 35μm, 40μm, 45μm or 50μm, etc.

[0107] Optionally, along the direction from one first isolation wall 33 to another adjacent first isolation wall 33 , the width of the first isolation wall 33 is 10 μm to 50 μm, for example, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm or 50 μm.

[0108] Optionally, the heights of the first barrier wall 31 , the second barrier wall 32 and the first isolation wall 33 are independently 1 μm to 5 μm, for example, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm.

[0109] The width of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 is controlled to be 10 μm to 50 μm, which can not only achieve good physical isolation, but also further increase the active area of ​​the solar cell module, and improve the power and photoelectric conversion efficiency of the solar cell module. The height of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 is 1 μm to 5 μm, which can ensure that they are higher than the functional layer, thereby achieving physical separation of the functional layer.

[0110] Optionally, the materials of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are independently photoresist. With photoresist as the raw material, the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 can be simultaneously formed at a preset position by using a photolithography process, which can not only accurately frame the sub-active area 233, form a specific physical isolation structure, and play an effective current limiting and protection role, but also save multiple laser scribing steps, the process is relatively simple, and the preparation cost of the solar cell module can be reduced. In addition, by using a photolithography process, the width and shape of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 can be flexibly adjusted, which is conducive to further improving the performance of the solar cell module.

[0111] Optionally, the shapes of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are independently one or more of a prism, a prism and a chamfered prism. Further optionally, the shapes of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are all prisms. Using a prism-shaped wall for physical isolation can maximize the light absorption area of ​​the sub-cell and improve its photoelectric conversion efficiency.

[0112] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32, the width of the slit 24 is 5 μm to 45 μm, for example, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm or 45 μm, etc. The width of the slit 24 is significantly smaller than the width of the first barrier wall 31, which can ensure that the first barrier wall 31 has a good protective effect on the edge of the first electrode 23, and is also conducive to reducing the dead area of ​​the solar cell module.

[0113] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32, the ratio of the width of the first electrode 23 located in the active area 231 to the width of the first electrode 23 located in the inactive area 232 is (80~120):1, for example, 80:1, 90:1, 100:1, 110:1 or 80:1, etc.

[0114] The ratio of the width of the first electrode 23 located in the active area 231 to the width of the first electrode 23 located in the inactive area 232 can be adjusted by the position of the second blocking wall 32. Reasonable configuration of the ratio of the widths of the two can reduce the dead area (Dead Area) of the solar cell module, which is conducive to increasing the area of ​​the active area (Active Area), thereby ensuring the high power and high photoelectric conversion efficiency of the solar cell module.

[0115] Further optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the first electrode 23 located in the active area 231 is 5 mm to 20 mm, for example, 5 mm, 6 mm, 8 mm, 10 mm, 12 mm, 14 mm, 16 mm, 18 mm or 20 mm.

[0116] Further optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the first electrode 23 located in the inactive area 232 is 0.05 mm to 0.2 mm, for example, 0.05 mm, 0.06 mm, 0.08 mm, 0.1 mm, 0.12 mm, 0.14 mm, 0.16 mm, 0.18 mm or 0.2 mm.

[0117] Optionally, the distance between two adjacent first isolation walls 33 is 5 mm to 20 mm, for example, 5 mm, 6 mm, 8 mm, 10 mm, 12 mm, 14 mm, 16 mm, 18 mm or 20 mm.

[0118] Reasonable setting of the distance between two adjacent first isolation walls 33 can increase the area of ​​the sub-active region 233 and the active area of ​​the entire solar cell module, which is also beneficial to improving its power and photoelectric conversion efficiency.

[0119] In some embodiments, the functional layer includes a first carrier transport layer 41 , an active layer 42 , and a second carrier transport layer 43 which are stacked in sequence.

[0120] Optionally, the first carrier transport layer 41, the active layer 42 and the second carrier transport layer 43 are stacked from bottom to top. Further optionally, the first carrier transport layer 41 is a hole transport layer, and the second carrier transport layer 43 is an electron transport layer.

[0121] Optionally, the material of the active layer 42 includes one or more of ABX3 type perovskite material, bis(2-phenylpyridine-C2,N)iridium(III) acetylacetonate (Ir(ppy)2(acac)) and bis(4,6-difluorophenylpyridine-C2,N)picolinyliridium (FIrPic); further optionally, in the ABX3 type perovskite material, A is selected from one or more of methylamine, formamidine, cesium, rubidium, potassium and sodium, B is selected from one or more of lead, tin, germanium, silver and bismuth, and X is selected from one or more of chlorine, bromine and iodine.

[0122] Further optionally, the thickness of the active layer 42 is 0.5 μm to 4 μm, for example, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm or 4 μm.

[0123] Optionally, the material of the electron transport layer includes one or more of 1,3,5-tri(1-phenyl-1H-benzimidazol-2-yl)benzene (TPBi), 4,7-diphenyl-1,10-phenanthroline (Bphen), titanium dioxide, tin dioxide, zinc oxide and fullerene derivatives; further optionally, the fullerene derivative includes indene-C 60 Bisadduct (ICBA), [6,6]-phenyl-C 61 -Methyl butyrate (PC 61 BM) and [6,6]-phenyl-C 71 -Methyl butyrate (PC 70 BM) or more.

[0124] Optionally, the thickness of the electron transport layer is 20 nm to 100 nm, for example, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 100 nm.

[0125] Optionally, the material of the hole transport layer includes one or more of 4,4'-cyclohexylbis[N,N-bis(4-methylphenyl)aniline] (TAPC), 4,4'-bis(9-carbazole)biphenyl (CBP), 1,3-di-9-carbazolebenzene (mCP), poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), 2,2',7,7'-tetrakis[N,N-bis(4-methoxyphenyl)amino]-9,9'-spirobifluorene (Spiro-OMeTAD), poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonic acid) (PEDOT:PSS), copper phthalocyanine (CuPc) and copper iodide (CuI).

[0126] Optionally, the hole transport layer has a thickness of 20 nm to 100 nm.

[0127] Optionally, the material of the second electrode 50 includes one or more of gold, silver, copper, aluminum and carbon; further optionally, the material of the second electrode 50 includes silver and / or copper.

[0128] Optionally, the thickness of the second electrode 50 is 0.1 μm to 1 μm, for example, 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm.

[0129] Optionally, the material of the first electrode 23 includes a conductive metal oxide; the conductive metal oxide includes one or more of fluorine-doped tin oxide (FTO), indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), indium zinc tin oxide (IZTO), and indium gallium zinc tin oxide (IGZTO). Further optionally, the material of the first electrode 23 is indium tin oxide (ITO).

[0130] Optionally, the thickness of the first electrode 23 is 0.1 μm to 1 μm, for example, 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm.

[0131] Optionally, the material of the substrate 21 includes one or more of glass, metal and polymer.

[0132] When the substrate 21 is a glass substrate, it can be a quartz glass substrate, a borosilicate glass substrate, a soda glass substrate, a potassium glass substrate, a lead glass substrate or an aluminum-magnesium glass substrate; when the substrate 21 is a metal substrate, it can be a metal foil substrate or a metal mesh substrate, and the metal material includes one or more of copper, iron and aluminum; when the substrate 21 is a polymer substrate, it can be a polyimide (PI) substrate, a polyethylene terephthalate (PET) substrate, a polycarbonate (PC) substrate or a polymethyl methacrylate (PMMA) substrate.

[0133] Further optionally, the substrate 21 is made of glass.

[0134] Further optionally, the material of the substrate 21 is borosilicate glass.

[0135] A second aspect of the present invention provides a method for preparing a solar cell module, which is used to prepare the solar cell module described above.

[0136] In some embodiments, the method for preparing a solar cell module comprises the following steps:

[0137] Providing a substrate 11, on which an active region 231 and an inactive region 232 are provided;

[0138] A first isolation wall 33 is disposed in the active area 231 to separate the active area 231 into a plurality of sub-active areas 233;

[0139] A sub-cell is disposed in the sub-active region 233 .

[0140] See also Figure 5 , which is a flow chart of a method for preparing a solar cell module in one embodiment, the preparation method comprises the following steps:

[0141] S1: Provide a conductive substrate, the conductive substrate comprising a substrate 21 and a conductive layer 22 disposed on the substrate 21 , and an active area 231 and an inactive area 232 are disposed on the substrate 21 .

[0142] See also Figure 6 , which is a schematic diagram of the cross-sectional structure of the device after step S1 is completed in one embodiment.

[0143] Optionally, the material of the substrate 21 includes at least one of glass, metal and polymer.

[0144] When the substrate 21 is a glass substrate, it can be a quartz glass substrate, a borosilicate glass substrate, a soda glass substrate, a potassium glass substrate, a lead glass substrate or an aluminum-magnesium glass substrate; when the substrate 21 is a metal substrate, it can be a metal foil substrate or a metal mesh substrate, and the metal material includes one or more of copper, iron and aluminum; when the substrate 21 is a polymer substrate, it can be a polyimide (PI) substrate, a polyethylene terephthalate (PET) substrate, a polycarbonate (PC) substrate or a polymethyl methacrylate (PMMA) substrate.

[0145] Further optionally, the substrate 21 is made of glass.

[0146] Further optionally, the material of the substrate 21 is borosilicate glass.

[0147] Optionally, the conductive layer 22 is made of conductive metal oxide; the conductive metal oxide includes one or more of fluorine-doped tin oxide (FTO), indium tin oxide (ITO), aluminum zinc oxide (AZO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), indium zinc tin oxide (IZTO), and indium gallium zinc tin oxide (IGZTO).

[0148] Further optionally, the conductive layer 22 is made of indium tin oxide (ITO).

[0149] Optionally, the thickness of the conductive layer 22 is 0.1 μm to 1 μm.

[0150] S2: etching the conductive layer 22 to form first electrodes 23 arranged at intervals, and forming a slit 24 between two adjacent first electrodes 23 .

[0151] See also Figure 7 and Figure 8 ,in, Figure 7 is a top view of the device after step S2 is completed in one embodiment, Figure 8 for Figure 7 The device shown is a schematic cross-sectional structure diagram along the AA' section line.

[0152] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the slit 24 is 5 μm to 45 μm, for example, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm or 45 μm.

[0153] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the first electrode 23 is 5 mm to 25 mm, for example, 5 mm, 7.5 mm, 10 mm, 12.5 mm, 15 mm, 17.5 mm, 20 mm, 22.5 mm or 25 mm.

[0154] Optionally, two adjacent first electrodes 23 are parallel to each other and have an equal distance therebetween.

[0155] Optionally, etching the conductive layer 22 includes the following steps: forming a photoresist layer on the conductive layer 22; selectively exposing the photoresist layer, and then using a chemical developer to dissolve the exposed area or the unexposed area to expose the conductive layer 22 underneath; using a strong acid to etch the exposed conductive layer 22 to form a first electrode 23 arranged at intervals; and removing the photoresist.

[0156] When the material of the photoresist layer is a positive photoresist, it forms a soluble substance after exposure, so a chemical developer is used to dissolve the exposed area; when the material of the photoresist layer is a negative photoresist, it forms an insoluble substance after exposure, so a chemical developer is used to dissolve the non-exposed area. The photolithography process can accurately transform the conductive layer 22 into the first electrodes 23 distributed at intervals, avoiding damage to the edge of the first electrode 23 by laser etching, thereby improving the performance and yield of the solar cell module.

[0157] S3 : a first isolation wall 33 is disposed in the active area 231 to separate the active area 231 into a plurality of sub-active areas 233 .

[0158] In some embodiments, the first isolation wall 33 is provided in the active area 231, comprising the following steps:

[0159] S31: forming an isolation layer 30 to cover the first electrode 23 and the slit 24;

[0160] See also Fig. 9 , which is a schematic diagram of the cross-sectional structure of the device after step S31 is completed in one embodiment.

[0161] Optionally, the isolation layer 30 has a thickness of 2 μm to 10 μm, for example, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.

[0162] Optionally, the isolation layer 30 is made of photoresist.

[0163] Optionally, the method of forming the isolation layer 30 includes at least one of a spin coating method, a doctor blade coating method and a spray coating method.

[0164] S32: Etching the isolation layer 30 to form a first isolation wall 33 and a second isolation wall; wherein the plurality of second isolation walls are arranged in sequence at intervals to separate the substrate into a plurality of active areas 231 and a plurality of inactive areas 232; a plurality of first isolation walls 33 are arranged in an active area 231, and the plurality of first isolation walls 33 are enclosed by the second isolation walls to separate the active area 231 into a plurality of sub-active areas 233.

[0165] See also Figure 10 to Figure 12 ,in, Fig.10 is a top view of the device after step S32 is completed in one embodiment, Fig.11 for Fig.10 The schematic diagram of the cross-sectional structure of the device shown along the AA' section line, Fig.12 for Fig.10 The device shown is a schematic cross-sectional structure diagram along the BB' section line.

[0166] Optionally, the second isolation wall includes a first blocking wall 31 and a second blocking wall 32;

[0167] The first barrier wall 31 fills the slit 24 and protrudes from the slit 24 .

[0168] The second barrier wall 32 is located on the first electrode 23 .

[0169] Optionally, two adjacent first blocking walls 31 are parallel to each other and have an equal distance therebetween.

[0170] Optionally, the second blocking wall 32 is parallel to the first blocking wall 31 , and the distances between two adjacent second blocking walls 32 are equal.

[0171] Optionally, the first isolation wall 33 is perpendicular to the first blocking wall 31 and the second blocking wall 32 , and the distances between two adjacent first isolation walls 33 are equal.

[0172] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the ratio of the width of the first electrode 23 located in the active area 231 to the width of the first electrode 23 located in the inactive area 232 is 100:1.

[0173] Further optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the first electrode 23 located in the active area 231 is 5 mm to 20 mm, for example, 5 mm, 6 mm, 8 mm, 10 mm, 12 mm, 14 mm, 16 mm, 18 mm or 20 mm.

[0174] Further optionally, along the direction from the first barrier wall 31 to the second barrier wall 32 , the width of the first electrode 23 located in the inactive area 232 is 0.05 mm to 0.2 mm, for example, 0.05 mm, 0.06 mm, 0.08 mm, 0.1 mm, 0.12 mm, 0.14 mm, 0.16 mm, 0.18 mm or 0.2 mm.

[0175] Optionally, the distance between two adjacent first isolation walls 33 is 5 mm to 20 mm.

[0176] Optionally, along the direction from the first barrier wall 31 to the second barrier wall 32, the width of the first barrier wall 31 and the second barrier wall 32 are independently 10μm to 50μm, for example, 10μm, 15μm, 20μm, 25μm, 30μm, 35μm, 40μm, 45μm or 50μm, etc.

[0177] Optionally, along the direction from one first isolation wall 33 to another adjacent first isolation wall 33 , the width of the first isolation wall 33 is 10 μm to 50 μm, for example, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm or 50 μm.

[0178] Optionally, the heights of the first barrier wall 31 , the second barrier wall 32 and the first isolation wall 33 are independently 1 μm to 5 μm, for example, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm.

[0179] Optionally, the first barrier wall 31 , the second barrier wall 32 and the first isolation wall 33 are each independently made of photoresist.

[0180] Optionally, the shapes of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are independently one or more of a prism, a pyramid and a chamfered pyramid. Further optionally, the shapes of the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are all pyramids.

[0181] Further optionally, etching the isolation layer 30 includes the following steps: selectively exposing the isolation layer 30, and then dissolving the exposed area or the unexposed area using a chemical developer to simultaneously form the first barrier wall 31, the second barrier wall 32 and the first isolation wall 33.

[0182] When the material of the isolation layer 30 is positive-type adhesive, a chemical developer is used to dissolve the exposed area; when the material of the isolation layer 30 is negative-type adhesive, a chemical developer is used to dissolve the non-exposed area.

[0183] S4: Setting a sub-battery in the sub-active region 233 .

[0184] In some embodiments, a sub-cell is provided in the sub-active region 233, comprising the following steps:

[0185] S41 : forming a functional layer on the first electrode 23 of the sub-active region 233 .

[0186] See also Figure 13 to Figure 15 ,in, Fig.13 is a top view of the device after step S41 is completed in one embodiment, Fig.14 for Fig.13 The schematic diagram of the cross-sectional structure of the device shown along the AA' section line, Fig.15 for Fig.13 The device shown is a schematic cross-sectional structure diagram along the BB' section line.

[0187] Optionally, forming a functional layer on the first electrode 23 of the sub-active region 233 includes the following steps: sequentially forming a first carrier transport layer 41, an active layer 42, and a second carrier transport layer 43 on the sub-active region 233. Further optionally, the first carrier transport layer 41 is a hole transport layer, and the second carrier transport layer 43 is an electron transport layer.

[0188] Optionally, the material of the active layer 42 includes one or more of ABX3 type perovskite material, bis(2-phenylpyridine-C2,N)iridium(III) acetylacetonate (Ir(ppy)2(acac)) and bis(4,6-difluorophenylpyridine-C2,N)picolinyliridium (FIrPic); further optionally, in the ABX3 type perovskite material, A is selected from one or more of methylamine, formamidine, cesium, rubidium, potassium and sodium, B is selected from one or more of lead, tin, germanium, silver and bismuth, and X is selected from one or more of chlorine, bromine and iodine.

[0189] Optionally, the thickness of the active layer 42 is 0.5 μm to 4 μm, for example, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm or 4 μm.

[0190] Optionally, the material of the electron transport layer includes one or more of 1,3,5-tri(1-phenyl-1H-benzimidazol-2-yl)benzene (TPBi), 4,7-diphenyl-1,10-phenanthroline (Bphen), titanium dioxide, tin dioxide, zinc oxide and fullerene derivatives; further optionally, the fullerene derivative includes indene-C 60 Bisadduct (ICBA), [6,6]-phenyl-C 61 -Methyl butyrate (PC 61 BM) and [6,6]-phenyl-C 71 -Methyl butyrate (PC 70 BM) or more.

[0191] Optionally, the thickness of the electron transport layer is 20 nm to 100 nm, for example, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 100 nm.

[0192] Optionally, the material of the hole transport layer includes one or more of 4,4'-cyclohexylbis[N,N-bis(4-methylphenyl)aniline] (TAPC), 4,4'-bis(9-carbazole)biphenyl (CBP), 1,3-di-9-carbazolebenzene (mCP), poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), 2,2',7,7'-tetrakis[N,N-bis(4-methoxyphenyl)amino]-9,9'-spirobifluorene (Spiro-OMeTAD), poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonic acid) (PEDOT:PSS), copper phthalocyanine (CuPc) and copper iodide (CuI).

[0193] Optionally, the hole transport layer has a thickness of 20 nm to 100 nm.

[0194] In some embodiments, the method of forming the functional layer on the first electrode 23 of the sub-active area 233 is an inkjet printing method.

[0195] Optionally, a functional layer is formed on the first electrode 23 of the sub-active area 233, comprising the following steps: forming a first carrier transport layer 41 on the sub-active area 233 by inkjet printing, vacuuming to remove the solvent, and baking at 100°C for 20 minutes to dry the first carrier transport layer 41; forming an active layer 42 on the first carrier transport layer 41 by inkjet printing, vacuuming to remove the solvent, and baking at 100°C for 20 minutes to dry the active layer 42; forming a second carrier transport layer 43 on the active layer 42 by inkjet printing, vacuuming to remove the solvent, and baking at 100°C for 20 minutes to dry the second carrier transport layer 43.

[0196] The vacuuming and heating annealing treatment after each inkjet printing can improve the crystallinity and density of each film layer in the functional layer, and make each film layer completely dry to facilitate the spreading of the next film layer.

[0197] S42: forming a second electrode 50 on the functional layer.

[0198] See also Figure 2 to Figure 4 ,in, Figure 2 FIG. 1 is a top view of a solar cell module after step S42 is completed in one embodiment. Figure 3 for Figure 2 The schematic diagram of the cross-sectional structure of the device shown along the AA' section line, Figure 4 for Figure 2The device shown is a schematic cross-sectional structure diagram along the BB' section line.

[0199] In some embodiments, forming the second electrode 50 on the functional layer includes the following steps:

[0200] The second electrode 50 is formed between two adjacent second barrier walls 32 to cover the functional layer, the inactive area 232 , the first barrier walls 31 and the first isolation wall 33 .

[0201] Optionally, the method of forming the second electrode 50 on the functional layer is an evaporation method.

[0202] Further optionally, the evaporation method includes the following steps: forming a mask on the second barrier wall 32, performing evaporation under vacuum conditions to deposit copper vapor or silver vapor on the surface of the functional layer, the inactive area 232, the first barrier wall 31 and the first isolation wall 33 to form a second electrode 50; and removing the mask.

[0203] Optionally, the material of the second electrode 50 includes one or more of gold, silver, copper, aluminum and carbon.

[0204] Further optionally, the material of the second electrode = 50 includes silver and / or copper.

[0205] Optionally, the thickness of the second electrode = 50 is 0.1 μm to 2 μm.

[0206] S5: Packaging to form a solar cell module.

[0207] In some embodiments, the packaging method of the solar cell module is a UV curing packaging method or a vacuum lamination packaging method.

[0208] Optionally, the packaging method of the solar cell module is a UV curing packaging method.

[0209] Optionally, the UV curing packaging method includes the following steps: under a nitrogen atmosphere, applying packaging glue to the edge of the substrate 21 to form a packaging glue layer surrounding the battery module; placing a packaging glass cover on top of the second electrode 50 and in contact with the packaging glue layer; irradiating with UV light at 25°C and heating at 100°C for 30 minutes to cure the packaging glue layer to obtain a complete solar cell module.

[0210] The UV curing packaging method can form a packaging structure that is resistant to corrosion, decomposition, and impact, ensuring the stability of the internal materials and external structure of the P battery, while also preventing the leakage of harmful substances such as internal heavy metal ions.

[0211] The present invention is further described in detail below with reference to specific embodiments.

[0212] Example 1

[0213] S1: Provide an ITO glass with an area of ​​200 cm×200 cm, that is, in this embodiment, ITO glass is used as a conductive substrate, the substrate 21 is borosilicate glass, the conductive layer 22 is an ITO film with a thickness of 100 nm, and an active area 231 and an inactive area 232 are provided on the substrate 21.

[0214] S2: etching the ITO film to form first electrodes 23 arranged at intervals, the width of the first electrodes 23 is 1 cm, the width of the slits 24 between the first electrodes 23 is 1 μm, and the first electrodes 23 and the slits 24 are parallel to each other.

[0215] The etching method of the ITO film is as follows: the ITO glass is cleaned and dried, and then a positive photoresist is spin-coated onto the ITO film to form a photoresist layer with a thickness of 3 μm; the photoresist layer is selectively exposed, and then a chemical developer is used to dissolve the exposed area to expose the ITO film underneath; the exposed ITO film is etched with a strong acid to form a first electrode 23 arranged at intervals; the photoresist layer is removed and cleaned.

[0216] S3: a first isolation wall 33 is provided in the active area 231 to separate the active area 231 into a plurality of sub-active areas 233. The specific method is as follows:

[0217] S31: Spin-coat a positive photoresist onto the first electrode 23 and the slit 24 to form an isolation layer 30 with a thickness of 2 μm;

[0218] S32: selectively expose the isolation layer 30, and use a chemical developer to dissolve the exposed area, thereby forming a first barrier wall 31, a second barrier wall 32, and a first isolation wall 33. The first barrier wall 31 and the second barrier wall 32 are parallel to each other, and the first isolation wall 33 is perpendicular to the first barrier wall 31 and the second barrier wall 32; the width of the first electrode 23 located in the active area 231 is 10 mm, the width of the first electrode 23 located in the inactive area 232 is 0.1 mm, and the distance between two adjacent first isolation walls 33 is 10 mm, that is, the area of ​​the sub-active area 233 is 10 mm 2 The first barrier wall 31, the second barrier wall 32 and the first isolation wall 33 are all prism-shaped, with a maximum width of 50 μm and a height of 2 μm (ie, the thickness of the isolation layer 30).

[0219] S4: a sub-battery is arranged in the sub-active region 233, and the specific method is as follows:

[0220] S41: filling a functional layer on the first electrode 23 of the sub-active area 233 by inkjet printing, the functional layer including a first carrier transport layer 41, an active layer 42 and a second carrier transport layer 43 stacked from bottom to top.

[0221] The first carrier transport layer 41 is a hole transport layer, and its preparation method is as follows: using a p-xylene solution of PTAA as ink, the ink is sprayed on the sub-active area 233 by inkjet printing, and after vacuuming to remove the solvent, it is baked at 100°C for 20 minutes to obtain a hole transport layer with a thickness of 40nm.

[0222] The preparation method of the active layer 42 is as follows: using the DMF solution of the perovskite precursor as ink, spraying the ink onto the hole transport layer 41 by inkjet printing, vacuuming to remove the solvent, and baking at 100° C. for 20 minutes to obtain an active layer 42 with a thickness of 2 μm.

[0223] The second carrier transport layer 43 is an electron transport layer, and its preparation method is as follows: 70 The pentanol solution of BM is ink, which is sprayed onto the active layer 42 by inkjet printing. After vacuuming to remove the solvent, the ink is baked at 100° C. for 20 minutes to obtain an electron transport layer with a thickness of 50 nm.

[0224] S42: forming a mask on the second barrier wall 32, and performing evaporation under vacuum conditions to deposit copper vapor on the surfaces of the functional layer, the inactive area 232, the first barrier wall 31 and the first isolation wall 33 to form a second electrode 50 with a thickness of 0.1 μm; and removing the mask.

[0225] S5: placing the device prepared in step S4 under a nitrogen atmosphere, applying encapsulation glue on the edge of the substrate 21 to form an encapsulation glue layer surrounding the battery module; placing an encapsulation glass cover on the second electrode 50 and in contact with the encapsulation glue layer; irradiating with ultraviolet light at 25°C and heating at 100°C for 30 minutes to cure the encapsulation glue layer, thereby obtaining a complete perovskite solar cell module.

[0226] The photoelectric performance of the above perovskite solar cell module was tested, and the results are shown in Table 1.

[0227] Comparative Example 1

[0228] The perovskite solar cell module of this comparative example is prepared by a laser scribing method, and the specific steps are as follows:

[0229] (1) An ITO glass with an area of ​​200 cm×200 cm is provided. That is, this comparative example also uses ITO glass as a conductive substrate, the substrate 11 is borosilicate glass, and the conductive layer 12 is an ITO film with a thickness of 100 nm.

[0230] (2) The ITO film is subjected to a first laser scribing to form first slits P1 with a width of 100 μm, and the distance between two adjacent first slits is 1 cm.

[0231] (3) forming a perovskite functional layer to cover the conductive layer 12 and the first slit P1; wherein the perovskite functional layer includes a first carrier transport layer 13, a perovskite active layer 14 and a second carrier transport layer 15 stacked from bottom to top; the first carrier transport layer 13 is a hole transport layer prepared by spin coating, the material is PTAA, and the thickness is 40nm; the perovskite active layer 14 is prepared by slit coating, the solute is a perovskite precursor, and the thickness is 1μm; the second carrier transport layer 15 is an electron transport layer prepared by spin coating, the material is PC 70 BM, thickness is 50 nm.

[0232] (4) Performing a second laser scribing on the perovskite functional layer to form a second slit P2 with a width of 100 μm; the second slit P2 is parallel to the first slit P1, and the distance between the second slit P2 and the first slit P1 is 50 μm.

[0233] (5) Under vacuum conditions, copper vapor is deposited on the perovskite functional layer and the second slit P2 by evaporation to obtain a back electrode layer 16 with a thickness of 0.1 μm.

[0234] (6) The back electrode layer 16 is subjected to a third laser scribing to form a third slit P3 with a width of 100 μm; the third slit P3 is parallel to the first slit P1 and the second slit P2, and the distance between the third slit P3 and the second slit P2 is 50 μm, that is, the dead zone width is 400 μm and the active zone width is 1 cm.

[0235] (7) The device prepared in step (6) is subjected to laser edge cleaning treatment, and then placed in a nitrogen atmosphere for UV curing and packaging to obtain a complete perovskite solar cell module.

[0236] The photoelectric performance of the above perovskite solar cell module was tested, and the results are shown in Table 1.

[0237] It can be seen from Table 1 that the photoelectric properties of the perovskite solar cell module of Example 1, such as single cell fill factor, short-circuit current, open-circuit voltage and photoelectric conversion efficiency, are better than those of the perovskite solar cell module of Comparative Example 1, and the service life T80 (i.e., the time taken for the efficiency to drop to 80% of the initial efficiency) and the yield are significantly improved.

[0238] Table 1. Comparison of photoelectric performance of perovskite solar cell modules

[0239] Test items Example 1 Comparative Example 1 Fill Factor FF 0.74 0.70 <![CDATA[Breaking current (mA / cm 2 )]]> 21.1 20.5 Open circuit voltage(V) 1.05 1.04 Photoelectric conversion efficiency (%) 16.4 14.9 Service life T80(h) 3000 2500 Yield (%) 90 70

[0240] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0241] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims, and the description and drawings can be used to interpret the content of the claims.

Claims

1. A solar cell module, characterized in that: include: A substrate having an active region and an inactive region; A first isolation wall, located on the substrate and dividing the active area into a plurality of sub-active areas; A plurality of sub-cells are arranged in the sub-active area.

2. The solar cell module according to claim 1, characterized in that: It also includes the second separation wall; A plurality of the second isolation walls are sequentially arranged at intervals to separate the substrate into a plurality of the active areas and a plurality of the inactive areas; A plurality of the first isolation walls are disposed in one active area, and the plurality of the first isolation walls are enclosed by the second isolation walls to divide the active area into a plurality of sub-active areas.

3. The solar cell module according to claim 2, characterized in that: The sub-cell includes a first electrode, a functional layer and a second electrode which are stacked in sequence.

4. The solar cell module according to claim 3, characterized in that: The first electrodes are located on the substrate, and a slit is formed between two adjacent first electrodes.

5. The solar cell module according to claim 4, characterized in that: The second isolation wall includes a first blocking wall and a second blocking wall; The first barrier wall fills and protrudes from the slit; The second barrier wall is located on the first electrode.

6. The solar cell module according to claim 5, characterized in that: The first electrode extends into an adjacent one of the inactive areas; The second electrode is located between two adjacent second barrier walls and covers the functional layer, another adjacent inactive area, the first barrier wall and the first isolation wall.

7. The solar cell module according to claim 5, characterized in that: One or more of the following conditions are met: 1) Along the direction from the first barrier wall to the second barrier wall, the width of the first barrier wall and the second barrier wall are independently 10 μm to 50 μm; 2) along a direction from one first isolation wall to another adjacent first isolation wall, the width of the first isolation wall is 10 μm to 50 μm; 3) The heights of the first barrier wall, the second barrier wall and the first isolation wall are independently 1 μm to 5 μm; 4) The first barrier wall, the second barrier wall and the first isolation wall are each independently made of photoresist; 5) The shapes of the first barrier wall, the second barrier wall and the first isolation wall are independently selected from one or more of a prism, a pyramid and a chamfered pyramid; 6) Along the direction from the first barrier wall to the second barrier wall, the width of the slit is 5 μm to 45 μm.

8. The solar cell module according to claim 5, characterized in that: Along the direction from the first barrier wall to the second barrier wall, the ratio of the width of the first electrode located in the active area to the width of the first electrode located in the inactive area is (80-120):

1.

9. The solar cell module according to claim 8, characterized in that: The distance between two adjacent first isolation walls is 5 mm to 20 mm.

10. The solar cell module according to claim 3, characterized in that: The sub-cell meets one or more of the following conditions: 1) The functional layer includes an active layer, and the material of the active layer includes one or more of ABX3-type perovskite material, bis(2-phenylpyridine-C2,N)iridium(III) acetylacetonate, and bis(4,6-difluorophenylpyridine-C2,N)picolinyliridium; 2) The material of the second electrode includes one or more of gold, silver, copper, aluminum and carbon; 3) The material of the first electrode includes a conductive metal oxide, and the conductive metal oxide includes one or more of fluorine-doped tin oxide, indium tin oxide, zinc aluminum oxide, indium zinc oxide, indium gallium zinc oxide, indium gallium tin oxide, indium zinc tin oxide, and indium gallium zinc tin oxide; 4) The material of the substrate includes one or more of glass, metal and polymer.

11. A method for preparing a solar cell module, characterized in that: The following steps are involved: Providing a substrate, wherein an active area and an inactive area are provided on the substrate; Disposing a first isolation wall in the active area to separate the active area into a plurality of sub-active areas; A sub-cell is disposed in the sub-active region.

12. The method for preparing a solar cell module according to claim 11, characterized in that: Before the first isolation wall is arranged in the active area, the method further comprises the following steps: Providing a conductive substrate, the conductive substrate comprising the substrate and a conductive layer disposed on the substrate; The conductive layer is etched to form first electrodes that are spaced apart from each other, and a slit is formed between two adjacent first electrodes.

13. The method for preparing a solar cell module according to claim 12, wherein: Providing a first isolation wall in the active area comprises the following steps: forming an isolation layer to cover the first electrode and the slit; Etching the isolation layer to form a first isolation wall and a second isolation wall; Wherein, a plurality of the second isolation walls are sequentially arranged at intervals to separate the substrate into a plurality of the active areas and a plurality of the inactive areas; A plurality of the first isolation walls are disposed in one active area, and the plurality of the first isolation walls are enclosed by the second isolation walls to divide the active area into a plurality of sub-active areas.

14. The method for preparing a solar cell module according to claim 13, wherein: The second isolation wall includes a first blocking wall and a second blocking wall; The first barrier wall fills and protrudes from the slit; The second barrier wall is located on the first electrode.

15. The method for preparing a solar cell module according to claim 14, characterized in that: Arranging a sub-cell in the sub-active region comprises the following steps: forming a functional layer on the first electrode of the sub-active region; A second electrode is formed on the functional layer.

16. The method for preparing a solar cell module according to claim 15, characterized in that: Forming a second electrode on the functional layer comprises the following steps: The second electrode is formed between two adjacent second barrier walls to cover the functional layer, the inactive area, the first barrier wall and the first isolation wall.

17. The method for preparing a solar cell module according to claim 15, characterized in that: The method of forming the second electrode on the functional layer is an evaporation method.

18. The method for preparing a solar cell module according to claim 15, characterized in that: The method for forming the functional layer on the first electrode of the sub-active area is inkjet printing.