Preparation method of bump array on packaging substrate
By using 3D printing technology to prepare convex arrays on the packaging substrate, the problems of high cost, long cycle and low production yield when preparing small-size and small-pitch convex arrays in small batch production in traditional processes are solved, and high efficiency is achieved , economical preparation of convex arrays.
Patent Information
- Application Number
- CN202311033927.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-16
- Publication Date
- 2025-02-21
- Estimated Expiration
- 2043-08-16
AI Technical Summary
When producing packaged substrates in small batches, it is difficult for traditional processes to effectively prepare convex arrays of small sizes and small pitches, resulting in high costs, long cycles and low production yields.
3D printing technology is used instead of traditional evaporation, stencil printing, ball planting and electroplating processes, and defects are identified through the first and second scans, and a convex array is gradually formed.
It realizes efficient preparation of small-size and small-pitch convex dot arrays, reduces production costs, simplifies process flow, and improves production yield.
Smart Images

Figure CN119495575A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of integrated circuits, and in particular to a method for preparing a bump array on a packaging substrate. Background Art
[0002] As a rapid prototyping technology, 3D printing technology is a technology that uses powdered metal or plastic and other bondable materials to build objects by printing layer by layer based on digital model files. Compared with traditional manufacturing technology, 3D printing technology has many advantages, such as low cost, simple process, suitable for various types of hard and flexible and curved surfaces, high material utilization, a wide variety of available materials, no need for masks or molds, and direct forming. It has outstanding potential and unique advantages in the manufacture of complex three-dimensional structures, structures with large height (depth) aspect ratios, multi-material composite structures, macro / micro / nano cross-scale structures, and embedded heterogeneous structures.
[0003] Flip Chip Ball Grid Array (FCBGA) is the mainstream packaging method for high-end chips in the current integrated circuit field. In order to ensure the reliability of the interconnection between the chip and the packaging substrate, the bump array needs to be made on the chip and the packaging substrate in advance during the flip chip ball grid array packaging. The formation of the bump array in the conventional process mainly includes evaporation process, template printing process, ball planting process and electroplating process. Among them, the evaporation process is generally used for the production of the bump array on the chip, and the template printing process, ball planting process and electroplating process are used on both the chip and the packaging substrate. However, with the increasing application of heterogeneous integration, in the manufacturing process of packaging substrates containing embedded silicon-based intermediate layers, the bump arrays are developing towards smaller pitches and smaller sizes. The traditional evaporation process and template printing process can no longer meet the production of bump arrays with a size less than 70μm and a pitch less than 150μm on the embedded silicon-based intermediate layer. Although the ball planting process and electroplating process can meet the production of small-size and small-pitch bump arrays, in the production process of small batches of test boards, the screen needs to be remade each time, which incurs high costs. If one of the bumps is defective, the entire packaging substrate will be scrapped, making it difficult to control the production yield. Summary of the invention
[0004] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a method for preparing a bump array on a packaging substrate, which is used to solve the problems of high cost, long preparation cycle and low production yield caused by using existing conventional production processes to prepare small-sized and small-pitch bump arrays in the process of small-batch production of packaging substrates in the prior art.
[0005] To achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a bump array on a packaging substrate, the method for preparing the bump array comprising the following steps:
[0006] S1: providing a packaging substrate, the packaging substrate comprising a front side and a back side arranged opposite to each other, the front side of the packaging substrate being provided with a surface pad array, and the back side of the packaging substrate being fixed on a carrier;
[0007] S2: using a first optical device to perform a first scanning identification and record second position information of the surface pad array;
[0008] S3: providing first position information of the surface pad array during initial design, and comparing the first position information with the second position information, so as to select the surface pad array on which bumps need to be formed;
[0009] S4: forming bumps for the first time on the surface pad array on which a bump array needs to be formed by using a 3D printing method;
[0010] S5: Scanning the surface pad array forming the bumps for a second time using a second optical device to identify defect types and record locations of the defect types;
[0011] S6: forming a convex point for a second time at the position where the defect type is located by using the 3D printing method;
[0012] S7: Repeat steps S5 to S6 until all the bumps on the surface pad array that need to be formed are completed.
[0013] Optionally, the first optical device is a CCD camera, and the second optical device is a laser camera.
[0014] Optionally, the pitch size of the bumps on the surface pad array is 40 μm to 150 μm.
[0015] Optionally, the step of forming bumps by the 3D printing method includes: spraying multiple layers of metal powder on the surface pad array where bumps need to be formed according to a preset route using a 3D printing nozzle, and synchronously sintering the metal powder on the surface pad array layer by layer using a laser to obtain the bumps.
[0016] Optionally, the synchronous sintering method includes one or more of direct metal laser sintering, electron beam melting, selective laser melting, selective thermal sintering or selective laser sintering.
[0017] Optionally, the type of the laser is one of a fiber laser or an ultraviolet laser.
[0018] Optionally, the types of the metal powder include at least one or more of copper, tin, gold, indium, nickel, and silver, and the particle size of the metal powder is 0.1 μm to 10 μm.
[0019] Optionally, the bumps on the surface pad array are in the shape of one or more of a sphere, a cylinder, a cone, a truncated cone, and a cuboid.
[0020] Optionally, a heating device for heating the packaging substrate is provided on the carrier, and the operating temperature range of the heating device is 30°C to 200°C.
[0021] Optionally, the defect types include missed dots and residual dots on the surface pad array.
[0022] Optionally, a method of fixing the back side of the packaging substrate on the carrier includes fixing with pins, fixing with vacuum adsorption, or embedding the packaging substrate into a groove of the carrier.
[0023] As described above, the method for preparing a bump array on a packaging substrate of the present invention has the following beneficial effects: the present invention adopts a 3D printing method to replace the evaporation, template printing, ball planting and electroplating processes in the conventional process, thereby realizing the preparation of a small-size and small-pitch bump array, and more types of special-shaped bumps can be prepared by using this preparation method, thereby providing a certain structural basis for the research and development of new bonding methods between chips and packaging substrates. In addition, the preparation method is carried out in units of a single bump, thereby avoiding the processing process of the entire packaging substrate as a unit, and it is more convenient to return the bump array at any time. The 3D printing method adopted by the present invention replaces the steps of flux coating, reflow soldering and flux cleaning in the conventional process, as well as the production cycle of auxiliary materials such as dry film, screen, fixture, liquid medicine, etc., which greatly simplifies the preparation process of the bump array, solves the problems of complex process flow, large number of equipment and high cost, especially for the production and research and development of small batch packaging substrates with silicon-based intermediate layers, which greatly reduces the cost investment in the early stage of production and manufacturing, greatly improves the processing efficiency, shortens the research and development time and has a higher production yield. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 Shown is a schematic flow chart of a method for preparing a bump array on a packaging substrate of the present invention.
[0025] Figure 2 Shown is a schematic structural diagram of bumps of different shapes formed in the method for preparing a bump array of the present invention.
[0026] Figure 3 Shown is a schematic diagram of the structure of a packaging substrate in the method for preparing a bump array of the present invention.
[0027] Figure 4 Shown is a schematic structural diagram of another packaging substrate in the method for preparing a bump array of the present invention.
[0028] Figure 5 It is a schematic diagram showing the structure in which the packaging substrate is fixed on a carrier in the method for preparing a bump array of the present invention.
[0029] Figure 6 It is a schematic diagram showing the first scanning performed by the first optical device in the method for preparing the bump array of the present invention.
[0030] Figure 7 It is a schematic diagram showing the first formation of bumps in the method for preparing a bump array of the present invention.
[0031] Figure 8 It is a schematic structural diagram showing the defect types of the packaging substrate in the method for preparing the bump array of the present invention.
[0032] Fig. 9 It is a schematic diagram showing the structure in which all the bumps on the second pad array in the method for preparing the bump array of the present invention are completed.
[0033] Component number description
[0034] 101. packaging substrate; 102. surface pad array; 103. fixing hole; 104. silicon-based intermediate layer; 105. first pad array; 106. solder mask layer; 1061. missed dots; 1062. residual dots; 107. carrier; 1071. pins; 108. first optical device; 109. laser; 110. 3D printing nozzle; 111. powder feeder; 112. bumps; 1121. square bumps; 1122. spherical bumps; 1123. cylindrical bumps; 1124. truncated cone bumps; 1125. conical bumps; 113. missed dots; 114. residual dots; 115. second optical device; S1 to S7, steps. DETAILED DESCRIPTION
[0035] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0036] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.
[0037] For convenience of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings.
[0038] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0039] See also Figures 1 to 9 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0040] This embodiment provides a method for preparing an array of bumps 112 on a packaging substrate 101 having a silicon-based intermediate layer 104, such as Figure 1 As shown, it is shown as a process flow chart of the preparation method, comprising the following steps:
[0041] S1: providing a packaging substrate 101, wherein the packaging substrate 101 comprises a front side and a back side which are arranged opposite to each other, and a surface pad array 102 is arranged on the front side of the packaging substrate 101;
[0042] S2: Fixing the back side of the packaging substrate 101 on the stage 107 and using the first optical device 108 to perform a first scanning recognition and record the second position information of the surface pad array 102;
[0043] S3: providing first position information of the surface pad array 102 during initial design, and comparing the first position information with the second position information, so as to select the surface pad array 102 where the bumps 112 need to be formed;
[0044] S4: forming bumps 112 for the first time on the surface pad array 102 where the bump array 112 array needs to be formed by using a 3D printing method;
[0045] S5: using the second optical device 115 to perform a second scan on the surface pad array 102 forming the bumps 112, identifying the defect type and recording the location of the defect type;
[0046] S6: forming a bump 112 for a second time at the location of the defect type by using a 3D printing method;
[0047] S7: repeating steps S5 to S6 until all the bumps 112 on the surface pad array 102 where bumps 112 need to be formed are completed.
[0048] The following is a further introduction to the method for preparing the array of bumps 112 on the packaging substrate 101 in conjunction with the accompanying drawings, as follows:
[0049] In step S1, see Figure 1 , Figure 3 and Figure 4 , providing a packaging substrate 101, the packaging substrate 101 includes a front side and a back side that are arranged opposite to each other, the front side of the packaging substrate 101 is provided with a surface pad array 102 and the back side of the packaging substrate 101 is fixed on a carrier 107.
[0050] It should be noted that the surface of the package substrate 101 having the surface pad array 102 is defined as the front side, and the other side opposite thereto is defined as the back side. Specifically, Figure 3 As shown, it is a schematic diagram of a cross-sectional structure of a packaging substrate 101. A silicon-based intermediate layer 104 and a wiring layer are respectively provided in the packaging substrate 101, wherein the silicon-based intermediate layer 104 is integrated with passive devices. In this embodiment, the passive devices include at least capacitors, resistors and inductors. A first pad array 105 is provided on the surface of the silicon-based intermediate layer 104. The first pad array 105 is arranged opposite to the surface pad array 102 as the pins of the passive device and is electrically connected to the outside of the packaging substrate 101. The packaging substrate 101 includes a front side and a back side that are relatively arranged. A surface pad array 102 is formed on the front side of the packaging substrate 101. This surface pad array 102 is a second pad array. One side of the second pad array is connected to the first pad array 105 of the silicon-based intermediate layer 104 in the packaging substrate 101, and the other side of the second pad array is bonded to the micro-bumps on the active surface of the chip (the side of the chip with micro-bumps is defined as the active surface), thereby realizing the electrical connection between the chip and the packaging substrate 101.
[0051] like Figure 4As shown, it is another cross-sectional structural schematic diagram of the packaging substrate 101. A solder resist layer 106 is also provided on the front of the packaging substrate 101. A plurality of through holes are provided on the solder resist layer 106 to expose the second pad array to the outside. The subsequently formed bumps 112 are just located on the second pad array in the through holes. The solder resist layer 106 can prevent the circuit from short circuiting and effectively prevent moisture to protect the circuit. For the convenience of description, the embodiment of the present invention is described by taking the packaging substrate 101 having the silicon-based intermediate layer 104 and the packaging substrate 101 having no solder resist layer 106 as an example.
[0052] In step S2, see Figure 1 , Figure 5 and Figure 6 , fix the back side of the packaging substrate 101 on the stage 107 and perform a first scan using the first optical device 108 to identify and record the second position information of the surface pad array 102 .
[0053] In this embodiment, if Figure 5As shown, in order to fix the packaging substrate 101, the back side of the packaging substrate 101 is fixed on the carrier 107. Optionally, the method for fixing the back side of the packaging substrate 101 on the carrier 107 includes fixing with a pin 1071, fixing by vacuum adsorption, or embedding the packaging substrate 101 into a groove on the carrier 107, that is, the back side of the packaging substrate 101 can be provided with a fixing hole 103, so that the packaging substrate 101 is fixed on the carrier 107 by the pin 1071, or, the carrier 107 is also provided with a vacuum adsorption device. Preferably, the vacuum adsorption device is provided in the area where the packaging substrate 101 contacts the carrier 107, and an external vacuum source is connected to the outside of the vacuum adsorption device. The vacuum adsorption device includes a plurality of adsorption holes and the adsorption holes are evenly distributed. When the packaging substrate 101 is placed in the fixed area, , the adsorption hole can be completely covered. At this time, turning on the external vacuum source can extract the air in the area where the packaging substrate 101 contacts the carrier 107 to make it a negative pressure state, so that the packaging substrate 101 can be vacuum adsorbed by utilizing the air pressure difference, thereby achieving the effect of fixing the packaging substrate 101. After the bumps 112 are formed, turning off the vacuum source can break the vacuum adsorption device, so that the packaging substrate 101 can be removed, which is more conducive to actual use and will not cause damage to the packaging substrate 101 during use. In addition, the packaging substrate 101 can also be directly embedded in the groove of the carrier 107. At this time, the size of the packaging substrate 101 is consistent with the size of the groove of the carrier 107, so that the packaging substrate 101 will not be displaced during the process of printing to form the bump 112 array. Optionally, a heating device for heating the packaging substrate 101 is also provided on the carrier 107, and the operating temperature range of the heating device is 30°C to 200°C. By heating the packaging substrate 101 by the heating device, the thermal stress generated on the packaging substrate 101 during the sintering of metal powder by laser during 3D printing can be reduced, thereby preventing the side of the packaging substrate 101 where the bump 112 is formed from warping due to excessive temperature.
[0054] Specifically, Figure 6 As shown, the packaging substrate 101 fixed on the carrier 107 is placed under the first optical device 108, and the first optical device 108 is communicated with the computer unit of the external device. By starting the first optical device 108, the packaging substrate 101 is scanned for the first time to identify the second position information of the second pad array. Optionally, in this embodiment, the first optical device 108 is a CCD camera, which can scan the second pad array to form an image to facilitate the identification of the second position information of the second pad array, and record the second position information in the computer unit.
[0055] In step S3, see Figure 1, providing the first position information of the surface pad array 102 during the initial design, and comparing the first position information with the second position information, so as to select the surface pad array 102 that needs to form the bump 112 array.
[0056] Specifically, the first position information of the surface pad array 102 during the initial design is stored in the computer unit. The first position information represents the surface pad location where the bump array 112 array needs to be formed. The first position information is compared and analyzed with the second position information to determine the surface pad location where the bump array 112 needs to be formed, and this information is transmitted to the 3D printing control unit.
[0057] In step S4, see Figure 1 and Figure 7 , the bumps 112 are formed for the first time on the surface pad array 102 where the bump array 112 needs to be formed using a 3D printing method.
[0058] Specifically, Figure 7 As shown, according to the surface pad sites on the package substrate 101 where the bumps 112 need to be formed determined in step S3, the control unit is used to start the 3D printing device to form the bumps 112 on the surface pad array 102 for the first time.
[0059] As an example, the steps of forming the bump 112 using a 3D printing method include: using a 3D printing nozzle 110 to spray multiple layers of metal powder on the surface pad array 102 where the bump 112 needs to be formed according to a preset route, and using a laser 109 to synchronously sinter the metal powder on the surface pad array 102 layer by layer to obtain the bump 112. Specifically, the metal powder is first loaded into the consumable box, the 3D printing nozzle 110 is connected to the consumable box, and the metal powder is sprayed onto the surface pad array 102 through the 3D printing nozzle 110 through the powder feeder 111. In the present embodiment, the 3D printing nozzle 110 first sprays a first layer of metal powder on the surface pad array 102 where the bumps 112 need to be formed according to a preset route. At the same time, the laser 109 is used to sinter the first layer of metal powder on the surface pad array 102. After the sintering is completed, the above steps are repeated to feed powder through the powder feeder 111 to spray multiple layers of metal powder on the surface pad array 102 and synchronously sinter each layer of metal powder until the bumps 112 are formed on the surface pad array 102.
[0060] As an example, the method of simultaneous sintering includes one or more of direct metal laser sintering, electron beam melting, selective laser melting, selective thermal sintering or selective laser sintering.
[0061] Specifically, direct metal laser sintering, electron beam melting, selective laser melting, selective thermal sintering or selective laser sintering as powder-based additive manufacturing technology are often used in layer-by-layer additive manufacturing. In this embodiment, the method for synchronously sintering each layer of metal powder is selected as direct metal laser sintering. Of course, in other embodiments, the synchronous sintering method can also select other processes, which are not limited here. Optionally, the type of laser 109 is one of fiber laser 109 or ultraviolet laser 109. Specifically, the optical fiber is a cylindrical waveguide medium with a small core diameter. It is easy to form a high power density in the fiber, thereby causing a particle number inversion of the laser working material energy level. The constructed laser 109 has the advantages of low laser threshold, high conversion efficiency, and good beam quality. The optical fiber output can be well matched with the existing communication optical fiber and is easier to couple. The ultraviolet laser generated by the ultraviolet laser 109 not only has good beam quality and a smaller focused spot, but also can achieve ultra-fine marking and has a wider range of applications. By using the laser light generated by the fiber laser 109 or the ultraviolet laser 109 to synchronously sinter each layer of metal powder, the bumps 112 can be better formed.
[0062] As an example, the types of the metal powder include at least one or more of copper, tin, gold, indium, nickel, and silver, and the particle size of the metal powder is 0.1 μm to 10 μm.
[0063] Specifically, the types of metal powders include at least one or more of copper, tin, gold, indium, nickel, and silver. Since different 3D printing equipment and forming processes have different requirements for the particle size distribution of metal powders, the selection of metal powder particle size used in 3D printing is mainly based on printers with different energy sources. In this embodiment, the printer uses a laser 109 as an energy source. Since the laser has a fine focused spot, it is easier to melt fine powder. In this embodiment, the particle size of the metal powder is set to 0.1μm~10μm, and the metal powder is supplied by spreading the powder layer by layer through a powder feeder 111.
[0064] In step S5, refer to Figure 1 and Figure 8 , use the second optical device 115 to perform a second scan on the surface pad array 102 forming the bump 112, identify the defect type and record the location of the defect type.
[0065] Specifically, Figure 8As shown, the package substrate 101 after the first formation of the bumps 112 is placed again under the second optical device 115, and the second optical device 115 is connected to the computer unit of the peripheral device for communication. By starting the second optical device 115, the package substrate 101 is scanned for the second time, the defect type on the surface pad array 102 is identified, and the position information of the defect type is recorded in the computer unit. Optionally, in this embodiment, the second optical device 115 is a laser camera, which can emit a laser beam to the surface pad array 102 and receive a beam reflected back from the surface pad array 102, thereby forming three-dimensional image information, so as to identify the defect type of the surface pad array 102 after the first formation of the bumps 112.
[0066] As an example, the defect types include missed dots 113 and residual dots 114 on the surface pad array 102 .
[0067] Specifically, Figure 8 As shown, it is a schematic diagram of the cross-sectional structure of missed points 113 and residual points 114 on the surface pad array 102, wherein the missed points 113 are defined as the pad sites of the surface pad array 102 on which no bumps 112 are formed at all, and the residual points 114 are defined as the pad sites of the surface pad array 102 on which only part of the bumps 112 are printed. The missed points 113 and residual points 114 on the surface pad array 102 will affect the interconnection performance between the packaging substrate 101 and the chip. Therefore, the missed points 113 and residual points 114 on the surface pad array 102 need to be reconstructed, and the missed points 113 and residual points 114 can be identified by a laser camera, and the spatial positions of the missed points 113 and residual points 114 and the heights of the residual points 114 can be recorded.
[0068] In step S6, refer to Figure 1 and Fig. 9 , a 3D printing method is used to form a bump 112 for a second time at the location of the defect type.
[0069] Specifically, Fig. 9 As shown, according to the spatial positions of the missed points 113 and the residual points 114 in the surface pad array 102 determined in step S5, the control unit is used to start the 3D printing device again to form bumps 112 again at the positions of the missed points 113 and the residual points 114 in the surface pad array 102. In this process, by controlling the amount of metal powder entering the 3D printing nozzle 110 through the powder feeder 111, it is ensured that the height of the finally completed bumps 112 has good uniformity.
[0070] In the actual operation process, the number of missed dots 113 and residual dots 114 may be too large to be identified at one time. Therefore, step S7 is executed, i.e., steps S5 to S6 are repeated, i.e., the missed dots 113 and residual dots 114 are identified and recorded multiple times until the array of bumps 112 on the surface pad array 102 is completely formed.
[0071] Specifically, in this embodiment, after all the bumps 112 are formed, the bumps 112 formed on the surface pad array 102 are electrically connected to the pads in the first pad array 105 disposed on the surface of the silicon-based intermediate layer 104, and the distance between two adjacent pads in the first pad array 105 is the pitch of the formed bumps 112, and the pitch size of the bumps 112 on the surface pad array 102 is 40μm to 150μm, for example, it can be 40μm, 80μm, 120μm or 150μm, which is not limited here. Since the pitch of the bumps 112 formed on the surface pad array 102 is smaller, it can meet its application in advanced packaging and heterogeneous integration.
[0072] As an example, the bumps 112 on the surface pad array 102 are shaped in one or more of a sphere, a cylinder, a cone, a truncated cone, and a cuboid.
[0073] Specifically, Figure 2 As shown, one or more of square bumps 112, spherical bumps 112, cylindrical bumps 112, truncated cone bumps 112, and conical bumps 112 are formed on the surface pad array 102 by 3D printing. By manufacturing various special-shaped bumps 112, a structural basis is provided for researching and developing new bonding methods between the packaging substrate 101 and the chip.
[0074] In summary, the method for preparing a bump array on a packaging substrate of the present invention adopts a 3D printing method to replace the evaporation, template printing, ball planting and electroplating processes in the conventional process, thereby realizing the preparation of a small-size and small-pitch bump array, and more types of special-shaped bumps can be prepared using the preparation method, thereby providing a certain structural basis for researching and developing new bonding methods between chips and packaging substrates. In addition, the preparation method is carried out on a single bump basis, thereby avoiding the processing process on the entire packaging substrate basis, making it easier to repair the bump array at any time, thereby greatly improving the production efficiency of the packaging substrate. Yield rate; The 3D printing method adopted by the present invention replaces the steps of flux coating, reflow soldering and flux cleaning in the conventional process, as well as the production cycle of auxiliary materials such as dry film, screen, fixture, liquid medicine, etc., and directly uses the laser to synchronously sinter the bumps, which greatly simplifies the preparation process of the bump array, solves the problems of complex traditional process flow, many equipments and high cost, especially for the production and research and development of small batch packaging substrates with silicon-based intermediate layers, which greatly reduces the cost investment in the early stage of production and manufacturing, greatly improves the processing efficiency, shortens the research and development time and has a higher production yield rate. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.
[0075] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for preparing a bump array on a packaging substrate, characterized in that: The preparation method comprises the following steps: S1: providing a packaging substrate, wherein the packaging substrate comprises a front side and a back side which are arranged opposite to each other, and a surface pad array is arranged on the front side of the packaging substrate; S2: fixing the back side of the packaging substrate on a stage and using a first optical device to perform a first scanning identification and record the second position information of the surface pad array; S3: providing first position information of the surface pad array during initial design, and comparing the first position information with the second position information, so as to select the surface pad array on which bumps need to be formed; S4: forming bumps for the first time on the surface pad array on which a bump array needs to be formed by using a 3D printing method; S5: Scanning the surface pad array forming the bumps for a second time using a second optical device to identify defect types and record locations of the defect types; S6: forming a convex point for a second time at the position where the defect type is located by using a 3D printing method; S7: Repeat steps S5 to S6 until all the bumps on the surface pad array that need to be formed are completed.
2. The method for preparing a bump array on a packaging substrate according to claim 1, characterized in that: The first optical device is a CCD camera, and the second optical device is a laser camera.
3. The method for preparing a bump array on a packaging substrate according to claim 2, wherein: The pitch size of the bumps on the surface pad array is 40 μm to 150 μm.
4. The method for preparing a bump array on a packaging substrate according to claim 1, wherein: The step of forming bumps by the 3D printing method includes: spraying multiple layers of metal powder on the surface pad array where bumps are to be formed according to a preset route using a 3D printing nozzle, and synchronously sintering the metal powder on the surface pad array layer by layer using a laser to obtain the bumps.
5. The method for preparing a bump array on a package substrate according to claim 4, characterized in that: The synchronous sintering method includes one or more of direct metal laser sintering, electron beam melting, selective laser melting, selective thermal sintering or selective laser sintering.
6. The method for preparing a bump array on a package substrate according to claim 4, wherein: The type of the laser is one of a fiber laser or an ultraviolet laser.
7. The method for preparing a bump array on a package substrate according to claim 4, wherein: The types of the metal powder include at least one or more of copper, tin, gold, indium, nickel, and silver, and the particle size of the metal powder is 0.1 μm to 10 μm.
8. The method for preparing a bump array on a package substrate according to claim 1, wherein: The bumps on the surface pad array are in one or more shapes of sphere, cylinder, cone, truncated cone, or cuboid.
9. The method for preparing a bump array on a package substrate according to any one of claims 1 to 8, characterized in that: The carrier is provided with a heating device for heating the packaging substrate, and the operating temperature range of the heating device is 30°C to 200°C.
10. The method for preparing a bump array on a packaging substrate according to claim 9, characterized in that: The defect types include missed dots and residual dots on the surface pad array.
11. The method for preparing a bump array on a package substrate according to claim 10, characterized in that: Methods for fixing the back side of the packaging substrate on the carrier include fixing with pins, fixing with vacuum adsorption, or embedding the packaging substrate into a groove of the carrier.
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