Wafer-level thermal stress testing device and wafer

Abstract

The invention provides a wafer-level thermal stress testing device and a wafer, and relates to the technical field of semiconductor manufacturing. The wafer-level thermal stress testing device comprises at least two strain sensors which are arranged in an upper substrate or a lower substrate of a wafer so as to change an output central wavelength value according to thermal stress of the upper substrate or the lower substrate of the wafer; the at least two temperature compensation modules are arranged in the upper substrate or the lower substrate of the wafer so as to obtain the temperature value of the upper substrate or the lower substrate of the wafer; the optical fiber is used for transmitting the central wavelength values of the at least two strain sensors and the temperature values acquired by the at least two temperature compensation modules; and the upper computer system is used for determining the thermal stress of the position of each strain sensor in the at least two strain sensors in the upper substrate or the lower substrate of the wafer according to the variable quantity of the central wavelength values of the at least two strain sensors and the temperature values. The wafer level thermal stress monitoring device is high in measurement precision, few in outgoing lines and capable of achieving on-line monitoring of wafer level thermal stress.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a wafer-level thermal stress testing device and a wafer. Background Art

[0002] Materials have the characteristics of thermal expansion and contraction. When the temperature is applied, the volume changes and thermal strain is generated. When the thermal strain of the structure is constrained and cannot develop freely, thermal stress will be generated. The constraint may be imposed by the external environment or caused by the difference in linear expansion coefficients between the parts of the structure. Thermal stress exists in advanced integration processes, such as flip-chip bonding, underfill process, and thin film deposition in wafer-level packaging. Unstable device performance, low yield, and poor reliability are all directly related to thermal stress, so online monitoring of wafer-level thermal stress is crucial.

[0003] Traditional wafer-level stress measurement methods have problems such as low measurement accuracy, many lead wires, and difficulty in online monitoring. For example, the substrate curvature method based on the Stoney formula can only measure the average stress of the entire wafer, with poor accuracy and difficulty in measuring the distribution of local stress. The resistance strain gauge contains metal components, has many leads, and has limited installation space. The wafer stress measurement device composed of it is difficult to achieve embedded installation and cannot achieve real-time monitoring of the process. The mechanical method is difficult to implement in semiconductor process equipment, and the fixture is also affected by temperature, and the measurement accuracy is low. When measuring in-plane strain, the moiré interferometry method needs to engrave the corresponding diffraction grating on the surface of the structure or arrange the grating on the surface, which makes it difficult to achieve online monitoring in the process chamber.

[0004] Therefore, there is a need for a wafer-level thermal stress online testing device with high measurement accuracy, few lead wires, and the ability to achieve online monitoring. Summary of the invention

[0005] In order to solve at least one of the above problems, the present application proposes a wafer-level thermal stress testing device and a wafer.

[0006] According to the first aspect of the present application, at least one embodiment of the present application provides a wafer-level thermal stress testing device, comprising: at least two strain sensors, the at least two strain sensors are arranged in the upper substrate or the lower substrate of the wafer to change the output central wavelength value according to the thermal stress of the upper substrate or the lower substrate of the wafer; at least two temperature compensation modules, the at least two temperature compensation modules are arranged in the upper substrate or the lower substrate of the wafer to obtain the temperature value of the upper substrate or the lower substrate of the wafer; an optical fiber is used to connect the at least two strain sensors and the at least two temperature compensation modules to transmit the central wavelength values ​​of the at least two strain sensors and the temperature values ​​obtained by the at least two temperature compensation modules; a host computer system is used to demodulate the central wavelength values ​​transmitted by the at least two strain sensors and the temperature values ​​obtained by the at least two temperature compensation modules, and determine the thermal stress at the position of each of the at least two strain sensors in the upper substrate or the lower substrate of the wafer based on the change in the central wavelength values ​​of the at least two strain sensors and the temperature values.

[0007] For example, in some embodiments of the present application, the at least two strain sensors include fiber Bragg gratings.

[0008] For example, in some embodiments of the present application, each of the at least two strain sensors has a different central wavelength value.

[0009] For example, in some embodiments of the present application, the temperature compensation module includes: at least one of a fiber Bragg grating, a thermocouple and / or an NTC film.

[0010] For example, in some embodiments of the present application, the optical fiber includes: a first optical fiber, used to connect the at least two strain sensors to transmit the central wavelength values ​​of the at least two strain sensors;

[0011] The second optical fiber is used to connect the at least two temperature compensation modules to transmit the temperature values ​​obtained by the at least two temperature compensation modules.

[0012] For example, in some embodiments of the present application, the thermal stress is calculated according to the following formula:

[0013] Δλ=Δλ1-Δλ t

[0014] Δλ t = k·Δt

[0015] σ=E·Δλ

[0016] Wherein, Δλ is the final central wavelength change value, Δλ1 is the change amount of the central wavelength value of each sensor in the two strain sensors, and Δλt is the change in the central wavelength value caused by temperature change, k is the first coefficient, Δt is the temperature change value, σ is the thermal stress, and E is the Young's modulus.

[0017] According to the second aspect of the present application, at least one embodiment of the present application provides a wafer, comprising: an upper substrate; a lower substrate; a wafer-level thermal stress testing device as described in any one of the first aspects, arranged on the upper substrate or the lower substrate, for obtaining the thermal stress at different positions of the wafer.

[0018] For example, in some embodiments of the present application, the upper substrate and the lower substrate include: at least one of silicon, glass and / or a PCB board.

[0019] For example, in some embodiments of the present application, the at least two strain sensors and the at least two temperature compensation modules in the wafer-level thermal stress testing device are embedded in the wafer groove of the upper substrate or the lower substrate and fixed by adhesive materials.

[0020] For example, in some embodiments of the present application, the adhesive material includes: at least one of epoxy resin glue, silicone glue and / or ceramic glue.

[0021] Through the above exemplary embodiments, the present application provides a wafer-level thermal stress testing device and a wafer. The present application uses a fiber Bragg grating as a strain sensor, uses an optical fiber as a transmission carrier, connects multiple fiber Bragg gratings in series on the optical fiber, and pastes and buries the entire device inside a substrate. The thickness of the entire device is substantially the thickness of two substrate wafers, and has at least one of the following advantages:

[0022] 1. High measurement accuracy: The fiber Bragg grating strain sensor is small in size and light in weight, and will not affect the strain distribution on the wafer surface. The temperature compensation module can compensate for the drift of the central wavelength caused by temperature changes, and obtain the fiber Bragg grating wavelength change value caused only by strain changes, thereby more accurately measuring the thermal stress in advanced integrated processes;

[0023] 2. Automatic reconstruction of thermal stress distribution changes: This application provides an integrated automatic reconstruction host computer system, including functions such as demodulation of fiber Bragg gratings, temperature compensation, and real-time display of thermal stress distribution changes, so that the system has high real-time performance and reliability, and can automatically reconstruct thermal stress distribution changes in real time;

[0024] 3. Fewer lead wires, enabling online monitoring: Multiple gratings with different working wavelengths can be made or connected in series in one optical fiber, and the fiber grating is small in size, which can greatly reduce the number of lead wires, making online measurement of thermal stress in process engineering more convenient and reducing the difficulty of wired online monitoring; it is integrated inside the wafer in the form of groove embedding, and the device can carry out advanced integration technology and has the ability to monitor thermal stress online.

[0025] 4. High safety and little pollution to the cavity: In this device, the substrate wafer, fiber grating, etc. in the semiconductor process equipment do not contain metal components, will not have adverse effects on the cavity and other devices, and have high safety.

[0026] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] By describing in detail exemplary embodiments thereof with reference to the accompanying drawings, the above and other objects, features and advantages of the present application will become more apparent. The accompanying drawings described below are only some embodiments of the present application, and are not intended to limit the present application.

[0028] Figure 1 A schematic diagram of a wafer-level thermal stress testing device according to an exemplary embodiment is shown;

[0029] Figure 2 A schematic diagram showing a single optical fiber method deployment method of an exemplary embodiment;

[0030] Figure 3 A schematic diagram showing a multi-fiber method layout of an exemplary embodiment;

[0031] Figure 4 A schematic diagram showing a layout of strain sensors according to an exemplary embodiment;

[0032] Figure 5 Another embodiment of a schematic diagram showing an exemplary arrangement of strain sensors;

[0033] Figure 6 A wafer schematic diagram of an exemplary embodiment is shown. DETAILED DESCRIPTION

[0034] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this application will be comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.

[0035] The described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of these specific details, or other modes, components, materials, devices, etc. may be adopted. In these cases, known structures, methods, devices, implementations, materials or operations will not be shown or described in detail.

[0036] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0037] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0038] Those skilled in the art will appreciate that the drawings are merely schematic diagrams of example embodiments, and the modules or processes in the drawings are not necessarily necessary for implementing the present application, and therefore cannot be used to limit the scope of protection of the present application.

[0039] Figure 1 A schematic diagram of a wafer-level thermal stress testing device according to an exemplary embodiment is shown.

[0040] like Figure 1 As shown, the wafer-level thermal stress testing device includes: at least two strain sensors 101 (1011-101N), at least two temperature compensation modules 102 (1021-102M), at least one optical fiber 103 (1031-103Z) and a host computer system 104, wherein N and M are integers greater than or equal to 2, and Z is an integer greater than or equal to 1. The strain sensors 101 (1011-101N), the temperature compensation modules 102 (1021-102M) and the optical fibers 103 (1031-103Z) are shown in FIG. Figure 3 shown.

[0041] Among them, at least two strain sensors 1011-101N are arranged in the upper substrate 20 or the lower substrate 10 of the wafer to change the output center wavelength value according to the thermal stress of the upper substrate 20 or the lower substrate 10 of the wafer. At least two temperature compensation modules 1021-102M are arranged in the upper substrate 20 or the lower substrate 10 of the wafer to obtain the temperature value of the upper substrate 20 or the lower substrate 10 of the wafer, which is used to compensate for the drift of the center wavelength of the strain sensor caused by the temperature change, and obtain the wavelength change value of the strain sensor caused only by the strain change. The optical fiber 1031-103Z is used to connect the at least two strain sensors 1011-101N and the at least two temperature compensation modules 1021-102M to transmit the center wavelength values ​​of the at least two strain sensors 1011-101N and the temperature values ​​obtained by the at least two temperature compensation modules 1021-102M. The host computer system 104 is used to demodulate the central wavelength values ​​transmitted by at least two strain sensors 1011-101N and the temperature values ​​obtained by at least two temperature compensation modules 1021-102M, and determine the thermal stress at the location of each strain sensor in the at least two strain sensors 1011-101N in the upper substrate 20 or the lower substrate 10 of the wafer based on the change in the wavelength change value and the temperature value of the at least two strain sensors 1011-101N.

[0042] According to some embodiments, at least two strain sensors 1011 - 101N are fiber Bragg gratings, and each strain sensor has a different central wavelength value, so that the host computer system 104 determines the corresponding position of each strain sensor.

[0043] According to some embodiments, the temperature compensation modules 1021 - 102M include at least one of a fiber Bragg grating, a thermocouple and / or an NTC (Negative Temperature Coefficient) film.

[0044] According to an exemplary embodiment, a single optical fiber method may be used to connect the strain sensor and the temperature compensation module to the same optical fiber, such as Figure 2 Using a single optical fiber for temperature compensation can reduce the number of lead wires and reduce the difficulty of layout.

[0045] A multi-fiber method can also be used to connect the strain sensor and the temperature compensation module in series with different optical fibers, namely the first optical fiber and the second optical fiber. Figure 3As shown. The first optical fiber 301 is used to connect at least two strain sensors to transmit the central wavelength values ​​of at least two strain sensors. The second optical fiber 302 is used to connect at least two temperature compensation modules to transmit the temperature values ​​obtained by at least two temperature compensation modules. The temperature compensation using the multi-optical method is more accurate. Since it occupies a larger space, the reconstructed temperature field is more accurate and the compensation effect on strain is more precise.

[0046] According to the example embodiments, multiple gratings with different working wavelengths can be made or connected in series in one optical fiber, and the optical fiber grating is small in size, which can greatly reduce the number of lead wires, making the online measurement of thermal stress in process engineering more convenient and reducing the difficulty of wired online monitoring; by using the groove embedding form to integrate inside the wafer, the device can perform advanced integration processes and has the ability to monitor thermal stress online.

[0047] According to the example embodiment, the host computer system 104 obtains the central wavelength value of each strain sensor in real time, and after deducting the change caused by the temperature effect, multiplies the central wavelength value by the corresponding Young's modulus according to the position of each strain sensor on the wafer to determine the thermal stress at the corresponding position.

[0048] The host computer system 104 calculates the thermal stress according to the following formula:

[0049] Δλ=Δλ1-Δλ t

[0050] Δλ t = k·Δt

[0051] σ=E·Δλ

[0052] Among them, Δλ is the final center wavelength change value, Δλ1 is the change of the center wavelength value of each sensor in the two strain sensors, and Δλ t is the change in the central wavelength value caused by temperature change, k is the first coefficient, Δt is the temperature change value, σ is the thermal stress, and E is the Young's modulus.

[0053] According to some embodiments, the host computer system 104 may also generate two-dimensional thermal stress distribution on the wafer surface in real time.

[0054] According to some embodiments, the host computer system 104 includes a fiber Bragg grating demodulator, a computing module, and a strain field reconstructor. The fiber Bragg grating demodulator is used to demodulate the central wavelength value transmitted by at least two strain sensors and the temperature value obtained by at least two temperature compensation modules. The computing module is used to determine the thermal stress at the location of each strain sensor of at least two strain sensors in the upper substrate or lower substrate of the wafer according to the central wavelength change value and temperature value of at least two strain sensors. The strain field reconstructor is used to generate a two-dimensional thermal stress distribution on the surface of the wafer according to the calculated thermal stress at different positions.

[0055] The present application provides an integrated automatic reconstruction host computer system, including functions such as demodulation of fiber gratings, temperature compensation, and real-time display of thermal stress distribution changes, so that the system has high real-time performance and reliability, and can automatically reconstruct thermal stress distribution changes in real time.

[0056] According to some embodiments, the strain sensors may be arranged in different ways on the upper substrate or the lower substrate of the wafer. This application takes 36 strain sensors as an example, but this application is not limited thereto, and the number of wafers can be set by oneself.

[0057] like Figure 4 As shown, the arrangement method of the strain sensor uses the axial and tangential arrangement of the wafer. The strain sensors are arranged in both the axial and tangential directions of the wafer, with 16 points arranged axially and 20 points arranged tangentially, for a total of 36 points. The changes in the central wavelengths corresponding to the 36 fiber grating strain sensors can be obtained through the host computer system.

[0058] like Figure 5 As shown, the arrangement method of the strain sensor uses a wafer tic-tac-toe arrangement. The strain sensor adopts a tic-tac-toe arrangement, that is, it is arranged along the X and Y directions, with 18 points arranged in each X and Y direction, for a total of 36 points. The changes in the central wavelengths corresponding to the 36 fiber grating strain sensors can be obtained through the host computer system.

[0059] The arrangement of the strain sensors is described above as an example, but is not limited thereto.

[0060] Figure 6 A wafer schematic diagram of an exemplary embodiment is shown.

[0061] like Figure 6 As shown, the wafer includes the wafer-level thermal stress testing device as described above, an upper substrate 20 and a lower substrate 10. The strain sensor and the temperature compensation module are embedded in the upper substrate 20 and the lower substrate 10, which are not shown in the figure.

[0062] Among them, the wafer-level thermal stress testing device is arranged on the upper substrate or the lower substrate to obtain the thermal stress at different positions of the wafer. Its specific working principle is as described above, so it will not be repeated here.

[0063] According to some embodiments, the upper substrate 20 and the lower substrate 10 include at least one of silicon, glass and / or a PCB board.

[0064] According to an example embodiment, at least two strain sensors and at least two temperature compensation modules in the wafer-level thermal stress testing device are embedded in the wafer groove of the upper substrate or the lower substrate and fixed by an adhesive material. The adhesive material includes at least one of epoxy resin glue, organic silicone glue and / or ceramic glue.

[0065] According to some embodiments, the depth of the wafer groove is greater than the diameter of the optical fiber, so that the optical fiber is completely buried in the wafer groove, so that the thickness of the entire device is substantially the thickness of two wafers, which is compatible with semiconductor processes.

[0066] According to some embodiments, when the temperature compensation module is a fiber Bragg grating, the temperature compensation module is buried behind the sleeve and pasted in the wafer groove to be affected by temperature; the strain sensor is directly buried and pasted in the wafer groove as a whole to be affected by both temperature and strain.

[0067] According to some embodiments, the sheath material used in the temperature compensation module includes but is not limited to polyimide.

[0068] The present application provides a wafer-level thermal stress testing device and wafer. The present application uses a fiber Bragg grating as a strain sensor and an optical fiber as a transmission carrier. A plurality of fiber Bragg gratings are connected in series on the optical fiber, and the fiber Bragg gratings are pasted and buried in a substrate as a whole. The thickness of the overall device is substantially the thickness of two substrate wafers, and the device has high measurement accuracy. The fiber Bragg grating strain sensor is small in size and light in weight, and will not affect the strain distribution on the wafer surface. The temperature compensation module can compensate for the drift of the central wavelength caused by temperature changes, and obtain the fiber Bragg grating wavelength change value caused only by strain changes, thereby more accurately measuring the thermal stress in advanced integrated processes. Moreover, the substrate wafer, fiber Bragg grating, etc. in the device, which are in semiconductor process equipment, do not contain metal components, and will not have adverse effects on the cavity and other devices, and the device has high safety.

[0069] It should be clearly understood that the present application describes how to form and use specific examples, but the present application is not limited to any details of these examples. On the contrary, based on the teaching of the content disclosed in the present application, these principles can be applied to many other embodiments.

[0070] In addition, it should be noted that the above figures are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present application, and are not intended to be limiting. It is easy to understand that the processes shown in the above figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0071] The exemplary embodiments of the present application are specifically shown and described above. It should be understood that the present application is not limited to the detailed structures, configurations or implementations described herein; on the contrary, the present application is intended to cover various modifications and equivalent configurations included in the spirit and scope of the appended claims.

Claims

1. A wafer-level thermal stress testing device, characterized in that: include: At least two strain sensors, the at least two strain sensors are arranged in the upper substrate or the lower substrate of the wafer to change the central wavelength value of the output according to the thermal stress of the upper substrate or the lower substrate of the wafer; At least two temperature compensation modules, wherein the at least two temperature compensation modules are arranged in the upper substrate or the lower substrate of the wafer to obtain the temperature value of the upper substrate or the lower substrate of the wafer; An optical fiber, used to connect the at least two strain sensors and the at least two temperature compensation modules to transmit the central wavelength values ​​of the at least two strain sensors and the temperature values ​​obtained by the at least two temperature compensation modules; The host computer system is used to demodulate the central wavelength values ​​transmitted by the at least two strain sensors and the temperature values ​​obtained by the at least two temperature compensation modules, and determine the thermal stress at the position of each of the at least two strain sensors in the upper substrate or the lower substrate of the wafer based on the change in the central wavelength value of the at least two strain sensors and the temperature value.

2. The wafer-level thermal stress testing device according to claim 1, characterized in that: The at least two strain sensors include fiber Bragg gratings.

3. The wafer-level thermal stress testing device according to claim 1, characterized in that: Each of the at least two strain sensors has a different central wavelength value.

4. The wafer-level thermal stress testing device according to claim 1, characterized in that: The temperature compensation module comprises: At least one of a fiber Bragg grating, a thermocouple and / or an NTC film.

5. The wafer-level thermal stress testing device according to claim 1, characterized in that: The optical fiber comprises: A first optical fiber, used to connect the at least two strain sensors to transmit the central wavelength values ​​of the at least two strain sensors; The second optical fiber is used to connect the at least two temperature compensation modules to transmit the temperature values ​​obtained by the at least two temperature compensation modules.

6. The wafer-level thermal stress testing device according to claim 1, characterized in that: The thermal stress is calculated according to the following formula: Δλ=Δλ1-Δλ t Dl t =k·Δt σ=E·Δλ Wherein, Δλ is the final central wavelength change value, Δλ1 is the change amount of the central wavelength value of each sensor in the two strain sensors, and Δλ t is the change in the central wavelength value caused by temperature change, k is the first coefficient, Δt is the temperature change value, σ is the thermal stress, and E is the Young's modulus.

7. A wafer, characterized in that: include: upper base plate; lower base plate; The wafer-level thermal stress testing device as described in any one of claims 1 to 6 is arranged on the upper substrate or the lower substrate, and is used to obtain the thermal stress at different positions of the wafer.

8. The wafer according to claim 7, characterized in that The upper substrate and the lower substrate include: At least one of silicon, glass and / or PCB board.

9. The wafer according to claim 7, characterized in that The at least two strain sensors and the at least two temperature compensation modules in the wafer-level thermal stress testing device are embedded in the wafer groove of the upper substrate or the lower substrate and fixed by adhesive materials.

10. The wafer according to claim 9, wherein: The pasting material comprises: At least one of epoxy resin glue, silicone glue and / or ceramic glue.

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