Flexible circuit board

Abstract

The invention provides a flexible circuit board which comprises a flexible substrate, a chip, a first test pad setting area, a plurality of first test pads and a circuit layer, the flexible substrate is provided with an upper surface, the upper surface is provided with a working area and a non-working area, the chip is arranged in the working area, the first test pad setting area is located in the non-working area, and the plurality of first test pads are arranged on the first test pad setting area. The first test pad setting area is located between the third edge of the flexible substrate and the working area, the first test pads are arranged in the first test pad setting area, the circuit layer is connected with the chip and the first test pads, and the size of the first test pad setting area is not changed along with the size change of the flexible circuit board, so that the size of the first test pad setting area is not changed along with the size change of the flexible circuit board. And the probe cards with the same specification can be used for testing the flexible circuit boards with different sizes, so that the purpose of reducing the testing cost is achieved.

Description

Technical Field

[0001] The invention relates to a flexible circuit board, in particular to a flexible circuit board with a test pad. Background Art

[0002] Flexible circuit boards are widely used in consumer electronic products due to their flexibility and small size. However, due to their small size, the circuits on flexible circuit boards are very fine and difficult to test directly during the manufacturing process. Therefore, before the flexible circuit board is cut into the actual size of the circuit board, a test pad will be set outside the working area where the circuit board will be cut later for the probe card to contact and conduct electrical testing. The size of the test pad will be larger than the line width and will be set at the upper and lower edges of the flexible circuit board. However, since flexible circuit boards for different applications will have different sizes, and different sizes will cause the distance between the upper and lower edges of the flexible circuit board to change, flexible circuit boards of different sizes must be tested using probe cards of different specifications, resulting in an increase in the cost of flexible circuit board testing. In addition, when the distance between the upper and lower edges of a larger flexible circuit board is larger, the probe card can only test one or two flexible circuit boards at a time, which will also greatly increase the testing time. Summary of the invention

[0003] The main purpose of the present invention is to set the test pad setting area between the third edge of the flexible substrate and the working area, so that the size of the test pad setting area is no longer limited by the size of the flexible substrate, so that the probe card of the same specification can be applied to flexible substrates of different sizes.

[0004] A flexible circuit board of the present invention comprises a flexible substrate, a chip, a first test pad setting area, a plurality of first test pads and a circuit layer. The flexible substrate has an upper surface, a first edge, a second edge, a third edge and a fourth edge. The upper surface has a working area and a non-working area, the non-working area surrounds the working area, the working area has a first cutting edge and a second cutting edge, the first cutting edge and the second cutting edge are parallel to the first edge and the second edge, the third edge and the fourth edge are located between the first edge and the second edge, the chip is arranged in the working area, the chip has two long sides, an active surface and a plurality of first bumps, the long sides of the chip are parallel to the first edge and the second edge of the upper surface, the active surface faces the upper surface, the first bumps are arranged on the active surface and adjacent to one of the long sides, and the first bumps are arranged along one of the long sides, the first test pad setting area is located in the non-working area, and the first test pad setting area is located between the third edge and the working area. The first test pads are arranged in the first test pad setting area, and the first test pads are arranged along the third edge. The circuit layer is arranged on the upper surface, and the circuit layer has a plurality of first external leads, a plurality of first circuits and a plurality of first extension lines. The first external leads are adjacent to the first cutting edge and arranged along the first cutting edge. One end of each of the first circuits is connected to each of the first bumps, and the other end of each of the first circuits is connected to one end of each of the first external leads. One end of each of the first extension lines is connected to the other end of the first external leads, and the other end of each of the first extension lines is connected to each of the first test pads.

[0005] In one embodiment of the present invention, the chip further has a plurality of second bumps, the second bumps are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side, the first test pad setting area is further provided with a plurality of second test pads, and the second test pads are arranged along the third edge, the circuit layer further has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, the second external leads are adjacent to the second cutting edge and arranged along the second cutting edge, one end of each of the second circuits is connected to each of the second bumps, the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the second test pads.

[0006] In one embodiment of the present invention, it further includes a second test pad setting area, which is located in the non-working area and between the second edge and the second cutting edge of the working area. The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The second test pad setting area is provided with a plurality of third test pads, and the third test pads are arranged along the second edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, which are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the third test pads.

[0007] In one embodiment of the present invention, a plurality of the flexible circuit boards are connected to form a roll, and the first test pad arrangement area and the second test pad arrangement area of ​​two adjacent flexible circuit boards are mirror-symmetrical with respect to a connection edge between the two adjacent flexible circuit boards.

[0008] In one embodiment of the present invention, it further includes a third test pad setting area, which is located in the non-working area and between the fourth edge and the working area. The third test pad setting area is provided with a plurality of fourth test pads, and the fourth test pads are arranged along the fourth edge. The circuit layer further has a plurality of third extension lines, one end of each of the third extension lines is connected to the other end of the first external lead, and the other end of each of the third extension lines is connected to each of the fourth test pads.

[0009] In one embodiment of the present invention, the chip further has a plurality of second bumps, the second bumps are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side, the first test pad setting area is further provided with a plurality of second test pads, and the second test pads are arranged along the third edge, the circuit layer further has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, the second external leads are adjacent to the second cutting edge and arranged along the second cutting edge, one end of each of the second circuits is connected to each of the second bumps, the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the second test pads.

[0010] In one embodiment of the present invention, the third test pad setting area is further provided with a plurality of fifth test pads, and the fifth test pads are arranged along the fourth edge, and the circuit layer further has a plurality of fourth extension lines, one end of each of the fourth extension lines is connected to the other end of the second external lead, and the other end of each of the fourth extension lines is connected to each of the fifth test pads.

[0011] In one embodiment of the present invention, it further includes a second test pad setting area, which is located in the non-working area and between the second edge and the second cutting edge of the working area. The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The second test pad setting area is provided with a plurality of third test pads, and the third test pads are arranged along the second edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, which are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the third test pads.

[0012] In one embodiment of the present invention, a plurality of the flexible circuit boards are connected to each other to form a tape, and the first test pad arrangement area, the second test pad arrangement area and the third test pad arrangement area of ​​two adjacent flexible circuit boards are mirror-symmetrical with respect to the connection edge between the two adjacent flexible circuit boards.

[0013] The present invention arranges the first test pad arrangement area between the third edge and the working area so that the size of the first test pad arrangement area does not change with the change of the size of the flexible circuit board, so that the probe card of the same specification can be applied to the flexible circuit boards of different sizes, thereby reducing the test cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A top view of a flexible printed circuit board according to a first embodiment of the present invention.

[0015] Figure 2 A partial cross-sectional view of the flexible printed circuit board according to a first embodiment of the present invention.

[0016] Figure 3 A top view of a flexible printed circuit board according to a second embodiment of the present invention.

[0017] Figure 4 A top view of a flexible printed circuit board according to a third embodiment of the present invention.

[0018] Figure 5A top view of a flexible printed circuit board according to a fourth embodiment of the present invention.

[0019] Figure 6 A schematic diagram of a plurality of flexible printed circuits connected as a tape according to the second embodiment of the present invention.

[0020] Figure 7 A schematic diagram of a plurality of flexible printed circuits connected into a tape according to the fourth embodiment of the present invention.

[0021]

Explanation of symbols

[0022] 100: Flexible printed circuit board

[0023] 110: flexible substrate 111: upper surface

[0024] 112: first edge 113: second edge

[0025] 114: third edge 115: fourth edge

[0026] 120: chip 121: long side

[0027] 122: active surface 123: first bump

[0028] 124: second bump 131: first test pad

[0029] 132: second test pad 133: third test pad

[0030] 134: fourth test pad 135: fifth test pad

[0031] 140: circuit layer 141: first external lead

[0032] 142: first line 143: first extension line

[0033] 144: second external lead 145: second line

[0034] 146: second extension line 147: third extension line

[0035] 148: Fourth extension line w1: working area

[0036] w2: non-working area c1: first cutting edge

[0038] c2: second cutting edge c3: third cutting edge

[0039] c4: fourth cutting edge t1: first test pad setting area

[0040] t2: second test pad setting area t3: third test pad setting area

[0041] R: Tape ce: Connecting edge DETAILED DESCRIPTION

[0042] See also Figure 1 and Figure 2 , which is a first embodiment of the present invention, a top view and a cross-sectional view of a flexible circuit board 100, the flexible circuit board 100 includes a flexible substrate 110, a chip 120, a first test pad setting area t1, a plurality of first test pads 131, a plurality of second test pads 132 and a circuit layer 140. The flexible substrate 110 has an upper surface 111, a first edge 112, a second edge 113, a third edge 114 and a fourth edge 115. The third edge 114 and the fourth edge 115 are located between the first edge 112 and the second edge 113, and the first edge 112, the second edge 113, the third edge 114 and the fourth edge 115 surround the four sides of the upper surface 111, so as to form a plurality of test pads 131, a plurality of test pads 132 and a circuit layer 140. Figure 1 Taking the direction of the flexible printed circuit board 100 as a reference, the first edge 112 and the second edge 113 are the lower side and the upper side of the upper surface 111 respectively, and the third edge 114 and the fourth edge 115 are the left side and the right side of the upper surface 111 respectively.

[0043] The upper surface 111 has a working area w1 and a non-working area w2. The working area w1 is located in the center of the upper surface 111. The non-working area w2 surrounds the working area w1. The range surrounded by the dotted line is the working area w1, and the range surrounded by the dotted line is the non-working area w2. The working area w1 is the area of ​​the actual circuit board cut from the flexible circuit board 100. The rectangular shape of the working area w1 in this embodiment is only a schematic diagram of this embodiment, and the shape of the circuit board is not limited to this case. The working area w1 has a first cutting edge c1, a second cutting edge c2, a third cutting edge c3, and a fourth cutting edge c4. The first cutting edge c1 and the second cutting edge c2 are parallel to the first edge 112 and the second edge 113, and the third cutting edge c3 and the fourth cutting edge c4 are parallel to the third edge 114 and the fourth edge 115.

[0044] The chip 120 is disposed in the working area w1. The chip 120 has two long sides 121, an active surface 122, a plurality of first bumps 123, and a plurality of second bumps 124. The two long sides 121 of the chip 120 are parallel to the first edge 112 and the second edge 113 of the upper surface 111. The active surface 122 faces the upper surface 111 of the flexible substrate 110. The first bumps 123 are disposed on the active surface 122 and adjacent to one of the long sides 121, and the first bumps 123 are arranged along one of the long sides 121. The second bumps 124 are disposed on the active surface 122 and adjacent to the other long side 121, and the second bumps 124 are arranged along the other long side 121. In the drawings, only four of the first bumps 123 and four of the second bumps 124 are drawn, and the rest are represented by continuous black dots.

[0045] The first test pad arrangement area t1 is located in the non-operating area w2, and the first test pad arrangement area t1 is located between the third edge 114 and the operating area w1. In the present embodiment, the first test pad arrangement area t1 is rectangular, and the long side of the first test pad arrangement area t1 is parallel to the third edge 114. The first test pads 131 and the second test pads 132 are arranged in the first test pad arrangement area t1, and the first test pads 131 and the second test pads 132 are arranged along the third edge 114, wherein the first test pads 131 are closer to the first edge 112 than the second test pads 132, and the second test pads 132 are closer to the second edge 113 than the first test pads 131. Only four of the first test pads 131 and four of the second test pads 132 are depicted in the drawings, and the rest are represented by continuous black dots. In addition, the first test pads 131 and the second test pads 132 of the present embodiment are only designed in a single row. However, in other embodiments, if there is insufficient space, the first test pads 131 and the second test pads 132 may be designed in multiple rows.

[0046] The circuit layer 140 is disposed on the upper surface 111 of the flexible substrate 110, and the circuit layer 140 has a plurality of first external leads 141, a plurality of first circuits 142, a plurality of first extension lines 143, a plurality of second external leads 144, a plurality of second circuits 145, and a plurality of second extension lines 146. The first external leads 141 are located in the working area w1 and are adjacent to the first cutting edge c1, and the first external leads 141 are arranged along the first cutting edge c1. The first external leads 141 are components that are connected to circuit boards of other electronic components after the working area w1 is cut off. Only four of the first external leads 141 are drawn in the figure, and the rest are represented by continuous black dots. The first circuits 142 are located in the working area w1, and the first extension lines 143 are located in the non-working area w2. One end of each of the first circuits 142 is connected to each of the first bumps 123, and the other end of each of the first circuits 142 is connected to one end of each of the first external leads 141. One end of each of the first extension lines 143 is connected to the other end of the first external lead 141, and the other end of each of the first extension lines 143 is connected to each of the first test pads 131. Only four of the first circuits 142 and four of the first extension lines 143 are drawn in the accompanying drawings to avoid making the picture too cluttered. In fact, there is a first circuit 142 connected between each of the first bumps 123 and each of the first external leads 141, and there is a first extension line 143 connected between each of the first external leads 141 and each of the first test pads 131. In this embodiment, each of the first bumps 123 can be coupled to each of the first test pads 131 through the first circuits 142 , the first external leads 141 , and the first extension lines 143 , so as to test whether the electrical connection between the circuits and the first bumps 123 is abnormal through each of the first test pads 131 .

[0048] The second external leads 144 are located in the working area w1 and are adjacent to the second cutting edge c2, and are arranged along the second cutting edge c2. The second external leads 144 are also components that are connected to circuit boards of other electronic components after the working area w1 is cut off. Only four of the second external leads 144 are drawn in the accompanying drawings, and the rest are represented by continuous black dots. The second circuits 145 are located in the working area w1, and the second extension lines 146 are located in the non-working area w2. One end of each second circuit 145 is connected to each second bump 124, and the other end of each second circuit 145 is connected to one end of each second external lead 144. One end of each second extension line 146 is connected to the other end of the second external lead 144, and the other end of each second extension line 146 is connected to each second test pad 132. In the accompanying drawings, only four second circuits 145 and four second extension lines 146 are drawn to avoid making the picture too cluttered. In fact, there is a second circuit 145 connected between each second bump 124 and each second external lead 144, and there is a second extension line 146 connected between each second external lead 144 and each second test pad 132. Each of the second bumps 124 can be coupled to each of the second test pads 132 through the second circuits 145 , the second external leads 144 , and the second extension lines 146 , so as to test whether the electrical connections between the circuits and the second bumps 124 are abnormal through each of the second test pads 132 .

[0049] Since the first test pads 131 and the second test pads 132 of the present embodiment are centrally arranged in the first test pad arrangement area t1, when the size of the flexible substrate 110 increases, the size of the first test pad arrangement area t1 can be kept unchanged through wiring design, and the probe card of the same size can be used to test the flexible circuit board 100 of different sizes, thereby reducing the testing cost of the flexible circuit board 100.

[0050] See also Figure 3 , which is a top view of a second embodiment of the flexible circuit board 100. The difference between the second embodiment and the first embodiment is that the flexible circuit board 100 further includes a second test pad setting area t2. The second test pad setting area t2 is located in the non-working area w2, and the second test pad setting area t2 is located between the second edge 113 and the second cutting edge c2 of the working area w1. The second test pad setting area t2 is rectangular, and the long side of the second test pad setting area t2 is parallel to the second edge 113.

[0051] In the present embodiment, the second test pad arrangement area t2 is provided with a plurality of third test pads 133, and the third test pads 133 are arranged along the second edge 113, while the first test pad arrangement area t1 is only provided with the first test pads 131 but not the second test pads 132. Therefore, one end of each of the second extension lines 146 of the present embodiment is connected to the other end of the second external lead 144, and the other end of each of the second extension lines 146 is connected to each of the third test pads 133. If the circuits are too dense to allow all of the test pads to be arranged in the first test pad arrangement area t1, the third test pads 133 are arranged in the second test pad arrangement area t2, so as to test whether the electrical connections of the second external leads 144, the second circuits 145 and the second bumps 124 are abnormal through the third test pads 133 and the second extension lines 146. Preferably, since the first test pad setting area t1 is only provided with the first test pads 131, the first test pad setting area t1 can be set in the upper half of the upper surface 111 adjacent to the second test pad setting area t2, so that the probe card can simultaneously test the first test pads 131 in the first test pad setting area t1 and the third test pads 133 in the second test pad setting area t2.

[0053] See also Figure 4 , which is a top view of a third embodiment of the flexible circuit board 100. The difference between the third embodiment and the first embodiment is that the flexible circuit board 100 further includes a third test pad setting area t3. The third test pad setting area t3 is located in the non-working area w2, and the third test pad setting area t3 is located between the fourth edge 115 and the working area w1. The third test pad setting area t3 is rectangular, and the long side of the third test pad setting area t3 is parallel to the fourth edge 115.

[0054] In this embodiment, the first test pad arrangement area t1 is also provided with the first test pads 131 and the second test pads 132 , and are coupled to the first external leads 141 and the second external leads 144 through the first extension lines 143 and the second extension lines 146 , respectively.

[0055] A plurality of fourth test pads 134 and a plurality of fifth test pads 135 are arranged in the third test pad setting area t3, and the fourth test pads 134 and the fifth test pads 135 are arranged along the fourth edge 115. The circuit layer 140 also has a plurality of third extension lines 147 and a plurality of fourth extension lines 148, one end of each of the third extension lines 147 is connected to the other end of the first external lead 141, the other end of each of the third extension lines 147 is connected to the fourth test pad 134, one end of each of the fourth extension lines 148 is connected to the other end of the second external lead 144, and the other end of each of the fourth extension lines 148 is connected to the fifth test pad 135.

[0056] In this embodiment, the test pads of the first bumps 123, the first circuits 142 and the first external leads 141 of the chip 120 are separately arranged in the first test pad arrangement area t1 and the third test pad arrangement area t3, and the test pads of the second bumps 124, the second circuits 145 and the second external leads 144 are respectively arranged in the first test pad arrangement area t1 and the third test pad arrangement area t3, so as to solve the problem that a single test pad arrangement area cannot accommodate all the test pads. In addition, since the first test pad arrangement area t1 and the third test pad arrangement area t3 are located on the left and right sides of the working area w1, the sizes of the first test pad arrangement area t1 and the third test pad arrangement area t3 do not change with the size of the flexible printed circuit board 100 through wiring design, so that the flexible printed circuit board 100 of different sizes can be tested by a probe card of the same specification.

[0058] See also Figure 5 , which is a top view of a fourth embodiment of the flexible circuit board 100. The difference between the fourth embodiment and the third embodiment is that the flexible circuit board 100 further includes a second test pad setting area t2, the second test pad setting area t2 is located in the non-working area w2, and the second test pad setting area t2 is located between the second edge 113 and the second cutting edge c2 of the working area w1. The second test pad setting area t2 is provided with a plurality of third test pads 133, and the third test pads 133 are arranged along the second edge 113. One end of each of the second extension lines 146 of the circuit layer 140 is connected to the other end of the second external lead 144, and the other end of each of the second extension lines 146 is connected to each of the third test pads 133. Since the second test pad setting area t2 is provided with the third test pads 133, the first test pad setting area t1 is only provided with the first test pads 131, and the third test pad setting area t3 is only provided with the fourth test pads 134. The first test pad setting area t1 and the third test pad setting area t3 can be set in the upper half of the upper surface 111 adjacent to the second test pad setting area t2, so that the probe card can simultaneously test the first test pads 131 in the first test pad setting area t1, the third test pads 133 in the second test pad setting area t2, and the fourth test pads 134 in the third test pad setting area t3.

[0059] See also Figure 6, which is a schematic diagram of a plurality of flexible printed circuit boards 100 connected to each other as a roll R according to the second embodiment of the present invention, wherein a connection edge ce is provided between two adjacent flexible printed circuit boards 100, and the first test pad setting area t1 and the second test pad setting area t2 of the two adjacent flexible printed circuit boards 100 are mirror-symmetrical with respect to the connection edge ce. Since the test pads of the second embodiment are all concentrated on half of the upper surface 111 of the flexible substrate 110, a single probe card can be used to simultaneously test the test pads on the two flexible printed circuit boards 100 to speed up the test process, thereby improving the overall process efficiency.

[0060] See also Figure 7 , which is a schematic diagram of a fourth embodiment of the present invention in which a plurality of flexible printed circuit boards 100 are connected to each other to form a roll R, wherein a connection edge ce is provided between two adjacent flexible printed circuit boards 100, and the first test pad setting area t1 and the second test pad setting area t2 of the two adjacent flexible printed circuit boards 100 are mirror-symmetrical with respect to the connection edge ce. Since the test pads of the fourth embodiment are all concentrated on half of the upper surface 111 of the flexible substrate 110, a single probe card can be used to simultaneously test the test pads on the two flexible printed circuit boards 100 to speed up the test process, thereby improving the overall process efficiency.

[0061] The present invention disposes the first test pad disposition area t1 between the third edge 114 and the working area w1 so that the size of the first test pad disposition area t1 does not change with the change of the size of the flexible circuit board 100, so that the probe card of the same specification can be applicable to the flexible circuit board 100 of different sizes, thereby reducing the test cost.

[0063] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with the profession can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A flexible circuit board, characterized in that: It contains: A flexible substrate, comprising an upper surface, a first edge, a second edge, a third edge and a fourth edge, wherein the upper surface comprises a working area and a non-working area, wherein the non-working area surrounds the working area, wherein the working area comprises a first cutting edge and a second cutting edge, wherein the first cutting edge and the second cutting edge are parallel to the first edge and the second edge, and wherein the third edge and the fourth edge are located between the first edge and the second edge; A chip is disposed in the working area, the chip having two long sides, an active surface and a plurality of first bumps, the long sides of the chip are parallel to the first edge and the second edge of the upper surface, the active surface faces the upper surface, the first bumps are disposed on the active surface and adjacent to the long side therein, and the first bumps are arranged along the long side therein; A first test pad arrangement area is located in the non-working area, and the first test pad arrangement area is located between the third edge and the working area; A plurality of first test pads are disposed in the first test pad arrangement area, and the first test pads are arranged along the third edge; and A circuit layer is arranged on the upper surface, and the circuit layer has a plurality of first external leads, a plurality of first circuits and a plurality of first extension lines. The first external leads are adjacent to the first cutting edge and arranged along the first cutting edge. One end of each of the first circuits is connected to each of the first bumps, and the other end of each of the first circuits is connected to one end of each of the first external leads. One end of each of the first extension lines is connected to the other end of the first external leads, and the other end of each of the first extension lines is connected to each of the first test pads.

2. The flexible printed circuit board according to claim 1, wherein: The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The first test pad setting area is also provided with a plurality of second test pads, and the second test pads are arranged along the third edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, and the second external leads are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the second test pads.

3. The flexible printed circuit board according to claim 1, wherein: It also includes a second test pad setting area, which is located in the non-working area and between the second edge and the second cutting edge of the working area. The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The second test pad setting area is provided with a plurality of third test pads, and the third test pads are arranged along the second edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, which are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the third test pads.

4. The flexible printed circuit board according to claim 3, wherein: A plurality of the flexible circuit boards are connected to form a roll, and the first test pad arrangement area and the second test pad arrangement area of ​​two adjacent flexible circuit boards are mirror-symmetrical based on a connection edge between the two adjacent flexible circuit boards.

5. The flexible printed circuit board according to claim 1, wherein: It also includes a third test pad setting area, which is located in the non-working area and between the fourth edge and the working area. The third test pad setting area is provided with a plurality of fourth test pads, and the fourth test pads are arranged along the fourth edge. The circuit layer also has a plurality of third extension lines, one end of each of the third extension lines is connected to the other end of the first external lead, and the other end of each of the third extension lines is connected to each of the fourth test pads.

6. The flexible printed circuit board according to claim 5, wherein: The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The first test pad setting area is also provided with a plurality of second test pads, and the second test pads are arranged along the third edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, and the second external leads are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the second test pads.

7. The flexible printed circuit board according to claim 6, wherein: The third test pad setting area is further provided with a plurality of fifth test pads, and the fifth test pads are arranged along the fourth edge. The circuit layer further has a plurality of fourth extension lines, one end of each of the fourth extension lines is connected to the other end of the second external lead, and the other end of each of the fourth extension lines is connected to each of the fifth test pads.

8. The flexible printed circuit board according to claim 5, wherein: It also includes a second test pad setting area, which is located in the non-working area and between the second edge and the second cutting edge of the working area. The chip also has a plurality of second bumps, which are arranged on the active surface and adjacent to the other long side, and the second bumps are arranged along the other long side. The second test pad setting area is provided with a plurality of third test pads, and the third test pads are arranged along the second edge. The circuit layer also has a plurality of second external leads, a plurality of second circuits and a plurality of second extension lines, which are adjacent to the second cutting edge and arranged along the second cutting edge. One end of each of the second circuits is connected to each of the second bumps, and the other end of each of the second circuits is connected to one end of each of the second external leads, one end of each of the second extension lines is connected to the other end of the second external lead, and the other end of each of the second extension lines is connected to each of the third test pads.

9. The flexible printed circuit board according to claim 8, wherein: A plurality of flexible circuit boards are connected to form a roll, and the first test pad setting area, the second test pad setting area and the third test pad setting area of ​​two adjacent flexible circuit boards are mirror-symmetrical based on the connection edge between the two adjacent flexible circuit boards.

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