Quantum bit packaging device

Abstract

The invention relates to a quantum bit packaging device. The quantum bit packaging device comprises a shell, a substrate, a PCB (Printed Circuit Board) and a connector group, the shell is of a hollow structure and is made of an oxygen-free copper material; the substrate is transversely arranged in the shell, the substrate is of a straight-plate-shaped structure, a preassembling opening is formed in the substrate, and the preassembling opening is suitable for placing a chip; the PCB is transversely arranged in the shell, the PCB is located on the substrate, and the PCB abuts against the substrate; the connector group is arranged on the PCB, the connector is provided with a plurality of connectors, and the plurality of connectors and the PCB are longitudinally inserted. The quantum bit packaging device provided by the invention is high in integration level and easy to carry and deploy. Specifically, the PCB is tightly abutted against the substrate, and the chip is mounted between the substrate and the PCB, so that the overall integration level is high, the electrical connection stability between the components is further improved, and the later maintenance and upgrading work is greatly facilitated.

Description

Technical Field

[0001] The present application relates to the field of quantum bit packaging technology, and in particular to a quantum bit packaging device. Background Art

[0002] With the rapid advancement of the artificial intelligence industry, the demand for computing power in all walks of life has increased dramatically, and a new computing paradigm that can cope with the challenges of massive data processing is urgently needed. Quantum computing, with its unique properties such as parallelism, superposition and entanglement, is regarded as one of the key technical paths to solve the future demand for massive data processing. In this field, quantum chips, as the core components of quantum computing, play a vital role in solving the problem of massive data processing.

[0003] The computing power of a quantum computer is closely related to the number of quantum bits it contains. Currently, the chip-based quantum computers widely manufactured on the market rely on multiple wires to control each quantum bit. During operation, these quantum bits perform computing functions through a series of complex operations, such as reducing and controlling quantum entanglement relationships and operating on the bits themselves.

[0004] The key to achieving semiconductor quantum computing is to build a stable and controllable quantum bit system. In this system, quantum bit packaging technology plays a vital role. It supports the establishment of a stable and reliable connection between quantum chips and external measurement links and measurement and control equipment. In order to achieve efficient and reliable quantum computing, quantum bit packaging technology must develop in the direction of integration.

[0005] Integrated packaging can not only make quantum bits more compact and reduce the complexity of the entire system, but also significantly improve the stability and scalability of quantum computers. Through integrated design, quantum bit packaging maintains high performance while also having the advantages of being easy to carry and deploy, laying a solid foundation for the promotion of large-scale quantum computing applications.

[0006] To sum up, the integration of quantum bit packaging technology is the key to improving quantum computing capabilities and promoting the development of the quantum computing industry. Summary of the invention

[0007] In view of this, the present application proposes a quantum bit packaging device to solve the above problems.

[0008] According to one aspect of the present application, a quantum bit packaging device is provided, comprising: a substrate, a PCB board, a connector group and a first cover plate; The substrate is arranged horizontally, the substrate is a straight plate structure, and the substrate is provided with a pre-installation port, and the pre-installation port is suitable for placing a chip; The PCB board is arranged horizontally on the base plate, and the PCB board abuts against the upper end surface of the base plate; The connector group is arranged on the PCB board, the connector comprises a plurality of connectors, and the plurality of connectors and the PCB board are longitudinally inserted; The first cover plate is located under the substrate, the first cover plate matches the size of the pre-installation port, and the first cover plate is correspondingly arranged below the pre-installation port to encapsulate the chip.

[0009] In a possible implementation manner, the first cover plate is provided with a groove, and the groove is suitable for gold wire bonding of the chip.

[0010] In a possible implementation, it also includes: a second cover plate, a square opening is opened in the middle of the PCB board, and the cross-sectional area of ​​the square opening is smaller than the cross-sectional area of ​​the pre-installation port; the cross-sectional area of ​​the second cover plate is larger than the cross-sectional area of ​​the square opening, and the first cover plate and the second cover plate are arranged from bottom to top to encapsulate the substrate, the chip and the PCB board.

[0011] In a possible implementation, it also includes: a third cover plate, the third cover plate is located below the substrate, and the third cover plate and the connector group are arranged correspondingly; there are multiple connector groups, and the multiple connector groups are arranged on the PCB board in pairs and in parallel, and the lower end of the connector group is abutted against the third cover plate.

[0012] In a possible implementation, the number of the connector groups is four, the four connector groups are arranged around the square opening, the connector groups are arranged on the PCB board in pairs relatively parallel, and there is a set distance between any two adjacent connector groups.

[0013] In a possible implementation, it also includes: an infrared filter group; the infrared filter group is located on the connector group, the infrared filter group has a plurality of infrared filters, one end of the infrared filter is electrically connected to the connector, and the other end extends upward to the upper panel surface of the shell.

[0014] In a possible implementation manner, the preset position of the infrared filter group is set corresponding to the preset position of the connector group.

[0015] In a possible implementation, the method further includes: a fourth cover plate, wherein the fourth cover plate is disposed on the infrared filter, and the fourth cover plate is disposed corresponding to the infrared filter, and the fourth cover plate and the top end of the infrared filter are in contact with each other.

[0016] In a possible implementation, it also includes: a shell, the material of the shell is oxygen-free copper, and the shell is a hollow structure; and the first cover plate, the substrate, the PCB board, the connector group, the infrared filter and the fourth cover plate are installed in the shell from top to bottom.

[0017] In a possible implementation manner, the first cover plate and the second cover plate are both made of Permalloy.

[0018] Beneficial effects of this application: The quantum bit packaging device proposed in this application has high integration and is easy to carry and deploy. Specifically, the PCB board in this application is closely abutted against the substrate, and a chip is installed between the substrate and the PCB board, so that the overall integration is high, and the electrical connection stability between the components is further improved, which greatly facilitates the later maintenance and upgrading work, and solves the shortcomings of the traditional packaging device in terms of integration, connection stability and assembly maintenance efficiency. In addition, the housing, substrate, PCB board and connector group are all arranged in the housing in this application, which further ensures that the overall integration of the quantum bit packaging device is high, while protecting the components inside the housing, and making the overall appearance structure of the quantum bit packaging device more harmonious. Further, the quantum bit packaging device provided by the present invention can be decomposed into specific modules, so that the individual components become smaller and the appropriate process can be selected to improve the process yield, get rid of the limitations of the manufacturing process, and reduce costs. The infrared filter assembled inside can effectively absorb the infrared waves mixed in the quantum bit transmission, improve the stability and controllability of the quantum bit transmission, improve the computing power of the quantum computer, and simplify the system design.

[0019] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present application and, together with the description, serve to explain the principles of the present application.

[0021] Figure 1 An exploded diagram showing a quantum bit packaging device according to an embodiment of the present application; Figure 2 A schematic diagram showing the structure of a substrate in an embodiment of the present application; Figure 3 A schematic diagram showing the structure of a quantum bit packaging device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0022] Various exemplary embodiments, features and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0023] Among them, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application or simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0024] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0025] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0026] In addition, in order to better illustrate the present application, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present application can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present application.

[0027] like Figure 1-Figure 3 As shown, the quantum bit packaging device includes: a substrate 2, a PCB board 5 and a connector group; the shell is a hollow structure; the substrate 2 is horizontally arranged inside the shell, the substrate 2 is a straight plate structure, the substrate 2 is provided with a pre-installation port, and the pre-installation port is suitable for placing the chip; the PCB board 5 is horizontally arranged inside the shell, and the PCB board 5 is located on the substrate 2, and the PCB board 5 is abutted against the substrate 2; the connector group is arranged on the PCB board 5, the connector 12 has a plurality of connectors 12, and the plurality of connectors 12 and the PCB board 5 are longitudinally inserted.

[0028] The quantum bit packaging device proposed in this embodiment optimizes the packaging structure, so that the overall device has a higher degree of integration and improves the environmental stability of the quantum bit packaging. The PCB board 5 in this application is closely abutted against the substrate 2, and a chip is installed between the substrate 2 and the PCB board 5, so that the overall integration is high, and the electrical connection stability between the components is further improved, which greatly facilitates the later maintenance and upgrading work, and solves the shortcomings of the traditional packaging device in terms of integration, connection stability and assembly maintenance efficiency. In addition, the shell of oxygen-free copper material is used in this application. Due to its good thermal conductivity and electromagnetic shielding performance, it can effectively reduce the interference of the external environment on the quantum bit (especially the superconducting quantum bit), and improve the stability and operation accuracy of the quantum bit. The substrate 2 is designed as a straight plate structure with a pre-installed port, which makes the placement and preliminary positioning of the chip easier, reduces the difficulty of operation during the packaging process, and improves the packaging efficiency. Further, the PCB board 5 is abutted against the substrate 2, ensuring the stability and reliability of the circuit connection. At the same time, the connector group is connected to the PCB board 5 by longitudinal insertion, which further enhances the stability and anti-interference ability of signal transmission.

[0029] It should also be noted that the hollow structure of the shell not only enhances the heat dissipation effect, but also provides sufficient accommodation and fixing space for internal components. In addition, the internal components of the device are reasonably arranged, the lateral arrangement of the substrate 2 and the PCB board 5 and their close contact ensure the stability and reliability of the electrical connection, and the longitudinal insertion of the connector group greatly simplifies the access and removal operations, which is convenient for later maintenance and upgrades. The pre-installed port design on the substrate 2 further reduces the difficulty and cost of chip assembly and improves assembly efficiency. In summary, the device effectively solves the heat dissipation problems, unstable component integration, and complex assembly and maintenance in the process of quantum bit chip packaging, provides a solid guarantee for the high-performance operation of quantum bits, and demonstrates extremely high integration, reliability and convenience.

[0030] It should be noted that the substrate 2 is a square plate structure, and the four corners of the substrate 2 are rounded. It should also be noted that the substrate 2 is provided with four rectangular holes and a central square hole 205, and the four rectangular holes are provided close to the four sides of the substrate 2, and the distances from the four rectangular holes to the corresponding sides of the substrate 2 are equal. The central square hole 205 is located in the middle of the substrate 2 and is provided concentrically with the center of the substrate 2. Figure 2As shown, the upper and lower parts of the figure are the front and rear directions described below, and the left and right parts are the left and right directions described below. It should also be noted that the first rectangular hole 201 is located on the rear side of the substrate 2, the second rectangular hole 202 is located on the right side of the substrate 2, the third rectangular hole 203 is located on the front side of the substrate 2, the fourth rectangular hole 204 is located on the left side of the substrate 2, and the central square hole 205 for placing the quantum chip. The size of the square holes 201-204 is preferably the same as the size of the connecting plate 6. And the size of the central square hole 205 is set to match the size of the quantum chip.

[0031] Furthermore, the bottoms of the first rectangular hole 201, the second rectangular hole 202, the third rectangular hole 203 and the fourth rectangular hole 204 are all encapsulated by a third cover plate 7, and the size of the third cover plate 7 is slightly larger than the size of the first rectangular hole 201, the second rectangular hole 202, the third rectangular hole 203 and the fourth rectangular hole 204. The third cover plate 7 has protruding arc parts on both sides, and a threaded hole is provided in the middle of the protruding arc. The cover plate 7 is fixed to the substrate 2 by screws.

[0032] The center square hole 205 is encapsulated by the first cover plate 8, which is provided with a groove for gold wire bonding of the chip. The PCB board 5 is placed on the substrate 2, and a connector 12 is vertically arranged on the PCB board 5. One end of the infrared filter 6 is connected to the connector 12. The second cover plate 9 is encapsulated above the chip and is fixed to the PCB board by screws.

[0033] In one specific embodiment, it also includes: a first cover plate 8, the first cover plate 8 is located between the substrate and the bottom plate surface of the shell, the first cover plate 8 matches the size of the pre-installation port, and the first cover plate 8 is arranged below the pre-installation port to encapsulate the chip.

[0034] Furthermore, in one of the specific embodiments, the first cover plate 8 is provided with a groove, and the groove is suitable for gold wire bonding of the chip.

[0035] In one specific embodiment, it also includes: a second cover plate 9, a square opening is opened in the middle of the PCB board 5, and the cross-sectional area of ​​the square opening is smaller than the cross-sectional area of ​​the pre-installation port; the cross-sectional area of ​​the second cover plate 9 is larger than the cross-sectional area of ​​the square opening, and the first cover plate 8 and the second cover plate 9 cover the packaging substrate, chip and PCB board from bottom to top.

[0036] In one of the specific embodiments, it also includes: a third cover plate 7, the third cover plate 7 is located between the shell and the base plate 2, and the third cover plate 7 and the connector group 12 are correspondingly arranged; the number of the connector groups 12 is multiple, and the multiple connector groups 12 are arranged in pairs and in parallel on the PCB board 5, and the lower end of the connector group 12 is abutted against the shell through the third cover plate 7.

[0037] In one specific embodiment, the number of connector groups 12 is four, and the four connector groups 12 are arranged around the square opening. The connector groups 12 are arranged on the PCB board in pairs and in parallel with each other, and there is a set distance between any two adjacent connector groups 12. In this embodiment, it should be noted that the connector group 12 includes a plurality of connectors, and the plurality of connectors are arranged longitudinally on the PCB board 5 in a rectangular array. That is, the plurality of connectors in any one of the connector groups 12 are arranged at intervals. Further, the connectors in any two adjacent columns of the connector group 12 are arranged in parallel with each other, and the connectors in any two adjacent rows of the connector group 12 are arranged in parallel with each other. Further, the plurality of connectors in any one of the connector groups 12 are arranged in a rectangular array; the distance between two adjacent connectors in any one of the connector groups 12 is equal.

[0038] In one specific embodiment, it also includes: an infrared filter group; the infrared filter group is located on the connector group 12, and the infrared filter group has multiple infrared filters, one end of the infrared filter is electrically connected to the connector, and the other end extends upward to the upper surface of the shell. The setting of the infrared filter can effectively filter out unnecessary infrared radiation and protect the quantum bit from interference from environmental factors such as thermal noise, thereby improving the overall performance and reliability of the quantum bit. The size and number of the infrared filter are set according to the size and number of the connector.

[0039] In one specific embodiment, the preset position of the infrared filter group is set corresponding to the preset position of the connector group 12. In this embodiment, it should be noted that the multiple connectors in any one connector group 12 and the multiple infrared filters in the infrared filter group at the corresponding position are electrically connected and arranged one by one. There are multiple infrared filter groups, and the peripheries of the multiple infrared filter groups are flush with the peripheries of the corresponding PCB boards.

[0040] In one of the specific embodiments, it also includes: a fourth cover plate 10, the fourth cover plate 10 is arranged between the upper plate surface of the shell and the infrared filter, and the fourth cover plate 10 is arranged corresponding to the infrared filter, and the fourth cover plate 10 and the top of the infrared filter are in contact. In this embodiment, it should be noted that the first cover plate 8 and the second cover plate 9 are preferably square plate structures, and the front projection of the second cover plate 9 covers the front projection of the first cover plate 8. The number of the third cover plate 7 and the fourth cover plate 10 matches the number of the connector group. The number of the third cover plates 7 is four, the number of the fourth cover plates 10 is four, and the setting positions of the third cover plates 7 and the fourth cover plates 10 correspond. The shape of the third cover plate 7 and the fourth cover plate 10 is a rectangular plate structure. And the long side wall of the third cover plate 7 away from the first cover plate 8 is symmetrically provided with two circular protrusions. The short side walls on both sides of the fourth cover plate 10 are provided with mounting ears, and the mounting ears are provided with threaded holes.

[0041] In one specific embodiment, the shell is made of oxygen-free copper; the first cover plate 8 and the second cover plate 9 are both made of Permalloy. In this embodiment, it should be noted that the shell made of oxygen-free copper not only ensures the stability of the structure, but also effectively conducts internal heat with its excellent thermal conductivity, greatly improving the working temperature stability of the quantum bit chip, which is crucial to maintaining the high precision and long-term stable operation of the chip.

[0042] In one specific embodiment, the shell of the present application is a quantum bit packaging barrel, and the quantum bit packaging barrel includes: a lower barrel body 1, a barrel body 3, an upper barrel body 4, and a second cover plate 9; the lower barrel body 1 is a hollow structure, the lower barrel body 1 has a first preset height, and a quantum chip assembly is arranged in the lower barrel body 1; it should be noted that the quantum chip assembly is the quantum bit packaging device of the present application. The barrel body 3 is arranged on the lower barrel body 1, and the barrel body 3 and the lower barrel body 1 are detachably connected; the upper barrel body 4 is a hollow structure, and the upper barrel body 4 has a second preset height, and the upper barrel body 4 is arranged on the upper part of the barrel body 3, and the upper barrel body 4 and the barrel body 3 are detachably connected; the upper barrel body 4 is provided with an installation port, and the installation port matches the area surrounded by the four connector groups, and the installation port matches the second cover plate 9, and the second cover plate covers the chip.

[0043] It should also be noted that it also includes: a connecting plate 11, the connecting plate 11 matches the second cover plate 9, the second cover plate 9 is provided with threaded holes about the symmetry line, the connecting plate 11 is provided with threaded holes arranged in a rectangular pattern, and the connecting plate 11 and the second cover plate 9 can be screwed and fixed. The connecting plate 11 is an inverted trapezoidal plate structure, that is, the upper cross-section of the connecting plate 11 covers the outer periphery of the lower cross-section of the connecting plate 11. Furthermore, the connecting plate 11 is coaxially arranged with the second cover plate 9. It should be further noted that the distance from the first rectangular hole on the base plate to the pre-installed port on the base plate is greater than the preset distance from the pre-installed hole on the upper barrel body to the installation port on the base plate.

[0044] The hollow structure design inside the lower barrel 1 not only provides sufficient placement space for the quantum chip components, but also ensures the stability and safety of the chip during the packaging process. It reduces the impact of the external environment on the quantum chip and can effectively prevent the chip from being damaged by vibration during transportation or use.

[0045] The detachable connection between the barrel body 3 and the lower barrel body 1 greatly facilitates the assembly and maintenance of the packaging barrel, and also makes the entire packaging process more flexible and efficient. It allows the user to easily disassemble or reassemble the packaging barrel as needed, thereby meeting the use requirements in different scenarios.

[0046] The upper barrel 4 serves as the top protective layer of the packaging barrel, and the mounting port on it matches the quantum chip assembly, ensuring the stability of the chip during the packaging process. At the same time, with the use of the second cover plate 9, the upper barrel 4 can also effectively prevent the influence of external interference on the quantum chip, further improving the protection performance of the packaging barrel.

[0047] The upper barrel 4 is also provided with pre-installed holes, the number of which is two or more, which are arranged at least on one side of the mounting opening, and the number of the pre-installed holes matches that of the fourth cover plate 10. In this embodiment, it should be noted that the number of the pre-installed holes is four, which are arranged around the mounting opening, and there is a first setting distance between the pre-installed holes and the mounting opening.

[0048] Furthermore, the upper barrel body 4 is a cylindrical structure, the outer diameter of the outer wall of the upper barrel body 4 is larger than the outer diameter of the inner wall of the upper barrel body 4, the outer diameter of the outer wall of the upper barrel body 4 is set to the same size as the outer diameter of the outer wall of the lower barrel body 1, the outer diameter of the inner wall of the upper barrel body 4 is set to the same size as the outer diameter of the inner wall of the lower barrel body 1, and the thickness of the outer wall of the upper barrel body 4 protruding from the inner wall of the upper barrel body 4 matches the wall thickness of the barrel body 3.

[0049] The upper barrel 4 is provided with a pre-installed square hole for placing the fourth cover plate 10. The fourth cover plate 10 is in a rectangular structure, and the short side of the connecting plate is symmetrically provided with mounting ears. The number of mounting ears is four, and the four mounting ears are symmetrically arranged on the connecting plate. The upper barrel 4 is used to place the mounting opening of the central cover plate 11, and the mounting opening is square, preferably rectangular.

[0050] The mounting opening of the upper barrel body 4 is placed at the center of the upper barrel body 4, the fourth cover plate 10 is provided with a connecting hole for fixing the connector, the mounting ears on the two short sides of the fourth cover plate 10 are provided with threaded holes, the upper barrel body 4 is provided with a threaded hole coaxially corresponding to the fourth cover plate 10, and the fourth cover plate 10 is fixedly connected to the base plate 2 by screws.

[0051] It should be further explained that it also includes: a connecting plate 11, which is arranged above the second cover plate 9, and the connecting plate 11 encapsulates the installation port, and the connecting plate 11 is preferably designed in a trapezoidal structure, the upper dimension of the connecting plate 11 is larger than the lower dimension of the cover plate 11, and the connecting plate 11 is provided with a threaded hole. The upper barrel 4 is provided with a threaded hole coaxially corresponding to the connecting plate 11 at a corresponding position, and the upper barrel 4 is fixedly connected to the connecting plate 11 by screws.

[0052] In one specific embodiment, the lower barrel 1 is provided with a pre-installed groove, and the pre-installed groove matches the size of the quantum chip assembly.

[0053] Furthermore, in one of the specific embodiments, the lower barrel body 1 is also provided with a placement groove, the placement groove corresponds to the setting position of the installation port, the chip is located on the placement groove, and the placement groove is pressed and fixed by installing a straight plate. It should also be noted that the cross-sectional area of ​​the placement groove is smaller than the cross-sectional area of ​​the installation port, and the placement groove and the installation port are arranged concentrically. Preferably, the center of the placement groove, the center of the installation port and the central axis of the barrel body 3 are on the same straight line.

[0054] Furthermore, in one of the specific embodiments, the pre-installed groove is a square groove, and the side walls of the pre-installed groove are provided with an extension, the front projection of the extension is a square structure, and the extension is flush with the bottom of the pre-installed groove, and the depth of the extension is equal to the depth of the pre-installed groove. That is, the pre-installed groove is arranged in a "cross" shape, the placement groove is arranged at the intersection of the "cross", and the placement groove is arranged concentrically with the pre-installed groove. It should be noted that the pre-installed groove accommodates the lower cover plate in the quantum chip assembly and the side wall protrusion of the lower cover plate. It should also be noted that the periphery of the extension is provided with a groove, and the groove is semicircular and matches the side wall protrusion of the lower cover plate.

[0055] In one specific embodiment, the upper barrel body 4, the lower barrel body 1 and the barrel body 3 are all cylindrical structures; the upper barrel body 4 and the barrel body 3 are screwed and fixed, and the lower barrel body 1 and the barrel body 3 are screwed and fixed.

[0056] It should be noted that, in one of the specific embodiments, the installation opening is arranged in the middle of the upper barrel body 4 , and the center of the installation opening is on the same straight line as the central axis of the barrel body 3 .

[0057] The lower barrel body 1 is a cylindrical structure, the outer diameter of the outer wall of the lower barrel body 1 is larger than the outer diameter of the inner wall of the lower barrel body 1 , and the thickness of the outer wall of the lower barrel body 1 protruding from the inner wall of the lower barrel body 1 matches the wall thickness of the barrel body 3 .

[0058] It should also be noted that, in one specific embodiment, the inner diameters of the upper barrel 4, the barrel body 3 and the lower barrel 1 are the same, and the outer diameters of the upper barrel 4, the barrel body 3 and the lower barrel 1 are the same. It should be further noted that the quantum bit packaging device formed by the upper barrel 4, the lower barrel 1 and the barrel body 3 is an oblate cylindrical structure.

[0059] In one of the specific embodiments, the upper barrel 4, the lower barrel 1 and the barrel body 3 are all made of oxygen-free copper. In this embodiment, it should be noted that the inner wall of the barrel body 3 is coated with an infrared glue coating. By coating the infrared glue coating on the inner wall of the packaging shell, the infrared glue coating can form a thermal barrier to reduce the transfer of heat to the outside of the package, thereby keeping the quantum chip at a lower operating temperature. It should be further noted that the upper barrel 4, the lower barrel 1 and the barrel body 3 are all made of oxygen-free copper. The lower barrel 1, the packaging cover plate, the connecting plate, and the barrel body 3 constitute the outermost structure of a large-scale scalable quantum bit packaging device. The oxygen-free copper material used in the present invention enables the quantum packaging design to maintain good performance in an ultra-low temperature environment. This device can be decomposed into specific modules, making individual components smaller and selecting appropriate processes to improve process yield, get rid of the limitations of the manufacturing process, reduce costs, and can be reused in different products. It has high flexibility and improves the scalability of the package.

[0060] In summary, in a specific embodiment, a large-scale scalable quantum bit packaging device is characterized by comprising: a lower barrel 1, a substrate 2, a PCB board 5, an upper barrel 4, a barrel body 3, an infrared filter group, and a connector group 12. The lower barrel 1 is placed below the substrate 2 equipped with the packaging structure.

[0061] The substrate 2 is provided with a square hole for placing the connector and the quantum chip. Furthermore, a first cover plate 8 for encapsulating the square hole is provided under the square hole of the substrate 2, and the first cover plate 8 is used to encapsulate the connector and the chip.

[0062] The PCB board 5 is placed on the substrate 2 , and a through hole for placing a connector is provided on the PCB board 5 .

[0063] The connector is connected to the infrared filter and is coaxially arranged with the connecting square hole of the substrate 2. Furthermore, the infrared filter can effectively absorb the infrared waves mixed in the microwave transmission path.

[0064] The upper barrel body 4 is provided with a square hole for placing a connecting plate and a fourth cover plate, and the square hole of the connecting plate is located in the middle of the upper barrel body 4. Furthermore, the square hole of the fourth cover plate of the upper barrel body 4 is arranged correspondingly to the square hole of the third cover plate of the substrate 2. Furthermore, the sides of the lower barrel body 1 and the upper barrel body 4 are wrapped and fixed by the barrel body 3. The barrel body 3 is fixed to the lower barrel body 1 and the upper barrel body 4 by screws. The lower barrel body 1, the substrate 2, the barrel body 3, the upper barrel body 4, the third cover plate 7, the fourth cover plate 10 and the connecting plate 11 are all made of oxygen-free copper, and the package chip cover plate is made of Permalloy. The first cover plate 8 and the second cover plate 9 are made of Permalloy.

[0065] It should be noted that although the quantum bit packaging device is introduced as an example in this application, those skilled in the art will understand that this application should not be limited thereto. In fact, users can flexibly set parameters according to personal preferences and / or actual application scenarios, as long as they are flexible.

[0066] The embodiments of the present application have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A quantum bit packaging device, characterized in that: include: A substrate, a PCB board, a connector assembly and a first cover plate; The substrate is arranged horizontally, the substrate is a straight plate structure, and the substrate is provided with a pre-installation port, and the pre-installation port is suitable for placing a chip; The PCB board is arranged transversely on the base plate, and the PCB board abuts against the upper end surface of the base plate; The connector group is arranged on the PCB board, the connector comprises a plurality of connectors, and the plurality of connectors and the PCB board are longitudinally inserted; The first cover plate is located under the substrate, the first cover plate matches the size of the pre-installation port, and the first cover plate is correspondingly arranged below the pre-installation port to encapsulate the chip.

2. The quantum bit packaging device according to claim 1, characterized in that: The first cover plate is provided with a groove, and the groove is suitable for gold wire bonding of the chip.

3. The quantum bit packaging device according to claim 1, characterized in that: Also includes: A second cover plate, a square opening is opened in the middle of the PCB board, and the cross-sectional area of ​​the square opening is smaller than the cross-sectional area of ​​the pre-installation port; the cross-sectional area of ​​the second cover plate is larger than the cross-sectional area of ​​the square opening, and the first cover plate and the second cover plate are arranged from bottom to top to encapsulate the substrate, the chip and the PCB board.

4. The quantum bit packaging device according to claim 1, characterized in that: Also includes: The third cover plate is located below the substrate, and the third cover plate and the connector group are arranged correspondingly; there are multiple connector groups, and the multiple connector groups are arranged on the PCB board in pairs and in parallel, and the lower end of the connector group is in contact with the third cover plate.

5. The quantum bit packaging device according to claim 3, characterized in that: The number of the connector groups is four, and the four connector groups are arranged around the square opening. The connector groups are arranged on the PCB board in pairs in parallel with each other, and there is a setting distance between any two adjacent connector groups.

6. The quantum bit packaging device according to any one of claims 1 to 5, characterized in that: Also includes: Infrared filter group; the infrared filter group is located on the connector group, the infrared filter group has a plurality of infrared filters, one end of the infrared filter is electrically connected to the connector, and the other end extends upward to the upper plate surface of the shell.

7. The quantum bit packaging device according to claim 6, characterized in that: The preset position of the infrared filter group is arranged corresponding to the preset position of the connector group.

8. The quantum bit packaging device according to claim 6, characterized in that: Also includes: A fourth cover plate, wherein the fourth cover plate is arranged on the infrared filter, and the fourth cover plate is arranged corresponding to the infrared filter, and the fourth cover plate and the top end of the infrared filter are in contact with each other.

9. The quantum bit packaging device according to claim 8, characterized in that: Also includes: The shell is made of oxygen-free copper and has a hollow structure; and the first cover plate, the substrate, the PCB board, the connector group, the infrared filter and the fourth cover plate are installed in the shell from top to bottom.

10. The quantum bit packaging device according to claim 3, characterized in that: The first cover plate and the second cover plate are both made of Permalloy.

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