Current monitoring circuit and method, power supply chip, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a current monitoring circuit and method, a power supply chip, a storage medium, electronic equipment and a program product, and the circuit comprises a plurality of power supply circuits which respectively supply power to a plurality of groups of memory modules included in a server, an amplifier and the power supply chip, the non-reverse input end of the amplifier is connected with the current inlet end of each first voltage divider included in the multiple power supply circuits through a first monitoring link, the reverse input end of the amplifier is connected with the current outlet end of each first voltage divider through a second monitoring link, and the output end of the amplifier is connected with the power supply chip. The power supply chip is used for monitoring current of the plurality of power supply circuits; the multiple groups of memory modules are distributed on multiple sides of a central processing unit included in the server, in any power supply circuit, the current inlet end of the first voltage divider is connected with input voltage, and the current outlet end of the first voltage divider is connected with one group of memory modules.

Description

Technical Field

[0001] The embodiments of the present application relate to the computer field, and specifically, to a current monitoring circuit, method, power chip, storage medium, electronic device and program product. Background Art

[0002] In a computer motherboard, the space and wiring of the server memory power supply area are usually very tight. In the related art, a power supply circuit is usually used to power multiple memory modules around the server CPU. Therefore, the power supply circuit needs to pass through the side area of ​​the CPU, resulting in a long power supply circuit path and a large wiring space. Summary of the invention

[0003] The embodiments of the present application provide a current monitoring circuit, method, power chip, storage medium, electronic device and program product to at least solve the problem of a long path and a large wiring space occupied by the power supply circuit in the related art.

[0004] According to one embodiment of the present application, a current monitoring circuit is provided, comprising: a plurality of power supply circuits for respectively supplying power to a plurality of groups of memory modules included in a server, an amplifier and a power supply chip, wherein the non-inverting input terminal of the amplifier is connected to the current entry terminal of each first voltage divider device included in the plurality of power supply circuits via a first monitoring link, the inverting input terminal of the amplifier is connected to the current outflow terminal of each first voltage divider device via a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the plurality of power supply circuits; the plurality of groups of memory modules are distributed on multiple sides of a central processing unit included in the server, and in any of the power supply circuits, the current entry terminal of the first voltage divider device is connected to the input voltage, and the current outflow terminal of the first voltage divider device is connected to a group of memory modules.

[0005] In an exemplary embodiment, the current monitoring circuit further includes: a plurality of filter circuits respectively used for filtering interference signals on each of the first monitoring links and each of the second monitoring links.

[0006] In an exemplary embodiment, for any one of the multiple filter circuits: the filter circuit includes a capacitor and a second voltage divider device, wherein the second voltage divider device is located in the monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

[0007] In an exemplary embodiment, the second voltage divider device is located in a first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit; or, the second voltage divider device is located in a second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit; or, there are multiple second voltage dividers, some of the second voltage divider devices are located in the first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the remaining second voltage divider devices are located in the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

[0008] In an exemplary embodiment, the first end of the capacitor is connected to the current input end of the first voltage divider included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output end of the first voltage divider included in the corresponding power supply circuit.

[0009] In an exemplary embodiment, the first end of the capacitor is connected to the non-inverting input end of the amplifier; and the second end of the capacitor is connected to the inverting input end of the amplifier.

[0010] In an exemplary embodiment, the first voltage divider is disposed at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest.

[0011] In an exemplary embodiment, the first voltage divider device includes: a current detection resistor; the amplifier includes: an operational amplifier, an adjustable gain amplifier, and a differential amplifier, wherein, when the amplifier is the adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power chip.

[0012] In an exemplary embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits respectively used to perform overvoltage protection on each of the first voltage divider devices; for any one of the overvoltage protection circuits included in the plurality of overvoltage protection circuits: one end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider device; the overvoltage protection circuit includes at least one of the following: a Zener diode, a transient voltage suppression diode.

[0013] In an exemplary embodiment, the second voltage divider device includes: a voltage divider device with adjustable resistance; a heat sink is provided on the first voltage divider device and / or the second voltage divider device.

[0014] According to another embodiment of the present application, a current monitoring method is provided, which is applied to the above-mentioned current monitoring circuit, including: obtaining a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by the first monitoring link and the second monitoring link; performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; and performing a multiplier conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

[0015] According to another embodiment of the present application, a power supply chip is further provided, the power supply chip is located in a current detection circuit, the circuit detection circuit further includes: a plurality of power supply circuits and an amplifier for respectively supplying power to a plurality of groups of memory modules included in the server, wherein the non-inverting input end of the amplifier is connected to the current input end of each first voltage divider device included in the plurality of power supply circuits through a first monitoring link, the inverting input end of the amplifier is connected to the current outflow end of each first voltage divider device through a second monitoring link, the output end of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the plurality of power supply circuits; The multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server. In any power supply circuit, the current input end of the first voltage divider device is connected to the input voltage, and the current output end of the first voltage divider device is connected to a group of memory modules; the power chip includes: an acquisition module, used to acquire a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by the first monitoring link and the second monitoring link; a first conversion module, used to perform analog-to-digital conversion on the target voltage signal to obtain a target voltage value; a second conversion module, used to perform a multiplier conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

[0016] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0017] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0018] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0019] Through the present application, by using multiple power supply circuits to respectively power multiple groups of memory modules located on multiple sides of the server central processor, it is possible to solve the problems of long paths and large wiring space occupied by power supply circuits in related technologies, thereby achieving the effect of shortening the length of the power supply path and saving wiring space. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 1 ;

[0021] Figure 2 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 2 ;

[0022] Figure 3 is a hardware structure block diagram of a server device according to a current monitoring method of an embodiment of the present application;

[0023] Figure 4 is a flow chart of a current monitoring method according to an embodiment of the present application;

[0024] Figure 5 It is a structural block diagram of a power chip according to an embodiment of the present application. DETAILED DESCRIPTION

[0025] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0026] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0027] In this embodiment, a current monitoring circuit is provided. Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 1 ,like Figure 1 As shown, the current monitoring circuit includes: multiple power supply circuits for respectively supplying power to multiple groups of memory modules included in the server, an amplifier and a power supply chip, wherein the non-inverting input terminal of the amplifier is connected to the current entry terminal of each first voltage divider device included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current outflow terminal of each first voltage divider device through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server, and in any of the power supply circuits, the current entry terminal of the first voltage divider device is connected to the input voltage, and the current outflow terminal of the first voltage divider device is connected to a group of memory modules.

[0028] In the above current monitoring circuit, the power supply chip includes, but is not limited to, analog-to-digital conversion chip, microcontroller, digital signal processor, field programmable gate array, sensor chip, other chips capable of realizing analog-to-digital conversion function, etc. Exemplarily, the analog-to-digital conversion chip includes, but is not limited to, successive approximation analog-to-digital converter chip, ΔΣ analog-to-digital converter chip, etc.

[0029] The plurality of memory modules include but are not limited to being distributed on both sides of the central processing unit included in the server, or distributed around the central processing unit included in the server, etc. Figure 1 As shown, for example, a plurality of memory modules are distributed on both sides of a central processing unit as an example to illustrate the power monitoring circuit in the present application: Figure 1 As shown, the power monitoring circuit includes two power supply circuits, wherein the first voltage divider devices included in the power supply circuits for respectively supplying power to the memory modules located on both sides of the CPU are current detection resistors. Since the voltage drop across the current measurement resistor is much smaller than the input voltage of the power supply circuit, the input voltage of the power supply circuit (i.e., 12V_Input shown in the figure) is directly regarded as the input voltage of the memory module (12V_DIMM1), as shown in FIG. Figure 1 As shown, the non-inverting input terminal of the amplifier is connected to the current input terminal of the current detection resistor, the inverting input terminal of the amplifier is connected to the current outflow terminal of the current detection resistor, and the power chip determines the current value of the memory module in the server according to the voltage output by the amplifier. In the above embodiment, when the ratio of the input voltage of the power supply circuit to the voltage drop on the first voltage divider device is greater than a predetermined threshold, the input voltage of the power supply circuit can be regarded as the input voltage of the memory module, and the predetermined threshold includes but is not limited to 20, 50, 100, etc., and the predetermined threshold can be adjusted according to the application scenario.

[0030] In the current monitoring circuit of the present embodiment, power is supplied to multiple groups of memory modules located on multiple sides of the server central processing unit based on multiple power supply circuits respectively, thereby solving the problem in the related art that when one power supply circuit is used to power the memory modules on multiple sides of the central processing unit, the power supply circuit path is long and the wiring space occupied is large because the circuit needs to pass through the side area of ​​the central processing unit. This shortens the length of the power supply path and saves wiring space.

[0031] In an optional embodiment, the current monitoring circuit further includes: a plurality of filter circuits respectively used for filtering interference signals on each of the first monitoring links and each of the second monitoring links.

[0032] In the above embodiment, exemplarily, the filtering circuit includes but is not limited to being determined in the following manner: Step 1, determining the type of interference signals on the first monitoring link and the second monitoring link; Step 2, determining the type of filtering circuit according to the type of interference signal to be eliminated, for example, in the case where the interference signal is mainly high-frequency noise, a low-pass filter is selected to form the power supply circuit, and the low-pass filter can allow low-frequency normal current signals to pass through, while filtering out high-frequency noise signals. When the interference signal includes components in a specific frequency range, a band-stop filter can be selected to form the power supply circuit, and the band-stop filter can prevent signals in a specific frequency range from passing through, while allowing signals of other frequencies to be transmitted normally; Step 3, determining the parameters of this type of filtering circuit, for example, in the case where a low-pass filter is selected to form the power supply circuit, the cut-off frequency of the low-pass filter is set according to the frequency range of the current signal of the current monitoring circuit, for example, in the case where the frequency of the current signal at the current outflow end of the voltage divider device is around 50 Hz, the cut-off frequency of the low-pass filter can be set to around 100 Hz, thereby filtering out the interference signal while ensuring normal current signal transmission. When a band-stop filter is selected to form the power supply circuit, the stopband frequency range of the band-stop filter is set according to the frequency range of the interference signal. For example, when the frequency range of the interference signal is 1kHz - 2kHz, the stopband frequency range of the band-stop filter is set to 1kHz - 2kHz. At the same time, it is also necessary to determine whether the attenuation degree of the filter can satisfy the threshold value for suppressing the interference signal within the stopband frequency range. For example, the attenuation of the interference signal within the stopband frequency range reaches 40dB, thereby ensuring that the interference signal is fully suppressed without having a significant impact on the current monitoring result. Exemplarily, the filtering circuit includes but is not limited to being arranged near a signal source close to the monitoring link (for example, the current outflow end of the first voltage divider device), and the filter included in the filtering circuit may be one or more filters. When there are multiple filters, the multiple filters include but are not limited to being connected in a cascade manner. Exemplarily, when the interference signal includes high-frequency components and components in a specific frequency range, the low-pass filtering circuit included in the filtering circuit can be first connected to the monitoring link to preliminarily filter out the high-frequency interference, and then the band-stop filtering circuit included in the filtering circuit can be connected to the output end of the low-pass filtering circuit to further filter out the interference signal within the specific frequency range, thereby achieving a more effective filtering effect.

[0033] In the above embodiment, by adding a filter circuit to each monitoring link, interference signals can be effectively removed and the accuracy of current measurement can be improved.

[0034] In an optional embodiment, for any one of the multiple filter circuits: the filter circuit includes a capacitor and a second voltage divider device, wherein the second voltage divider device is located in the monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

[0035] In the above embodiment, Figure 2 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 2 ,like Figure 2 As shown, the power supply monitoring circuit includes two power supply circuits, in the power supply circuit where the first voltage divider device is R1 shown in the figure, the SENSE1_P signal of the current Sense1 loop of R1 flows through node 101, and the SENSE1_N signal of the current Sense1 loop of R1 flows through node 102, in the power supply circuit where the first voltage divider device is R2 shown in the figure, the SENSE2_P signal of the current Sense1 loop of R1 flows through node 201, and the SENSE2_N signal of the current Sense1 loop of R1 flows through node 202, node 151 is the signal after nodes 101 and 201 are combined, node 151 is connected to the non-inverting input terminal of the amplifier (U1 shown in the figure), node 152 is the signal after nodes 102 and 202 are combined, node 152 is connected to the inverting input terminal of the amplifier, and node 103 flows through the output signal of the amplifier, which is output to the analog-to-digital conversion receiving terminal of the power chip. In the power supply circuit where R1 is located, C1 is the capacitor, R4 and R6 are the second voltage divider devices, and C1, R4 and R6 constitute a filter for reducing the influence of interference signals on current Sense1. In the power supply circuit where R2 is located, C2 is the capacitor, R3 and R5 are the second voltage divider devices, and C2, R3 and R5 constitute a filter for reducing the influence of interference signals on current Sense2.

[0036] In the above embodiment, by adding a capacitor and a second voltage divider device in the monitoring link, the filtering effect is enhanced and the accuracy of current monitoring is improved.

[0037] In an optional embodiment, the second voltage divider device is located in a first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit; or, the second voltage divider device is located in a second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit; or, there are multiple second voltage dividers, some of the second voltage divider devices are located in the first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the remaining second voltage divider devices are located in the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

[0038] In the above embodiment, if Figure 2 As shown, exemplarily, taking the power supply circuit where R1 is located as an example, the distribution method of the second voltage divider device is exemplarily described, and the second voltage divider device includes but is not limited to: only including R4 shown in the figure, only including R6 shown in the figure, and including both R4 and R6.

[0039] In the above embodiment, by including multiple voltage divider devices in the second voltage divider device, some of the second voltage divider devices are deployed in the first monitoring link, and the remaining second voltage divider devices are deployed in the second monitoring link, thereby realizing two-stage filtering of the signal, which helps to reduce signal fluctuations and improve the stability and accuracy of current monitoring.

[0040] In an optional embodiment, the first end of the capacitor is connected to the current entry end of the first voltage divider device included in the corresponding power supply circuit; the second end of the capacitor is connected to the current outflow end of the first voltage divider device included in the corresponding power supply circuit.

[0041] In the above embodiment, if Figure 2 As shown, exemplarily, taking the power supply circuit where R1 is shown in the figure as an example, when the voltage divider device only includes R4 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 101 and R4, and the second end of the capacitor includes but is not limited to being located between node 102 and node 152; when the voltage divider device only includes R6 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 101 and node 151, and the second end of the capacitor includes but is not limited to being located between node 102 and R6; when the voltage divider device includes R4 and R6 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 101 and R4, and the second end of the capacitor includes but is not limited to being located between node 102 and R6.

[0042] In an optional embodiment, the first end of the capacitor is connected to the non-inverting input end of the amplifier; and the second end of the capacitor is connected to the inverting input end of the amplifier.

[0043] In the above embodiment, if Figure 2 As shown, exemplarily, taking the power supply circuit where R1 is shown in the figure as an example, when the voltage divider device only includes R4 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 151 and R4, and the second end of the capacitor includes but is not limited to being located between node 102 and node 152; when the voltage divider device only includes R6 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 101 and node 151, and the second end of the capacitor includes but is not limited to being located between node 152 and R6; when the voltage divider device includes R4 and R6 shown in the figure, the first end of the capacitor includes but is not limited to being located between node 151 and R4, and the second end of the capacitor includes but is not limited to being located between node 152 and R6.

[0044] In an optional embodiment, the first voltage divider device is arranged at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest.

[0045] In this embodiment, by setting the first voltage divider device at a position where the sum of the physical path distances from each memory module in the corresponding memory module group is the smallest, the path length of the power supply circuit of the memory module is minimized, thereby saving wiring space.

[0046] In an optional embodiment, the first voltage divider device includes: a current detection resistor; the amplifier includes: an operational amplifier, an adjustable gain amplifier, and a differential amplifier, wherein, when the amplifier is the adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

[0047] In the above embodiments, the current detection resistors in the multiple power supply circuits may be the same or different. Exemplarily, the current detection resistors include but are not limited to: external current detection resistors, internal current detection resistors, metal foil-based resistors, foil resistors, electron beam welding resistors, etc. The resistance of the current detection resistors is not limited to: 0.1mΩ to 1mΩ, 0.2mΩ to 5mΩ, etc. The type and resistance of the current monitoring resistor can be selected according to different application scenarios. Exemplarily, the type and resistance of the current monitoring resistor can be determined based on the following factors: maximum current. The maximum current expected to flow through the current detection resistor is the primary factor in selecting the current detection resistor. The resistance of the shunt resistor is at the maximum The voltage drop generated under the current must be within the measurement range of the voltage of the power chip; power consumption and thermal management. Since the current detection resistor consumes power and generates heat in the working state, the selection of the current detection resistor needs to consider power consumption and thermal management to avoid overheating of the resistor and affect the stability and life of the circuit; accuracy requirements. The selection of the current detection resistor needs to consider the accuracy requirements of the current detection. For example, when the accuracy requirements are high, select a resistor with a lower resistance value; system noise. Determine the resistance value based on the noise level in the environment where the server memory module is located. For example, when the noise level in the environment is high, select a lower resistance value; cost and availability; the gain of the current detection amplifier; ambient temperature, etc.

[0048] In the above embodiment, by using an adjustable gain amplifier in the current monitoring circuit, the measurable current range can be flexibly adjusted according to the monitoring requirements, so as to adapt to different monitoring requirements and improve the accuracy of current monitoring. At the same time, by precisely controlling the gain of the amplifier, the distortion of the signal during the amplification process can be reduced and the measurement accuracy can be improved.

[0049] In an optional embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits respectively used to perform overvoltage protection on each of the first voltage divider devices; for any one of the overvoltage protection circuits included in the plurality of overvoltage protection circuits: one end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider device; the overvoltage protection circuit includes at least one of the following: a Zener diode, a transient voltage suppression diode.

[0050] In the above embodiment, exemplarily, when the Zener diode is included in the overvoltage protection circuit, the Zener voltage of the Zener diode is higher than the input voltage of the first voltage divider device. Exemplarily, when the input voltage of the first voltage divider device is 12V, the Zener voltage of the Zener diode is 13V, 14V, 15V, etc.

[0051] In the above embodiments, by providing an overvoltage protection circuit on each first voltage divider device, damage to circuit elements due to overvoltage can be effectively prevented. Specifically, by deploying a Zener diode and a transient voltage suppression diode in the overvoltage protection circuit, it can be achieved that the Zener diode and the TVS diode included in the overvoltage protection circuit have no effect on the normal operation of the circuit under normal operating voltage, and are quickly turned on when the voltage exceeds a preset value, thereby clamping the excessive voltage within a safe range, thereby protecting the first voltage divider device from damage and improving the stability of the circuit under abnormal conditions.

[0052] In an optional embodiment, the second voltage divider device includes: a voltage divider device with adjustable resistance; a heat dissipation device is provided on the first voltage divider device and / or the second voltage divider device.

[0053] In the above embodiment, the voltage divider with adjustable resistance includes but is not limited to: a potentiometer, an adjustable resistor, etc. The heat dissipation device includes but is not limited to: a metal heat sink, a heat pipe, a thermal pad, a liquid cooling system, a fan, a water cooling plate, etc. The heat dissipation device can be determined according to the application scenario, the heat dissipation requirements of the first voltage divider device and the second voltage divider device. For example, when the density of the arrangement of components in the server is high, the heat sink is selected as the heat dissipation device.

[0054] In the above embodiment, by installing the heat dissipation device on the first voltage divider device and the second voltage divider device, the problem of device damage caused by the increase in temperature of the voltage divider device due to long-term load operation can be avoided, and damage to the device due to excessive temperature can be avoided, thereby improving the stability of the voltage divider device and extending the life of the voltage divider device.

[0055] The current detection circuit in this application is exemplarily described below in conjunction with specific embodiments:

[0056] like Figure 2As shown, in this embodiment, exemplarily, the power supply monitoring circuit includes two power supply circuits, in the power supply circuit where the first voltage divider device is R1 shown in the figure, the SENSE1_P signal of the current Sense1 loop of R1 flows through node 101, and the SENSE1_N signal of the current Sense1 loop of R1 flows through node 102, in the power supply circuit where the first voltage divider device is R2 shown in the figure, the SENSE2_P signal of the current Sense1 loop of R1 flows through node 201, and the SENSE2_N signal of the current Sense1 loop of R1 flows through node 202, node 151 is the signal after node 101 and node 201 are combined, node 151 is connected to the non-inverting input terminal of the amplifier (U1 shown in the figure), node 152 is the signal after node 102 and node 202 are combined, node 152 is connected to the inverting input terminal of the amplifier, and node 103 flows through the output signal of the amplifier, which is output to the analog-to-digital conversion receiving terminal of the power chip. Exemplarily, in this embodiment, , , , the amplifier multiple is Taking as an example, the process of measuring the current sum of the multiple power supply circuits by the power chip is specifically described:

[0057] Flow Current and The voltage difference between the two sides The calculation formula is as follows:

[0058] (Formula 1)

[0059] in, is the voltage at node 101, is the voltage at the node 102;

[0060] Flow Current and The voltage difference between the two sides The calculation formula is as follows:

[0061] (Formula 2)

[0062] in, is the voltage at node 201, is the voltage at node 202;

[0063] The total current flowing through the memory module , total current The calculation formula is as follows:

[0064] (Formula 3)

[0065] The voltage at node 151 is the average voltage of node 101 and node 201, The calculation formula is as follows:

[0066] (Formula 4)

[0067] The voltage at node 152 is the average voltage of node 102 and node 202, The calculation formula is as follows:

[0068] (Formula 5)

[0069] The voltage at the output node 103 of the amplifier The calculation formula is as follows:

[0070] (Formula 6)

[0071] The voltage output from node 103 received by the power chip After the analog-to-digital conversion, the voltage value after the analog-to-digital conversion is multiplied by 2 / ( *R)), so as to obtain the total current of the power supply circuit after conversion , The calculation formula is as follows:

[0072] (Formula 7)

[0073] (Formula 8)

[0074] From the above content, it can be seen that in this embodiment, the total current determined by the power chip is equal to the current sum of the memory modules on both sides of the output CPU (that is, the current sum of the power supply circuits of the memory modules), thereby achieving effective calculation of the memory current without adding operational amplifiers and power chips.

[0075] In this embodiment, a current monitoring method is also provided. The method embodiment provided in the embodiment of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 3 is a hardware structure block diagram of a server device according to the current monitoring method of an embodiment of the present application. Figure 3 As shown, the server device may include one or more ( Figure 3Only one is shown in the figure) a processor 302 (the processor 302 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 304 for storing data, wherein the server device may also include a transmission device 306 and an input / output device 308 for communication functions. It can be understood by those skilled in the art that Figure 3 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 3 More or fewer components as shown, or with Figure 3 Different configurations shown.

[0076] The memory 304 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the current monitoring method in the embodiment of the present application. The processor 302 executes various functional applications and data processing by running the computer program stored in the memory 304, that is, the above method is implemented. The memory 304 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 304 may further include a memory remotely arranged relative to the processor 302, and these remote memories can be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0077] The transmission device 306 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 306 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 306 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0078] In this embodiment, a current monitoring method is provided, which is applied to the above-mentioned current monitoring circuit. Figure 4 is a flow chart of a current monitoring method according to an embodiment of the present application, such as Figure 4 As shown, the process includes the following steps:

[0079] Step S402, obtaining a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on initial voltage signals input by the first monitoring link and the second monitoring link;

[0080] Step S404, performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value;

[0081] Step S406, performing a multiplication conversion on the target voltage value to obtain the current sum of the plurality of power supply circuits.

[0082] The executors of the above steps include but are not limited to analog-to-digital conversion devices, chips equipped with analog-to-digital conversion devices, etc. In the above steps, the target voltage value is determined based on the target voltage signal output by the amplifier, and the current and current of the power supply circuit are determined based on the target voltage value, thereby achieving accurate measurement of the current.

[0083] In an optional embodiment, the method also includes: determining the power consumption and distribution pattern of each of the multiple memory modules in the server; determining a first average value of the power consumption of the multiple memory modules; dividing the multiple memory modules into multiple groups of memory modules based on the power consumption of each memory module and the distribution pattern, wherein the absolute value of the difference between the average value of the power consumption of each group of memory modules and the first average value is less than a first threshold, and the sum of the power consumption of each group of memory modules is less than a second threshold; and separately determining the power supply circuit of each group of memory modules.

[0084] The first threshold and the second threshold can be pre-set, and the first threshold and the second threshold can be adjusted according to different application scenarios. The distribution method includes but is not limited to: the position of each memory module, the position relationship of each memory module to other memory modules, and the position relationship of each memory module to the central processing unit.

[0085] Exemplarily, the execution subjects of the above steps include but are not limited to: server management system, automated test equipment, other terminal devices that can execute the above module grouping method, etc. Specifically, the server management system can collect the power consumption data of each memory module and its location information in the server through built-in hardware monitoring tools or dedicated management software. For example, use the Intelligent Platform Management Interface (IPMI) or similar interfaces to obtain these data. The server management system calculates the average power consumption of all memory modules by analyzing the collected power consumption data. The power consumption data can be automatically collected according to a predetermined period. According to the collected power consumption data and distribution method, the server management system can automatically divide the memory modules into multiple groups to ensure that the difference between the average power consumption of each group and the overall average power consumption is within a set threshold. Exemplarily, the division of memory modules can be achieved through an optimization algorithm (for example, a genetic algorithm, a simulated annealing algorithm, etc.) deployed in the server management system. Specifically, the automated test equipment (ATE) can perform power consumption testing and position marking on each memory module during the production stage, thereby accurately recording the power consumption and location information of each memory module. The test equipment automatically calculates the average power consumption of all tested memory modules and uploads the results to the central database. At the same time, it automatically divides the memory module groups according to the preset algorithm to ensure that the power consumption of each group meets the quality control standards.

[0086] In the above steps, by reasonably grouping the memory modules based on the power consumption and distribution of each memory module, it is possible to ensure that the power consumption of each group of memory modules is within a controllable range, thereby avoiding problems such as system overload, overheating or power supply instability caused by excessive power consumption of a single or multiple memory modules, and improving the stability and reliability of the entire server system. Specifically, by dividing the memory modules into multiple groups and ensuring that the difference between the average power consumption of each group and the overall average power consumption is within the set threshold, more refined power management can be achieved, ensuring more uniform power distribution, avoiding power overload in certain areas, and improving power utilization efficiency and reducing energy waste. At the same time, it is possible to divide memory modules with higher power consumption into different groups, thereby avoiding local overheating, improving the heat dissipation efficiency of the entire system, helping to extend the service life of the memory modules, and reducing system failures caused by high temperature.

[0087] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0088] In this embodiment, a power chip is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the power chip described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0089] Figure 5 is a structural block diagram of a power supply chip according to an embodiment of the present application, wherein the power supply chip is located in a current detection circuit, and the circuit detection circuit further includes: a plurality of power supply circuits and an amplifier for respectively supplying power to a plurality of groups of memory modules included in the server, wherein the non-inverting input terminal of the amplifier is connected to the current entry terminal of each first voltage divider device included in the plurality of power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current outflow terminal of each first voltage divider device through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the plurality of power supply circuits; the plurality of groups of memory modules are distributed on multiple sides of a central processing unit included in the server, and in any of the power supply circuits, the current entry terminal of the first voltage divider device is connected to the input voltage, and the current outflow terminal of the first voltage divider device is connected to a group of memory modules; as Figure 5 As shown, the power chip includes: an acquisition module 52, which is used to acquire a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by a first monitoring link and a second monitoring link; a first conversion module 54, which is used to perform analog-to-digital conversion on the target voltage signal to obtain a target voltage value; and a second conversion module 56, which is used to perform a multiplier conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

[0090] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0091] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0092] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0093] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0094] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0095] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0096] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0097] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0098] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A current monitoring circuit, characterized in that: include: A plurality of power supply circuits, amplifiers and power supply chips for respectively supplying power to a plurality of groups of memory modules included in the server, wherein the non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the plurality of power supply circuits via a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device via a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the plurality of power supply circuits; The multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server. In any power supply circuit, the current input end of the first voltage divider device is connected to the input voltage, and the current output end of the first voltage divider device is connected to a group of memory modules.

2. The current monitoring circuit according to claim 1, characterized in that: Also includes: A plurality of filter circuits are respectively used to filter interference signals on each of the first monitoring links and each of the second monitoring links.

3. The current monitoring circuit according to claim 2, characterized in that: For any one of the filter circuits included in the plurality of filter circuits: The filtering circuit includes a capacitor and a second voltage divider device, wherein the second voltage divider device is located in the monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

4. The current monitoring circuit according to claim 3, characterized in that: The second voltage divider device is located in a first monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, The second voltage divider device is located in a second monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, There are multiple second voltage divider devices, some of which are located in the first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the remaining second voltage divider devices are located in the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

5. The current monitoring circuit according to claim 3, characterized in that: The first end of the capacitor is connected to the current entry end of the first voltage divider included in the corresponding power supply circuit; The second end of the capacitor is connected to a current outflow end of the first voltage divider included in the corresponding power supply circuit.

6. The current monitoring circuit according to claim 3, characterized in that: The first end of the capacitor is connected to the non-inverting input end of the amplifier; The second end of the capacitor is connected to the inverting input end of the amplifier.

7. The current monitoring circuit according to claim 1, characterized in that: The first voltage divider is arranged at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest.

8. The current monitoring circuit according to claim 1, characterized in that: The first voltage divider device includes: a current detection resistor; The amplifier includes: an operational amplifier, an adjustable gain amplifier, and a differential amplifier, wherein, when the amplifier is the adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power chip.

9. The current monitoring circuit according to claim 1, characterized in that: Also included: a plurality of overvoltage protection circuits respectively used to perform overvoltage protection on each of the first voltage divider devices, for any one of the overvoltage protection circuits included in the plurality of overvoltage protection circuits: One end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider device. The overvoltage protection circuit includes at least one of the following: a Zener diode and a transient voltage suppression diode.

10. The current monitoring circuit according to claim 3, characterized in that: The second voltage divider device comprises: a voltage divider device with adjustable resistance; The first voltage divider component and / or the second voltage divider component is provided with a heat dissipation device.

11. A current monitoring method, characterized in that: The current monitoring circuit according to any one of claims 1 to 10 comprises: Acquire a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on initial voltage signals input by the first monitoring link and the second monitoring link; Performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; The target voltage value is multiplied by a factor to obtain the current sum of the plurality of power supply circuits.

12. A power chip, characterized in that: The power chip is located in the current detection circuit, and the circuit detection circuit also includes: multiple power supply circuits and amplifiers for respectively supplying power to multiple groups of memory modules included in the server, wherein the non-inverting input end of the amplifier is connected to the current entry end of each first voltage divider device included in the multiple power supply circuits through a first monitoring link, the inverting input end of the amplifier is connected to the current outflow end of each first voltage divider device through a second monitoring link, and the output end of the amplifier is connected to the power chip, and the power chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server, and in any of the power supply circuits, the current entry end of the first voltage divider device is connected to the input voltage, and the current outflow end of the first voltage divider device is connected to a group of memory modules; The power chip comprises: An acquisition module, used for acquiring a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by the first monitoring link and the second monitoring link; A first conversion module, used for performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; The second conversion module is used to perform a multiplication conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in claim 11 when executed by a processor.

14. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in claim 11 are implemented.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in claim 11 are implemented.

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