Bump structure for semiconductor element

Abstract

Disclosed is a bump structure for a semiconductor element in which trench structures are formed at both side end portions of a bump, thereby preventing a probe of a probe card from disengaging, and in which a center portion of a bump pad overlaps a film lead during packaging. The disclosed bump structure for a semiconductor element measures electrical characteristics by bringing a probe of a probe card into contact with a bump structure attached to a semiconductor wafer in an EDS process and then applying pressure. The present invention relates to a bump structure attached to a semiconductor wafer, and in a semiconductor manufacturing process in which a bump structure of a semiconductor element and a thin film lead are soldered in an inner wire bonding (ILB) process in a semiconductor package process, the bump structure attached to the semiconductor wafer includes: a bump body which is a conductive metal material having a rectangular column shape and is attached to a pad of the semiconductor element; and protrusions protruding from both ends of the bump body to form a groove for contacting a probe of a probe card or a groove for guiding a film lead to the center of the bump.

Description

Technical Field

[0001] The present invention relates to a bump structure for semiconductor elements, and in particular to a bump structure for semiconductor elements, which forms groove structures at both side ends of the bump to prevent the probe of the probe card from detaching and allows the center of the bump pad to overlap with the film lead during packaging. Background Art

[0002] Generally, the semiconductor manufacturing process consists of eight processes, including wafer manufacturing, oxide film formation, photolithography, etching, thin film, metal wiring, electronic die sorting (EDS), and packaging. The packaging process, which is equivalent to the post-process, includes the sawing process, inner lead bonding (ILB) process, potting process, marking process, and testing process. When manufacturing semiconductor chips through this semiconductor manufacturing process, bumps are formed on the semiconductor wafer before the EDS process for electrical connection with the chip.

[0003] The EDS process is a process for checking whether individual chips in the wafer finishing process are performing electrical operations, such as Figure 1 As shown, in the conventional bump structure, in order to inspect the semiconductor, electrical signals such as current and voltage are measured by contacting the bump 16 and the probe card probe 20. At this time, there is a problem that after the bump 16 and the probe card probe 20 are in contact, a low contact resistance state is formed by increasing pressure, and at the same time, the probe card probe 20 is affected by the pressing pressure and moves to the edge, thereby causing damage to the bump edge, or the probe is separated from the bump, resulting in electrical erroneous measurement.

[0004] In addition, in the ILB process of the existing bump structure packaging process, as Figure 2 As shown, there is the following problem: in the ILB (Inner Lead Bonding) process of assembling the chip onto the film, when the actual bump 16 and the film are bonded, the centers of the bumps 16 and the film are not aligned, causing the film lead 30 to separate from the bump 16 and bond to the adjacent bump.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: KR10-1641993B1 Summary of the invention

[0008] The present invention is proposed to solve the above-mentioned problem. The problem to be solved by the present invention is to provide a bump structure for semiconductor elements, which forms a groove structure on both side ends of the bump to prevent the probe of the probe card from detaching, and makes the center part of the bump pad overlap with the thin film lead during packaging.

[0009] The embodiment of the invention discloses a bump structure for a semiconductor element.

[0010] The disclosed bump structure for semiconductor elements is used in an EDS process to measure electrical characteristics by contacting a probe card probe with the bump structure attached to a semiconductor wafer and then applying pressure thereto, and in a semiconductor manufacturing process to weld the bump structure of a semiconductor element and a thin film lead in an inner lead bonding (ILB) process in a semiconductor packaging process.

[0011] The bump structure attached to the semiconductor wafer includes: a bump body, which is a conductive metal material in the shape of a rectangular column and is attached to the pad of the semiconductor element; and a protrusion, which protrudes at both ends of the bump body to form a groove for contacting with a probe of a probe card or for guiding a thin film lead to the center of the bump structure.

[0012] The groove is larger than the diameter of the probe card needle, thereby preventing the probe from sliding during the contact process, and the groove is larger than the width of the film lead, thereby making the center of the bump structure and the film lead coincide.

[0013] The protrusion is composed of a passivation insulating film layer, and is formed at one or both ends of the bump body according to the entry direction of the probe of the probe card and the direction of the bonding film.

[0014] According to an embodiment of the present invention, grooves are formed at both ends of a bump formed on a semiconductor wafer, so that when the probe of the probe card contacts the bump to measure the electrical signal of the semiconductor wafer, the probe of the probe card can be prevented from detaching from the edge of the bump, and in the ILB (Inner Lead Bonding) process during packaging, the film lead (Film Lead) can be accurately aligned with the center of the bump pad, thereby improving the packaging quality.

[0015] In addition, according to the embodiment of the present invention, in the wafer detection and film bonding process, grooves are formed by a separate structure to reduce errors that may be caused by micro-bump structures with narrow pitches, thereby improving the accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG. 1 is a diagram for explaining an EDS test in a conventional semiconductor bump structure.

[0017] Figure 2 FIG. 1 is a diagram for explaining an ILB in a conventional semiconductor bump structure.

[0018] Figure 3 FIG. 1 is a perspective view showing a bump structure used for a semiconductor device according to an embodiment of the present invention.

[0019] Figure 4 To show Figure 3 Figure AA section in.

[0020] Figure 5 To show Figure 3 Figure BB section in.

[0021] Figure 6 FIG. 1 is a diagram for explaining an EDS test of a bump structure of a semiconductor device according to an embodiment of the present invention.

[0022] Figure 7 FIG. 1 is a diagram for explaining an ILB of a bump structure used for a semiconductor device according to an embodiment of the present invention.

[0023] Description of Reference Numerals

[0024] 10: Semiconductor wafer 20: Probe card probe

[0025] 30: Thin film lead 100: Bump structure

[0026] 110: bump body 120: protrusion

[0027] T: Groove DETAILED DESCRIPTION

[0028] Advantages and features of the present invention and methods for achieving the same will become more apparent with reference to the embodiments described in detail below in conjunction with the accompanying drawings.

[0029] However, the present invention is not limited to the embodiments disclosed below, but will be implemented in different multiple ways. This embodiment is only for the purpose of making the disclosure of the present invention complete and fully informing the scope of the invention to those skilled in the art. The present invention is only defined by the scope of the claims.

[0030] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Regardless of the drawings, the same reference numerals refer to the same components, and "and / or" includes each and all combinations of more than one of the mentioned items.

[0031] Although the terms "first", "second", etc. are used to describe various components, it is obvious that these components are not limited to these terms. These terms are only used to distinguish one component from other components.

[0032] Therefore, the first component mentioned below can obviously also be the second component within the technical spirit of the present invention.

[0033] The terms used in this specification are used to illustrate the embodiments rather than to limit the present invention. In this specification, unless otherwise specified in the text, the singular also includes the plural. The "comprises" and / or "comprising" used in the specification do not exclude the existence or addition of one or more other components in addition to the mentioned components.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used in this specification may be used with the meanings commonly understood by those skilled in the art. Also, unless there is a clear special definition, the terms defined in the commonly used dictionaries will not be abnormally or excessively interpreted.

[0035] Spatially relative terms such as "below", "beneath", "lower", "above", and "upper" may be used to easily describe the relationship between one component and another as shown in the accompanying drawings. Spatially relative terms should be understood to include terms that include different directions of components when in use or operating in addition to the directions shown in the accompanying drawings. For example, in the case of flipping the components shown in the accompanying drawings, a component recorded as being placed "below" or "beneath" another component can be placed "above" another component. Therefore, the exemplary term "below" can include both the lower and upper directions. Components can be oriented in other directions, and therefore, spatially relative terms can be interpreted based on the orientation.

[0036] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0037] Figure 3 FIG. 1 is a perspective view showing a bump structure for a semiconductor device according to an embodiment of the present invention. Figure 4 To show Figure 3 Figure AA section in, Figure 5 To show Figure 3 Figure BB section in.

[0038] like Figure 3 As shown, the bump structure 100 for a semiconductor element described in an embodiment of the present invention is composed of a bump body 110 and a protrusion 120, wherein the bump body 110 is in the shape of a rectangular column, and the protrusion 120 is formed at both ends of the bump body 110, thereby forming a groove T for contacting the probe 20 of the probe card or a groove T for internally connecting the thin film lead 30.

[0039] refer to Figure 3 After the bump is formed on the wafer 10, a protrusion 120 formed of a passivation insulating film is formed at the two ends 112-L and 112-R of the rectangular column-shaped bump body 110 except for the trench T, wherein the trench T has a width W that the thin film lead 30 can enter. At this time, the trench T plays the following role: the width W of the trench T is greater than the diameter of the probe card probe 20 and greater than or equal to the width of the thin film lead 30, thereby preventing sliding during the probe contact process, and guiding the bump structure 100 and the thin film lead 30 in the ILB process during packaging so that the centers of the two coincide. At this time, according to the entry direction of the probe card probe 20 and the direction of the film (Film), the trench structure can be formed at one of the two ends of the bump structure or the trench structure can be formed at both ends.

[0040] refer to Figure 4 , having a pad 12 for connecting an electrical signal to a semiconductor element implemented on a semiconductor wafer 10 , the semiconductor wafer is covered with a protective film 14 , and the bump body 110 contacts the electrode pad 12 through a hole in the protective film 14 .

[0041] In addition, on both sides of both ends of the bump body 110 , a protrusion 120 made of a passivation insulating film protrudes upward from the protective film to form a trench space T. At this time, the inner side surface of the protrusion 120 forms an inclined surface at a predetermined angle.

[0042] Although the protrusion 120 is formed on both sides in the same manner in the embodiment of the present invention, the protrusion 120 may be formed on only one side.

[0043] refer to Figure 5 , the protrusion 120 is not formed in the central portion of the bump body 110 , and the bump body 110 is in contact with the electrode pad 12 through the hole of the protection film 14 .

[0044] As described above, the bump structure 100 described in the embodiment of the present invention has protrusions 120 made of a passivation insulating film only at the two ends 112-L and 112-R of the bump body 110, thereby forming a groove space T. The groove space T is used to prevent the probe card probe 20 from detaching and guide the thin film lead 30 to the center, and there is no protrusion 120 in the central part, so that the electrical contact between the bump structure 100 and the thin film lead 30 is good.

[0045] In this way, the bump structure for semiconductor elements described in the embodiment of the present invention can be used for bump structures that require electrical characteristic inspection and bonding of semiconductor wafers.

[0046] Figure 6 2 is a diagram for explaining an EDS test of a bump structure of a semiconductor device according to an embodiment of the present invention. Figure 7 FIG. 1 is a diagram for explaining an ILB of a bump structure used for a semiconductor device according to an embodiment of the present invention.

[0047] The bump structure 100 for semiconductor elements according to the embodiment of the present invention forms protrusions 120 for grooves with non-conductive materials at both ends of the bump body 110 , so that probe detection can be realized and ILB lead deviation can be prevented.

[0048] refer to Figure 6 In the EDS process for inspecting whether individual chips are performing electrical operations, after the bump structure 100 and the probe card probe 20 are in contact in order to inspect the semiconductor, even if pressure is added to the probe card probe 20 to form a low contact resistance state, the movement of the probe card probe 20 toward the edge is limited by the groove structure, so that the bump edge will not be damaged or the probe will not be detached, thereby enabling stable measurement.

[0049] In addition, refer to Figure 7 In the ILB (Inner Lead Bonding) process of the semiconductor packaging process, when the semiconductor chip 10 is assembled on the film (Film), the film lead 30 (Film Lead) is placed in the groove valley of the bump structure 100, thereby stably bonding with the bump structure 100.

[0050] Although the embodiments of the present invention have been described with reference to the above text and the accompanying drawings, it should be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing its technical spirit or essential features. Therefore, it should be understood that the above embodiments are exemplary in all aspects and are not restrictive.

Claims

1. A bump structure for a semiconductor element, characterized in that: In the EDS process, the probe card probe is brought into contact with the bump structure attached to the semiconductor wafer and then pressurized to measure the electrical characteristics. In the semiconductor manufacturing process, the bump structure and thin film lead of the semiconductor element are welded in the inner lead bonding (ILB) process in the semiconductor packaging process. The bump structure attached to the semiconductor wafer includes: The bump body is a conductive metal material in the shape of a rectangular column and is attached to the pad of the semiconductor element; and The protrusions protrude from both ends of the bump body and form grooves for contacting with probes of a probe card or for guiding a thin film lead to the center of the bump.

2. The bump structure for a semiconductor element according to claim 1, characterized in that: The groove is larger than the diameter of the probe of the probe card, so as to prevent the probe from sliding during the contact process, and the groove is larger than the width of the film lead, so as to make the center of the bump and the film lead coincide.

3. The bump structure for a semiconductor element according to claim 2, characterized in that: The protrusion is formed of a passivation insulating film layer.

4. The bump structure for a semiconductor element according to claim 3, characterized in that: The protrusion is formed at one or both ends of the bump body according to the direction of entry of the probe of the probe card and the direction of the bonding film.

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