Data transmission method and device for memory extension module, equipment and medium

Abstract

The invention discloses a data transmission method, device and equipment of a memory expansion module and a medium, relates to the field of storage and data exchange design, and is applied to the memory expansion module comprising memory expansion control chips and a programmable logic device, the programmable logic device is connected with CXL controllers of the memory expansion control chips, and the CXL controllers are connected with the memory expansion control chips. The memory expansion module comprises an X8 type slot and an X16 type slot; the method comprises the following steps: when an X8 type slot is connected with a host through an X8 golden finger connector, triggering a programmable logic device to send an in-place signal to each memory expansion control chip based on a first high-level hot plug detection signal; when the X16 type slot is connected with the host through the X16 golden finger connector, the programmable logic device is triggered based on the second high-level hot plug detection signal to send an in-place signal to each memory expansion control chip; and forwarding the data transmitted by the host to the memory by the target memory expansion control chip selected based on the in-place signal. And the data transmission efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of storage and data exchange design, and in particular to a data transmission method, device, equipment and medium of a memory expansion module. Background Art

[0002] With the development of technologies such as big data, artificial intelligence, and machine learning, the demand for processing power in data centers and high-performance computing systems has increased dramatically. Traditional CPUs (Central Processing Units) can no longer meet all computing needs, so various dedicated accelerators are needed to assist in processing. In order to improve computing efficiency, heterogeneous computing has become a trend. This computing model requires efficient and flexible interconnection technology to support data transmission between different computing units.

[0003] As processor performance gradually improves, memory modules and I / O (input / output) bandwidth have become bottlenecks in system performance. Although PCI Express (peripheral component interconnect express, a high-speed serial computer expansion bus standard) is a widely used system interconnect standard, it is mainly used to connect I / O devices rather than being designed for efficient data exchange between processors and accelerators. In addition, PCIe has certain limitations in supporting low-latency data transmission.

[0004] In summary, it can be seen that how to improve the data transmission efficiency of the memory module is a problem to be solved in the art. Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a data transmission method, device, equipment and medium for a memory expansion module to improve the data transmission efficiency of the memory module. The specific scheme is as follows:

[0006] In a first aspect, the present application discloses a data transmission method for a memory expansion module, which is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip, and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method comprises:

[0007] When the X8 slot is connected to the host through the X8 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal;

[0008] When the X16 slot is connected to the host through the X16 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal;

[0009] A target memory expansion control chip is selected from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

[0010] Optionally, the memory expansion module includes a clock buffer; the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal further includes:

[0011] The programmable logic device is triggered to send a first enable signal to the clock buffer based on a first high-level hot plug detection signal, so that the clock buffer selects a first clock signal path between the clock buffer and the X8 gold finger connector based on the first enable signal, receives a first clock signal sent by the X8 gold finger connector through the first clock signal path, and sends the first clock signal to the first memory expansion control chip;

[0012] Correspondingly, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes:

[0013] The programmable logic device is triggered based on the second high-level hot plug detection signal to send a second enable signal to the clock buffer, so that the clock buffer selects the second clock signal path between the clock buffer and the X16 gold finger connector based on the second enable signal, receives the second clock signal issued by the X16 gold finger connector through the second clock signal path, and sends the second clock signal to the first memory extension control chip and the second memory extension control chip.

[0014] Optionally, the memory expansion module includes a multiplexer; and the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal further includes:

[0015] The programmable logic device is triggered to send a third enable signal to the multiplexer based on the first high-level hot-plug detection signal, so that the multiplexer selects the first multiplexed signal path between the X8 gold finger connector and the multiplexer based on the third enable signal, receives the first multiplexed signal sent by the X8 gold finger connector through the first multiplexed signal path, and sends the first multiplexed signal to the first memory expansion control chip;

[0016] Correspondingly, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes:

[0017] The programmable logic device is triggered based on the first high-level hot plug detection signal to send a fourth enable signal to the multiplexer, so that the multiplexer selects the second multiplexed signal path between the X16 gold finger connector based on the fourth enable signal, receives the second multiplexed signal sent by the X16 gold finger connector through the second multiplexed signal path, and sends the second multiplexed signal to the first memory expansion control chip.

[0018] Optionally, the selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal includes:

[0019] If the in-place signal indicates that the X8 slot is connected to the host through the X8 gold finger connector, the first memory expansion control chip is determined as the target memory expansion control chip, and the second memory expansion control chip is controlled to switch to a low power consumption state;

[0020] If the presence signal indicates that the X16 slot is connected to the host through the X16 gold finger connector, the first memory expansion control chip and the second memory expansion control chip are both determined as target memory expansion control chips.

[0021] Optionally, the memory connector includes a first memory connector and a second memory connector corresponding to the first memory expansion control chip, and a third memory connector and a fourth memory connector corresponding to the second memory expansion control chip;

[0022] The target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, and also includes:

[0023] A first target memory connector and a second target memory connector corresponding to the target memory expansion control chip are selected from the first memory connector, the second memory connector, the third memory connector and the fourth memory connector.

[0024] Optionally, the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including:

[0025] The target memory expansion sends first data including a chip control data signal, a data selection signal, an ECC check signal, a first chip select signal, and a first differential clock signal to the first target memory connector through a first memory signal path between the target memory expansion and the first target memory connector, so that the first target memory connector sends the first data to the corresponding memory.

[0026] Optionally, the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including:

[0027] The target memory expansion sends second data including a chip control data signal, a data selection signal, an ECC check signal, a second chip select signal, and a second differential clock signal to the second target memory connector through a second memory signal path between the target memory expansion and the second target memory connector, so that the second target memory connector sends the second data to the corresponding memory.

[0028] In a second aspect, the present application discloses a data transmission device for a memory expansion module, which is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the device includes:

[0029] A first trigger module is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal when the X8 slot is connected to the host through the X8 gold finger connector;

[0030] A second trigger module is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal when the X16 slot is connected to the host through the X16 gold finger connector;

[0031] A data transmission module is used to select a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the in-place signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

[0032] In a third aspect, the present application discloses an electronic device, comprising:

[0033] Memory, used to store computer programs;

[0034] The processor is used to execute the computer program to implement the steps of the data transmission method of the memory expansion module disclosed above.

[0035] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the steps of the data transmission method of the memory expansion module disclosed above are implemented.

[0036] The beneficial effects of the present application are as follows: the present application is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method comprises: when the X8 slot is connected to a host through an X8 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal; when the X16 slot is connected to the host through an X16 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal; and selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards data transmitted by the host to the corresponding memory. It can be seen that the memory expansion module of the present application has newly added a programmable logic device, and the first memory expansion control chip and the second memory expansion control chip in the memory expansion module of the present application respectively include a first CXL controller and a second CXL controller, that is, the present application introduces the CXL protocol, and the CXL protocol can effectively improve the data transmission efficiency; further, the memory expansion module of the present application can adapt to the X8 gold finger connector and the X16 gold finger connector. When the host is connected to the X8 slot of the memory expansion module through the X8 gold finger connector, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the first high-level hot-plug detection signal. When the host is connected to the X8 slot of the memory expansion module through the X16 When the gold finger connector is connected to the X16 slot of the memory expansion module, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the second high-level hot-plug detection signal, that is, the memory expansion module can use different high-level hot-plug detection signals to trigger the programmable logic device to send a presence signal according to the different host connection methods. The traditional host connection method is not compatible with interface X8 and interface X16. The memory expansion module of this application has added a programmable logic device, which is not only compatible with the connection of X8 gold finger connector and X16 gold finger connector, but also can timely determine the current connection method between the memory expansion module and the host, thereby improving the flexibility and convenience of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0038] Figure 1 A flow chart of a data transmission method of a memory expansion module disclosed in this application;

[0039] Figure 2 A schematic diagram of a connection between a specific RDIMM and a DDR5 controller disclosed in this application;

[0040] Figure 3 A connection diagram of a specific memory expansion module disclosed in this application;

[0041] Figure 4 This is a structural schematic diagram of a data transmission device of a memory expansion module disclosed in this application;

[0042] Figure 5 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0044] With the development of technologies such as big data, artificial intelligence, and machine learning, the demand for processing power in data centers and high-performance computing systems has increased dramatically. Traditional CPUs can no longer meet all computing needs, so various dedicated accelerators are needed to assist in processing. In order to improve computing efficiency, heterogeneous computing has become a trend. This computing model requires efficient and flexible interconnection technology to support data transmission between different computing units.

[0045] As processor performance gradually improves, memory modules and I / O bandwidth have become bottlenecks in system performance. Although PCI Express is a widely used system interconnection standard, it is mainly used to connect I / O devices rather than being designed for efficient data exchange between processors and accelerators. In addition, PCIe has certain limitations in supporting low-latency data transmission.

[0046] To this end, the present application correspondingly provides a data transmission solution for a memory expansion module to improve the data transmission efficiency of the memory module.

[0047] See also Figure 1 As shown, an embodiment of the present application discloses a data transmission method of a memory expansion module, which is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method includes:

[0048] Step S11: when the X8 slot is connected to the host through the X8 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal.

[0049] It can be understood that when the X8 type slot is connected to the host through the X8 gold finger connector, the hot plug detection signal PRSNT0 is set to a high level, that is, a first high level hot plug detection signal is obtained. After the first high level hot plug detection signal is processed by the programmable logic device, the programmable logic device sends a presence signal to the first memory expansion control chip MXC1 (CXL Memory Expansion Controller, i.e. CXL memory expansion controller chip) and the second memory expansion control chip MXC2 through SMBUS (System Management Bus), triggering their reset. The programmable logic device can specifically be an erasable programmable logic device (EPLD).

[0050] In this embodiment, the memory expansion module includes a clock buffer; the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal also includes: triggering the programmable logic device to send a first enable signal to the clock buffer based on the first high-level hot plug detection signal, so that the clock buffer selects the first clock signal path between the clock buffer and the X8 gold finger connector based on the first enable signal, receives the first clock signal issued by the X8 gold finger connector through the first clock signal path, and sends the first clock signal to the first memory expansion control chip. The memory expansion module includes a clock buffer A (CLK Buffer). When PRSNT0 is set to a high level and the hot plug detection signal PRSNT1 is set to a low level, the programmable logic device is triggered based on the first high level hot plug detection signal to send a first enable signal to the clock buffer A, that is, the output MUX_EN[1:0] is equal to 01. The clock buffer A selects the first clock signal path (that is, PCI_CLK0) between the X8 gold finger connector based on the first enable signal, receives the first clock signal sent by the X8 gold finger connector through the first clock signal path, and sends the first clock signal to the first memory expansion control chip MXC1.

[0051] In this embodiment, the memory expansion module includes a multiplexer; in the process of triggering the programmable logic device to send an in-place signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal, it also includes: triggering the programmable logic device to send a third enable signal to the multiplexer based on the first high-level hot plug detection signal, so that the multiplexer selects the first multiplexed signal path between the X8 gold finger connector and the multiplexer based on the third enable signal, receives the first multiplexed signal sent by the X8 gold finger connector through the first multiplexed signal path, and sends the first multiplexed signal to the first memory expansion control chip. The memory expansion module includes a multiplexer (MUX0). When the X8 type slot is connected to the host through the X8 gold finger connector, PRSNT0 is set to a high level and the hot plug detection signal PRSNT1 is set to a low level, that is, a first high level hot plug detection signal is generated. Based on the first high level hot plug detection signal, the programmable logic device is triggered to send a third enable signal to the multiplexer (MUX0), that is, the output MUX_EN[1:0] is equal to 01, and the multiplexer MUX0 selects the CXL0 / PCIE0_X8 side, that is, the multiplexer selects the first multiplexed signal path between the X8 gold finger connector and the X8 gold finger connector based on the third enable signal. In this way, the first multiplexed signal sent by the X8 gold finger connector is received through the first multiplexed signal path, and the first multiplexed signal is sent to the first memory expansion control chip MXC1.

[0052] Step S12: when the X16 slot is connected to the host through the X16 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal.

[0053] It can be understood that when an X16 type slot is connected to the host through an X16 gold finger connector, the hot plug detection signal PRSNT1 is set to a high level, that is, a second high level hot plug detection signal is obtained, and the hot plug detection signal PRSNT0 is set to a low level. In this way, it can be determined that the memory expansion module is connected to the host through the X16 gold finger connector. After the second high level hot plug detection signal is processed by the programmable logic device, the programmable logic device sends a presence signal to the first memory expansion control chip MXC1 and the second memory expansion control chip MXC2 through SMBUS, triggering their reset.

[0054] In this embodiment, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes: triggering the programmable logic device to send a second enable signal to the clock buffer based on the second high-level hot plug detection signal, so that the clock buffer selects the second clock signal path between the X16 gold finger connector and the clock buffer based on the second enable signal, receives the second clock signal issued by the X16 gold finger connector through the second clock signal path, and sends the second clock signal to the first memory expansion control chip and the second memory expansion control chip. When PRSNT0 is set to a low level and the hot plug detection signal PRSNT1 is set to a high level, the programmable logic device is triggered based on the second high-level hot plug detection signal to send a second enable signal to the clock buffer A, that is, the output MUX_EN[1:0] is equal to 10, and the clock buffer A selects the second clock signal path (that is, PCI_CLK1) between the X16 gold finger connector based on the second enable signal, receives the second clock signal issued by the X16 gold finger connector through the second clock signal path, and sends the second clock signal to the first memory extension control chip MXC1 and the second memory extension control chip MXC2.

[0055] In this embodiment, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes: triggering the programmable logic device to send a fourth enable signal to the multiplexer based on the first high-level hot plug detection signal, so that the multiplexer selects the second multiplexed signal path between the X16 gold finger connector and the multiplexer based on the fourth enable signal, receives the second multiplexed signal sent by the X16 gold finger connector through the second multiplexed signal path, and sends the second multiplexed signal to the first memory expansion control chip. When the X16 slot is connected to the host through the X16 gold finger connector, PRSNT1 is set to a high level, and the hot plug detection signal PRSNT0 is set to a low level, that is, a second high-level hot plug detection signal is generated, and the programmable logic device is triggered based on the second high-level hot plug detection signal to send a fourth enable signal to the multiplexer (MUX0), that is, the output MUX_EN[1:0] is equal to 10, and the multiplexer MUX0 selects the CXL1 / PCIE1_X8 side, that is, the multiplexer selects the second multiplexed signal path between the X16 gold finger connector based on the fourth enable signal. In this way, the second multiplexed signal sent by the X16 gold finger connector is received through the second multiplexed signal path, and the second multiplexed signal is sent to the first memory expansion control chip MXC1. It should be noted that when the X16 slot is connected to the host through the X16 gold finger connector, the second multiplexed signal received through the second multiplexed signal path is the low 8-bit data signal sent by the X16 gold finger connector. There is a direct interconnection path CXL1 / PCIE1_X8 between the X16 gold finger connector and the second memory expansion control chip MXC2, which is directly interconnected with the second memory expansion control chip MXC2. Therefore, the high 8-bit data signal sent by the X16 gold finger connector can be directly sent to the second memory expansion control chip MXC2.

[0056] Step S13: selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

[0057] The reference clock source of the memory expansion control chip MXC can be the 100MHz output of the clock generator (CLK Gener) or the differential reference clock 100MHz of the PCIE itself. The memory expansion control chip MXC supports JTAG (Joint Test Action Group) debugging, and the firmware version can be burned into an external Flash chip.

[0058] In this embodiment, the target memory expansion control chip is selected from the first memory expansion control chip and the second memory expansion control chip based on the in-place signal, including: if the in-place signal indicates that the X8 slot is connected to the host through the X8 gold finger connector, the first memory expansion control chip is determined as the target memory expansion control chip, and the second memory expansion control chip is controlled to be converted to a low power state; if the in-place signal indicates that the X16 slot is connected to the host through the X16 gold finger connector, the first memory expansion control chip and the second memory expansion control chip are both determined as the target memory expansion control chip. It can be understood that if the in-place signal indicates that the X8 slot is connected to the host through the X8 gold finger connector, the first memory expansion control chip is determined as the target memory expansion control chip, and the second memory expansion control chip is controlled to be converted to a low power state; if the in-place signal indicates that the X16 slot is connected to the host through the X16 gold finger connector, the first memory expansion control chip and the second memory expansion control chip are both determined as the target memory expansion control chip.

[0059] In this embodiment, the memory connector includes a first memory connector and a second memory connector corresponding to the first memory expansion control chip, and a third memory connector and a fourth memory connector corresponding to the second memory expansion control chip. The memory connector includes a first memory connector RDIMM0 and a second memory connector RDIMM1 corresponding to the first memory expansion control chip, and also includes a third memory connector RDIMM2 and a fourth memory connector RDIMM3 corresponding to the second memory expansion control chip, wherein, for example Figure 2 A specific connection diagram of RDIMM and DDR5 controller is shown. Taking the connection between the RDIMM of the first memory expansion control chip and the DDR (Double Data Rate) 5 controller as an example, the A channel and the B channel of the DDR5 controller of the first memory expansion control chip are connected to the first memory connector RDIMM0 and the second memory connector RDIMM1 respectively. Similarly, the A channel and the B channel of the DDR5 controller of the second memory expansion control chip are connected to the third memory connector RDIMM2 and the fourth memory connector RDIMM3 respectively.

[0060] In this embodiment, the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, and also includes: selecting a first target memory connector and a second target memory connector corresponding to the target memory expansion control chip from the first memory connector, the second memory connector, the third memory connector and the fourth memory connector. It can be understood that if only the first memory expansion control chip is the target memory expansion control chip, the first memory connector and the second memory connector are the first target memory connector and the second target memory connector respectively; if the first memory expansion control chip and the second memory expansion control chip are both the target memory expansion control chip, then the first memory connector and the third memory connector are the first target memory connector, and the second memory connector and the fourth memory connector are the second target memory connector.

[0061] In this embodiment, the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including: the target memory expansion sends the first data including a chip control data signal, a data selection signal, an ECC check signal, a first chip select signal, and a first differential clock signal to the first target memory connector through a first memory signal path between the target memory expansion and the first target memory connector, so that the first target memory connector sends the first data to the corresponding memory. Taking the first memory expansion control chip as the target memory expansion control chip as an example, Figure 2 As shown, the target memory expansion sends first data including a chip control data signal, a data selection signal, an ECC check signal, a first chip select signal, and a first differential clock signal to the first target memory connector through a first memory signal path between the target memory expansion and the first target memory connector RDIMM0, so that the first target memory connector sends the first data to the corresponding memory. The specific process is as follows:

[0062] 1) In the A channel between the first memory expansion control chip MXC1 and RDIMM0: the data signal DQ[0:31]_A with a width of X32 bits is directly connected to RDIMM0, the data selection signals DQS[0:3]_A and DQS[5:8]_A are directly connected to RDIMM0, the ECC check signals DQ[32:39]_A, DQS4_A and DQS9_A are also directly connected to RDIMM0, and the address and command signals CA[0:6]_A are directly connected to RDIMM0;

[0063] 2) Similarly, in channel B, the X32-bit wide data signal DQ[0:31]_B is directly connected to RDIMM0, the data selection signals DQS[0:3]_B and DQS[5:8]_B are directly connected to RDIMM0, the ECC check signals DQ[32:39]_B, DQS4_B and DQS9_B are also directly connected to RDIMM0, and the address and command signals CA[0:6]_B are directly connected to RDIMM0;

[0064] 3) Chip select signals CS_A[2:3], CS_B[2:3] and differential clock signal CK_A0 are connected to the RDIMM0 connector. CS_A[2] is used to select the A channel of Rank0, CS_A[3] is used to select the A channel of Rank1, CS_B[2] is used to select the B channel of Rank0, and CS_A[3] is used to select the B channel of Rank1.

[0065] In this embodiment, the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including: the target memory expansion sends the second data including chip control data signal, data selection signal, ECC check signal, second chip select signal, and second differential clock signal to the second target memory connector through the second memory signal path between the target memory expansion and the second target memory connector, so that the second target memory connector sends the second data to the corresponding memory. Figure 2 As shown, the target memory expansion sends the second data including the chip control data signal, the data selection signal, the ECC check signal, the second chip select signal, and the second differential clock signal to the second target memory connector through the second memory signal path between the target memory expansion and the second target memory connector RDIMM1. The specific process is as follows:

[0066] 1) In channel A, the x32-bit wide data signal DQ[0:31]_A is directly connected to the RDIMM1 connector, the data selection signals DQS[0:3]_A and DQS[5:8]_A are directly connected to the RDIMM1 connector, the ECC check signals DQ[32:39]_A, DQS4_A and DQS9_A are also directly connected to the RDIMM1 connector, and the address and command signals CA[0:6]_A are directly connected to the RDIMM1 connector;

[0067] 2) Similarly, in channel B, the x32-bit wide data signal DQ[0:31]_B is directly connected to the RDIMM1 connector, the data selection signals DQS[0:3]_B and DQS[5:8]_B are directly connected to the RDIMM1 connector, the ECC check signals DQ[32:39]_B, DQS4_B, and DQS9_B are also directly connected to the RDIMM1 connector, and the address and command signals CA[0:6]_B are directly connected to the RDIMM1 connector;

[0068] 3) Chip select signals CS_A[0:1], CS_B[0:1] and differential clock signal CK_A1 are connected to the RDIMM1 connector, where CS_A[0] is used to select the A channel of Rank0, CS_A[1] is used to select the A channel of Rank1, CS_B[0] is used to select the B channel of Rank0, and CS_B[1] is used to select the B channel of Rank1.

[0069] The beneficial effects of the present application are as follows: the present application is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method comprises: when the X8 slot is connected to a host through an X8 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal; when the X16 slot is connected to the host through an X16 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal; and selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards data transmitted by the host to the corresponding memory. It can be seen that the memory expansion module of the present application has newly added a programmable logic device, and the first memory expansion control chip and the second memory expansion control chip in the memory expansion module of the present application respectively include a first CXL controller and a second CXL controller, that is, the present application introduces the CXL protocol, and the CXL protocol can effectively improve the data transmission efficiency; further, the memory expansion module of the present application can adapt to the X8 gold finger connector and the X16 gold finger connector. When the host is connected to the X8 slot of the memory expansion module through the X8 gold finger connector, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the first high-level hot-plug detection signal. When the host is connected to the X8 slot of the memory expansion module through the X16 When the gold finger connector is connected to the X16 slot of the memory expansion module, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the second high-level hot-plug detection signal, that is, the memory expansion module can use different high-level hot-plug detection signals to trigger the programmable logic device to send a presence signal according to the different host connection methods. The traditional host connection method is not compatible with interface X8 and interface X16. The memory expansion module of this application has added a programmable logic device, which is not only compatible with the connection of X8 gold finger connector and X16 gold finger connector, but also can timely determine the current connection method between the memory expansion module and the host, thereby improving the flexibility and convenience of data transmission.

[0070] Below Figure 3Taking the connection diagram of a specific memory expansion module shown as an example, the present application is described accordingly. The memory expansion module includes a first memory expansion control chip MXC1, a second memory expansion control chip MXC2, a programmable logic device (EPLD), a clock buffer 1 (CLK Buffer1), a clock buffer 2 (CLK Buffer2), a multiplexer (MUX0), a first memory connector RDIMM0 corresponding to the first memory expansion control chip, a second memory connector RDIMM1, and a third memory connector RDIMM2 and a fourth memory connector RDIMM3 corresponding to the second memory expansion control chip, and also includes a clock generator (CLK Gener), JTAG, SPI (Serial Peripheral Interface) Flash1, SPI Flash2; wherein the specific connection relationship is as follows:

[0071] The first memory expansion control chip MXC1 is connected to SPI Flash1, and MXC1 is connected to JTAG through the JTAG1 interface. MXC1 is connected to RDIMM0 and RDIMM1 through DDR5-A and DDR5-B respectively. MXC1 is connected to EPLD through the MXC1-SMBUS interface and the RESET interface, connected to CLK Buffer1 through MXC1-CLK, and connected to MUX0 through the CXL / PCIE-X8 interface. Correspondingly, the second memory expansion control chip MXC2 is connected to SPI Flash2, and MXC2 is connected to JTAG through the JTAG2 interface. MXC2 is connected to RDIMM2 and RDIMM3 through DDR5-A and DDR5-B respectively. MXC2 is connected to EPLD through the MXC2-SMBUS interface and the RESET interface, connected to CLK Buffer1 through MXC2-CLK, and connected to MUX0 through the CXL / PCIE-X8 interface.

[0072] CLK Gener is connected to the first memory extension control chip MXC1 and the second memory extension control chip MXC2 through REF (Reference) CLK1 (i.e., reference clock) and REFCLK2 of CLK Buffer2 respectively;

[0073] Furthermore, EPLD is connected to the X8 gold finger connector through the SMBUS0 interface, PRSNT0 interface, and RESET0 interface respectively, EPLD is connected to the X16 gold finger connector through the SMBUS1 interface, PRSNT1 interface, and RESET1 interface respectively, CLKBuffer1 is connected to the X8 gold finger connector and the X16 gold finger connector through the PCI-CLK0 interface and the PCI-CLK1 interface respectively, and MUX0 is connected to the X8 gold finger connector and the X16 gold finger connector through the CXL0 / PCIE0-X8 interface and the CXL1 / PCIE1-X8 interface respectively.

[0074] The MXC chip is a memory expansion controller chip, specifically the M88MX5891, which integrates a CXL Type 3 controller, a single-channel DDR4, a dual-channel DDR5 memory controller, and a RISC-V microprocessor. It supports the PCIE5.0 interface, complies with the CXL2.0 specification, and provides an SPI interface to connect to the external Flash, an I2C (Inter-Integrated Circuit) to connect to the memory system, and an SMBus bus to connect to the CPU. The MXC chip is connected to an X8 gold finger connector or an X16 gold finger connector on one side, and to an RDIMM DDR5 connector on the other side. The host CPU can access the MXC chip based on the CXL protocol / PCIE protocol. After processing the message, the MXC chip writes or reads the message signal to the corresponding multiple memory particles.

[0075] The memory is connected to the MXC chip through the RDIMM connector. The RDIMM connector is in the form of 288 pins, with Rank 0 on the front and Rank 1 on the back. Each Rank supports A channel and B channel. The data bit width of each channel is X32. One MXC supports up to 4 RDIMM memory sticks.

[0076] The X8 gold finger connector supports 8-way PCIE5.0 and can connect to different hosts through the CXL protocol / PCIE protocol. The host can send messages to the MXC chip through the X8 gold finger connector.

[0077] The X16 gold finger connector supports 16-way PCIE5.0 and can connect to different hosts through the CXL protocol / PCIE protocol. The host can send messages to the MXC chip through the X16 gold finger connector.

[0078] See also Figure 4As shown, the embodiment of the present application discloses a data transmission device of a memory expansion module, which is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first CXL controller and the second CXL controller are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the device includes:

[0079] A first trigger module 11 is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal when the X8 slot is connected to the host through the X8 gold finger connector;

[0080] A second trigger module 12 is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal when the X16 slot is connected to the host through the X16 gold finger connector;

[0081] The data transmission module 13 is used to select a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

[0082] The beneficial effects of the present application are as follows: the present application is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method comprises: when the X8 slot is connected to a host through an X8 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal; when the X16 slot is connected to the host through an X16 gold finger connector, triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal; and selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards data transmitted by the host to the corresponding memory. It can be seen that the memory expansion module of the present application has newly added a programmable logic device, and the first memory expansion control chip and the second memory expansion control chip in the memory expansion module of the present application respectively include a first CXL controller and a second CXL controller, that is, the present application introduces the CXL protocol, and the CXL protocol can effectively improve the data transmission efficiency; further, the memory expansion module of the present application can adapt to the X8 gold finger connector and the X16 gold finger connector. When the host is connected to the X8 slot of the memory expansion module through the X8 gold finger connector, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the first high-level hot-plug detection signal. When the host is connected to the X8 slot of the memory expansion module through the X16 When the gold finger connector is connected to the X16 slot of the memory expansion module, the memory expansion module can trigger the programmable logic device to send a presence signal to each memory expansion control chip based on the second high-level hot-plug detection signal, that is, the memory expansion module can use different high-level hot-plug detection signals to trigger the programmable logic device to send a presence signal according to the different host connection methods. The traditional host connection method is not compatible with interface X8 and interface X16. The memory expansion module of this application has added a programmable logic device, which is not only compatible with the connection of X8 gold finger connector and X16 gold finger connector, but also can timely determine the current connection method between the memory expansion module and the host, thereby improving the flexibility and convenience of data transmission.

[0083] Furthermore, an embodiment of the present application also provides an electronic device. Figure 5This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0084] Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Specifically, it may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the data transmission method of the memory expansion module executed by the electronic device disclosed in any of the aforementioned embodiments.

[0085] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0086] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0087] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon include an operating system 221, a computer program 222 and data 223, etc. The storage method can be temporary storage or permanent storage.

[0088] Among them, the operating system 221 is used to manage and control the hardware devices and computer programs 222 on the electronic device to realize the operation and processing of the massive data 223 in the memory 22 by the processor 21, which can be Windows, Unix, Linux, etc. In addition to including a computer program that can be used to complete the data transmission method of the memory expansion module executed by the electronic device disclosed in any of the aforementioned embodiments, the computer program 222 can also further include a computer program that can be used to complete other specific tasks. In addition to including data transmitted from an external device received by the electronic device, the data 223 can also include data collected by its own input and output interface 25, etc.

[0089] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the data transmission method of the memory expansion module disclosed above is implemented. The specific steps of the method can refer to the corresponding contents disclosed in the above embodiments, and will not be repeated here.

[0090] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0091] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application. The steps of the method or algorithm described in conjunction with the embodiments disclosed herein can be implemented directly with hardware, a software module executed by a processor, or a combination of the two. The software module can be placed in a random access memory (RAM), memory, read-only memory (ROM), electrically programmable EPROM (Erasable Programmable Read Only Memory), electrically erasable programmable EEPROM (Electrically Erasable Programmable read only memory), register, hard disk, removable disk, CD-ROM (Compact Disc Read-Only Memory), or any other form of storage medium known in the technical field.

[0092] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0093] The data transmission method, device, equipment and medium of a memory expansion module provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A data transmission method for a memory expansion module, characterized in that: The method is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the method comprises: When the X8 slot is connected to the host through the X8 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal; When the X16 slot is connected to the host through the X16 gold finger connector, the programmable logic device is triggered to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal; A target memory expansion control chip is selected from the first memory expansion control chip and the second memory expansion control chip based on the presence signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

2. The data transmission method of the memory expansion module according to claim 1, characterized in that: The memory expansion module includes a clock buffer; the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal also includes: The programmable logic device is triggered to send a first enable signal to the clock buffer based on a first high-level hot plug detection signal, so that the clock buffer selects a first clock signal path between the clock buffer and the X8 gold finger connector based on the first enable signal, receives a first clock signal sent by the X8 gold finger connector through the first clock signal path, and sends the first clock signal to the first memory expansion control chip; Correspondingly, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes: The programmable logic device is triggered based on the second high-level hot plug detection signal to send a second enable signal to the clock buffer, so that the clock buffer selects the second clock signal path between the clock buffer and the X16 gold finger connector based on the second enable signal, receives the second clock signal issued by the X16 gold finger connector through the second clock signal path, and sends the second clock signal to the first memory extension control chip and the second memory extension control chip.

3. The data transmission method of the memory expansion module according to claim 1, characterized in that: The memory expansion module includes a multiplexer; the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the first high-level hot plug detection signal also includes: The programmable logic device is triggered to send a third enable signal to the multiplexer based on the first high-level hot-plug detection signal, so that the multiplexer selects the first multiplexed signal path between the X8 gold finger connector and the multiplexer based on the third enable signal, receives the first multiplexed signal sent by the X8 gold finger connector through the first multiplexed signal path, and sends the first multiplexed signal to the first memory expansion control chip; Correspondingly, the process of triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on the second high-level hot plug detection signal also includes: The programmable logic device is triggered based on the first high-level hot plug detection signal to send a fourth enable signal to the multiplexer, so that the multiplexer selects the second multiplexed signal path between the X16 gold finger connector based on the fourth enable signal, receives the second multiplexed signal sent by the X16 gold finger connector through the second multiplexed signal path, and sends the second multiplexed signal to the first memory expansion control chip.

4. The data transmission method of the memory expansion module according to claim 1, characterized in that: The selecting a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the in-place signal comprises: If the in-place signal indicates that the X8 slot is connected to the host through the X8 gold finger connector, the first memory expansion control chip is determined as the target memory expansion control chip, and the second memory expansion control chip is controlled to switch to a low power consumption state; If the presence signal indicates that the X16 slot is connected to the host through the X16 gold finger connector, the first memory expansion control chip and the second memory expansion control chip are both determined as target memory expansion control chips.

5. The data transmission method of the memory expansion module according to claim 4, characterized in that: The memory connector includes a first memory connector and a second memory connector corresponding to the first memory expansion control chip, and a third memory connector and a fourth memory connector corresponding to the second memory expansion control chip; The target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, and also includes: A first target memory connector and a second target memory connector corresponding to the target memory expansion control chip are selected from the first memory connector, the second memory connector, the third memory connector and the fourth memory connector.

6. The data transmission method of the memory expansion module according to claim 5, characterized in that: The target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including: The target memory expansion sends first data including a chip control data signal, a data selection signal, an ECC check signal, a first chip select signal, and a first differential clock signal to the first target memory connector through a first memory signal path between the target memory expansion and the first target memory connector, so that the first target memory connector sends the first data to the corresponding memory.

7. The data transmission method of the memory expansion module according to claim 5, characterized in that: The target memory expansion control chip forwards the data transmitted by the host to the corresponding memory, including: The target memory expansion sends second data including a chip control data signal, a data selection signal, an ECC check signal, a second chip select signal, and a second differential clock signal to the second target memory connector through a second memory signal path between the target memory expansion and the second target memory connector, so that the second target memory connector sends the second data to the corresponding memory.

8. A data transmission device for a memory expansion module, characterized in that: The device is applied to a memory expansion module including a first memory expansion control chip, a second memory expansion control chip and a programmable logic device, wherein the programmable logic device is respectively connected to a first CXL controller in the first memory expansion control chip and a second CXL controller in the second memory expansion control chip, the first memory expansion control chip and the second memory expansion control chip are respectively connected to corresponding memories through memory connectors, and the PICE slot of the memory expansion module includes an X8 slot and an X16 slot; wherein the device includes: A first trigger module is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a first high-level hot plug detection signal when the X8 slot is connected to the host through the X8 gold finger connector; A second trigger module is used for triggering the programmable logic device to send a presence signal to the first memory expansion control chip and the second memory expansion control chip based on a second high-level hot plug detection signal when the X16 slot is connected to the host through the X16 gold finger connector; A data transmission module is used to select a target memory expansion control chip from the first memory expansion control chip and the second memory expansion control chip based on the in-place signal, so that the target memory expansion control chip forwards the data transmitted by the host to the corresponding memory.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor is used to execute the computer program to implement the steps of the data transmission method of the memory expansion module as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store computer programs; wherein, when the computer program is executed by a processor, the steps of the data transmission method of the memory expansion module as described in any one of claims 1 to 7 are implemented.

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