Orthogonal vector-based level conversion circuit, level shifter and electronic device
By adopting a level conversion circuit based on orthogonal vectors in the level converter, and using the ring level shift structure and the current-controlled oscillator to generate a composite signal that is orthogonal to each other, the problems of high power consumption and uncertain duty cycle of the existing level converter are solved, and the level conversion effect of low power consumption and determined duty cycle is achieved.
Patent Information
- Application Number
- CN202411646351.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-03-04
AI Technical Summary
The existing level converters consume a large power consumption during the conversion process, and the duty cycle of the output signal is uncertain, making it difficult to achieve level conversion with less power consumption.
The level conversion circuit based on orthogonal vector is adopted, and a combined ring level shift structure and a flow-controlled oscillator are combined to generate a composite signal that is orthogonal to control the conduction and disconnection of the pull-up and pull-down branches to avoid short-circuit current.
It effectively reduces the power consumption during the level conversion process and ensures that the duty cycle of the output signal is determined, achieving level conversion with a lower power consumption cost.
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Figure CN119561541A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a level conversion circuit, a level converter and an electronic device based on orthogonal vectors. Background Art
[0002] Folded integration has become a common method of quantization within pixels. Currently, there are two commonly used folded integration methods: direct injection of integration capacitors and integration based on current controlled oscillators (CCOs). Although these two circuit structures have small areas, their voltage swings are also small. Small voltage swings make it difficult to connect to the subsequent digital circuits for normal operation. Therefore, in the current circuit structure, the small swing voltage signal is generally connected to the level converter to adjust it to the appropriate voltage domain, and then connected to the subsequent digital circuits.
[0003] In the current circuit structure, the level converter consumes a lot of power during conversion due to its own structure, and the duty cycle of the output signal is uncertain. Therefore, how to realize the level converter at a low power consumption cost has become an urgent problem to be solved in the design of the level converter. Summary of the invention
[0004] In view of the above problems, the present invention is proposed to provide a level conversion circuit, a level converter and an electronic device based on orthogonal vectors that solve the above problems or partially solve the above problems.
[0005] A first aspect of an embodiment of the present invention provides a level conversion circuit based on orthogonal vectors, the level conversion circuit comprising: a ring level shifting structure; The number of stages of the annular level shift structure is the same as the number of stages of the current controlled oscillator; The current controlled oscillator is connected to the ring level shift structure via its intermediate node; The current controlled oscillator is configured to generate a basic signal at each intermediate node based on the current signal, and the basic signals generated by all the intermediate nodes are transmitted to the ring level shifting structure; The annular level shift structure is configured to process the basic signal using its own structure to obtain multiple groups of target signals, each group of target signals including two composite signals that are orthogonal vectors to each other; Wherein, the number of groups of the target signal is the same as the number of levels of the annular level shift structure; The target signal is used to control the conduction and disconnection of each branch in the ring level shift structure.
[0006] Optionally, the ring-shaped level shift structure comprises: a plurality of branches, each branch comprising: a pull-up branch and a pull-down branch; Each stage in the ring-shaped level shift structure is connected to the current-controlled oscillator through a respective pull-down branch; The pull-up branch and the pull-down branch in the primary branch are controlled by a set of target signals; The pull-up branch is configured to be turned on or off based on a first composite signal of two received composite signals; The pull-down branch is configured to be turned on or off based on a second composite signal of the two received composite signals; Wherein, when the pull-up branch is turned on, the pull-down branch is turned off, and when the pull-up branch is turned off, the pull-down branch is turned on.
[0007] Optionally, the pull-up branch includes: a PMOS tube; The first end of the PMOS tube receives a power supply voltage; The second end of the PMOS tube is connected to the third end of the PMOS tube of the pull-up branch in the previous branch; The third end of the PMOS tube is connected to the second end of the PMOS tube of the pull-up branch in the subsequent branch and the pull-down branch respectively; Wherein, the second end of the PMOS tube of the pull-up branch in the first-stage branch is connected to the third end of the PMOS tube of the pull-up branch in the tail-stage branch.
[0008] Optionally, the pull-down branch includes: two NMOS tubes connected in series; The third end of the first NMOS tube of the two series-connected NMOS tubes is connected to the third end of the PMOS tube; The second end of the first NMOS tube is connected to the second intermediate node in the current controlled oscillator; The first end of the first NMOS tube is connected to the third end of the second NMOS tube of the two NMOS tubes connected in series; The second end of the second NMOS tube is connected to the first intermediate node in the current controlled oscillator; The first end of the second NMOS tube is grounded.
[0009] The phase difference between the basic signal generated by the first intermediate node and the basic signal generated by the second intermediate node is a preset phase, and the preset phase is twice the target phase difference, and the target phase difference is the phase difference between the basic signals generated by adjacent intermediate nodes.
[0010] Optionally, the first NMOS tube is controlled by the second basic signal generated by the second intermediate node, and the second NMOS tube is controlled by the first basic signal generated by the first intermediate node, then the conduction or disconnection of the pull-down branch where the first NMOS tube and the second NMOS tube are located is controlled by the second composite signal, and the second composite signal is a signal obtained by performing a logical AND operation on the second basic signal and the first basic signal.
[0011] Optionally, the on or off of the pull-up branch where the PMOS tube is located is controlled by the first composite signal, and the first composite signal is a second composite signal corresponding to the pull-down branch in the previous branch of the current branch where the PMOS tube is located; The first composite signal and the second composite signal are orthogonal vectors to each other, so the pull-up branch where the PMOS tube is located and the pull-down branches where the first NMOS tube and the second NMOS tube are located do not have a common conduction time.
[0012] Optionally, when the current-controlled oscillator includes a five-stage inverter, the annular level shift structure includes a five-stage branch, and the vector A corresponding to the basic signal generated by the output node of the first-stage inverter in the five-stage inverter is 1 =(1,1,1,1,1,0,0,0,0,0), the vector A corresponding to the basic signal generated by the output node of the second-stage inverter 2 =(1, 0, 0, 0, 0, 0, 1, 1, 1, 1), the vector A corresponding to the basic signal generated by the output node of the third-stage inverter 3 =(0, 0, 1, 1, 1, 1, 0, 0, 0), the vector A corresponding to the basic signal generated by the output node of the fourth-stage inverter 4 =(1,1,1,0,0,0,0,0,1,1),the vector A corresponding to the basic signal generated by the output node of the fifth-stage inverter 5 =(0, 0, 0, 0, 1, 1, 1, 1, 0,the second composite signal is the vector A 4 = (1, 1, 1, 0, 0, 0, 0, 1, 1) with the vector A 1 = (1, 1, 1, 1, 1, 0, 0, 0, 0, 0) The signal A is obtained after the logical AND operation 4 &A 1 =(1, 1, 1, 0, 0, 0, 0, 0, 0).
[0013] Optionally, when the current-controlled oscillator includes a five-stage inverter, the annular level shift structure includes a five-stage branch, and the vector A corresponding to the basic signal generated by the output node of the first-stage inverter in the five-stage inverter is 1=(1,1,1,1,1,0,0,0,0,0), the vector A corresponding to the basic signal generated by the output node of the second-stage inverter 2 =(1, 0, 0, 0, 0, 0, 1, 1, 1, 1), the vector A corresponding to the basic signal generated by the output node of the third-stage inverter 3 =(0, 0, 1, 1, 1, 1, 0, 0, 0), the vector A corresponding to the basic signal generated by the output node of the fourth-stage inverter 4 =(1,1,1,0,0,0,0,0,1,1),the vector A corresponding to the basic signal generated by the output node of the fifth-stage inverter 5 =(0, 0, 0, 0, 1, 1, 1, 1, 0, the first composite signal is the vector A 3 = (0, 0, 1, 1, 1, 1, 0, 0, 0) with the vector A 5 =(0, 0, 0, 0, 1, 1, 1, 1, 0)The signal A obtained by performing a logical AND operation 3 &A 5 =(0, 0, 0, 0, 1, 1, 1, 0, 0, 0).
[0014] A second aspect of an embodiment of the present invention provides an analog-to-digital converter, comprising: an orthogonal vector-based level conversion circuit as described in any one of the first aspects.
[0015] A third aspect of an embodiment of the present invention provides an electronic device, comprising the analog-to-digital converter as described in the second aspect.
[0016] The orthogonal vector-based level conversion circuit provided by the present invention comprises: a ring level shift structure; the number of stages of the current-controlled oscillator is the same as that of the ring level shift structure; and the current-controlled oscillator is connected to the ring level shift structure via its own intermediate node.
[0017] The current controlled oscillator is configured to generate a basic signal at each intermediate node based on the current signal, and the basic signals generated by all the intermediate nodes are transmitted to the ring level shift structure. The ring level shift structure is configured to process the basic signal using its own structure to obtain multiple groups of target signals, each group of target signals includes two composite signals that are orthogonal vectors.
[0018] The number of target signal groups is the same as the number of levels of the ring level shift structure; the target signal is used to control the conduction and disconnection of each level of branches in the ring level shift structure.
[0019] The level conversion circuit proposed in the present invention creatively proposes a ring level shift structure, which is used to convert the basic signal generated by each intermediate node in the traditional current-controlled oscillator to obtain multiple groups of target signals. Since each group of target signals includes two composite signals of mutually orthogonal vectors, and the pull-up branch and the pull-down branch in each level of branch are respectively controlled by the two composite signals of mutually orthogonal vectors, the pull-up branch and the pull-down branch of each level of branch will not be turned on at the same time, and there is no common conduction time, thereby greatly reducing the short-circuit current and reducing the power consumption during conversion. In addition, due to the circuit delay after the level conversion, each node has a fixed phase shift, and the final output signal has a fixed phase shift with the internal node signal of the current-controlled oscillator, and the duty cycle is determined. Therefore, the level conversion circuit proposed in the present invention realizes the level converter at a relatively low power consumption cost, and has a high practical value. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.
[0021] Figure 1 It is the circuit structure of a traditional 5-level inverter current-controlled oscillator; Figure 2 is a modular schematic diagram of an exemplary level conversion circuit connected to a current controlled oscillator according to an embodiment of the present invention; Figure 3 It is a structural schematic diagram of a preferred level conversion circuit connected to a current-controlled oscillator in an embodiment of the present invention; Figure 4 is a waveform diagram of each signal in the embodiment of the present invention. DETAILED DESCRIPTION
[0022] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, are only part of the embodiments of the present invention, not all of the embodiments, and are not used to limit the present invention.
[0023] The inventors found that currently, most pixel quantization uses the form of current-controlled oscillator (CCO) integration, because the current-controlled oscillator is widely used due to its power-friendly performance. Among them, the single-ended oscillator based on the inverter is the most commonly used due to its simple structure. Figure 1 The schematic diagram of the structure of the traditional inverter-based single-ended current-controlled oscillator is shown. Figure 1The circuit structure of the current controlled oscillator is illustrated by taking the currently widely used 5-level inverter as an example.
[0024] The voltage swing of the above-mentioned current-controlled oscillator is positively correlated with the size of its input current. When it is used in infrared focal plane pixels, because the current in the pixel is small, the oscillator swing is also relatively small (for example, under the 180nm process, the input current is nA level, and the oscillator voltage swing is about 0.5V). Because the pixel current needs to be quantified, the output of the current-controlled oscillator is generally connected to a counter. However, when the voltage swing of the current-controlled oscillator is small and varies with the input current, it may not match the corresponding counter voltage domain. Therefore, the output signal of the current-controlled oscillator is generally connected to a level converter, and the level converter is used to adjust the smaller output signal of the current-controlled oscillator to the appropriate voltage domain and then connect it to the counter. There are currently three commonly used level converters: 1) Inverter type level converter: This type of level converter uses the flip threshold of the inverter to compare whether the output signal of the current controlled oscillator is high or low. The flip threshold of the inverter is changed by adjusting the width-to-length ratio of the transistor. However, a slight influence on the transistor process will cause the flip threshold to change, which will affect the duty cycle of the output signal. And if this type of level converter wants to reduce the power consumption of level shifting, the inverter width-to-length ratio, that is, the transistor width-to-length ratio, is required, which will cause the inverter size to be relatively large and contribute parasitic capacitance to the internal nodes of the current controlled oscillator.
[0025] 2) Cross-coupled level converter: This type of level converter is the most commonly used. However, if you want to use this type of level converter in a pixel circuit, first of all, you need to generate the input anti-signal at an additional cost, which requires a power supply voltage suitable for the output swing of the current-controlled oscillator and an inverter. Secondly, this type of level converter itself consumes a lot of power, so it is not suitable for use in pixel circuits.
[0026] 3) Multi-phase level converter: This type of level converter connects the middle node of the current-controlled oscillator to a group of inverters arranged in a ring. For the inverters that form the ring, the middle node of the current-controlled oscillator is the switch that controls the inverter, so the frequency of the middle node determines the frequency of each node of this group of inverters. However, this level converter only considers converting the level of the signals of each node of the oscillator at the same time and maintaining the phase relationship, and does not consider power consumption and other issues at all. Since the two adjacent nodes of the current-controlled oscillator itself are not strictly inversely related, the transistors in the ring-shaped inverter are turned on at the same time, that is, there is a short-circuit current, and the power consumption is large. The only way to solve or reduce the short-circuit current using existing technologies is to use high-threshold transistors or transistors with inverse width-to-length ratios. However, these solutions will bring about the cost of increasing the layout area and complex circuit structure. Therefore, it is difficult for this structure to reduce the power consumption during the level conversion process on the basis of the same area.
[0027] Based on the above problems, the inventor creatively proposed a level conversion circuit based on orthogonal vectors, an analog-to-digital converter and an electronic device of the present invention. The technical solution of the present invention is explained and illustrated in detail below.
[0028] The level conversion circuit based on orthogonal vectors according to the embodiment of the present invention refers to Figure 1 The modular schematic diagram of the level conversion circuit connected to the current-controlled oscillator shown in the figure, the level conversion circuit includes: a ring level shift structure; the number of stages of the ring level shift structure is the same as the number of stages of the current-controlled oscillator; the current-controlled oscillator passes through its own intermediate node A 1 , A 2 , A 3 , ... A N Connected to a ring level shift structure.
[0029] The current-controlled oscillator is configured to generate a basic signal at each intermediate node based on the current signal, and the basic signals generated by all the intermediate nodes are transmitted to the ring level shift structure; the ring level shift structure is configured to process the basic signal using its own structure to obtain multiple groups of target signals, each group of target signals includes two composite signals that are orthogonal vectors. Among them, the number of groups of target signals is the same as the number of levels of the ring level shift structure; the target signal is used to control the conduction and disconnection of each level of the branch in the ring level shift structure.
[0030] For example, if the current-controlled oscillator is composed of 5-level inverters, there are 5 levels of branches in the ring level shift structure. The 5-level inverter corresponds to 5 intermediate nodes, each of which generates a basic signal, so a total of 5 basic signals are generated. These 5 basic signals are transmitted to the ring level shift structure, which processes these 5 basic signals to obtain 5 groups of target signals. Each group of target signals includes two composite signals that are orthogonal vectors. Each of the 5 levels of branches in the ring level shift structure is controlled by a group of target signals, and the conduction or disconnection of its own branch is determined according to the target signal.
[0031] A preferred ring level shift structure includes: multiple branches, the number of branches is equal to the number of current controlled oscillators, and each branch includes: a pull-up branch and a pull-down branch; each level in the ring level shift structure is connected to the current controlled oscillator through its own pull-down branch.
[0032] The pull-up branch and the pull-down branch in each level of branch are controlled by a set of target signals; wherein the pull-up branch of each level of branch is configured to be turned on or off based on the first composite signal of the two received composite signals; and the pull-down branch is configured to be turned on or off based on the second composite signal of the two received composite signals. In this case, since the target signal includes two composite signals that are orthogonal vectors to each other, that is, the first composite signal and the second composite signal are orthogonal vectors to each other, when the pull-up branch in each level of branch is turned on, the pull-down branch in the level of branch is turned off, and similarly, when the pull-up branch is turned off, the pull-down branch is turned on.
[0033] Preferably, the pull-up branch includes: a PMOS tube; that is, the pull-up branch in each level of branch includes a PMOS tube, and there are as many PMOS tubes as there are levels of branches. For example, if there are 5 levels of branches, there are 5 PMOS tubes.
[0034] For any PMOS tube, the first end of the PMOS tube receives the power supply voltage; the second end of the PMOS tube is connected to the third end of the PMOS tube of the pull-up branch in the front-stage branch; the third end of the PMOS tube is respectively connected to the second end and the pull-down branch of the PMOS tube of the pull-up branch in the rear-stage branch.
[0035] The second end of the PMOS tube of the pull-up branch in the first-stage branch is connected to the third end of the PMOS tube of the pull-up branch in the last-stage branch.
[0036] Preferably, the pull-down branch includes: two NMOS tubes connected in series; that is, the pull-down branch in each level of branch includes two NMOS tubes, and there are twice the number of NMOS tubes as many levels of branches as there are levels of branches. For example: there are 5 levels of branches, then there are 10 NMOS tubes.
[0037] For two NMOS tubes connected in series in any pull-down branch, the third end of the first NMOS tube is connected to the third end of the PMOS tube in the pull-up branch of the first-level branch where the pull-down branch is located; the second end of the first NMOS tube is connected to the second intermediate node in the current-controlled oscillator; the first end of the first NMOS tube is connected to the third end of the second NMOS tube in the two NMOS tubes connected in series; the second end of the second NMOS tube is connected to the first intermediate node in the current-controlled oscillator; and the first end of the second NMOS tube is grounded.
[0038] Among them, the phase difference between the basic signal generated by the first intermediate node in the flow-controlled oscillator and the phase difference between the basic signal generated by the second intermediate node is a preset phase, and the preset phase is 2 times the target phase difference, and the so-called target phase difference is the phase difference between the basic signals generated by adjacent intermediate nodes. Taking the 5-level inverter structure as an example, assuming that the first intermediate node in the flow-controlled oscillator is the output node of its first-level inverter, then the second intermediate node is the output node of the third-level inverter. By analogy, if the first intermediate node in the current-controlled oscillator is the output node of its second-stage inverter, then the second intermediate node is the output node of the fourth-stage inverter; if the first intermediate node in the current-controlled oscillator is the output node of its third-stage inverter, then the second intermediate node is the output node of the fifth-stage inverter; if the first intermediate node in the current-controlled oscillator is the output node of its fourth-stage inverter, then the second intermediate node is the output node of the first-stage inverter; if the first intermediate node in the current-controlled oscillator is the output node of its fifth-stage inverter, then the second intermediate node is the output node of the second-stage inverter.
[0039] To better understand the above structure, refer to Figure 3 A schematic structural diagram of a preferred level conversion circuit connected to a current controlled oscillator is shown. Figure 3 In the figure, a current-controlled oscillator including a 5-stage inverter structure and a ring-shaped level shift structure including a 5-stage branch are used as an example. Other structures, such as a current-controlled oscillator including an n-stage inverter structure and a ring-shaped level shift structure including an n-stage branch, can be described by those skilled in the art according to the present invention. Figure 3 As shown, it can be obtained through simple deduction and is not shown one by one.
[0040] Figure 3 China-Israel MP 1 MN 1 The first stage inverter structure of the current controlled oscillator is formed by MP 2 MN 2 The second stage inverter structure of the current controlled oscillator is formed by MP 3 MN 3 The third inverter structure of the current-controlled oscillator is formed by MP 4 MN 4 The fourth-stage inverter structure of the current-controlled oscillator is formed by MP 5 MN 5 The fifth-stage inverter structure of the current-controlled oscillator is formed. The source of all P-type MOS tubes receives the current I generated by the current source. 0 Define the output node of the first stage inverter structure as the first intermediate node A 1 The output node of the second stage inverter structure is the second intermediate node A 2 The output node of the third-stage inverter structure is the third intermediate node A. 3The output node of the 4th stage inverter structure is the fourth intermediate node A 4 The output node of the fifth-stage inverter structure is the fifth intermediate node A. 5 .
[0041] Figure 3 China-Israel MP 6 MN 11 MN 6 The first branch of the ring level shift structure is formed by MP 7 MN 12 MN 7 The second branch of the ring level shift structure is formed by MP 8 MN 13 MN 8 The third branch of the ring level shift structure is formed by MP 9 MN 14 MN 9 The 4th level branch of the ring level shift structure is formed by MP 10 MN 15 MN 10 The fifth branch of the ring level shift structure is formed. Among them, the pull-up branch in the first branch is MP 6 , the pull-down branch is MN 11 MN 6 ; The pull-up branch in the second-level branch is MP 7 , the pull-down branch is MN 12 MN 7 ; The pull-up branch in the third-level branch is MP 8 , the pull-down branch is MN 13 MN 8 ; The 4th level branch is MP 9 , the pull-down branch is MN 14 MN 9 ; The pull-up branch in the 5th level branch is MP 10 , the pull-down branch is MN 15 MN 10 .
[0042] Depend on Figure 3 It can be seen that the pull-up branch MP6 in the first-level branch is controlled by the signal O 5 (the first composite signal in a group of target signals for controlling the first-stage branch), signal O 5 The high or low state is determined by the pull-down branch MN in the fifth branch. 15 MN 10 If the pull-down branch MN 15 MN 10 All conduction, then O 5Pulled to ground, it is in low level state. If the pull-down branch MN 15 MN 10 If both are disconnected, then O 5 is pulled up to the power supply voltage, which is high or O 5 The pull-down branch MN in the first-level branch 11 Controlled by the fourth intermediate node A 4 signal, and MN 6 Controlled by the first intermediate node A 1 The signal A 4 and A 1 The signal obtained by performing the logical AND operation is the second composite signal in the group of target signals that controls the first-level branch. Since the two composite signals are orthogonal vectors, for the first-level branch, MP 6 When conducting, MN 11 MN 6 Disconnect, MP 6 When disconnected, MN 11 MN 6 The situations of the other second-level branches, third-level branches, fourth-level branches, and fifth-level branches are similar and will not be described in detail.
[0043] Above Figure 3 The structure shown, combined with Figure 4 The signal waveform shown in the figure ( Figure 4 In the example, a specific voltage value is used as an example, where Voltage represents voltage, and the unit is V). Figure 3 In the flow-controlled oscillator structure shown, there are ten phases in each cycle, and each phase differs by 36°. Based on the ten phases, each intermediate node of the flow-controlled oscillator is defined as a ten-dimensional vector. Assume that the first intermediate node A 1 The application vector is represented as A 1 =(1,1,1,1,1,0,0,0,0,0), the second intermediate node A 2 The application vector is represented as A 2 =(1,0,0,0,0,0,0,1,1,1,1), the third intermediate node A 3 The application vector is represented as A 3 =(0,0,1,1,1,1,1,0,0,0), the fourth intermediate node A 4 The application vector is represented as A 4 =(1,1,1,0,0,0,0,0,1,1)、the fifth intermediate node A 5 The application vector is represented as A 5 = (0, 0, 0, 0, 1, 1, 1, 1, 0), we can get A 1 With A 2The phase difference is 360°-36°=324°, A 1 With A 3 The phase difference is 72°. Definition A 1,i is the vector A 1 The i-th element of , defines the operator &, for example, A 4 &A 1 =(A 4,1 *A 1,1 , A 4,2 *A 1,2 , A 4,3 *A 1,3 , A 4,4 *A 1,4 , A 4,5 *A 1,5 , A 4,6 *A 1,6 , A 4,7 *A 1,7 , A 4,8 *A 1,8 , A 4,9 *A 1,9 , A 4,10 *A 1,10 ).
[0044] Using A 1 With A 3 , A 3 With A 5 , A 5 With A 2 , A 2 With A 4 , A 4 With A 1 Each group of fixed phases differs by 72°, thus constructing five groups of orthogonal vectors. For example: MN 10 With MN 15 The corresponding composite signal vector A is obtained by concatenation 3 &A 5 = (0, 0, 0, 0, 1, 1, 1, 0, 0, 0). When A 3,i *A 5,i =1, signal O 5 is low level, MP 6 MN 6 With MN 11 The vector A corresponding to the composite signal is obtained by concatenation 4 &A 1 = (1, 1, 1, 0, 0, 0, 0, 0, 0, 0). When A 4,i *A 1,i =1, MN 6 and MN 11 The pull-down path is turned on. 3 &A5 With A 4 &A 1 They are orthogonal vectors. The pull-up branch and the pull-down branch in the first-level branch do not have a common conduction time. Figure 4 It can also be seen that when A 4,i *A 1,i When it is high, A 3,i *A 5,i A is low level. 3,i *A 5,i The high level always appears in A 4,i *A 1,i Therefore, the MOS tube in the whole circuit does not need to have a reverse width-to-length ratio, and the short circuit of the level conversion circuit is extremely small.
[0045] The same is true for the other branches, which will not be described one by one. Therefore, when the entire level conversion circuit is working, the power consumption during the level conversion process is low. And after the level conversion, due to the circuit delay, each intermediate node has a fixed phase shift, but the output signal duty cycle is determined. The duty cycle of the signal after the traditional level converter is converted depends on the threshold of the subsequent inverter, and its output signal duty cycle is uncertain. The level conversion circuit proposed by the present invention better solves the problems existing in the traditional level converter.
[0046] Based on the above level conversion circuit, an embodiment of the present invention further provides an analog-to-digital converter, the analog-to-digital converter comprising: any one of the above level conversion circuits based on orthogonal vectors.
[0047] Based on the above analog-to-digital converter, an embodiment of the present invention further provides an electronic device, wherein the electronic device includes the above analog-to-digital converter.
[0048] In summary, the orthogonal vector-based level conversion circuit provided by the present invention includes: a current-controlled oscillator and a ring-shaped level shifting structure; the number of stages of the current-controlled oscillator is the same as the number of stages of the ring-shaped level shifting structure; the current-controlled oscillator is connected to the ring-shaped level shifting structure through its own intermediate node.
[0049] The current controlled oscillator is configured to generate a basic signal at each intermediate node based on the current signal, and the basic signals generated by all the intermediate nodes are transmitted to the ring level shift structure. The ring level shift structure is configured to process the basic signal using its own structure to obtain multiple groups of target signals, each group of target signals includes two composite signals that are orthogonal vectors.
[0050] The number of target signal groups is the same as the number of levels of the ring level shift structure; the target signal is used to control the conduction and disconnection of each level of branches in the ring level shift structure.
[0051] The level conversion circuit proposed in the present invention creatively proposes a ring level shift structure, which is used to convert the basic signal generated by each intermediate node in the traditional current-controlled oscillator to obtain multiple groups of target signals. Since each group of target signals includes two composite signals of mutually orthogonal vectors, and the pull-up branch and the pull-down branch in each level of branch are respectively controlled by the two composite signals of mutually orthogonal vectors, the pull-up branch and the pull-down branch of each level of branch will not be turned on at the same time, and there is no common conduction time, thereby greatly reducing the short-circuit current and reducing the power consumption during conversion. In addition, due to the circuit delay after the level conversion, each node has a fixed phase shift, and the final output signal has a fixed phase shift with the internal node signal of the current-controlled oscillator, and the duty cycle is determined. Therefore, the level conversion circuit proposed in the present invention realizes the level converter at a relatively low power consumption cost, and has a high practical value.
[0052] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.
[0053] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.
[0054] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.
Claims
1. A level conversion circuit based on orthogonal vectors, characterized in that: The level conversion circuit comprises: a ring level shift structure; The number of stages of the annular level shift structure is the same as the number of stages of the current controlled oscillator; The current controlled oscillator is connected to the ring level shift structure via its intermediate node; The current controlled oscillator is configured to generate a basic signal at each intermediate node based on the current signal, and the basic signals generated by all the intermediate nodes are transmitted to the ring level shifting structure; The annular level shift structure is configured to process the basic signal using its own structure to obtain multiple groups of target signals, each group of target signals including two composite signals that are orthogonal vectors to each other; Wherein, the number of groups of the target signal is the same as the number of levels of the annular level shift structure; The target signal is used to control the conduction and disconnection of each branch in the ring level shift structure.
2. The level conversion circuit according to claim 1, characterized in that: The ring-shaped level shift structure comprises: a plurality of branches, each of which comprises: a pull-up branch and a pull-down branch; Each stage in the ring-shaped level shift structure is connected to the current-controlled oscillator through a respective pull-down branch; The pull-up branch and the pull-down branch in the primary branch are controlled by a set of target signals; The pull-up branch is configured to be turned on or off based on a first composite signal of two received composite signals; The pull-down branch is configured to be turned on or off based on a second composite signal of the two received composite signals; Wherein, when the pull-up branch is turned on, the pull-down branch is turned off, and when the pull-up branch is turned off, the pull-down branch is turned on.
3. The level conversion circuit according to claim 2, characterized in that: The pull-up branch includes: a PMOS tube; The first end of the PMOS tube receives a power supply voltage; The second end of the PMOS tube is connected to the third end of the PMOS tube of the pull-up branch in the previous branch; The third end of the PMOS tube is connected to the second end of the PMOS tube of the pull-up branch in the subsequent branch and the pull-down branch respectively; Wherein, the second end of the PMOS tube of the pull-up branch in the first-stage branch is connected to the third end of the PMOS tube of the pull-up branch in the tail-stage branch.
4. The level conversion circuit according to claim 3, characterized in that: The pull-down branch includes: two NMOS tubes connected in series; The third end of the first NMOS tube of the two series-connected NMOS tubes is connected to the third end of the PMOS tube; The second end of the first NMOS tube is connected to the second intermediate node in the current controlled oscillator; The first end of the first NMOS tube is connected to the third end of the second NMOS tube of the two NMOS tubes connected in series; The second end of the second NMOS tube is connected to the first intermediate node in the current controlled oscillator; A first end of the second NMOS tube is grounded; The phase difference between the basic signal generated by the first intermediate node and the basic signal generated by the second intermediate node is a preset phase, and the preset phase is twice the target phase difference, and the target phase difference is the phase difference between the basic signals generated by adjacent intermediate nodes.
5. The level conversion circuit according to claim 4, characterized in that: The first NMOS tube is controlled by the second basic signal generated by the second intermediate node, and the second NMOS tube is controlled by the first basic signal generated by the first intermediate node. Then, the conduction or disconnection of the pull-down branch where the first NMOS tube and the second NMOS tube are located is controlled by the second composite signal, and the second composite signal is a signal obtained by performing a logical AND operation on the second basic signal and the first basic signal.
6. The level conversion circuit according to claim 4, characterized in that: The on or off of the pull-up branch where the PMOS tube is located is controlled by the first composite signal, and the first composite signal is the second composite signal corresponding to the pull-down branch in the previous branch of the current branch where the PMOS tube is located; The first composite signal and the second composite signal are orthogonal vectors to each other, so the pull-up branch where the PMOS tube is located and the pull-down branches where the first NMOS tube and the second NMOS tube are located do not have a common conduction time.
7. The level conversion circuit according to claim 5, characterized in that: When the current controlled oscillator includes five-stage inverters, the ring-shaped level shift structure includes five-stage branches, the basic signal generated by the output node of the first-stage inverter in the five-stage inverter corresponds to a vector A1=(1,1,1,1,1,0,0,0,0,0), the basic signal generated by the output node of the second-stage inverter corresponds to a vector A2=(1,0,0,0,0,0,0,1,1,1,1), the basic signal generated by the output node of the third-stage inverter corresponds to a vector A3=(0,0,1,1,1,1,1,0,0,0), and the basic signal generated by the output node of the fourth-stage inverter corresponds to a vector A4=(0,0,1,1,1,1,1,0,0,0), and the basic signal generated by the output node of the fourth-stage inverter corresponds to a vector A5=(0,0,1,1,1,1,1,0,0,0). When the vector A4=(1,1,1,0,0,0,0,0,1,1) corresponding to the basic signal generated by the node, and the vector A5=(0,0,0,0,1,1,1,1,1,0) corresponding to the basic signal generated by the output node of the fifth-stage inverter, the second composite signal is the signal A4&A1=(1,1,1,0,0,0,0,0,0,0,0) obtained by performing a logical AND operation on the vector A4=(1,1,1,0,0,0,0,0,1,1) and the vector A1=(1,1,1,1,1,0,0,0,0,0).
8. The level conversion circuit according to claim 6, characterized in that: When the current controlled oscillator includes five-stage inverters, the ring-shaped level shift structure includes five-stage branches, the basic signal generated by the output node of the first-stage inverter in the five-stage inverter corresponds to a vector A1=(1,1,1,1,1,0,0,0,0,0), the basic signal generated by the output node of the second-stage inverter corresponds to a vector A2=(1,0,0,0,0,0,0,1,1,1,1), the basic signal generated by the output node of the third-stage inverter corresponds to a vector A3=(0,0,1,1,1,1,1,0,0,0), and the basic signal generated by the output node of the fourth-stage inverter corresponds to a vector A4=(0,0,1,1,1,1,1,0,0,0), and the basic signal generated by the output node of the fourth-stage inverter corresponds to a vector A5=(0,0,1,1,1,1,1,0,0,0). When the vector A4=(1,1,1,0,0,0,0,0,1,1) corresponding to the basic signal generated by the node, and the vector A5=(0,0,0,0,0,1,1,1,1,1,0) corresponding to the basic signal generated by the output node of the fifth-stage inverter, the first composite signal is the signal A3&A5=(0,0,0,0,1,1,1,0,0,0) obtained by performing a logical AND operation on the vector A3=(0,0,1,1,1,1,1,0,0) and the vector A5=(0,0,0,0,0,1,1,1,1,1,0).
9. An analog-to-digital converter, characterized in that: The analog-to-digital converter comprises: an orthogonal vector-based level conversion circuit as described in any one of claims 1-8.
10. An electronic device, characterized in that: The electronic device comprises the analog-to-digital converter as claimed in claim 9.