Packaging method and packaging structure

Abstract

The invention discloses a packaging method and a packaging structure, and the packaging method comprises the steps: providing a substrate which comprises a first side and a second side which are opposite to each other; providing a chip, and arranging the chip on the first side of the substrate; a first isolation film is formed on the first side surface of the substrate, the first isolation film covers the first side surface of the substrate and the side wall surface and the top surface of the chip, and the first isolation film extends to the first side surface of the substrate from the side wall surface of the chip; and forming a second isolating membrane on the surface of the first isolating membrane, wherein the hardness of the second isolating membrane is greater than that of the first isolating membrane. The packaging method can improve the pressure resistance, humidity resistance, isolation, high temperature resistance, interference resistance and heat conduction performance of the packaging structure, is suitable for thin packaging, and realizes device miniaturization.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a packaging method and a packaging structure. Background Art

[0002] The RF (Radio Frequency, referred to as RF) front-end chips of wireless communication equipment include power amplifiers, antenna switches, RF filters, multiplexers and low noise amplifiers, etc. Among them, RF filters include piezoelectric surface acoustic wave (Surface Acoustic Wave, referred to as SAW) filters, piezoelectric bulk acoustic wave (Bulk Acoustic Wave, referred to as BAW) filters, micro-electro-mechanical system (Micro-Electro-Mechanical System, referred to as MEMS) filters, integrated passive devices (Integrated Passive Devices, referred to as IPD) filters, etc.

[0003] As wireless communication technology gradually evolves, the scope of use of wireless communication equipment becomes wider and wider, and the requirements for the size and reliability of filters are becoming higher and higher. Piezoelectric surface acoustic wave filters are currently the most widely used filters in wireless communication equipment, and their small size and high reliability packaging form are becoming more and more widely used.

[0004] Therefore, there is a need for continuous improvement of filters with smaller sizes. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a packaging method and a packaging structure to improve the size of the filter.

[0006] To solve the above technical problems, the technical solution of the present invention provides a packaging method, including: providing a substrate, the substrate including a first side and a second side opposite to each other; providing a chip, and arranging the chip on the first side of the substrate; forming a first isolation film on the first side of the substrate, the first isolation film covering the first side surface of the substrate, the side wall surface and the top surface of the chip, the first isolation film extending from the side wall surface of the chip to the first side surface of the substrate; forming a second isolation film on the surface of the first isolation film, the hardness of the second isolation film being greater than the hardness of the first isolation film.

[0007] Optionally, the method for forming the second isolation film includes: using a spraying process to spray an initial second isolation film on the surface of the first isolation film; and curing the initial second isolation film to form a second isolation film on the surface of the first isolation film.

[0008] Optionally, the method for curing the initial second isolation film includes: performing heat treatment on the initial second isolation film, and the process parameters of the heat treatment include: a temperature range of 70 degrees Celsius to 200 degrees Celsius, and a heating time range of 5 minutes to 210 minutes.

[0009] Optionally, the material of the second isolation film includes an organic material containing nanoparticles, and the organic material includes epoxy resin.

[0010] Optionally, the nanoparticles include metal particles, and the material of the metal particles includes copper or copper alloy.

[0011] Optionally, forming a first isolation film on the first side surface of the substrate includes: laminating an initial first isolation film on the first side surface of the substrate; and curing the initial first isolation film to form the first isolation film.

[0012] Optionally, the material of the first isolation film includes an organic material, and the organic material includes epoxy resin.

[0013] Optionally, the second isolation film has a thickness ranging from 10 microns to 20 microns.

[0014] Optionally, the thickness of the first isolation film is in the range of less than or equal to 20 micrometers to 100 micrometers.

[0015] Optionally, the substrate includes a chip area and a non-chip area, and the chip is arranged on a first side of the chip area; and the method further includes: cutting the substrate along the non-chip area.

[0016] Correspondingly, the technical solution of the present invention also provides a packaging structure, including: a substrate, the substrate including a first side and a second side opposite to each other; a chip arranged on the first side of the substrate; a first isolation film located on the first side of the substrate, the first isolation film covering the first side surface of the substrate, the side wall surface and the top surface of the chip, the first isolation film extending from the side wall surface of the chip to the first side surface of the substrate; a second isolation film located on the surface of the first isolation film, the hardness of the second isolation film being greater than the hardness of the first isolation film.

[0017] Optionally, the material of the second isolation film includes an organic material containing nanoparticles, and the organic material includes epoxy resin.

[0018] Optionally, the nanoparticles include metal particles, and the material of the metal particles includes copper or copper alloy.

[0019] Optionally, the material of the first isolation film includes an organic material, and the organic material includes epoxy resin.

[0020] Optionally, the second isolation film has a thickness ranging from 10 microns to 20 microns.

[0021] Optionally, the thickness of the first isolation film ranges from 20 micrometers to 100 micrometers.

[0022] Optionally, the chip includes a power amplifier chip, an antenna switch chip, a radio frequency filter chip, a multiplexer chip or a low noise amplifier chip; the radio frequency filter chip includes a piezoelectric surface acoustic wave filter chip, a piezoelectric bulk acoustic wave filter chip, a micro-electromechanical system filter chip or an integrated passive device filter chip.

[0023] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0024] The packaging method of the present invention forms a first isolation film on the first side surface of the substrate, and forms a second isolation film on the surface of the first isolation film. The hardness of the second isolation film is greater than that of the first isolation film. The pressure resistance, humidity resistance, isolation, high temperature resistance, anti-interference and thermal conductivity of the packaging structure can be improved, and the packaging method is suitable for thin packaging to achieve device miniaturization.

[0025] Furthermore, a spraying process is used to spray an initial second isolation film on the surface of the first isolation film, and the spraying process is convenient and controllable; the material of the second isolation film includes an organic material containing metal nanoparticles, so that the second isolation film has a higher strength, thereby improving the strength of the packaging structure; the first isolation film can block the material of the initial second isolation film from entering the surface of the chip functional surface when the initial second isolation film is sprayed to form the initial second isolation film, thereby avoiding the situation where metal nanoparticles affect the chip performance.

[0026] The packaging structure of the present invention has a first isolation film on the first side surface of the substrate, and a second isolation film on the surface of the first isolation film. The hardness of the second isolation film is greater than that of the first isolation film, which can improve the pressure resistance, humidity resistance, isolation, high temperature resistance, anti-interference and thermal conductivity of the packaging structure, and is suitable for thin packaging to achieve device miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 and Figure 2 is a structural schematic diagram of a packaging method in an embodiment;

[0028] Figures 3 to 6 It is a structural schematic diagram of the packaging method in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] As described in the background art, it is necessary to continuously improve the filter to a smaller size. Now, an analysis and explanation will be given in conjunction with a specific embodiment.

[0030] Figure 1and Figure 2 It is a structural schematic diagram of a packaging method in an embodiment.

[0031] Please refer to Figure 1 , providing a substrate 100, wherein the substrate 100 includes a chip area and a non-chip area, and the substrate 100 includes a first side and a second side opposite to each other; providing a chip, wherein the chip is arranged on the first side of the chip area, and the chip includes a first chip 101 and a second chip 102, and the thickness of the first chip 101 is less than the thickness of the second chip 102; and providing a packaging film 103.

[0032] Please refer to Figure 2 A film laminating machine is used to laminate a packaging film 103 on the first side surface of the substrate 100 , thereby forming a packaging layer 104 on the first side surface of the substrate 100 .

[0033] The material of the packaging film 103 includes epoxy resin. Most of the existing simplex and duplex devices of RF filter devices are packaged with epoxy film, which has a high overall cost. In addition, the overall thickness of the chip structure packaged with epoxy film is relatively thick, and the chip package structure needs to be miniaturized in thickness.

[0034] In order to solve the above problems, the technical solution of the present invention provides a packaging method and a packaging structure, wherein a first isolation film is formed on the first side surface of a substrate, and a second isolation film is formed on the surface of the first isolation film, wherein the hardness of the second isolation film is greater than the hardness of the first isolation film, thereby improving the pressure resistance, humidity resistance, isolation, high temperature resistance, anti-interference and thermal conductivity of the packaging structure, and is suitable for thin packaging to achieve device miniaturization.

[0035] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0036] Figures 3 to 6 It is a structural schematic diagram of the packaging method in an embodiment of the present invention.

[0037] Please refer to Figure 3 , providing a substrate 200, wherein the substrate 200 includes a chip area and a non-chip area, and the substrate 200 includes a first side and a second side opposite to each other.

[0038] The substrate 200 has a plurality of circuit structures therein to serve as structural support and circuit connections for electrically connecting a plurality of chips together or for electrically connecting a chip to an external circuit.

[0039] In this embodiment, the substrate 200 includes a PCB board. In other embodiments, the substrate may not include a circuit structure, and the substrate may be other implementable substrates.

[0040] Please continue to refer to Figure 3 , providing a chip, and disposing the chip on the first side of the chip area. The chip is electrically connected to the substrate 200.

[0041] The chip includes a functional surface and a non-functional surface, wherein the functional surface faces the first side surface of the substrate 200 , and a gap exists between the functional surface and the first side of the substrate 200 .

[0042] The chip includes at least a first chip and a second chip. The thickness of the first chip is different from the thickness of the second chip. The thickness of the first chip and the thickness of the second chip may also be the same.

[0043] In this embodiment, the chip includes a first chip 201 and a second chip 202 , and the thickness of the first chip 201 is smaller than the thickness of the second chip 202 .

[0044] Please continue to refer to Figure 3 , further comprising: forming a connection layer on the surface of the chip functional surface, wherein the chip is fixed to the first side of the substrate 200 through the connection layer.

[0045] In this embodiment, the first chip 201 is fixed and electrically connected to the first side of the substrate 200 through the first connecting layer 210, and there is a gap between the functional surface of the first chip 201 and the first side of the substrate 200; the second chip 202 is fixed and electrically connected to the first side of the substrate 200 through the second connecting layer 211, and there is a gap between the functional surface of the second chip 202 and the first side of the substrate 200.

[0046] In this embodiment, the material of the first connection layer 210 and the second connection layer 211 includes solder.

[0047] The chip includes a power amplifier chip, an antenna switch chip, a radio frequency filter chip, a multiplexer chip or a low noise amplifier chip; the radio frequency filter chip includes a piezoelectric surface acoustic wave filter chip, a piezoelectric bulk acoustic wave filter chip, a micro-electromechanical system filter chip or an integrated passive device filter chip.

[0048] In this embodiment, the first chip 201 includes one of the above chips, the second chip 202 includes one of the above chips, and the first chip 201 and the second chip 202 may be the same or different.

[0049] Please refer to Figure 4A first isolation film 203 is formed on the first side surface of the substrate 200, and the first isolation film 203 covers the first side surface of the substrate 200, the side wall surface and the top surface of the chip. The first isolation film 203 extends from the side wall surface of the chip to the first side surface of the substrate 200.

[0050] In this embodiment, the first isolation film 203 covers the first side surface of the non-chip area, the side wall surface and the top surface of the first chip 201, and the side wall surface and the top surface of the second chip 202. The first isolation film 203 extends from the side wall surface of the first chip 201 to the first side surface of the non-chip area, and extends from the side wall surface of the second chip 202 to the first side surface of the non-chip area.

[0051] The first isolation film 203 extends from the side wall surface of the chip to the first side surface of the non-chip area, that is, the first isolation film 203 does not cover the gap between the chip and the first side of the substrate 200, thereby preventing the subsequently formed second isolation film from entering the functional surface of the chip and affecting the performance of the chip.

[0052] The first isolation film 203 is formed on the first side surface of the substrate 200 , including: using a film laminating machine to laminate an initial first isolation film (not shown) on the first side surface of the substrate 200 ; and curing the initial first isolation film to form the first isolation film 203 .

[0053] In this embodiment, the method of curing the initial first isolation film includes a heating treatment, and the temperature range of the heating treatment is: 100 degrees Celsius to 200 degrees Celsius.

[0054] The material of the first isolation film 203 includes organic material. The initial first isolation film is a material film with a certain thickness, which is easily deformed under pressure and solidifies under a preset temperature state, so that the initial first isolation film can be applied to the occasion where it is needed by using a film sticking machine.

[0055] In this embodiment, the organic material includes epoxy resin. The epoxy resin has a certain degree of ductility, which facilitates the laminating machine to extrude and heat the initial first isolation film, so that the initial first isolation film is formed into a first isolation film of a preset shape.

[0056] The thickness of the first isolation film 203 is in a range of 20 micrometers to 100 micrometers.

[0057] In this embodiment, the thickness of the first isolation film 203 is 20 micrometers.

[0058] Please refer to Figure 5, a second isolation film 205 is formed on the surface of the first isolation film 203 , and the hardness of the second isolation film 205 is greater than the hardness of the first isolation film 203 .

[0059] The method for forming the second isolation film 205 includes: spraying an initial second isolation film (not shown) on the surface of the first isolation film 203 using a spraying process; and curing the initial second isolation film to form the second isolation film 205 on the surface of the first isolation film 203 .

[0060] The method for curing the initial second isolation film includes: performing heat treatment on the initial second isolation film, and the process parameters of the heat treatment include: a temperature range of 70 degrees Celsius to 200 degrees Celsius, and a heating time range of 5 minutes to 210 minutes.

[0061] In this embodiment, the thickness of the second isolation film 205 is in a range of 10 micrometers to 20 micrometers.

[0062] In this embodiment, the thickness of the second isolation film 205 is less than the thickness of the first isolation film 203. In other embodiments, the thickness of the second isolation film can be greater than or equal to the thickness of the first isolation film.

[0063] An initial second isolation film is formed on the surface of the first isolation film 203 by a spraying process. The spraying process is convenient and controllable, and the thickness of the initial second isolation film can be accurately controlled, thereby making the thickness of the second isolation film 205 formed after subsequent curing as thin as possible, thereby reducing the overall thickness of the packaging structure, which is suitable for thin packaging and realizes chip miniaturization.

[0064] In this embodiment, the material of the second isolation film 205 is different from the material of the first isolation film 203 .

[0065] The material of the second isolation film 205 includes an organic material containing nanoparticles.

[0066] In this embodiment, the organic material includes epoxy resin; the nanoparticles include metal particles, and the material of the metal particles includes copper or copper alloy.

[0067] An organic material containing metal nanoparticles, wherein the metal nanoparticles can make the second isolation film 205 have higher strength, and the hardness of the second isolation film 205 is higher than that of the first isolation film 203. The combination of the first isolation film 203 and the second isolation film 205 can improve the pressure resistance, humidity resistance, isolation, high temperature resistance, anti-interference and thermal conductivity of the packaging structure, especially when the overall thickness of the packaging structure is relatively thin, the packaging structure has better pressure resistance, humidity resistance, better isolation effect, high temperature resistance, anti-interference, fast thermal conductivity and the like.

[0068] Specifically, the first isolation film 203 is located on the first side surface of the substrate 200, and the first isolation film 203 can block water vapor from entering the chip surface, so that the packaging structure has good humidity resistance. In addition, the material of the second isolation film 205 includes an organic material containing metal nanoparticles. The first isolation film 203 can block the material of the initial second isolation film from entering the chip functional surface when the initial second isolation film is sprayed to form the initial second isolation film, thereby avoiding the situation where metal nanoparticles affect chip performance.

[0069] Please refer to Figure 6 In this embodiment, the method further includes: cutting the substrate 200 along the non-chip area to form discrete packaged chips.

[0070] Figure 6 As shown in FIG. 1 , the package structures of the first chip 201 and the second chip 202 are separated from each other after being cut.

[0071] Accordingly, the embodiment of the present invention further provides a packaging structure, please continue to refer to Figure 5 ,include:

[0072] A substrate 200, the substrate 200 comprising a first side and a second side opposite to each other;

[0073] A chip disposed on the first side of the substrate 200;

[0074] A first isolation film 203 located on a first side of the substrate 200, the first isolation film 203 covers a first side surface of the substrate 200, a side wall surface and a top surface of the chip, and the first isolation film 203 extends from the side wall surface of the chip to the first side surface of the substrate 200;

[0075] The second isolation film 205 is located on the surface of the first isolation film 203 , and the hardness of the second isolation film 205 is greater than the hardness of the first isolation film 203 .

[0076] In this embodiment, the material of the second isolation film 205 includes an organic material containing nanoparticles, and the organic material includes epoxy resin.

[0077] In this embodiment, the nanoparticles include metal particles, and the material of the metal particles includes copper or copper alloy.

[0078] In this embodiment, the material of the first isolation film 203 includes an organic material, and the organic material includes epoxy resin.

[0079] In this embodiment, the thickness of the second isolation film 205 is in a range of 10 micrometers to 20 micrometers.

[0080] In this embodiment, the thickness of the first isolation film 203 is in a range of 20 micrometers to 100 micrometers.

[0081] In this embodiment, the chip includes a power amplifier chip, an antenna switch chip, a radio frequency filter chip, a multiplexer chip or a low noise amplifier chip; the radio frequency filter chip includes a piezoelectric surface acoustic wave filter chip, a piezoelectric bulk acoustic wave filter chip, a micro-electromechanical system filter chip or an integrated passive device filter chip.

[0082] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A packaging method, characterized in that: include: providing a substrate comprising opposing first and second sides; Providing a chip, and disposing the chip on the first side of the substrate; forming a first isolation film on the first side of the substrate, the first isolation film covering the first side surface of the substrate, the side wall surface and the top surface of the chip, and the first isolation film extending from the side wall surface of the chip to the first side surface of the substrate; A second isolation film is formed on the surface of the first isolation film, and the hardness of the second isolation film is greater than the hardness of the first isolation film.

2. The packaging method according to claim 1, characterized in that: The method for forming the second isolation film includes: using a spraying process to spray on the surface of the first isolation film to form an initial second isolation film; and curing the initial second isolation film to form a second isolation film on the surface of the first isolation film.

3. The packaging method according to claim 2, characterized in that: The method for curing the initial second isolation film includes: performing heat treatment on the initial second isolation film, and the process parameters of the heat treatment include: a temperature range of 70 degrees Celsius to 200 degrees Celsius, and a heating time range of 5 minutes to 210 minutes.

4. The packaging method according to claim 2, characterized in that: The material of the second isolation film includes an organic material containing nanoparticles, and the organic material includes epoxy resin.

5. The packaging method according to claim 4, characterized in that: The nanoparticles include metal particles, and the material of the metal particles includes copper or a copper alloy.

6. The packaging method according to claim 1, characterized in that: Forming a first isolation film on the first side surface of the substrate includes: laminating an initial first isolation film on the first side surface of the substrate; and curing the initial first isolation film to form the first isolation film.

7. The packaging method according to claim 6, characterized in that: The material of the first isolation film includes an organic material, and the organic material includes epoxy resin.

8. The packaging method according to claim 1, characterized in that: The thickness of the second isolation film is in a range of 10 micrometers to 20 micrometers.

9. The packaging method according to claim 1, characterized in that: The thickness of the first isolation film ranges from 20 micrometers to 100 micrometers.

10. The packaging method according to claim 1, characterized in that: The substrate comprises a chip area and a non-chip area, and the chip is arranged on a first side of the chip area; and further comprising: cutting the substrate along the non-chip area.

11. A packaging structure, characterized in that: include: a substrate including a first side and a second side that are opposite to each other; A chip disposed on the first side of the substrate; A first isolation film located on the first side of the substrate, the first isolation film covers the first side surface of the substrate, the side wall surface and the top surface of the chip, and the first isolation film extends from the side wall surface of the chip to the first side surface of the substrate; A second isolation film is located on the surface of the first isolation film, and the hardness of the second isolation film is greater than the hardness of the first isolation film.

12. The packaging structure according to claim 11, characterized in that: The material of the second isolation film includes an organic material containing nanoparticles, and the organic material includes epoxy resin.

13. The packaging structure according to claim 12, characterized in that: The nanoparticles include metal particles, and the material of the metal particles includes copper or a copper alloy.

14. The packaging structure according to claim 11, characterized in that: The material of the first isolation film includes an organic material, and the organic material includes epoxy resin.

15. The packaging structure according to claim 11, characterized in that: The thickness of the second isolation film is in a range of 10 micrometers to 20 micrometers.

16. The packaging structure according to claim 11, characterized in that: The thickness of the first isolation film ranges from 20 micrometers to 100 micrometers.

17. The packaging structure according to claim 11, characterized in that: The chip includes a power amplifier chip, an antenna switch chip, a radio frequency filter chip, a multiplexer chip or a low noise amplifier chip; the radio frequency filter chip includes a piezoelectric surface acoustic wave filter chip, a piezoelectric bulk acoustic wave filter chip, a micro-electromechanical system filter chip or an integrated passive device filter chip.

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