Solar cell, photovoltaic module and semiconductor substrate

Abstract

The invention discloses a solar cell, a photovoltaic module and a semiconductor substrate, and relates to the technical field of photovoltaics, so that a passivation layer has a good passivation effect on the semiconductor substrate. Meanwhile, the contact performance of the doped semiconductor layer and the electrode and the shaping of the electrode are improved, and the conversion efficiency of the solar cell is improved. The solar cell comprises a semiconductor substrate and a passivation layer. The semiconductor substrate has a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The passivation layer is disposed on the target surface. And one side of the passivation layer away from the semiconductor substrate is provided with a plurality of tower footing-like texture structures which are recessed towards the passivation layer. Wherein each tower footing-like texture structure is defined by a polygon-like bottom surface and side surfaces. In the same tower footing-like texture structure, at least one corner of the polygon-like bottom surface is provided with a plurality of protrusions climbing in the extension direction of the side ridge, and the protrusions on the same corner are provided with fluctuating shapes extending in the direction parallel to the polygon-like bottom surface.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a solar cell, a photovoltaic module and a semiconductor substrate. Background Art

[0002] As a green energy source, solar cells play a positive role in energy conservation and emission reduction. With the development of the photovoltaic industry, solar cell technology has become increasingly mature. Among them, photovoltaic solar cells are devices that convert sunlight into electrical energy. Specifically, solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead out the carriers, thereby facilitating the effective use of electrical energy. As an environmentally friendly and renewable energy source, solar energy has received more and more attention in recent years. Correspondingly, the application scope of photovoltaic solar cells based on the photoelectric effect is also becoming wider and wider.

[0003] However, it is difficult for existing solar cells to achieve both good passivation effects and good electrode contact performance and shaping, which is not conducive to improving the conversion efficiency of solar cells. Summary of the invention

[0004] The object of the present invention is to provide a solar cell, a photovoltaic module and a semiconductor substrate, which are used to make the passivation layer have a good passivation effect on the semiconductor substrate, while increasing the surface roughness of the passivation layer on the side away from the semiconductor substrate by a protrusion arranged on at least one corner of the polygonal bottom surface, which is beneficial to increase the specific surface area of ​​the doped semiconductor layer in the passivation layer or formed on the side of the passivation layer close to the semiconductor substrate, improve the contact performance between the doped semiconductor layer and the electrode, and the shaping of the electrode, thereby improving the conversion efficiency of the solar cell.

[0005] In order to achieve the above-mentioned purpose, in a first aspect, the present invention provides a solar cell, which comprises: a semiconductor substrate and a passivation layer. The semiconductor substrate has a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The passivation layer is arranged on the target surface. The side of the passivation layer facing away from the semiconductor substrate has a plurality of tower-like texture structures recessed into the passivation layer. Among them, a single tower-like texture structure is surrounded by a polygon-like bottom surface and a side surface. In the same tower-like texture structure, at least one corner of the polygon-like bottom surface has a plurality of protrusions climbing along the extension direction of the side edge line, and the plurality of protrusions on the same corner have an undulating morphology extending in a direction parallel to the polygon-like bottom surface.

[0006] In the case of adopting the above technical solution, the passivation layer is arranged on the target surface of the semiconductor substrate, and the target surface side of the semiconductor substrate can be passivated to reduce the carrier recombination rate. In addition, the side of the passivation layer away from the semiconductor substrate has a plurality of quasi-tower-shaped texture structures recessed into the passivation layer. Under the same conditions of other factors, compared with the texture structure with a large degree of undulation such as the pyramid-shaped velvet structure, the degree of undulation of the quasi-tower-shaped texture structure without a spire is relatively small, so that the surface of the side of the passivation layer away from the semiconductor substrate is relatively flat from a macroscopic perspective. In addition, in the actual manufacturing process, the passivation layer is formed on the target surface of the semiconductor substrate by deposition and other processes, and the surface undulation morphology of the passivation layer away from the semiconductor substrate side will also be affected by the surface undulation morphology of the target surface, and the corresponding surface undulation morphology of the passivation layer away from the semiconductor substrate side can also reflect the surface undulation morphology of the target surface of the semiconductor substrate to a certain extent. Based on this, when the surface of the passivation layer facing away from the semiconductor substrate is relatively flat on a macroscopic scale, the target surface of the semiconductor substrate is also roughly a relatively flat surface, which is beneficial to improving the formation quality and film thickness of the passivation layer on the target surface, and then beneficial to improving the passivation effect of the passivation layer on the semiconductor substrate and improving the conversion efficiency of solar cells.

[0007] In addition, in the tower-like texture structure formed on the side of the passivation layer away from the semiconductor substrate, at least one corner of the polygonal bottom surface has a plurality of protrusions rising along the extension direction of the side edge line, and the plurality of protrusions on the same corner have an undulating morphology extending in a direction parallel to the polygonal bottom surface. At this time, compared with the conventional tower-like texture structure with a flat side, the side of the tower-like texture structure in the present invention has the above-mentioned protrusions, so that the surface of the passivation layer away from the semiconductor substrate has a relatively larger surface roughness at the microscopic level than the conventional polished surface, which is beneficial to increase the doped semiconductor layer included in the passivation layer, or the doped semiconductor layer formed between the passivation layer and the semiconductor substrate has a larger specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of solar cells.

[0008] As a possible implementation scheme, the plurality of tower base-like texture structures include a first-type tower base-like texture structure and a second-type tower base-like texture structure. The depth of the first-type tower base-like texture structure recessed into the passivation layer is greater than the depth of the second-type tower base-like texture structure recessed into the passivation layer. The number of raised portions in the first-type tower base-like texture structure is greater than the number of raised portions in the second-type tower base-like texture structure.

[0009] When the above technical solution is adopted, the multiple tower-like texture structures also include a first-type tower-like texture structure with a larger concave depth and a larger number of protrusions, which can further increase the surface roughness of the passivation layer on the side away from the semiconductor substrate, further improve the contact performance between the above-mentioned doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, improve the structural stability of the solar cell, and reduce the transmission loss between the doped semiconductor layer and the electrode.

[0010] As a possible implementation scheme, in at least one of the tower base-like texture structures, at least one pair of corners of the polygonal bottom surface each has a plurality of protrusions. The at least one pair of corners is two corners of the polygonal bottom surface that are diagonally distributed.

[0011] When the above technical solution is adopted, in at least one tower-like base-like texture structure, compared with having only one protrusion on a polygon-like bottom surface, when at least one pair of corners of the polygon-like bottom surface have multiple protrusions, at least one of the same tower-like base-like texture structures is provided with a greater number of protrusions, which is beneficial to further increase the degree of undulation of the passivation layer away from the side of the semiconductor substrate, and at the same time, it is beneficial to make different protrusions distributed along the diagonal direction on different corners of the polygon-like bottom surface instead of concentrating on a single corner, thereby making different regions along the diagonal direction in the same tower-like base-like texture structure have higher surface roughness, which is beneficial to making different regions of the doped semiconductor layer and the electrode have good contact performance, and the electrode has strong adhesion and good shaping on different regions of the doped semiconductor layer.

[0012] As a possible implementation scheme, the plurality of protrusions on the same corner have a broken line undulating shape or a wavy line undulating shape extending along the direction of the polygonal bottom surface.

[0013] When the above technical solution is adopted, compared with single convex or concave undulating morphologies such as arcs, the zigzag undulating morphologies and the wavy undulating morphologies have continuous undulating morphologies of convex, concave, convex, concave..., which can further increase the surface roughness of the tower base-like texture structure, which is beneficial to increase the contact area between the above-mentioned doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer.

[0014] As a possible implementation scheme, at least one protrusion is in a triangular prism-like, conical-like or cylindrical-like shape. In this case, the morphology of the protrusion has multiple examples, which is conducive to improving the applicability of the solar cell provided by the present invention in different application scenarios. In addition, the process difficulty of manufacturing a tower base-like texture structure can also be reduced.

[0015] As a possible implementation scheme, the protrusion on at least one corner is in a triangular prism-like shape, and the ridgeline of the protrusion is in an arc shape that is concave toward a direction close to the semiconductor substrate.

[0016] When the above technical solution is adopted, when the raised portion on at least one corner is in a triangular prism shape, compared with the ridge line of the raised portion being parallel to the side ridge line, when the ridge line of the raised portion is in an arc shape that is concave toward the direction close to the semiconductor substrate, the portion of the raised portion corresponding to the concave arc ridge line also has a concave undulating morphology, which can further increase the surface roughness of the tower base-like texture structure in the area where the raised portion is provided, which is beneficial to further increase the specific surface area of ​​the above-mentioned doped semiconductor layer, and then increase the contact area between the doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0017] As a possible implementation, the height of a single protrusion is greater than its width. The height direction of the protrusion is parallel to the thickness direction of the semiconductor substrate, and the width direction of the protrusion is parallel to the extension direction of the polygonal bottom surface of the tower-like texture structure.

[0018] When the above technical solution is adopted, compared with the "short and fat" protrusion whose height is smaller than its width, when the height of a single protrusion is greater than the width of the protrusion, the "tall and thin" single protrusion has a greater degree of undulation, and is conducive to forming a larger number of protrusions per unit area, further increasing the surface roughness of the passivation layer away from the semiconductor substrate side, and facilitating increasing the contact area between the above-mentioned doped semiconductor layer and the electrode, further improving the contact performance between the doped semiconductor layer and the electrode, as well as the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0019] As a possible implementation solution, the height of a single protrusion is greater than or equal to 0.2 μm and less than or equal to 0.8 μm.

[0020] When the above technical solution is adopted, the height of the protrusion is within the above range, which is conducive to preventing the surface roughness of the passivation layer away from the semiconductor substrate from being smaller due to the smaller height of the protrusion, ensuring that the contact area between the doped semiconductor layer and the electrode can be increased by the protrusion, improving the contact performance between the doped semiconductor layer and the electrode, as well as the adhesion and shaping of the electrode on the doped semiconductor layer, and improving the conversion efficiency of the solar cell. In addition, it is also conducive to preventing the surface roughness of the passivation layer away from the semiconductor substrate from being larger due to the excessive height of the protrusion, ensuring that the target surface of the semiconductor substrate is relatively flat, and is conducive to improving the formation quality of the passivation layer on the target surface, improving the passivation effect of the passivation layer, and achieving a balance between the passivation effect of the passivation layer, the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode, ensuring that the solar cell has high working performance and structural reliability.

[0021] As a possible implementation, the width of a single protrusion is greater than or equal to 0.1 μm and less than or equal to 0.8 μm. The application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect of the height of a single protrusion being greater than or equal to 0.2 μm and less than or equal to 0.8 μm described above, and will not be repeated here.

[0022] As a possible implementation scheme, in at least one tower base-like texture structure, at least one corner of the polygonal bottom surface has at least two groups of protrusions distributed in a stepped manner along the extension direction of the side ridges, and each group of protrusions includes multiple protrusions extending along the direction of the polygonal bottom surface.

[0023] When the above technical solution is adopted, at least two groups of raised portions distributed in a stepped manner can further increase the undulation of the side surface of the tower-like texture structure along the direction of extension of the ridge line, further increase the surface roughness of the passivation layer on the side away from the semiconductor substrate, which is beneficial to increase the contact area between the above-mentioned doped semiconductor layer and the electrode, further improve the contact performance between the doped semiconductor layer and the electrode, as well as the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of solar cells.

[0024] As a possible implementation scheme, the passivation layer further has a linear texture structure on the side facing away from the semiconductor substrate, and at least one side of the linear texture structure has a plurality of protrusions intersecting with the extension direction of the linear texture structure. In this case, the presence of the linear texture structure can further increase the surface roughness of the side of the passivation layer facing away from the semiconductor substrate, which is beneficial to increase the contact area between the doped semiconductor layer and the electrode, further improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0025] As a possible implementation scheme, one of the first surface and the second surface is the target surface. The passivation layer includes a first doped semiconductor portion and a second doped semiconductor portion of opposite conductivity types. At least a portion of the first doped semiconductor portion and at least a portion of the second doped semiconductor portion are spaced apart. Among them, the side surface of the passivation layer corresponding to the first doped semiconductor portion that is away from the semiconductor substrate is the first sub-surface, and the side surface of the passivation layer corresponding to the second doped semiconductor portion that is away from the semiconductor substrate is the second sub-surface. The number of protrusions on the first sub-surface is different from the number of protrusions on the second sub-surface; and / or the height of the protrusions on the first sub-surface is different from the height of the protrusions on the second sub-surface.

[0026] When the above technical solution is adopted, the number and height of the protrusions on the first sub-surface and the second sub-surface can be set respectively according to the requirements for different passivation effects of the first doped semiconductor part and the second doped semiconductor part in the actual application scenario, and the requirements for the contact performance between the two and the corresponding electrodes, so that the two parts of the passivation layer corresponding to the first doped semiconductor part and the second doped semiconductor part respectively have different passivation effects on the semiconductor substrate, and are conducive to making the first doped semiconductor part and the second doped semiconductor part have different surface morphologies, thereby facilitating reducing the passivation difference between the two parts of the passivation layer corresponding to the first doped semiconductor part and the second doped semiconductor part respectively, and facilitating reducing the difference in contact performance between the first doped semiconductor part and the second doped semiconductor part and the corresponding electrodes respectively.

[0027] As a possible implementation, the first doped semiconductor portion is a P-type doped semiconductor portion, and the second doped semiconductor portion is an N-type doped semiconductor portion. The raised portions are only distributed on the first sub-surface; the second sub-surface has a tower-like texture structure without raised portions.

[0028] In the case of adopting the above technical solution, due to the limitation of doping solid concentration and doping concentration, the dopant concentration of the dopant in the N-type doped semiconductor part is greater than the doping concentration of the dopant in the P-type doped semiconductor part, and the passivation characteristics of the P-type doped semiconductor part and the contact characteristics with the positive electrode are relatively worse. Based on this, when the protrusions are only distributed on the first sub-surface, and the second sub-surface has a tower-like texture structure without protrusions, it is beneficial to make the first sub-surface rougher than the second sub-surface, which is beneficial to increase the contact area between the P-type doped semiconductor part and the positive electrode, and reduce the difference in contact performance between the N-type doped semiconductor part and the P-type doped semiconductor part in the battery and the corresponding electrodes.

[0029] As a possible implementation scheme, the target surface has a plurality of tower-like texture structures recessed into the semiconductor substrate, and the protrusions in the tower-like texture structures on the target surface are in a triangular prism-like shape.

[0030] When the above technical solution is adopted, compared with a texture structure with a large undulating morphology such as a pyramid-shaped velvet structure, when the target surface has a plurality of quasi-tower-shaped texture structures that are recessed into the semiconductor substrate, the target surface of the semiconductor substrate is relatively flat, which is beneficial to improving the formation quality and film thickness of the passivation layer formed on the target surface, and improving the passivation effect of the passivation layer. Secondly, when the quasi-tower-shaped texture structure on the target surface has a protrusion, and the protrusion is in a triangular prism-like shape, the presence of the triangular prism-like protrusion can increase the surface roughness of the target surface, which is beneficial for the doped semiconductor layer formed on the target surface by deposition and other processes to also have a relatively large specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer.

[0031] In a second aspect, the present invention provides a photovoltaic module, which includes the solar cell provided by the first aspect and various implementations thereof.

[0032] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0033] In a third aspect, the present invention provides a semiconductor substrate having a first surface and a second surface relative to each other. At least one of the first surface and the second surface is a target surface. The target surface has a plurality of tower-like texture structures that are recessed into the semiconductor substrate. A single tower-like texture structure is surrounded by a polygon-like bottom surface and a side surface. In the same tower-like texture structure, at least one corner of the polygon-like bottom surface has a plurality of raised portions that rise along the extension direction of the side ridgeline, and the plurality of raised portions on the same corner have an undulating morphology that extends in a direction parallel to the polygon-like bottom surface. The beneficial effects in this case can be referred to in the foregoing text and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0035] Figure 1 It is a SEM image of a local surface of a passivation layer facing away from a semiconductor substrate in the related art;

[0036] Figure 2 A schematic longitudinal cross-sectional view of a first structure of a solar cell provided by an embodiment of the present invention;

[0037] Figure 3A schematic longitudinal cross-sectional view of a second structure of a solar cell provided by an embodiment of the present invention;

[0038] Figure 4 A schematic longitudinal cross-sectional view of a third structure of a solar cell provided by an embodiment of the present invention;

[0039] Figure 5 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 1 ;

[0040] Figure 6 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 2 ;

[0041] Figure 7 The SEM image of the local surface of the target surface in the embodiment of the present invention is Figure 1 ;

[0042] Figure 8 A schematic longitudinal cross-sectional view of a fourth structure of a solar cell provided by an embodiment of the present invention;

[0043] Fig. 9 A schematic longitudinal cross-sectional view of a fifth structure of a solar cell provided by an embodiment of the present invention;

[0044] Fig.10 A schematic longitudinal cross-sectional view of a sixth structure of a solar cell provided by an embodiment of the present invention;

[0045] Fig.11 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 3 ;

[0046] Fig.12 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 4 ;

[0047] Fig.13 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 5 ;

[0048] Fig.14 A longitudinal cross-sectional schematic diagram of a seventh structure of a solar cell provided by an embodiment of the present invention;

[0049] Fig.15 The SEM image of the local surface of the target surface in the embodiment of the present invention is Figure 2 .

[0050] Figure numerals: 11 is a semiconductor substrate, 12 is a first surface, 13 is a second surface, 14 is a passivation layer, 15 is a tower-like texture structure, 16 is a raised portion, 17 is a linear texture structure, 18 is a first doped semiconductor portion, 19 is a second doped semiconductor portion, 20 is a doped semiconductor layer, 21 is an interface passivation layer, and 22 is a surface passivation layer. DETAILED DESCRIPTION

[0051] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0052] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0053] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0054] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0055] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0056] As a green energy source, solar cells play a positive role in energy conservation and emission reduction. With the development of the photovoltaic industry, solar cell technology has become increasingly mature. Among them, photovoltaic solar cells are devices that convert sunlight into electrical energy. Specifically, solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead out the carriers, thereby facilitating the effective use of electrical energy. As an environmentally friendly and renewable energy source, solar energy has received more and more attention in recent years. Correspondingly, the application scope of photovoltaic solar cells based on the photoelectric effect is also becoming wider and wider.

[0057] Specifically, existing solar cells generally include a semiconductor substrate and a passivation layer formed on the semiconductor substrate. The passivation layer may include a doped semiconductor layer with a field passivation effect, or may include an interface passivation layer and / or a surface passivation layer with a chemical passivation effect. Figure 1 As shown, the surface of one side of the semiconductor substrate formed with the passivation layer can be a simple polished surface. At this time, the surface has a relatively flat morphology, which is conducive to improving the formation quality of the passivation layer and improving the passivation effect of the passivation layer on the semiconductor substrate. However, the passivation layer formed on the semiconductor substrate with a flat surface also tends to be flat, which makes the electrode material poorly shaped and adhered on the flat surface when forming an electrode for extracting carriers on the passivation layer, thereby reducing the selection and matching of the electrode material; at the same time, it will also cause the contact area between the formed electrode and the doped semiconductor layer formed on the plane surface to become smaller, and the contact loss will increase. Although the velvet surface with an undulating morphology has a large surface roughness, which is conducive to improving the electrical contact performance between the electrode and the doped semiconductor layer, as well as the shaping and adhesion of the electrode, the formation quality of the doped semiconductor layer on the velvet surface is poor, and its passivation effect is deteriorated. It can be seen that it is difficult for existing solar cells to take into account both good passivation effects and good electrode contact performance and shaping, which is not conducive to improving the conversion efficiency of solar cells.

[0058] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a solar cell. Figures 2 to 6As shown, the solar cell provided by the embodiment of the present invention includes: a semiconductor substrate 11 and a passivation layer 14. The semiconductor substrate 11 has a first surface 12 and a second surface 13 relative to each other. At least one of the first surface 12 and the second surface 13 is a target surface. The passivation layer 14 is arranged on the target surface. The side of the passivation layer 14 facing away from the semiconductor substrate 11 has a plurality of tower-like texture structures 15 recessed into the passivation layer 14. Among them, a single tower-like texture structure 15 is surrounded by a polygon-like bottom surface and a side surface. In the same tower-like texture structure 15, at least one corner of the polygon-like bottom surface has a plurality of protrusions 16 climbing along the extension direction of the side ridge line, and the plurality of protrusions 16 on the same corner have an undulating morphology extending in a direction parallel to the polygon-like bottom surface.

[0059] When the above technical solution is adopted, Figures 2 to 6 As shown, the passivation layer 14 is arranged on the target surface of the semiconductor substrate 11, and can passivate one side of the target surface of the semiconductor substrate 11 to reduce the carrier recombination rate. In addition, the side of the passivation layer 14 facing away from the semiconductor substrate 11 has a plurality of quasi-tower-shaped texture structures 15 recessed into the passivation layer 14. Under the same conditions, compared with the texture structure with a large degree of undulation such as the pyramid-shaped velvet structure, the quasi-tower-shaped texture structure 15 without a spire has a relatively small degree of undulation, so that the surface of the side of the passivation layer 14 facing away from the semiconductor substrate 11 is relatively flat from a macroscopic perspective. In addition, in the actual manufacturing process, the passivation layer 14 is formed on the target surface of the semiconductor substrate 11 through deposition and other processes, and the surface undulation morphology of the passivation layer 14 facing away from the semiconductor substrate 11 will also be affected by the surface undulation morphology of the target surface, and the corresponding surface undulation morphology of the passivation layer 14 facing away from the semiconductor substrate 11 can also reflect the surface undulation morphology of the target surface of the semiconductor substrate 11 to a certain extent. Based on this, when the surface of the side of the passivation layer 14 facing away from the semiconductor substrate 11 is relatively flat macroscopically, the target surface of the semiconductor substrate 11 is also roughly a relatively flat surface, which is conducive to improving the formation quality and film thickness of the passivation layer 14 on the target surface, and further conducive to improving the passivation effect of the passivation layer 14 on the semiconductor substrate 11, and improving the conversion efficiency of the solar cell. In addition, if Figures 2 to 6As shown, in the tower-like texture structure 15 formed on the side of the passivation layer 14 away from the semiconductor substrate 11, at least one corner of the polygonal bottom surface has a plurality of raised portions 16 climbing along the extension direction of the side edge line, and the plurality of raised portions 16 on the same corner have an undulating morphology extending in a direction parallel to the polygonal bottom surface. At this time, compared with the conventional tower-like texture structure with a flat side, the side of the tower-like texture structure 15 in the embodiment of the present invention has the above-mentioned raised portions 16, so that the surface of the passivation layer 14 away from the semiconductor substrate 11 has a relatively larger surface roughness at the microscopic level than the conventional polished surface, which is beneficial to increase the doped semiconductor layer included in the passivation layer 14, or the doped semiconductor layer formed between the passivation layer 14 and the semiconductor substrate 11 has a larger specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell.

[0060] In actual application, the solar cell provided by the embodiment of the present invention can be a double-sided contact cell, that is, one of the positive electrode and the negative electrode of the solar cell is arranged on the front side of the cell, and the other is arranged on the back side of the cell. Alternatively, the solar cell provided by the embodiment of the present invention can also be a back contact cell, that is, the positive electrode and the negative electrode of the solar cell are both arranged on the back side of the cell.

[0061] Secondly, the solar cell provided in the embodiment of the present invention may be a cell having a tunneling passivation contact structure or a heterogeneous contact structure, or may be a conventional cell without an interface passivation layer included in the above structure.

[0062] Specifically, the embodiment of the present invention does not specifically limit the material of the semiconductor substrate. For example, the semiconductor substrate can be a substrate made of any semiconductor material such as a silicon substrate, a silicon germanium substrate, a germanium substrate or a gallium arsenide substrate.

[0063] As for the first surface and the second surface of the semiconductor substrate, the first surface of the semiconductor substrate may correspond to the front surface of the solar cell, and the second surface of the semiconductor substrate may correspond to the back surface of the solar cell; or, the first surface of the semiconductor substrate may correspond to the back surface of the solar cell, and the second surface of the semiconductor substrate may correspond to the front surface of the solar cell. Secondly, whether the first surface and the second surface are target surfaces can be determined according to the type of solar cell and the corresponding relationship between the first surface and the second surface and the front surface and the back surface of the cell, respectively, and no specific limitation is made here.

[0064] For example, in the case where the solar cell is a double-sided contact cell, of the first and second surfaces of the semiconductor substrate, only the first surface may be the target surface, only the second surface may be the target surface, or both the first and second surfaces may be the target surface.

[0065] Exemplarily, in the case where the solar cell is a back-contact cell, one of the first surface and the second surface of the semiconductor substrate corresponding to the back side of the cell is the target surface.

[0066] As for the surface morphology of the target surface of the semiconductor substrate, as mentioned above, the surface undulation morphology of the side of the passivation layer away from the semiconductor substrate can reflect the surface undulation morphology of the target surface of the semiconductor substrate to a certain extent, so the surface morphology of the target surface can refer to the surface morphology of the side of the passivation layer away from the semiconductor substrate. Specifically, because the surface morphology of the side of the passivation layer away from the semiconductor substrate is a flat surface with multiple tower-like texture structures 15, the surface morphology of the target surface is also relatively flat.

[0067] For example, Figure 7 As shown, the target surface may have a plurality of tower-like texture structures 15 recessed into the semiconductor substrate 11, and the tower-like texture structures 15 on the target surface may have a convex portion 16. In this case, compared with a texture structure having a large undulating morphology such as a pyramid-shaped velvet structure, when the target surface has a plurality of tower-like texture structures 15 recessed into the semiconductor substrate, the target surface of the semiconductor substrate is relatively flat, which is conducive to improving the formation quality and film thickness of the passivation layer formed on the target surface, and improving the passivation effect of the passivation layer. Secondly, when the tower-like texture structures 15 on the target surface have a convex portion 16, the surface roughness of the target surface can be increased, which is conducive to making the doped semiconductor layer formed on the target surface by deposition and other processes also have a relatively large specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer. As for the specific morphology of the tower-like texture structure 15 and the protrusions 16 on the target surface, the number and distribution of the protrusions 16, and the size of the protrusions 16, etc., please refer to the specific morphology of the tower-like texture structure 15 and the protrusions 16 on the side of the passivation layer 14 away from the semiconductor substrate, the number and distribution of the protrusions 16, and the size of the protrusions 16, etc., which will not be repeated here. For example, the protrusions 16 on the target surface can be in the shape of a quasi-triangular prism, a quasi-conical cone, or a quasi-cylindrical column.

[0068] For the above-mentioned passivation layer, the surface of the passivation layer facing away from the semiconductor substrate is the front and / or back of the solar cell. In terms of the formation position, the passivation layer can be arranged in the target surface, or on the target surface, or a part of the passivation layer can be arranged in the target surface and another part can be arranged on the target surface. The formation position of the passivation layer on one side of the target surface can be determined according to the structure of the passivation layer, and is not specifically limited here.

[0069] In terms of structure and material, the specific structure of the passivation layer can be determined according to the type of solar cell and the actual application scenario, and is not specifically limited here. Exemplarily, the passivation layer may include at least one of an interface passivation layer, a doped semiconductor layer, a surface passivation layer, an anti-reflection layer, and a transparent conductive layer.

[0070] like Figures 2 to 4 As shown, when the passivation layer 14 is only a doped semiconductor layer, the passivation layer 14 can be arranged on the target surface or in the target surface. At this time, the tower base-like texture structure and the protrusion are both formed on the side of the doped semiconductor layer away from the semiconductor substrate. Among them, when the passivation layer 14 is arranged on the target surface, the material of the passivation layer 14 can include any semiconductor material such as silicon, germanium silicon or germanium. The crystal phase of the passivation layer 14 can be single crystal, polycrystalline, microcrystalline, nanocrystalline or amorphous.

[0071] like Fig. 9 and Fig.10 As shown, when the passivation layer 14 includes only at least one of the surface passivation layer 22, the anti-reflection layer and the transparent conductive layer, the passivation layer 14 is arranged on the target surface. At this time, the tower-like texture structure and the protrusion are both formed on the outermost one of the film layers included in the passivation layer 14 (i.e., the one with the largest distance from the semiconductor substrate 11 along the thickness direction of the battery), which is away from the side surface of the semiconductor substrate 11. For example: when the passivation layer 14 includes only the surface passivation layer 22, the tower-like texture structure and the protrusion are both formed on the side of the surface passivation layer 22 away from the semiconductor substrate. In addition, the solar cell provided by the embodiment of the present invention also includes a doped semiconductor layer 20 arranged in or on the target surface (when the doped semiconductor layer 20 is arranged on the target surface, the material of the doped semiconductor layer 20 can refer to the above text and will not be repeated here), and the passivation layer is located on the side of the doped semiconductor layer 20 away from the semiconductor substrate 11. Furthermore, the materials of the above-mentioned surface passivation layer, anti-reflection layer and transparent conductive layer can be set according to actual needs. Exemplarily, the material of the surface passivation layer may include any material having a passivation effect, such as silicon oxide, aluminum oxide, silicon nitride or silicon oxynitride. The material of the anti-reflection layer may include silicon nitride or silicon oxynitride. The material of the transparent conductive layer may include at least one of fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide and indium hydroxide.

[0072] When the passivation layer includes at least one of a surface passivation layer, an anti-reflection layer, and a transparent conductive layer in addition to the doped semiconductor layer, the tower-like texture structure and the protrusion are both formed on the outermost one of the film layers included in the passivation layer 14 (i.e., the one with the largest distance from the semiconductor substrate along the battery thickness direction), and the surface of the side facing away from the semiconductor substrate. For example: when the passivation layer only includes a doped semiconductor layer and a transparent conductive layer, and the transparent conductive layer is arranged on the side of the doped semiconductor layer facing away from the semiconductor substrate, the tower-like texture structure and the protrusion are both formed on the side of the transparent conductive layer facing away from the semiconductor substrate. In addition, the formation position of the doped semiconductor layer in the solar cell, as well as the materials of the surface passivation layer, the anti-reflection layer, the transparent conductive layer, and the doped semiconductor layer can refer to the above text and will not be repeated here.

[0073] It should be noted that, when the solar cell provided in the embodiment of the present invention is a double-sided contact cell and the passivation layer includes a doped semiconductor layer, the doped semiconductor layer in the same passivation layer is an N-type doped semiconductor layer or a P-type doped semiconductor layer. When the solar cell is a back contact cell and the passivation layer includes a doped semiconductor layer, Fig.14 As shown, along the direction parallel to the target surface, the doped semiconductor layer in the passivation layer 14 includes first doped semiconductor portions 18 and second doped semiconductor portions 19 that are alternately distributed and have opposite conductivity types, and at least a portion of the first doped semiconductor portion 18 is spaced apart from at least a portion of the second doped semiconductor portion 19. Specifically, at least a portion of the first doped semiconductor portion 18 and at least a portion of the second doped semiconductor portion 19 may be spaced apart along the direction parallel to the target surface, or may be spaced apart along the thickness direction of the semiconductor substrate 11 by a dielectric layer of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0074] In addition, when the doped semiconductor layer is disposed on the target surface, such as Fig. 9 As shown, the doped semiconductor layer 20 may be in direct contact with the semiconductor substrate 11; or Figure 8 As shown, the solar cell may further include an interface passivation layer 21 between the semiconductor substrate 11 and the doped semiconductor layer 20. The material and thickness of the interface passivation layer 21 may be determined according to the material of the doped semiconductor layer 20, and are not specifically limited here. For example, when the doped semiconductor layer includes a doped polysilicon layer, the interface passivation layer is a tunneling oxide layer. For another example, when the doped semiconductor layer includes a doped amorphous silicon layer, the interface passivation layer is an intrinsic amorphous silicon layer.

[0075] In terms of surface morphology, the side of the passivation layer facing away from the semiconductor substrate has a plurality of quasi-tower-shaped texture structures that are recessed into the passivation layer. A single quasi-tower-shaped texture structure is surrounded by a quasi-polygonal bottom surface and a side surface. The quasi-polygonal bottom surface may be a regular polygonal bottom surface (in this case, the polygon may be a regular quadrilateral, pentagon, hexagon or octagon, etc.; the corners of the polygon may be regular sharp corners or rounded corners; the polygon may be a regular polygon with the same side length or a polygon with different side lengths), or the above-mentioned quasi-polygonal bottom surface may also be a polygonal bottom surface with at least one side being an arc-shaped or other irregular morphology (it may be a quadrilateral, pentagon, hexagon or octagon, etc.; the corners of the polygon may be sharp corners or rounded corners).

[0076] As for the size of the tower-like texture structure, it can be determined according to the surface roughness requirements of the passivation layer on the side away from the semiconductor substrate in the actual application scenario, and no specific limitation is made here.

[0077] Exemplarily, the side length of the quasi-polygonal bottom surface in the quasi-tower-shaped texture structure may be greater than or equal to 5 μm and less than or equal to 30 μm. For example, the side length of the quasi-polygonal bottom surface in the quasi-tower-shaped texture structure may be 5 μm, 5.5 μm, 6 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm, 10 μm, 15 μm, 20 μm, 25 μm or 30 μm, etc.

[0078] Exemplarily, the concave depth of the tower-like texture structure may be greater than or equal to 0.1 μm and less than or equal to 2 μm. For example, the concave depth of the tower-like texture structure may be 0.1 μm, 0.5 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm or 2 μm.

[0079] Secondly, if Figure 5 and Figure 6 As shown, in the same type of tower base-like texture structure 15, at least one corner of the polygonal bottom surface has a plurality of raised portions 16 climbing along the extension direction of the side ridges, and the plurality of raised portions 16 on the same corner have an undulating morphology extending in a direction parallel to the polygonal bottom surface. Specifically, the raised portion climbs on the side of the tower base-like texture structure, and the climbing direction is roughly parallel to the extension direction of the side ridges. At this time, the inclination angle of the raised portion relative to the polygonal bottom surface can range from 30° to 60°. In addition, in the same type of tower base-like texture structure 15, the plurality of raised portions 16 may be on only one corner of the polygonal bottom surface. Or, as Fig.11 As shown, in at least one tower base-like texture structure 15, at least two corners of the polygonal bottom surface have multiple protrusions 16; at this time, in this case, the distribution relationship between different corners of the same polygonal bottom surface having multiple protrusions 16 thereon can be determined according to the actual manufacturing process.

[0080] For example, Figure 5 As shown, in at least one tower-like base-shaped texture structure 15, at least one pair of corners of the polygon-like bottom surface has multiple protrusions 16. At least one pair of corners can be two corners distributed diagonally in the polygon-like bottom surface. In this case, in at least one tower-like base-shaped texture structure 15, compared with only one corner of the polygon-like bottom surface having protrusions 16, when at least one pair of corners of the polygon-like bottom surface has multiple protrusions 16, at least one same tower-like base-shaped texture structure 15 is provided with more protrusions 16, which is conducive to further increasing the degree of undulation of the passivation layer away from the semiconductor substrate side, and at the same time, it is conducive to making different protrusions 16 distributed on different corners of the polygon-like bottom surface along the diagonal direction, rather than concentrated on a single corner, and thus it is conducive to making different regions along the diagonal direction in the same tower-like base-shaped texture structure 15 have higher surface roughness, which is conducive to making different regions of the doped semiconductor layer have good contact performance with the electrode, and the electrode has strong adhesion and good shaping on different regions of the doped semiconductor layer.

[0081] In addition, as mentioned above, the presence of the protrusion is beneficial to increasing the surface roughness of the side of the passivation layer facing away from the semiconductor substrate at the microscopic level, and then helps to increase the contact area between the doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer. However, if the size of the protrusion is too large, it will affect the formation quality of the passivation layer on the target surface. Therefore, the size of the protrusion can be determined based on the requirements for the passivation effect of the passivation layer, the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer in the actual application scenario, and no specific limitation is made here.

[0082] Exemplarily, the height of a single protrusion may be greater than or equal to 0.2 μm and less than or equal to 0.8 μm. For example, the height of the protrusion may be 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm or 0.8 μm, etc. In this case, the height of the protrusion is within the above range, which helps to prevent the surface roughness of the passivation layer away from the semiconductor substrate from being smaller due to the smaller height of the protrusion, and ensures that the contact area between the doped semiconductor layer and the electrode can be increased by the protrusion, improves the contact performance between the doped semiconductor layer and the electrode, and improves the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell. In addition, it is also helpful to prevent the surface roughness of the passivation layer on the side away from the semiconductor substrate from being large due to the height of the protrusion being too large, ensuring that the target surface of the semiconductor substrate is relatively flat, and improving the formation quality of the passivation layer on the target surface, improving the passivation effect of the passivation layer, and achieving the passivation effect of the passivation layer, the contact performance between the doped semiconductor layer and the electrode, and the balance between the adhesion and shaping of the electrode, ensuring that the solar cell has high working performance and structural reliability. Wherein, along the extension direction of the side edge line, a single protrusion can climb from one corner of the quasi-polygonal bottom surface to the top of the side surface, or a single protrusion can also climb from one corner of the quasi-polygonal bottom surface only to the height of the side surface part.

[0083] When a single protrusion rises from one corner of the polygonal bottom surface only to the height of the side surface, such as Fig.12 As shown, the corner may have only one set of protrusions 16 along the extending direction of the side ridge line, and in this case, a part of the side surface of the tower base-like texture structure 15 is exposed. Fig.13 As shown, in at least one of the tower-like base-shaped texture structures 15, at least one corner of the quasi-polygonal bottom surface may also have at least two groups of raised portions 16 distributed in a stepped manner along the extending direction of the side edge line, and each group of raised portions 16 includes a plurality of raised portions 16 extending and distributed along the direction of the quasi-polygonal bottom surface. In this case, the at least two groups of raised portions 16 distributed in a stepped manner can further increase the undulation degree of the side of the tower-like base-shaped texture structure 15 along the extending direction of the edge line, further increase the surface roughness of the side of the passivation layer away from the semiconductor substrate, and help increase the contact area between the above-mentioned doped semiconductor layer and the electrode, further improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0084] Exemplarily, the width of a single protrusion may be greater than or equal to 0.1 μm and less than or equal to 0.8 μm. For example, the width of the protrusion may be 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm or 0.8 μm, etc. The application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect of the height of a single protrusion being greater than or equal to 0.2 μm and less than or equal to 0.8 μm described above, and will not be repeated here.

[0085] Specifically, in the actual application process, such as Figure 7 As shown, the height of a single protrusion can be greater than the width of the protrusion. The height direction of the protrusion 16 is parallel to the thickness direction of the semiconductor substrate, and the width direction of the protrusion 16 is parallel to the extension direction of the polygonal bottom surface of the tower-like texture structure 15. In this case, compared with the "short and fat" protrusion whose height is less than the width, when the height of a single protrusion 16 is greater than the width of the protrusion 16, the "thin and tall" single protrusion 16 has a greater degree of fluctuation, and is conducive to forming a larger number of protrusions 16 per unit area, further increasing the surface roughness of the side of the passivation layer away from the semiconductor substrate, and is conducive to increasing the contact area between the above-mentioned doped semiconductor layer and the electrode, further improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, and improving the conversion efficiency of the solar cell. Of course, there may also be at least one protrusion whose height is less than or equal to the width of the protrusion.

[0086] As for the morphology of the raised portion and the undulating morphology of multiple raised portions on the same corner extending along the polygonal bottom surface, they can be determined according to the recessed depth of the tower base-like texture structure and the actual application scenario, and are not specifically limited here.

[0087] For example, Fig.12 and Fig.13 As shown, the multiple protrusions 16 on the same corner may have a zigzag undulating morphology or a wavy undulating morphology extending along the direction of the polygonal bottom surface. In this case, compared with a single convex or concave undulating morphology such as an arc, the zigzag undulating morphology and the wavy undulating morphology both have a continuous undulating morphology of convex, concave, convex, concave..., which can further increase the surface roughness of the tower-like texture structure 15, which is beneficial to increase the contact area between the above-mentioned doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer.

[0088] For example, Figure 6 , Figure 7 , Fig.12 and Fig.13As shown, at least one protrusion 16 may be in a triangular prism-like, conical-like, or cylindrical-like shape. In this case, the morphology of the protrusion 16 has a variety of examples, which is conducive to improving the applicability of the solar cell provided by the embodiment of the present invention in different application scenarios. In addition, the process difficulty of manufacturing the tower base-like texture structure 15 can also be reduced.

[0089] It should be noted that the above-mentioned quasi-triangular prism shape may be a regular triangular prism shape, the ridges of the regular triangular prism shape structure and the side ridges of the quasi-pyramid texture structure are roughly parallel; or the quasi-triangular prism shape may also be a quasi-triangular prism shape with irregular morphology such as arc-shaped ridges or sides. Fig.12 and Fig.13 As shown, the convex portion 16 on at least one corner is in a triangular prism-like shape, and the ridgeline of the convex portion 16 can be in an arc shape that is concave toward the direction close to the semiconductor substrate. In this case, when the convex portion 16 on at least one corner is in a triangular prism-like shape, compared with the ridgeline of the convex portion 16 being a straight line, when the ridgeline of the convex portion 16 is in an arc shape that is concave toward the direction close to the semiconductor substrate, the portion of the convex portion 16 corresponding to the concave arc-shaped ridgeline also has a concave undulating morphology, which can further increase the surface roughness of the tower-like texture structure 15 in the area where the convex portion 16 is provided, which is conducive to further increasing the specific surface area of ​​the above-mentioned doped semiconductor layer, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, and improving the conversion efficiency of the solar cell. It should be noted that the arc-shaped ridgeline in the convex portion 16 that is concave toward the direction close to the semiconductor substrate refers to the top ridgeline of the triangular prism-like structure.

[0090] The above-mentioned quasi-cone shape and quasi-cylindrical shape can be respectively a regular cone shape or a regular cylinder shape (a portion of the side surface of the regular cone shape or the regular cylinder shape can be integrated with the side surface of the tower base-like texture structure); or the quasi-cone shape and the quasi-cylindrical shape can also be respectively a quasi-cone shape or a quasi-cylindrical shape with irregular morphology having a concave or convex microstructure on the side surface.

[0091] In addition, when the concave depth of the quasi-tower-shaped texture structure is relatively small (e.g., the concave depth is less than 0.4 μm), the morphology of the protrusion can be quasi-cylindrical or quasi-conical. When the concave depth of the quasi-tower-shaped texture structure is relatively large (e.g., greater than or equal to 0.4 μm), the morphology of the protrusion can be quasi-triangular prism. It can be seen that when the concave depth of the quasi-tower-shaped texture structure is different, the morphology of the protrusion may also be different.

[0092] Specifically, the depths of the multiple tower-like texture structures on the side of the passivation layer facing away from the semiconductor substrate may be substantially the same, and the numbers of the different tower-like texture structures formed thereon are also substantially the same.

[0093] Alternatively, the above-mentioned multiple tower-like texture structures may include a first-type tower-like texture structure and a second-type tower-like texture structure. Among them, the depth of the first-type tower-like texture structure recessed into the passivation layer is greater than the depth of the second-type tower-like texture structure recessed into the passivation layer. Moreover, the number of protrusions in the first-type tower-like texture structure is greater than the number of protrusions in the second-type tower-like texture structure. In this case, the multiple tower-like texture structures also include a first-type tower-like texture structure with a larger recessed depth and a larger number of protrusions, which can further increase the surface roughness of the passivation layer away from the semiconductor substrate side, further improve the contact performance between the above-mentioned doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, improve the structural stability of the solar cell, and reduce the transmission loss between the doped semiconductor layer and the electrode.

[0094] Among them, when the above-mentioned multiple tower-like texture structures can include a first-type tower-like texture structure and a second-type tower-like texture structure with different recessed depths and different numbers of protrusions, the distribution of the first-type tower-like texture structure and the second-type tower-like texture structure on the side of the passivation layer away from the semiconductor substrate can be set according to the structure of the passivation layer and actual needs, and no specific limitation is made here.

[0095] Exemplarily, in the case where the solar cell is a double-sided contact cell, the first type of tower-like texture structure and the second type of tower-like texture structure can be evenly distributed on the side of the passivation layer facing away from the semiconductor substrate; or, one of the first type of tower-like texture structure and the second type of tower-like texture structure is evenly distributed on the side of the passivation layer facing away from the semiconductor substrate, and the other is only randomly distributed in a local area on the side of the passivation layer facing away from the semiconductor substrate.

[0096] For example, Fig.14As shown, one of the first and second surfaces is the target surface. The passivation layer 14 includes a first doped semiconductor portion 18 and a second doped semiconductor portion 19 of opposite conductivity types. At least a portion of the first doped semiconductor portion 18 and at least a portion of the second doped semiconductor portion 19 are distributed at intervals. Among them, the side surface of the passivation layer 14 corresponding to the first doped semiconductor portion 18 that is away from the semiconductor substrate 11 is the first sub-surface, and the side surface of the passivation layer 14 corresponding to the second doped semiconductor portion 19 that is away from the semiconductor substrate 11 is the second sub-surface. The number of protrusions on the first sub-surface is different from the number of protrusions on the second sub-surface; and / or, the height of the protrusions on the first sub-surface is different from the height of the protrusions on the second sub-surface. In this case, it can be understood that the first doped semiconductor portion 18 and the second doped semiconductor portion 19 of opposite conductivity types are distributed at intervals on the same side of the semiconductor substrate 11, and the solar cell is a back contact cell to improve the light utilization rate of the cell. In addition, when the number and / or height of the protrusions on the first sub-surface and the second sub-surface are different, the number and height of the protrusions on the first sub-surface and the second sub-surface can be set respectively according to the requirements for different passivation effects of the first doped semiconductor portion 18 and the second doped semiconductor portion 19 in the actual application scenario, and the requirements for the contact performance between the two and the corresponding electrodes, so that the two parts of the passivation layer 14 corresponding to the first doped semiconductor portion 18 and the second doped semiconductor portion 19 respectively have different passivation effects on the semiconductor substrate 11, and are conducive to making the first doped semiconductor portion 18 and the second doped semiconductor portion 19 have different surface morphologies, thereby helping to reduce the passivation difference between the two parts of the passivation layer 14 corresponding to the first doped semiconductor portion 18 and the second doped semiconductor portion 19 respectively, and helping to reduce the difference in contact performance between the first doped semiconductor portion 18 and the second doped semiconductor portion 19 and the corresponding electrodes.

[0097] Among them, the formation position of the first doped semiconductor part and the second doped semiconductor part included in the passivation layer on the target surface can be determined with reference to the formation position of the doped semiconductor layer included in the passivation layer on the target surface as described above. Specifically, the first doped semiconductor part and the second doped semiconductor part included in the passivation layer can be both formed in the target surface, or both formed on the target surface, or one of the first doped semiconductor part and the second doped semiconductor part can be arranged in the target surface and the other can be arranged on the target surface. As for the specific conductivity type of the first doped semiconductor part and the second doped semiconductor part, it can be set according to actual needs, as long as it can help to reduce the passivation difference between the two parts of the passivation layer corresponding to the first doped semiconductor part and the second doped semiconductor part, and help to reduce the difference in contact performance between the first doped semiconductor part and the second doped semiconductor part and the corresponding electrodes.

[0098] It can be understood that due to the limitation of doping solid concentration and doping concentration, the doping concentration of the dopant in the N-type doped semiconductor part is greater than the doping concentration of the dopant in the P-type doped semiconductor part, and the passivation characteristics and contact characteristics with the positive electrode of the P-type doped semiconductor part are relatively worse. Based on this, if the number of protrusions on the first sub-surface is greater than the number of protrusions on the second sub-surface, and / or the height of the protrusions on the first sub-surface is greater than the height of the protrusions on the second sub-surface, in one case, the conductivity type of the first doped semiconductor part can be P-type, the conductivity type of the second doped semiconductor part is N-type, and the P-type doped semiconductor part is rougher than the surface of the N-type doped semiconductor part, so as to increase the contact area between the P-type doped semiconductor part and the positive electrode, and reduce the difference in contact performance between the corresponding N-type doped semiconductor part and the P-type doped semiconductor part in the battery and the corresponding electrode. At this time, the N-type doped semiconductor part can be provided with a protrusion to further increase the contact area between the N-type doped semiconductor part and the negative electrode, and reduce the contact performance between the N-type doped semiconductor part and the negative electrode; the N-type doped semiconductor part may also not be provided with a protrusion. In another case, the conductivity type of the first doped semiconductor part can be N-type, and the conductivity type of the second doped semiconductor part can be P-type. The surface of the P-type doped semiconductor part is flatter than that of the N-type doped semiconductor part, so as to improve the passivation effect of the P-type doped semiconductor part on the semiconductor substrate 11 and reduce the passivation difference between the two parts corresponding to the N-type doped semiconductor part and the P-type doped semiconductor part in the battery. In this case, the N-type doped semiconductor part can be provided with a protrusion, which can increase the contact area between the N-type doped semiconductor part and the negative electrode and reduce the contact performance between the N-type doped semiconductor part and the negative electrode; the N-type doped semiconductor part may also not be provided with a protrusion.

[0099] In addition, both the first sub-surface and the second sub-surface may have the above-mentioned tower-base-like texture structure, in which case, at least one of the first sub-surface and the second sub-surface may also have at least one tower-base-like texture structure without a protrusion. Alternatively, only one of the first sub-surface and the second sub-surface has the above-mentioned tower-base-like texture structure, while the other has a tower-base-like texture structure without a protrusion. For example: when the first doped semiconductor portion is an N-type doped polysilicon layer and the second doped semiconductor portion is a P-type doped amorphous silicon layer, only the first sub-surface has the above-mentioned tower-base-like texture structure, while the second sub-surface has a tower-base-like texture structure without a protrusion, and a velvet structure may be provided. For another example: the conductivity type of the first doped semiconductor part can be P-type, the conductivity type of the second doped semiconductor part is N-type, and the above-mentioned tower-like texture structure is only on the first sub-surface, while the second sub-surface has a tower-like texture structure without a protrusion. At this time, the first sub-surface is rougher than the second sub-surface, which is conducive to making the surface of the P-type doped semiconductor part rougher than that of the N-type doped semiconductor part, so as to increase the contact area between the P-type doped semiconductor part and the positive electrode, and reduce the difference in contact performance between the N-type doped semiconductor part and the P-type doped semiconductor part in the battery and the corresponding electrodes. Among them, the bottom surface morphology and one-dimensional size of the tower-like texture structure without a protrusion on the second sub-surface can refer to the bottom surface morphology and one-dimensional size of the tower-like texture structure with a protrusion described above, and will not be repeated here. In addition, the one-dimensional size of the tower-like texture structure on the second sub-surface can be the same as or different from the one-dimensional size of the tower-like texture structure on the first sub-surface. When the one-dimensional size of the tower-like texture structure on the second sub-surface is different from the one-dimensional size of the tower-like texture structure on the first sub-surface, the recessed depth of the tower-like texture structure on the first sub-surface may be greater than the recessed depth of the tower-like texture structure on the second sub-surface, and / or the bottom side length (and / or the bottom diagonal length) of the tower-like texture structure on the first sub-surface is smaller than the bottom side length (and / or the bottom diagonal length) of the tower-like texture structure on the second sub-surface, so as to further increase the surface roughness of the first sub-surface and further improve the contact performance between the P-type doped semiconductor part and the positive electrode.

[0100] In one example, if Fig.11 As shown, the passivation layer may also have a linear texture structure 17 on the side facing away from the semiconductor substrate, and at least one side of the linear texture structure 17 has a plurality of protrusions intersecting with the extension direction of the linear texture structure 17. In this case, the presence of the linear texture structure 17 can further increase the surface roughness of the side of the passivation layer facing away from the semiconductor substrate, which is beneficial to increase the contact area between the doped semiconductor layer and the electrode, further improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0101] Specifically, the linear texture structure may be a linear protrusion extending in a single direction. The linear texture structure may be a cutting line mark formed when a semiconductor substrate is cut during the actual manufacturing process, which is retained after polishing and cleaning and makes the surface of the passivation layer disposed on the target surface have substantially the same morphology. Therefore, the size and extension direction of the linear texture structure may be determined according to the size of the cutting line mark and the specific manufacturing process of polishing and cleaning, and are not specifically limited here.

[0102] Exemplarily, the passivation layer may also have a boss-type structure on the side facing away from the semiconductor substrate. The boss-type structure may be a boss-type structure remaining after the top of the pyramid-type structure is eliminated. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the passivation layer also having a linear texture structure on the side facing away from the semiconductor substrate as described above, which will not be repeated here. Secondly, the surface of the boss-type structure may also have a plurality of raised portions that intersect with the extension direction of the side edges of the boss-type structure, so as to further increase the microscopic surface roughness of the passivation layer on the side facing away from the semiconductor substrate. Among them, the embodiment of the present invention does not specifically limit the size of the boss-type structure, as long as it can be applied to the solar cell provided in the embodiment of the present invention.

[0103] In a second aspect, an embodiment of the present invention provides a photovoltaic module, which includes the solar cell provided by the first aspect and various implementations thereof.

[0104] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0105] In a third aspect, an embodiment of the present invention provides a semiconductor substrate. Fig.15 As shown, the semiconductor substrate has a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The target surface has a plurality of tower-like texture structures 15 recessed into the semiconductor substrate. A single tower-like texture structure 15 is surrounded by a polygon-like bottom surface and a side surface. In the same tower-like texture structure 15, at least one corner of the polygon-like bottom surface has a plurality of raised portions 16 climbing along the extension direction of the side edge line, and the plurality of raised portions 16 on the same corner have an undulating morphology extending in a direction parallel to the polygon-like bottom surface.

[0106] Exemplarily, the multiple tower-like texture structures on the target surface of the semiconductor substrate may also include a first-type tower-like texture structure and a second-type tower-like texture structure. The depth of the first-type tower-like texture structure recessed into the semiconductor substrate is greater than the depth of the second-type tower-like texture structure recessed into the semiconductor substrate. In addition, the number of raised portions in the first-type tower-like texture structure is greater than the number of raised portions in the second-type tower-like texture structure.

[0107] Exemplarily, in at least one tower-base-like texture structure of the target surface, at least one pair of corners of the polygon-like bottom surface each have a plurality of protrusions. The at least one pair of corners are two corners of the polygon-like bottom surface that are diagonally distributed.

[0108] For example, in the target surface, a plurality of raised portions on the same corner may have a zigzag line-shaped undulating shape or a wavy line-shaped undulating shape extending along the direction of the polygonal bottom surface.

[0109] Exemplarily, in the target surface, at least one protrusion is in a triangular prism-like, cone-like or cylindrical-like shape.

[0110] Exemplarily, in the target surface, the protrusion on at least one corner may be in a triangular prism-like shape, and the ridgeline of the protrusion is in an arc shape that is concave toward a direction close to the semiconductor substrate.

[0111] Exemplarily, in the target surface, the height of a single protrusion may be greater than its width. The height direction of the protrusion is parallel to the thickness direction of the semiconductor substrate, and the width direction of the protrusion is parallel to the extension direction of the polygonal bottom surface of the tower-like texture structure.

[0112] Exemplarily, in the target surface, the height of a single protrusion is greater than or equal to 0.2 μm and less than or equal to 0.8 μm.

[0113] Exemplarily, in the target surface, the width of a single protrusion is greater than or equal to 0.1 μm and less than or equal to 0.8 μm.

[0114] Exemplarily, in the target surface, in at least one tower-base-like texture structure, at least one corner of the polygonal bottom surface has at least two groups of protrusions distributed in a stepped manner along the extension direction of the side ridges, and each group of protrusions includes a plurality of protrusions extending along the direction of the polygonal bottom surface.

[0115] Exemplarily, the target surface also has a linear texture structure, and at least one side of the linear texture structure has a plurality of protrusions intersecting with an extension direction of the linear texture structure.

[0116] Exemplarily, the target surface may have a first region and a second region that do not overlap each other. The number of protrusions on the surface of the first region is different from the number of protrusions on the surface of the second region; and / or the height of the protrusions on the surface of the first region is different from the height of the protrusions on the surface of the second region.

[0117] It should be noted that the semiconductor substrate provided in the third aspect of the embodiment of the present invention is used to manufacture the solar cell provided in the first aspect. The morphology of the multiple tower-like texture structures on the target surface of the semiconductor substrate, the size and distribution of the protrusions, and other information can refer to the morphology of the multiple tower-like texture structures on the side of the passivation layer away from the semiconductor substrate in the first aspect, the size and distribution of the protrusions, and other information.

[0118] The beneficial effects of the third aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0119] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0120] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A solar cell, characterized in that: include: A semiconductor substrate having a first side and a second side opposite to each other; At least one of the first surface and the second surface is a target surface; and a passivation layer disposed on the target surface; The side of the passivation layer facing away from the semiconductor substrate has a plurality of tower-like texture structures recessed into the passivation layer; Among them, a single tower base-like texture structure is surrounded by a polygonal bottom surface and side surfaces; in the same tower base-like texture structure, at least one corner of the polygonal bottom surface has a plurality of raised portions rising along the extension direction of the side edge line, and the plurality of raised portions on the same corner have an undulating morphology extending in a direction parallel to the polygonal bottom surface.

2. The solar cell according to claim 1, characterized in that The plurality of tower foundation-like texture structures include a first-type tower foundation-like texture structure and a second-type tower foundation-like texture structure; Among them, the depth of the first type of tower base-shaped texture structure recessed into the passivation layer is greater than the depth of the second type of tower base-shaped texture structure recessed into the passivation layer; the number of the protrusions in the first type of tower base-shaped texture structure is greater than the number of the protrusions in the second type of tower base-shaped texture structure.

3. The solar cell according to claim 1, characterized in that In at least one of the tower base-like texture structures, at least one pair of the corners of the polygonal bottom surface has a plurality of the protrusions; and at least one pair of the corners are two corners diagonally distributed in the polygonal bottom surface.

4. The solar cell according to claim 1, characterized in that The plurality of protrusions on the same corner have a broken line undulating shape or a wavy line undulating shape extending along the direction of the polygonal bottom surface.

5. The solar cell according to claim 1, characterized in that: At least one of the protrusions is in a triangular prism-like, conical-like or cylindrical-like shape.

6. The solar cell according to claim 1, characterized in that The protrusion on at least one of the corners is in a triangular prism-like shape, and the ridgeline of the protrusion is in an arc shape that is concave toward a direction close to the semiconductor substrate.

7. The solar cell according to claim 1, characterized in that The height of a single protrusion is greater than the width of the protrusion; the height direction of the protrusion is parallel to the thickness direction of the semiconductor substrate, and the width direction of the protrusion is parallel to the extension direction of the polygonal bottom surface of the tower-like texture structure; and / or, the height of a single protrusion is greater than or equal to 0.2 μm and less than or equal to 0.8 μm; And / or, the width of a single protrusion is greater than or equal to 0.1 μm and less than or equal to 0.8 μm.

8. The solar cell according to claim 1, characterized in that In at least one of the tower-base-like texture structures, at least one corner of the polygonal bottom surface has at least two groups of raised portions distributed in a stepped manner along the extension direction of the side ridges, and each group of raised portions includes a plurality of raised portions extending along the direction of the polygonal bottom surface.

9. The solar cell according to claim 5, characterized in that: The passivation layer further has a linear texture structure on a side facing away from the semiconductor substrate, and at least one side of the linear texture structure has a plurality of protrusions intersecting with an extending direction of the linear texture structure.

10. The solar cell according to claim 1, characterized in that: One of the first surface and the second surface is a target surface; the passivation layer includes a first doped semiconductor portion and a second doped semiconductor portion with opposite conductivity types; at least a portion of the first doped semiconductor portion and at least a portion of the second doped semiconductor portion are distributed alternately; The surface of the passivation layer corresponding to the first doped semiconductor portion and facing away from the semiconductor substrate is a first sub-surface, and the surface of the passivation layer corresponding to the second doped semiconductor portion and facing away from the semiconductor substrate is a second sub-surface; The number of the protrusions on the first sub-surface is different from the number of the protrusions on the second sub-surface; and / or the height of the protrusions on the first sub-surface is different from the height of the protrusions on the second sub-surface.

11. The solar cell according to claim 10, characterized in that The first doped semiconductor portion is a P-type doped semiconductor portion, and the second doped semiconductor portion is an N-type doped semiconductor portion; The protrusions are only distributed on the first sub-surface; the second sub-surface has a tower base-like texture structure without the protrusions.

12. The solar cell according to claim 1, characterized in that The target surface has a plurality of the tower-like texture structures recessed into the semiconductor substrate, and the protrusions in the tower-like texture structures on the target surface are in a triangular prism-like shape.

13. A photovoltaic module, characterized in that: The invention comprises a solar cell as claimed in any one of claims 1 to 12.

14. A semiconductor substrate, characterized in that: The semiconductor substrate has a first surface and a second surface opposite to each other; at least one of the first surface and the second surface is a target surface; the target surface has a plurality of tower-like texture structures recessed into the semiconductor substrate; Among them, a single tower base-like texture structure is surrounded by a polygonal bottom surface and side surfaces; in the same tower base-like texture structure, at least one corner of the polygonal bottom surface has a plurality of raised portions rising along the extension direction of the side edge line, and the plurality of raised portions on the same corner have an undulating morphology extending in a direction parallel to the polygonal bottom surface.

Images