Message recombination method and device

Abstract

The invention provides a message recombination method and device, and relates to the technical field of communication. The invention relates to a message recombination device, which comprises a preprocessing unit used for receiving a message of T-CONT flow, writing message data of the message into a storage array according to a distribution identifier, and outputting the message data of the message meeting an output condition from the storage array; the storage entry unit is used for applying for a storage address for writing message data from the address management unit, writing the received message data into a storage space corresponding to the applied storage address until the last message fragment of the message is written into the storage space, and recombining the message; and the storage exit unit is used for reading the recombined message from the storage space for uplink transmission, and releasing the storage address occupied by the recombined message to the address management unit. Through the device, the transmission efficiency of the data in the network can be improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a message reassembly method and device. Background Art

[0002] With the development of network technology, users' demand for timely data transmission is gradually increasing. In the PON (Passive Optical Network) system, uplink data, that is, data sent by ONU (Optical Network Unit) to OLT (Optical Line Terminal) via ODN (Optical Distribution Network), is transmitted in the permitted time slot through TDMA (Time Division Multiple Access).

[0003] When sending a message of T-CONT (Transmission Container) traffic, if the remaining space in the time slot is insufficient for sending, the message will be stopped and the message will be sent only when there is sufficient space in the next time slot. In a network with high transmission demand, this will cause a large delay in data transmission and reduce the data transmission efficiency in the network. Summary of the invention

[0004] In order to overcome the problems existing in the related art, this specification provides a message reassembly method and device.

[0005] According to a first aspect of an embodiment of this specification, a message reassembly device is provided, including:

[0006] A preprocessing unit, configured to receive a message of T-CONT traffic, write message data of the message into a storage array according to an allocation identifier, and output the message data of the message that meets an output condition from the storage array, wherein the storage array has N×M data storage blocks, N represents a column where a data storage block is located, M represents a row where a data storage block is located, and N and M are integer multiples of 2;

[0007] A storage entry unit, used to apply to the address management unit for a storage address for writing message data, write the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reassemble the message;

[0008] The storage export unit is used to read out the reassembled message from the storage space for uplink transmission, and release the storage address occupied by the reassembled message to the address management unit.

[0009] Optionally, a tag memory is further formed in the preprocessing unit, the tag memory is divided into M tag storage blocks, and a corresponding relationship is established between the tag storage blocks in the tag memory and a row of data storage blocks according to the allocation flags;

[0010] The output condition is that a row of data storage blocks is full, or the written message data contains the end mark of the message

[0011] The preprocessing unit is specifically used for:

[0012] Receive a message of T-CONT traffic and obtain an allocation flag of the message;

[0013] Writing the message data of the message to the data storage block corresponding to the allocation mark, and updating the mark data block corresponding to the allocation mark, wherein the mark data block includes a first beat mark and a write mark, the first beat mark is used to mark whether the message data currently being written is the first beat of the message, and the write mark is used to mark the column number of the data storage block into which the message data currently being written is written;

[0014] If it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then the message data and the first beat signal read out from the data storage block corresponding to the obtained allocation mark are output;

[0015] If it is determined that a row of data storage blocks is full, then the message data is read out from the data storage block corresponding to the obtained allocation flag;

[0016] If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

[0017] Optionally, the message reassembly device further comprises an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags;

[0018] The storage entry unit is specifically used for:

[0019] If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied to the address management unit, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated, wherein the message information includes a start address, an end address and a data length;

[0020] If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a storage address is re-applied to the address management unit, and the message information in the information storage block corresponding to the allocation mark is updated;

[0021] If message data is received and it is determined that the received message data carries an end mark, the received message data is written to the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

[0022] Optionally, the storage export unit is specifically used for:

[0023] According to the received message information, read the message from the starting address to the ending address and send it uplink;

[0024] The storage space between the start address and the end address is released to the address management unit.

[0025] Optionally, a linked list is formed in the message reassembly device, and the storage addresses applied for from the address management unit are sequentially stored in the linked list.

[0026] Optionally, the updating of the message information in the information storage block corresponding to the allocation mark includes:

[0027] Update the end address of the message data written last time according to the end address of the message data written this time;

[0028] The data length of the message data written this time is added to the data length of the message data written last time.

[0029] According to a second aspect of an embodiment of this specification, a message reassembly method is provided, which is applied to a logic device, including:

[0030] receiving a message of a transmission bearer entity T-CONT traffic, writing the message data of the message into a storage array according to an allocation identifier, and outputting the message data of the message that meets an output condition from the storage array, wherein the storage array has N×M data storage blocks, N represents a column where a data storage block is located, M represents a row where a data storage block is located, and N and M are integer multiples of 2;

[0031] Applying for a storage address to write message data, writing the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message;

[0032] The reassembled message is read out from the storage space for uplink transmission, and the storage address occupied by the reassembled message is released.

[0033] Optionally, a tag memory is further formed in the logic device, the tag memory is divided into M tag storage blocks, and a corresponding relationship is established between the tag storage blocks in the tag memory and a row of data storage blocks according to the allocation flags;

[0034] The output condition is that a row of data storage blocks is fully written, or the written message data contains the end mark of the message;

[0035] The receiving of a message of the transmission bearer entity T-CONT traffic and writing the message data of the message into a storage array according to the allocation identifier, and outputting the message data of the message that meets the output condition from the storage array and receives the message of the T-CONT traffic, and obtaining the allocation identifier of the message, includes:

[0036] Writing the message data of the message to the data storage block corresponding to the allocation mark, and updating the mark data block corresponding to the allocation mark, wherein the mark data block includes a first beat mark and a write mark, the first beat mark is used to mark whether the message data currently being written is the first beat of the message, and the write mark is used to mark the column number of the data storage block into which the message data currently being written is written;

[0037] If it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then the message data and the first beat signal read out from the data storage block corresponding to the obtained allocation mark are output;

[0038] If it is determined that a row of data storage blocks is full, then the message data is read out from the data storage block corresponding to the obtained allocation flag;

[0039] If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

[0040] Optionally, the message reassembly device further comprises an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags;

[0041] The application for writing the storage address of the message data, writing the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message, including:

[0042] If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied for, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated, wherein the message information includes a start address, an end address and a data length;

[0043] If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a new storage address is applied for, and the message information in the information storage block corresponding to the allocation mark is updated;

[0044] If message data is received and it is determined that the received message data carries an end mark, the received message data is written to the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

[0045] Optionally, a linked list is formed in the logic device, and the linked list sequentially stores the storage addresses requested from the address management unit;

[0046] The step of reading out the reassembled message from the storage space for uplink transmission and releasing the storage address occupied by the reassembled message comprises:

[0047] According to the received message information, read the message from the starting address to the ending address and send it uplink;

[0048] The storage space between the start address and the end address is released.

[0049] Optionally, the updating of the message information in the information storage block corresponding to the allocation mark includes:

[0050] Update the end address of the message data written last time according to the end address of the message data written this time;

[0051] The data length of the message data written this time is added to the data length of the message data written last time.

[0052] The technical solutions provided by the embodiments of this specification may have the following beneficial effects:

[0053] In the embodiments of the present specification, a storage array of N×M data storage blocks is set up to cache the message data of the T-CONT traffic in slices, and the message data is recorded by an allocation mark to achieve message reorganization, thereby avoiding the problem that the entire message needs to be delayed when the space corresponding to the allocation mark is insufficient, thereby improving the data transmission efficiency in the network.

[0054] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the specification and, together with the description, serve to explain the principles of the specification.

[0056] Figure 1 It is a structural schematic diagram of a message reassembly device involved in the present application;

[0057] Figure 2 It is a schematic diagram of a storage array for bit width expansion in a message reassembly device involved in an embodiment of the present application;

[0058] Figure 3 It is a schematic diagram of storage addresses and corresponding storage spaces in a memory in a message reassembly device involved in an embodiment of the present application;

[0059] Figure 4 It is a schematic diagram of an address queue in an address management unit in a message reassembly device involved in an embodiment of the present application;

[0060] Figure 5 A schematic diagram of the structure of a linked list recorded in a message reassembly device according to an embodiment of the present application;

[0061] Figure 6 It is a flow chart of a message reassembly method involved in this application;

[0062] Figure 7 It is a structural diagram of a PON system involved in an implementation manner of the present application;

[0063] Figure 8 It is a structural schematic diagram of a logic chip involved in an embodiment of the present application, wherein the logic chip processes message fragment 1 of a message;

[0064] Fig. 9 It is a structural diagram of a logic chip involved in an implementation manner of the present application, wherein the logic chip processes message fragments 2 of messages. DETAILED DESCRIPTION

[0065] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this specification. Instead, they are merely examples of devices and methods consistent with some aspects of this specification as detailed in the appended claims.

[0066] The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit this specification. The singular forms "a", "the" and "the" used in this specification and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0067] It should be understood that although the terms first, second, third, etc. may be used in this specification to describe various information, this information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this specification, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0068] The present application provides a message reassembly device, such as Figure 1 As shown, including:

[0069] A preprocessing unit, configured to receive a message of T-CONT traffic, write message data of the message into a storage array according to an allocation identifier, and output the message data of the message that meets an output condition from the storage array, wherein the storage array has N×M data storage blocks, N represents a column where a data storage block is located, M represents a row where a data storage block is located, and N and M are integer multiples of 2;

[0070] A storage entry unit, used to apply to the address management unit for a storage address for writing message data, write the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reassemble the message;

[0071] The storage export unit is used to read out the reassembled message from the storage space for uplink transmission, and release the storage address occupied by the reassembled message to the address management unit.

[0072] The message reassembly device is implemented in the OLT in the PON system, and the OLT receives the upstream data sent by the ONU via the ODN, and further forwards it upstream. In the PON system, the upstream T-CONT traffic of the ONU is forwarded based on the TDMA mode, and the ONU will be allocated at least one time slot, which is corresponded by the allocation mark (ALLOC_ID). The T-CONT traffic received in the corresponding time slot is sent by the same ONU. A message can be formed into multiple message fragments, and the size of the message fragment can be set according to actual needs.

[0073] The message reassembly device can be implemented by logic chips such as FPGA (Field-Programmable Gate Array) and CPLD (Complex Programmable Logic Device), or by a processor and a memory, and can be set according to actual needs without limitation. The following description will be given by taking the implementation by logic chip as an example.

[0074] The above-mentioned preprocessing unit, storage entry unit, storage exit unit, address management unit and memory burning software forming storage space are solidified in the logic chip, and some of them can also be implemented by building components outside the logic chip, without limitation.

[0075] The pre-processing unit serves as an entrance of the message reassembly device and receives data transmitted from outside the logic chip, including but not limited to the message data of the message in the T-CONT traffic that needs to be processed in this application.

[0076] The preprocessing unit may include a storage array formed by several memories for performing bit width conversion on the input message data. The memory is taken as RAM (Random Access Memory) as an example. The storage array may be constructed by N RAMs with a depth of M, where N represents the number of RAMs and M represents the number of storage blocks in a RAM, to form a storage array with N columns and M rows. The position of a storage block can be located by the values ​​of N and M. The storage blocks in the storage array may be referred to as data storage blocks later. N and M may be set to integer multiples of 2, and the following may be used to represent the number of storage blocks in a RAM. Figure 2 For example, each data storage block can store 32 bits of data, 8 RAMs are provided, each row can store 8×32 (256 bits) of message data, and the depth of each RAM is set to 2048.

[0077] For the storage array, one allocation mark can correspond to a row of data storage blocks. In the time slot corresponding to the allocation mark, the message data entering the pre-processing unit can be written into the data storage blocks one by one from low to high until the storage data blocks of a row are filled. At this time, the message data in the storage database of the row will be output from the storage array to the storage entry unit.

[0078] On the entrance side of the preprocessing unit, the message data enters the preprocessing unit with a bit width of 32 bits, and is written into the data storage block beat by beat based on the clock signal. 32 bits of message data can be written in each beat, that is, one beat can fill up a data storage block, and after 8 beats, a row of data storage blocks can be filled up.

[0079] After the storage entry unit receives the message data with the extended bit width, it can obtain a storage space for storing the received message data by applying for a storage address from the address management unit. The size of the storage space corresponding to a storage address must be larger than the size of the message data output to the storage entry unit. Figure 3 For example, the storage space corresponding to a storage address is 1024 bits. Each beat of the preprocessing unit can output 256 bits of message data to the storage entry unit, so after four beats, the 1024-bit storage space can be filled. At this time, the address management unit sends a full signal to the storage entry unit. When the storage entry unit receives subsequent message data, it will apply for storage space from the address management unit again, and this cycle will continue until the entire message is written into the storage space.

[0080] When the last part of the message data of the message is written into the storage space, the message reassembly is completed.

[0081] In the above process of storing message data, the storage entry unit can record the storage address and data length, and the storage addresses of different message data can be arranged in the form of a linked list.

[0082] It should be noted that the storage space can be implemented by a separate memory, such as DDR-RAM (Double Data Rate Random Access Memory). The mapping of the storage address and the storage space in the DDR-RAM is implemented in the address management unit. In order to further improve the writing efficiency of the message data, multiple address queues can be set in the address management unit. The address queues are implemented in the form of FIFO (First In, First Out), such as Figure 4 As shown, the storage addresses recorded in each address queue can be configured to correspond to a row of physical addresses in the DDR-RAM.

[0083] During the process of writing message data in the storage entry unit, if the end mark (EOP, End of Packet) of the message is detected, a read signal can be sent to the storage exit unit after the last part of the message data of the message is written into the storage space. After receiving the read signal, the storage exit unit can access the storage address and data length of the message recorded by the storage entry unit, thereby reading out the reassembled message from the memory and performing subsequent forwarding processing.

[0084] By setting up a storage array of N×M data storage blocks to cache the message data of T-CONT traffic, and recording the message data through allocation marks, the message can be reorganized to avoid the problem of delaying the processing of the entire message when the space corresponding to the allocation mark is insufficient, thereby improving the data transmission efficiency in the network.

[0085] Optionally, a tag memory is further formed in the preprocessing unit, and the tag memory is divided into M tag memory blocks. A corresponding relationship is established between the tag memory blocks and a row of data storage blocks in the tag memory according to the allocation flag. The tag memory can also be implemented by a memory such as a RAM, and each data block (i.e., a tag data block) in the RAM can correspond to the allocation flag. The size of each tag data block can be set according to actual needs without limitation.

[0086] The output condition is that a row of data storage blocks is fully written, or the written message data contains the end mark of the message;

[0087] The preprocessing unit is specifically used for:

[0088] Receive a message of T-CONT traffic and obtain an allocation flag of the message;

[0089] Writing the message data of the message to the data storage block corresponding to the allocation mark, and updating the mark data block corresponding to the allocation mark, wherein the mark data block includes a first beat mark and a write mark, the first beat mark is used to mark whether the message data currently being written is the first beat of the message, and the write mark is used to mark the column number of the data storage block into which the message data currently being written is written;

[0090] If it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then the message data and the first beat signal read out from the data storage block corresponding to the obtained allocation mark are output;

[0091] If it is determined that a row of data storage blocks is full, then the message data is read out from the data storage block corresponding to the obtained allocation flag;

[0092] If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

[0093] In the tag memory, the preprocessing unit can record relevant information in the process of expanding the bit width, such as a first beat flag used to mark whether the message data currently being written is the first beat of the message, and a write flag used to mark the number of columns of the data storage block into which the message data currently being written is written.

[0094] In the process of writing message data into the data storage device, the preprocessing unit can perform a write count in the mark storage block corresponding to the allocation mark to record how many storage data blocks the message data in the current time slot has been written into. Among them, two counters can be set in the mark storage block, one is a start (SOP, Start of Packet) counter, corresponding to the implementation of the first beat mark, and the other is a write counter, corresponding to the implementation of the write mark. The counting range of the start counter and the write counter can be set according to the specifications of the storage array, that is, the counting range is set to 0~N. For the start counter, the first beat mark is marked when the message data is written for the first N times. Starting from the N+1th write to the storage data block, the value of the subsequent write start counter will be locked at N until the current message is reorganized and the start counter will be reset to 0. For the write counter, the count range is set to 0~N-1. After every N writes, the write counter will be reset to 0 to perform subsequent counting.

[0095] For a message segment, the preprocessing unit continuously writes to the data storage device and outputs it to the storage entry unit when the output condition is met. For a message transmitted in a time slot, when the output condition is met, it is determined whether there is a first beat mark in the mark data block corresponding to the allocation mark of the time slot, and the message data with the bit width expanded and the first beat mark are output to the storage entry unit. When the storage entry unit receives the first beat mark, it starts to apply for a storage address from the address management unit to start writing the message data. After the first beat of the message data is output, the first beat mark will not be carried in the subsequent process of outputting the message data to the storage entry unit, and the storage entry unit cyclically applies for a storage address according to the above-mentioned number of beats to write the received message data. When the preprocessing unit detects the end mark carried in the message, the preprocessing unit will carry the end mark when outputting the message data to the storage entry unit, so that the storage entry unit triggers the storage exit unit to read the reorganized message in the storage space according to the end mark.

[0096] Optionally, the message reassembly device further comprises an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags;

[0097] The storage entry unit is specifically used for:

[0098] If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied to the address management unit, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated, wherein the message information includes a start address, an end address and a data length;

[0099] If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a storage address is re-applied to the address management unit, and the message information in the information storage block corresponding to the allocation mark is updated;

[0100] If message data is received and it is determined that the received message data carries an end mark, the received message data is written to the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

[0101] After the storage entry unit receives the message data output by the preprocessing unit, it starts to apply for a storage address from the address management unit according to the preset number of beats, and continuously writes message data into the storage space. During this process, the storage entry unit maintains the message information in the information data block corresponding to the information storage device. Among them, the starting address is used to record the storage address of the first beat of the message data in the storage space, the ending address is used to record the storage address of the last part of the message data of the currently written message segment in the storage space, and the data length is used to record the length of the currently written message segment.

[0102] It should be noted that, for the writing process of a message, the starting address remains unchanged, and the ending address and data length may change. During the writing process of a message, the first message fragment arrives at the message reassembly device first. After the bit width is expanded by the preprocessing unit, the storage entry unit applies for the storage address from the address management unit and writes it into the corresponding storage space. At this time, the storage entry unit records the storage address applied for the first time in the starting address of the message information in the information storage block of the information storage device. When the writing of the first message fragment is completed, the storage address applied for the last time for the current message fragment is recorded, and the data length of the message data written in this process is recorded, which is the length of the first message fragment. Thereafter, if the subsequent message fragments are written, the ending address in the message information needs to be updated, and the data length is accumulated. Finally, when the last message fragment is written, the storage address applied for the last time for the currently written message is used, and the data length is accumulated to complete the message reassembly. At this time, the starting address, ending address and data length in the message information are the starting address, ending address and data length of the entire message.

[0103] In addition, the data length can be used as a basis for the storage entry unit to determine whether it needs to apply for a storage address from the address management unit. For example, the storage entry unit applies for a storage space with a multiple of the bit width (such as 4 times the bit width) from the address management unit each time, but a message fragment may only occupy a part of the storage space (such as 3 times the bit width). When the storage entry unit writes a message fragment to the storage space, if the accumulated data length is not a multiple of 4 times the bit width, when the next message fragment is written, it is directly written to the remaining storage space, and after the applied storage space is filled, the storage address is applied to the address management unit to realize the writing of subsequent message data.

[0104] By changing the message information as described above, the message reassembly process can be realized, so that the subsequent storage export unit can read the reassembled message.

[0105] Optionally, the storage export unit is specifically used for:

[0106] According to the received message information, read the message from the starting address to the ending address and send it uplink;

[0107] The storage space between the start address and the end address is released to the address management unit.

[0108] When the storage exit unit receives the read signal from the storage entry unit, the storage exit unit can obtain the start address, the end address and the data length from the information storage block corresponding to the allocation mark to realize the reading of the message.

[0109] It should be noted that, since the writing of message data in the storage space corresponding to the end address may not occupy all of the storage space, a valid data flag (MOD, Message Operational Data) can also be set in the storage space to record the valid data range in the current storage space to avoid reading errors for complete messages.

[0110] Optional, such as Figure 5 As shown, a linked list is also formed in the message reassembly device, and the storage addresses applied for from the address management unit are stored in sequence in the linked list.

[0111] Since the storage addresses applied for writing message data by the storage entry unit may be discontinuous, a linked list can also be formed in the message reassembly device. The starting pointer of the linked list corresponds to the starting address in the information storage block, and the content stored in the linked list corresponding to the starting pointer is the next storage address, and so on. The pointer of the last linked list is the previous storage address, and the content stored in the linked list is the end address, thereby realizing the reading of message data at non-continuous addresses.

[0112] After completing the reading and output of the complete message, the storage export unit can release all storage addresses used for the reassembled message to the address management unit according to the starting address and data length in the information storage block, or in conjunction with the linked list, to achieve the recycling of storage addresses.

[0113] Optionally, the updating of the message information in the information storage block corresponding to the allocation mark includes:

[0114] Update the end address of the message data written last time according to the end address of the message data written this time;

[0115] The data length of the message data written this time is added to the data length of the message data written last time.

[0116] Correspondingly, the present application also provides a message reassembly method, which is applied to a logic device. It should be noted that the logic device corresponds to the above-mentioned logic chip, and the above-mentioned message reassembly device is a partial logic module in the logic chip.

[0117] The method, such as Figure 6 As shown, including:

[0118] S100: Receive a message of T-CONT traffic, write message data of the message into a storage array according to an allocation identifier, and output message data of the message that meets an output condition from the storage array.

[0119] The storage array has N×M data storage blocks, where N represents the column where the data storage block is located, and M represents the row where the data storage block is located, and N and M are integer multiples of 2.

[0120] S101, applying for a storage address for writing message data, writing received message data into a storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message.

[0121] S102: Read out the reassembled message from the storage space and send it uplink, and release the storage address occupied by the reassembled message.

[0122] Optionally, a tag memory is further formed in the logic device, the tag memory is divided into M tag storage blocks, and a corresponding relationship is established between the tag storage blocks in the tag memory and a row of data storage blocks according to the allocation flags;

[0123] The output condition is that a row of data storage blocks is fully written, or the written message data contains the end mark of the message;

[0124] The step S100, receiving a message of the transmission bearer entity T-CONT traffic and writing the message data of the message into a storage array according to the allocation identifier, and outputting a message of the message data receiving T-CONT traffic that meets the output condition from the storage array, and obtaining the allocation identifier of the message, includes:

[0125] S100A. Write the message data of the message into the data storage block corresponding to the allocation mark, and update the mark data block corresponding to the allocation mark.

[0126] The marking data block includes a first beat flag and a write flag, wherein the first beat flag is used to mark whether the currently written message data is the first beat of the message, and the write flag is used to mark the column number of the data storage block into which the currently written message data is written.

[0127] S100B, if it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then output the message data and the first beat signal read from the data storage block corresponding to the obtained allocation mark;

[0128] S100C, if it is determined that a row of data storage blocks is full, outputting the message data read from the data storage block corresponding to the acquired allocation flag;

[0129] S100D: If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

[0130] Optionally, the message reassembly device further comprises an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags;

[0131] The step S101, applying for a storage address for writing message data, writing the received message data into a storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message, includes:

[0132] S101A. If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied for, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated.

[0133] The message information includes a start address, an end address and a data length.

[0134] S101B. If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a new storage address is applied for, and the message information in the information storage block corresponding to the allocation mark is updated.

[0135] S101C. If message data is received and it is determined that the received message data carries an end mark, the received message data is written into the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

[0136] Optionally, a linked list is formed in the logic device, and the linked list sequentially stores the storage addresses requested from the address management unit;

[0137] The step S102, reading out the reassembled message from the storage space for uplink transmission, and releasing the storage address occupied by the reassembled message, includes:

[0138] S102A, reading the message from the start address to the end address according to the received message information and sending it uplink;

[0139] S102B, releasing the storage space between the start address and the end address.

[0140] Optionally, the updating of the message information in the information storage block corresponding to the allocation mark includes:

[0141] Update the end address of the message data written last time according to the end address of the message data written this time;

[0142] The data length of the message data written this time is added to the data length of the message data written last time.

[0143] The following describes a message reassembly method involved in the present application in conjunction with a specific implementation. In a PON system, such as Figure 7 As shown, an OLT, an ODN and several ONUs are provided. Each ONU is allocated at least one time slot, and the time slot corresponds to an ALLOC_ID (allocation identifier). The ONU performs uplink forwarding to the OLT in the allocated time slot. The OLT is provided with a logic chip, such as Figure 8 As shown, in the address management unit, several FIFO address queues are formed, and several storage addresses are stored in the address queues; a storage array composed of a data memory is set in the pre-processing unit, including 8 RAMs with a depth of 2048, and the bit width of each data storage block in the data memory is 32 bits; a tag memory including a tag storage block can also be formed in the pre-processing unit, with a depth of 2048, and the space of a tag storage block is not limited; an information memory can also be set in the logic chip, with a depth of 2048, and the space of an information storage block is not limited. In addition, a DDR-RAM is formed in the logic chip to perform message reassembly. The following description takes ONU_1 as an example for forwarding upstream T-CONT traffic.

[0144] S1. OLT receives T-CONT traffic sent by ONU_A via ODN, and determines the timeslot of the T-CONT traffic and the ALLOC_ID corresponding to the timeslot.

[0145] Since fragment transmission is set, the first message fragment (message fragment 1) of the message is received by the OLT and transmitted to the logic chip.

[0146] S2. The preprocessing unit in the logic chip determines a row of data storage blocks in the storage array according to ALLOC_ID, writes the message data in the message fragment into the data storage block according to the clock signal, and starts writing count of the data storage block at the mark storage block.

[0147] The preprocessing unit writes 32 bits of message data to a data storage block each time and counts. When writing for the first time, the write counter and the start counter start counting from 0, and when writing to RAM0, the write counter and the start counter count as 1. Subsequent message data writing is similar, and 32 bits of message data are written to a storage data block each time until the last part of the message data is written.

[0148] When the message data is written into the data storage block, it is written into RAM7 one by one starting from RAM0, that is, the message data is written in the order of RAM0-RAM7.

[0149] Among them, the start counter C1 and the write counter start counting from 0. After the first writing of RAM0-RAM7 is completed, the value of the start counter is set to 8, and the value of the write counter is set to 0 after reaching 7. In the process of writing the message data this time, since the counting starts from 0, the preprocessing unit can determine that the message data written this time comes from the first beat of the message. In the subsequent writing process, the value of the start counter starts to accumulate from 8, and when RAM0-RAM7 is written again, it is judged whether the value of the start counter exceeds 8. If it exceeds, the value of the start counter is reset to 8. The write counter range is 0-7, and it is reset to 0 if it continues to be written after reaching 7.

[0150] This processing is because, when the message is first sent, the pre-processing unit needs to make an initial storage address application to the address management unit.

[0151] At this time, the preprocessing unit needs to perform a series of judgments.

[0152] 1. The preprocessing unit determines whether an end mark is detected in the received 32-bit message data. If an end mark is detected, it means that the message has been sent. After the message is written to the data storage block, jump to step S5. If the end mark is not detected, it can be determined that there is still message data that needs to be written, and step S2 is executed in a loop.

[0153] 2. The preprocessing unit determines whether a row of data storage blocks is full after the message data is written this time. If the message data written reaches the maximum number of data storage blocks in a row according to the write counter, it means that the message data in the current row of data storage blocks needs to be output to the storage entry unit for storage. The output message data can be 8×32=256 bits of message data.

[0154] 2A. If the preprocessing unit determines that it is the first beat of the message according to the starting counter C1 (that is, the starting counter reaches the value of 8, the number of data storage blocks in a row, for the first time), then when outputting the message data to the storage entry unit, the first beat flag is output, and the step S3 is jumped to notify the storage entry unit to start applying for the storage address.

[0155] 2B. If the preprocessing unit determines that it is not the first beat of the message according to the start counter, the message data is directly output to the storage entry unit, and the process jumps to step S4.

[0156] 2C. If the preprocessing unit determines that it is not the first beat of the message according to the starting counter and receives a signal of storage space exhaustion from the storage entry unit, it outputs the message data and storage address application signal to the storage entry unit, and jumps to step S3 to notify the storage entry unit to apply for the storage address again.

[0157] S3. When the storage entry unit receives the message data and the first beat mark or storage address application signal, it applies for a storage address from the address management unit and writes the message data into the storage space corresponding to the storage address. Each time the storage entry unit applies for a storage address, it can apply for 4×256=1024 bits of storage space and write 256 bits of message data at a time.

[0158] S4. When the storage entry unit receives the message data, it writes the 256-bit message data.

[0159] During step S3 and step S4, the storage entry unit needs to record the message information in the signal storage block corresponding to ALLOC_ID, that is, update the start address, end address and data length.

[0160] Among them, the starting address remains unchanged and is recorded when the storage address is first applied for, and the ending address and data length are updated after each message data is written.

[0161] like Figure 8 As shown, after message fragment 1 is written, the starting address of the message information is updated to ADDR_0, the ending address is updated to ADDR_2, the data length is updated to 9, and the storage address ADDR_1 is recorded in the space pointed to by ADDR_0, and the storage address ADDR_2 is recorded in the space pointed to by ADDR_1 in the linked list.

[0162] S5. The storage entry unit receives the message data and the end mark, continues to write into the storage space (may also apply for a new storage address), and updates the message information. The storage entry unit sends a read signal to the storage exit unit based on the end mark.

[0163] like Fig. 9 As shown, after the message fragment 2 is written, the starting address of the message information remains unchanged, which is ADDR_0, the ending address is updated to ADDR_3, the data length is updated to 15, and the storage address ADDR_3 is recorded in the space pointed to by ADDR_2 in the linked list.

[0164] S6. The storage export unit obtains the start address, end address and data length from the corresponding information storage block according to the read signal and the ALLOC_ID of the current message, reads out messages from the storage space continuously, and forwards them upstream.

[0165] Through the above method, the fragmentation and reassembly of the message can be realized to complete the uplink forwarding.

[0166] The implementation process of the functions and effects of each module in the above-mentioned device is specifically described in the implementation process of the corresponding steps in the above-mentioned method, which will not be repeated here.

[0167] For the device embodiment, since it basically corresponds to the method embodiment, the relevant parts can refer to the partial description of the method embodiment. The device embodiment described above is only schematic, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this specification. A person of ordinary skill in the art can understand and implement it without paying creative labor.

[0168] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0169] Those skilled in the art will readily appreciate other embodiments of the specification after considering the specification and practicing the invention claimed herein. The specification is intended to cover any variations, uses or adaptations of the specification that follow the general principles of the specification and include common knowledge or customary techniques in the art that are not claimed in the specification. The specification and examples are to be considered exemplary only, and the true scope and spirit of the specification are indicated by the following claims.

[0170] It should be understood that the present description is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present description is limited only by the appended claims.

[0171] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A message reassembly device, characterized in that: include: A preprocessing unit, configured to receive a message for transmitting a T-CONT flow of a bearer entity, write message data of the message into a storage array according to an allocation identifier, and output message data of the message that meets an output condition from the storage array, wherein the storage array has N×M data storage blocks, N represents a column where a data storage block is located, M represents a row where a data storage block is located, and N and M are integer multiples of 2; A storage entry unit, used to apply to the address management unit for a storage address for writing message data, write the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reassemble the message; The storage export unit is used to read out the reassembled message from the storage space for uplink transmission, and release the storage address occupied by the reassembled message to the address management unit.

2. The device according to claim 1, characterized in that The preprocessing unit also includes a tag memory, which is divided into M tag storage blocks. A corresponding relationship is established between the tag storage blocks in the tag memory and a row of data storage blocks according to the allocation flags. The output condition is that a row of data storage blocks is full, or the written message data contains the end mark of the message The preprocessing unit is specifically used for: Receive a message of T-CONT traffic and obtain an allocation flag of the message; Writing the message data of the message to the data storage block corresponding to the allocation mark, and updating the mark data block corresponding to the allocation mark, wherein the mark data block includes a first beat mark and a write mark, the first beat mark is used to mark whether the message data currently being written is the first beat of the message, and the write mark is used to mark the column number of the data storage block into which the message data currently being written is written; If it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then the message data and the first beat signal read out from the data storage block corresponding to the obtained allocation mark are output; If it is determined that a row of data storage blocks is full, then the message data is read out from the data storage block corresponding to the obtained allocation flag; If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

3. The device according to claim 2, characterized in that The message reassembly device also includes an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags; The storage entry unit is specifically used for: If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied to the address management unit, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated, wherein the message information includes a start address, an end address and a data length; If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a storage address is re-applied to the address management unit, and the message information in the information storage block corresponding to the allocation mark is updated; If message data is received and it is determined that the received message data carries an end mark, the received message data is written to the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

4. The device according to claim 3, characterized in that The storage export unit is specifically used for: According to the received message information, read the message from the starting address to the ending address and send it uplink; The storage space between the start address and the end address is released to the address management unit.

5. The device according to claim 3 or 4, characterized in that A linked list is also formed in the message reassembly device, and the storage addresses applied for from the address management unit are sequentially stored in the linked list.

6. The device according to claim 5, characterized in that The updating of the message information in the information storage block corresponding to the allocation mark includes: Update the end address of the message data written last time according to the end address of the message data written this time; The data length of the message data written this time is added to the data length of the message data written last time.

7. A message reassembly method, characterized in that: Applicable to logic devices, including: receiving a message of a transmission bearer entity T-CONT traffic, writing the message data of the message into a storage array according to an allocation identifier, and outputting the message data of the message that meets an output condition from the storage array, wherein the storage array has N×M data storage blocks, N represents a column where a data storage block is located, M represents a row where a data storage block is located, and N and M are integer multiples of 2; Applying for a storage address to write message data, writing the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message; The reassembled message is read out from the storage space for uplink transmission, and the storage address occupied by the reassembled message is released.

8. The method according to claim 7, characterized in that The logic device also includes a tag memory, which is divided into M tag storage blocks. A corresponding relationship is established between the tag storage blocks in the tag memory and a row of data storage blocks according to the allocation flags. The output condition is that a row of data storage blocks is fully written, or the written message data contains the end mark of the message; The receiving of the message of the T-CONT traffic and writing the message data of the message into the storage array according to the allocation identifier, and outputting the message data of the message that meets the output condition from the storage array, receiving the message of the T-CONT traffic, and obtaining the allocation identifier of the message, comprises: Writing the message data of the message to the data storage block corresponding to the allocation mark, and updating the mark data block corresponding to the allocation mark, wherein the mark data block includes a first beat mark and a write mark, the first beat mark is used to mark whether the message data currently being written is the first beat of the message, and the write mark is used to mark the column number of the data storage block into which the message data currently being written is written; If it is determined that a row of data storage blocks is full and the message data written into the data storage block is determined to be the first beat of the message according to the marked storage block corresponding to the obtained allocation mark, then the message data and the first beat signal read out from the data storage block corresponding to the obtained allocation mark are output; If it is determined that a row of data storage blocks is full, then the message data is read out from the data storage block corresponding to the obtained allocation flag; If the end mark of the message is detected, the message data carrying the end mark read from the data storage block corresponding to the acquired allocation mark is output.

9. The method according to claim 8, characterized in that The message reassembly device also includes an information storage device, the information storage device is divided into M information storage blocks, and a corresponding relationship is established between the information storage blocks in the information storage device and the allocation flags; The application for writing the storage address of the message data, writing the received message data into the storage space corresponding to the applied storage address, until the last message fragment of the message is written into the storage space, and reorganizing the message, including: If message data is received and it is determined that the received message data is the first beat of the message, a storage address is applied for, the received message data is written into the storage space of the applied storage address, and the message information in the information storage block corresponding to the allocation mark is updated, wherein the message information includes a start address, an end address and a data length; If message data is received, the received message data is written into the storage space of the applied storage address, and when the storage space of the applied storage address is full, a new storage address is applied for, and the message information in the information storage block corresponding to the allocation mark is updated; If message data is received and it is determined that the received message data carries an end mark, the received message data is written to the storage space of the applied storage address, the message information in the information storage block corresponding to the allocation mark is updated, and the updated message information is output.

10. The method according to claim 9, characterized in that A linked list is also formed in the logic device, and the storage addresses requested from the address management unit are sequentially stored in the linked list; The step of reading out the reassembled message from the storage space for uplink transmission and releasing the storage address occupied by the reassembled message comprises: According to the received message information, read the message from the starting address to the ending address and send it uplink; The storage space between the start address and the end address is released.

11. The method according to claim 10, characterized in that The updating of the message information in the information storage block corresponding to the allocation mark includes: Update the end address of the message data written last time according to the end address of the message data written this time; The data length of the message data written this time is added to the data length of the message data written last time.

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