Hyperbolic frequency modulation signal generation method based on domestic FPGA chip

Abstract

The invention belongs to the technical field of industrial chips, and particularly relates to a hyperbolic frequency modulation signal generation method based on a domestic FPGA chip. Comprising the following steps: S1, receiving signal parameter information through an input interface of an FPGA; s2, DDS Compiler IP core parameters are designed, input clock frequency, input bit width and output bit width are set, phase increment parameters are set to be in a programmable mode, and frequency precision parameters under current setting parameters can be seen in a summary column of an IP setting page; s3, designing a formula for calculating the instantaneous frequency; s4, calculating instantaneous frequency through the FPGA and inputting the instantaneous frequency into the DDS module; and S5, outputting a DDS signal. According to the method, the function of generating the hyperbolic frequency modulation signal by using the FPGA is realized, and the method has the advantages of high processing speed and random adjustment of the center frequency, the bandwidth and the pulse width.

Description

Technical Field

[0001] The invention belongs to the technical field of industrial chips, and in particular relates to a method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip. Background Art

[0002] JFMK50T4 is a high-performance FPGA chip independently developed in China. The chip adopts advanced manufacturing process and design technology, has high-speed computing and processing capabilities, adopts low-power design, helps to reduce system power consumption, and has good anti-interference and stability. It can work normally in various complex environments to ensure the accuracy and effectiveness of data transmission. These characteristics make the JFMK50T4 chip widely used in electronic devices, especially in scenarios that require high performance, low power consumption and high reliability. Its processing performance is not inferior to Xilinx's XC7A50T, and it is very suitable as a domestic alternative chip for the core processor of the sonar signal source board.

[0003] Hyperbolic Frequency Modulation (HFM) is a signal whose frequency changes in a hyperbolic shape during the frequency modulation process. The advantages of this signal are mainly reflected in its high Doppler tolerance, good distance resolution, and stability and reliability in underwater acoustic communication. Specifically, under the influence of the Doppler effect, the hyperbola in the time-frequency plane of the hyperbolic frequency modulation signal only appears as an offset in the time domain and does not cause signal distortion, which makes it have significant advantages in applications in high-speed movement or complex environments. At the same time, as a pulse compression signal, the hyperbolic frequency modulation signal can be transmitted with a wide duration to obtain a higher average transmission power, thereby ensuring a sufficiently long detection distance. At the same time, when receiving the reflected signal, the corresponding pulse compression method can be adopted to obtain a better distance resolution.

[0004] Since the frequency of the hyperbolic FM signal changes nonlinearly over time, its frequency generation and modulation process is more complicated than that of the linear FM signal. FPGA needs to implement precise frequency control algorithms to ensure that the frequency changes according to the predetermined hyperbolic law. The generation of hyperbolic FM signals involves complex signal processing and calculations, such as nonlinear frequency conversion and modulation. FPGA needs to have sufficient logic units and computing resources to process these complex algorithms to ensure real-time generation and processing of signals. Summary of the invention

[0005] The purpose of the present invention is to overcome the above-mentioned deficiencies in the prior art. The present invention provides a method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip. The method realizes the function of generating a hyperbolic frequency modulation signal using an FPGA on the basis of satisfying the requirement of domestic substitution, and at the same time has the advantages of fast processing speed and the center frequency, bandwidth and pulse width can be adjusted at will.

[0006] In order to solve the above technical problems, the present invention provides a method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip, comprising the following steps:

[0007] Step S1: receiving signal parameter information through the input interface of the FPGA;

[0008] Step S2: Design the DDS Compiler IP core parameters, set the input clock frequency, input bit width, and output bit width, set the phase increment parameter to programmable mode, and you can see the frequency accuracy parameters under the current setting parameters in the summary column of the IP setting page;

[0009] Step S3: Design a formula to calculate the instantaneous frequency

[0010] where f b Indicates the frequency of the starting point of the HFM signal, f e represents the frequency of the HFM signal cutoff point, and T represents the duration of the HFM signal; that is, within the pulse width of the HFM signal, by changing the time t from 0 to T, the instantaneous frequency of the signal at each time point can be obtained;

[0011] Step S4: Calculate the instantaneous frequency through FPGA and input it into the DDS module;

[0012] Step S5: DDS signal output.

[0013] Preferably, the signal parameter information in step S1 includes center frequency, bandwidth and pulse width parameters.

[0014] Preferably, the instantaneous frequency is calculated by FPGA and input into the DDS module in step S4, which specifically includes: before starting to generate the HFM signal, reading the pulse width, the starting frequency and the ending frequency, and when starting to generate the HFM signal, respectively calculating Tf e , Tf b f e and (f e -f b )t, the corresponding division value is calculated by the above three values ​​according to the formula in step S3, and the instantaneous frequency value of the HFM signal can be calculated by FPGA, and the instantaneous frequency value is input into the DDS module.

[0015] Preferably, the Tf is calculated by calling three MultiplierIP cores respectively. e , Tf b f e and (f e -f b )The value of t.

[0016] Preferably, the corresponding division value is calculated by calling a Divider Generator IP core.

[0017] Preferably, the step S5 specifically includes: the DDS module calculates corresponding waveform data according to the corresponding instantaneous frequency, and the waveform data is a time domain waveform diagram of the HFM signal.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] The method of the present invention realizes the function of generating a hyperbolic frequency modulation signal by using FPGA on the basis of satisfying the domestic substitution, and has the advantages of fast processing speed, and the center frequency, bandwidth and pulse width can be adjusted at will. Moreover, by selecting the JFMK50T4 domestic FPGA chip, it belongs to a high-performance FPGA, has field programmable characteristics, and has a small size, light weight, low power consumption, and good anti-interference performance. It can be used to realize multiple functions such as input and output interface, general digital logic, memory, digital signal processing, clock management, etc. It contains configurable logic resources (CLB), digital signal processing resources (DSP), block storage resources (BRAM), etc., and is very suitable for sonar transmission signal generation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 The present invention is a flow chart of a method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip.

[0021] Figure 2 This is a flow chart of the instantaneous frequency calculation of the FPGA of the present invention. DETAILED DESCRIPTION

[0022] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0023] like Figure 1 As shown, the embodiment of the present invention specifically provides a method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip, comprising the following steps:

[0024] Step S1: receiving signal parameter information including center frequency, bandwidth and pulse width parameters through the input interface of the FPGA;

[0025] Step S2: Design the DDS Compiler IP core parameters, set the input clock frequency, input bit width, output bit width, and set the phase increment parameter to programmable mode. In the summary column of the IP setting page, you can see the frequency accuracy parameters under the current setting parameters.

[0026] Step S3: design a formula to calculate the instantaneous frequency;

[0027] The time domain expression of the HFM signal is as follows:

[0028]

[0029] Where A(t) represents the signal amplitude, represents the modulation frequency, f b Indicates the frequency of the starting point of the HFM signal, t e represents the frequency of the HFM signal cutoff point, and T represents the duration of the HFM signal. e >f b When f e <f b When , the HFM signal is frequency-reduced, and the modulation frequency β>0.

[0030] It is worth noting that the instantaneous frequency of the HFM signal does not change linearly with time t, but is a hyperbolic function of t. The instantaneous frequency of the HFM signal can be expressed as Formula 2:

[0031]

[0032] Will Substituting the above formula and simplifying it, we can get the expression of the relationship between the instantaneous frequency of the HFM signal and the pulse width, starting frequency, ending frequency and instantaneous time as shown in Formula 3:

[0033]

[0034] By changing the time t from 0 to T during the pulse width of the HFM signal, the instantaneous frequency of the signal at each time point can be obtained.

[0035] Step S4: Calculate the instantaneous frequency through FPGA and input it into the DDS module;

[0036] Before generating the HFM signal, read the pulse width, start frequency and end frequency. When generating the HFM signal, call the three Multiplier IP cores to calculate Tf respectively. e , Tf b f e 、(f e -f b )t, and then call a Divider Generator IP core to calculate the corresponding division value according to Formula 3. The instantaneous frequency value of the HFM signal can be calculated through FPGA and input into the DDS module. This process can be expressed as follows Figure 2 Flowchart shown.

[0037] Step S5: DDS signal output;

[0038] The DDS module calculates corresponding waveform data according to the corresponding instantaneous frequency, and the waveform data is the time domain waveform diagram of the HFM signal.

[0039] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip, characterized in that: The steps include: Step S1: receiving signal parameter information through the input interface of the FPGA; Step S2: Design the DDS Compiler IP core parameters, set the input clock frequency, input bit width, and output bit width, set the phase increment parameter to programmable mode, and you can see the frequency accuracy parameters under the current setting parameters in the summary column of the IP setting page; Step S3: Design a formula to calculate the instantaneous frequency where f b Indicates the frequency of the starting point of the HFM signal, f e represents the frequency of the HFM signal cutoff point, and T represents the duration of the HFM signal; that is, within the pulse width of the HFM signal, by changing the time t from 0 to T, the instantaneous frequency of the signal at each time point can be obtained; Step S4: Calculate the instantaneous frequency through FPGA and input it into the DDS module; Step S5: DDS signal output.

2. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip as claimed in claim 1, characterized in that: The signal parameter information in step S1 includes center frequency, bandwidth and pulse width parameters.

3. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip as claimed in claim 1, characterized in that: In step S4, the instantaneous frequency is calculated by FPGA and input into the DDS module, which specifically includes: before starting to generate the HFM signal, reading the pulse width, the starting frequency and the ending frequency, and when starting to generate the HFM signal, respectively calculating Tf e , Tf b f e and (f e -f b )t, the corresponding division value is calculated by the above three values ​​according to the formula in step S3, and the instantaneous frequency value of the HFM signal can be calculated by FPGA, and the instantaneous frequency value is input into the DDS module.

4. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip as claimed in claim 3, characterized in that: By calling three MultiplierIP cores, the Tf e , Tf b f e and (f e -f b )The value of t.

5. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip as claimed in claim 3, characterized in that: The corresponding division value is calculated by calling a Divider Generator IP core.

6. A method for generating a hyperbolic frequency modulation signal based on a domestic FPGA chip as claimed in claim 1, characterized in that: The step S5 specifically includes: the DDS module calculates corresponding waveform data according to the corresponding instantaneous frequency, and the waveform data is the time domain waveform diagram of the HFM signal.

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