Electronic device

A support structure with openings and a packaging layer addresses module warping and bridging issues in silicon photonics by reinforcing the connection between photonic and electronic integrated circuits, improving structural integrity and stability.

CN222146204UActive Publication Date: 2024-12-10ADVANCED SEMICON ENG INC
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Patent Information

Application Number
CN202420226255.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-30
Publication Date
2024-12-10
Estimated Expiration
2034-01-30

AI Technical Summary

Technical Problem

The silicon photonics structure experiences issues with module warping and bridging/empty soldering problems due to thermal expansion coefficient mismatches during the welding and packaging of photonic and electronic integrated circuits.

Method used

A support structure is introduced between rewiring structures to enhance structural strength, featuring multiple openings and a packaging layer to fix and reinforce the connection, preventing warping and bridging issues.

Benefits of technology

The solution effectively reduces warping and eliminates bridging/empty soldering problems, enhancing the device's structural integrity and stability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides electronic equipment, and relates to the technical field of semiconductor packaging, and the electronic equipment comprises a first rewiring structure; the second rewiring structure is arranged opposite to the first rewiring structure; an electronic component disposed between the first redistribution structure and the second redistribution structure and electrically connected to the first redistribution structure; the supporting structure is arranged between the first redistribution structure and the second redistribution structure and used for enhancing the structural strength of the electronic equipment, and the supporting structure is provided with a plurality of openings; the packaging layer wraps the electronic component and is arranged among the first redistribution structure, the second redistribution structure and the supporting structure. The overall structural strength of the electronic equipment is improved through the supporting structure, and the deformation resistance of the electronic equipment is improved, so that the situation that a module composed of the first rewiring structure, the second rewiring structure, the electronic element and the packaging layer is warped after a thermal process due to the fact that thermal expansion coefficients of various materials are not matched is effectively avoided.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to an electronic device. Background Art

[0002] Silicon photonics (Silicon-Photonics) structure has great potential for application due to its advantages such as high-speed transmission and low power consumption, and can be used in optical communication related fields, such as lasers, etc.

[0003] like Figure 1 As shown, the silicon photonics (SiPho, Silicon-Photonics) structure is based on the stacking of an electronic integrated circuit (EIC, Electronic Integrated Circuit) module 01, a photonic integrated circuit (PIC, Photonic Component Circuit) 04 and a laser chip 03 (laser die). At present, when the photonic integrated circuit (PIC) 04 and the electronic integrated circuit (EIC) module 01 are welded and packaged, after the thermal process production, such as Figure 2 and Figure 3 As shown, the electronic integrated circuit (EIC) module 01 has a large M-shaped warpage, which leads to bridge and empty soldering problems between the photonic integrated circuit (PIC) 04 and the electronic integrated circuit (EIC) module 01; continue to refer to Figure 3 The photonic integrated circuit (PIC) 04 is connected to the electronic integrated circuit (EIC) module 01 through an electrical connection structure 02. The specific electrical connection structure 02 includes a first conductive column 021, a second conductive column 022 and a bump 023. The first conductive column 021 is electrically connected to the electronic integrated circuit (EIC) module 01, and the second conductive column 022 is electrically connected to the photonic integrated circuit (PIC) 04. The first conductive column 021 and the second conductive column 022 are connected through the bump 023 and a bridging problem occurs on the left side. Utility Model Content

[0004] The present application provides an electronic device.

[0005] The present application provides an electronic device, including:

[0006] The first rewiring structure;

[0007] a second rewiring structure, the second rewiring structure being arranged opposite to the first rewiring structure;

[0008] an electronic component, disposed between the first rewiring structure and the second rewiring structure, and electrically connected to the first rewiring structure;

[0009] A support structure, disposed between the first rewiring structure and the second rewiring structure, for enhancing the structural strength of the electronic device, and having a plurality of openings;

[0010] The packaging layer covers the electronic component and is disposed between the first redistribution structure, the second redistribution structure and the supporting structure.

[0011] The electronic device provided by the present application includes a first rewiring structure, an electronic component, a second rewiring structure, a support structure and a packaging layer; the electronic component is arranged on the second rewiring structure, the second rewiring structure supports the electronic component, the first rewiring structure is arranged relative to the second rewiring structure, the first rewiring structure is located on the side of the electronic component away from the second rewiring structure, that is, the first rewiring structure is located on the upper side of the electronic component, a support structure is arranged between the first rewiring structure and the second rewiring structure, the support structure surrounds the electronic component, and the overall structural strength of the electronic device is improved by the support structure, so that its anti-deformation ability is increased, thereby effectively avoiding the module composed of the first rewiring structure, the second rewiring structure, the electronic component and the packaging layer, which is caused by the mismatch of the thermal expansion coefficients of various different materials inside, and warping occurs after the thermal process. In this way, when the first rewiring structure is used to connect with the photonic integrated circuit, there will be no problems of bridging and empty welding; the specific support structure has multiple openings, the packaging layer enters from the multiple openings, and fills the space between the first rewiring structure and the second rewiring structure, and covers the electronic component, so as to achieve the role of fixing and increasing the supporting force.

[0012] In some optional embodiments, it also includes: a first conductive structure, which is covered by the encapsulation layer and connects the first rewiring structure and the second rewiring structure; wherein the first conductive structure is used to transmit signals between the first rewiring structure and the second rewiring structure, and the supporting structure does not transmit signals between the first rewiring structure and the second rewiring structure.

[0013] In some optional embodiments, the support structure includes a first support portion and a second support portion;

[0014] The first supporting portion has a plurality of first openings, the second supporting portion has a plurality of second openings, and the area of ​​the first openings is smaller than the area of ​​the second openings.

[0015] In some optional embodiments, the first conductive structure is divided into a first distribution area and a second distribution area, the first distribution area corresponds to the first supporting portion, and the second distribution area corresponds to the second supporting portion;

[0016] The first conductive structure includes a plurality of first conductive pillars, which are located in the first distribution area and the second distribution area, wherein a density of the first conductive pillars in the first distribution area is lower than a density of the first conductive pillars in the second distribution area.

[0017] In some optional embodiments, the first distribution area is adjacent to the first supporting portion, and the second distribution area is adjacent to the second supporting portion.

[0018] In some optional embodiments, in any cross section of the electronic device, the width of the support structure is smaller than the width of the first conductive column.

[0019] In some optional embodiments, an upper surface of the support structure is substantially flush with an upper surface of the first conductive structure.

[0020] In some optional embodiments, a photonic integrated circuit is further included, which is disposed on the upper surface of the first redistribution structure and is electrically connected to the electronic component.

[0021] In some optional embodiments, a second conductive structure is further included, wherein the second conductive structure is disposed between the electronic component and the first rewiring structure, and the second conductive structure electrically connects the electronic component and the first rewiring structure.

[0022] In some optional embodiments, the second conductive structure includes a plurality of second conductive pillars;

[0023] In any cross section of the electronic device, the width of the second conductive column is smaller than the width of the supporting structure.

[0024] In some optional embodiments, an adhesive layer is further included, and the adhesive layer is arranged between the electronic component and the second redistribution structure.

[0025] In some optional embodiments, an orthographic projection of the electronic component on the second redistribution structure coincides with an orthographic projection of the adhesive layer on the second redistribution structure.

[0026] In some optional embodiments, the lower surface of the encapsulation layer is flush with the lower surface of the adhesive layer.

[0027] In some optional embodiments, the electronic component is an electronic integrated circuit.

[0028] In some optional embodiments, it further includes a substrate, which is located on the lower surface of the first redistribution structure, and the substrate is electrically connected to the first redistribution structure.

[0029] In some optional embodiments, the electronic integrated circuit is located on the upper surface of the second redistribution structure, and the electronic integrated circuit is electrically connected to the second redistribution structure.

[0030] In some optional embodiments, the area of ​​each first opening of the first supporting portion is the same.

[0031] In some optional embodiments, the area of ​​each second opening of the second supporting portion is the same.

[0032] In some optional embodiments, a third conductive structure is further included, which is located between the first rewiring structure and the photonic integrated circuit, and the first rewiring structure and the photonic integrated circuit are electrically connected through the third conductive structure.

[0033] In some optional embodiments, a fourth conductive structure is further included, located between the substrate and the second redistribution structure, and the substrate and the second redistribution structure are electrically connected via the fourth conductive structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0035] Figure 1 It is a partial longitudinal cross-sectional schematic diagram of a current electronic device;

[0036] Figure 2 It is a structural schematic diagram of the problem of empty soldering between electronic integrated circuits and photonic integrated circuits in current electronic equipment;

[0037] Figure 3 It is a schematic diagram of a structure diagram of a bridging problem between an electronic integrated circuit and a photonic integrated circuit in current electronic devices;

[0038] Figure 4 It is a schematic diagram of a partial longitudinal cross-sectional structure of an electronic device of the present application;

[0039] Figure 5 is a top view of an electronic integrated circuit in an electronic device of the present application;

[0040] Figure 6 It is an enlarged schematic diagram of a partial longitudinal cross-sectional structure of the first support portion in the present application;

[0041] Figure 7 It is an enlarged schematic diagram of a partial longitudinal cross-sectional structure of the second support portion in the present application;

[0042] Figures 8A-8I They are schematic diagrams of manufacturing steps of the electronic device of the present application;

[0043] Fig. 9 It is a schematic diagram of the effect of the deformation rate of the electronic components after the support structure is adopted in the electronic device of the present application.

[0044] Description of reference numerals / symbols:

[0045] 01-electronic integrated circuit module; 02-electrical connection structure; 021-first conductive column; 022-second conductive column; 023-bump; 03-laser chip; 04-photonic integrated circuit;

[0046] 10-first rewiring structure; 2-electronic integrated module; 20-electronic component; 30-second rewiring structure; 40-support structure; 41-first support portion; 411-first opening; 42-second support portion; 421-second opening; 50-packaging layer; 60-first conductive structure; 61-first distribution area; 62-second distribution area; 63-first conductive column; 70-photonic integrated circuit; 80-second conductive structure; 81-second conductive column; 90-adhesive layer; 100-substrate; 110-third conductive structure; 120-fourth conductive structure; 130-first carrier; 140-second carrier; 150-third carrier. DETAILED DESCRIPTION

[0047] The specific implementation methods of the present application are described below in conjunction with the accompanying drawings and embodiments. Through the contents recorded in this specification, those skilled in the art can easily understand the technical problems solved by the present application and the technical effects produced. It is understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. In addition, for ease of description, only the parts related to the relevant inventions are shown in the accompanying drawings.

[0048] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.

[0049] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0050] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer may extend over the entire lower or upper structure, or may have a degree less than the range of the lower or upper structure. In addition, the layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, the layer may be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer may extend horizontally, vertically and / or along a tapered surface. The substrate 100 (substrate) may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, the semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0051] The term "substrate 100" as used herein refers to a material on which subsequent material layers are added. The substrate 100 itself may be patterned. The material added on top of the substrate 100 may be patterned or may remain unpatterned. In addition, the substrate 100 may include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate 100 may be made of a non-conductive material, such as glass, plastic, or a sapphire wafer, etc. Further alternatively, the substrate 100 may have a semiconductor device or circuit formed therein.

[0052] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed in the present application. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of the present application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present application without substantially changing the technical content.

[0053] It should also be noted that the longitudinal section corresponding to the embodiment of the present application may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the top view direction.

[0054] In addition, the embodiments and features in the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0055] refer to Figure 4 , Figure 4 is a schematic diagram of a partial longitudinal cross-sectional structure of an electronic device of the present application; Figure 4 As shown, an electronic device provided by an embodiment of the present application includes: a first rewiring structure 10, an electronic component 20, and a second rewiring structure 30 arranged in sequence from top to bottom, the electronic component 20 is located on a side surface of the second rewiring structure 30, for the convenience of description, the side surface of the second rewiring structure 30 on which the electronic component 20 is arranged is defined as the upper surface, and the side surface of the second rewiring structure 30 away from the electronic component 20 is defined as the lower surface, and the first rewiring structure 10 is electrically connected to the electronic component 20. Here, the second rewiring structure 30 is used to support the electronic component 20; for example, the electronic component 20 can be an electronic integrated circuit (EIC). It also includes an encapsulation layer 50, which covers the electronic component 20 and is arranged between the first rewiring structure 10, the second rewiring structure 30 and the support structure 40. Here, the structure formed by the electronic component 20, the first rewiring structure 10, the second rewiring structure 30, the first conductive structure 60 and the encapsulation layer 50 is used as an electronic integrated module 2.

[0056] At present, each module in the electronic equipment undergoes a thermal process during welding and packaging. Figure 1 As shown, it is found that the electronic integrated circuit module 01 is prone to large M-shaped warping. Specifically, Figure 1 As shown, the photonic integrated circuit (PIC) 04 and the laser chip 03 (laser die) are stacked on each other. At present, when the photonic integrated circuit (PIC) 04 and the electronic integrated circuit (EIC) module 01 are welded and packaged, after the thermal process production, as shown in FIG. Figure 2 and Figure 3 As shown, the electronic integrated circuit (EIC) module 01 produces a large M-shaped warpage, which in turn causes bridge and empty soldering problems between the photonic integrated circuit (PIC) 04 and the electronic integrated circuit (EIC) module 01 .

[0057] refer to Figure 4 In order to solve the above problems, in the embodiment of the present application, a support structure 40 is arranged between the first rewiring structure 10 and the second rewiring structure 30 to enhance the structural strength of the electronic device and avoid or reduce the M-shaped warping generated by the electronic integrated module 2.

[0058] It should be noted that the electronic device provided in the present application includes a first rewiring structure 10, an electronic component 20, a second rewiring structure 30, a support structure 40 and a packaging layer 50; the electronic component 20 is arranged on the second rewiring structure 30, and the second rewiring structure 30 supports the electronic component 20. The first rewiring structure 10 and the second rewiring structure 30 are arranged opposite to each other, and the first rewiring structure 10 is located on the side of the electronic component 20 away from the second rewiring structure 30, that is, the first rewiring structure 10 is located on the upper side of the electronic component 20, and a support structure 40 is arranged between the first rewiring structure 10 and the second rewiring structure 30. The support structure 40 surrounds the electronic component 20. The overall structural strength of the electronic device is improved by the support structure 40, so that its deformation resistance is increased, thereby effectively avoiding the electronic integrated module 2 composed of the first rewiring structure 10, the second rewiring structure 30, the electronic component 20 and the packaging layer 50. The electronic integrated module 2 is warped due to different expansion degrees after the thermal process due to the mismatch of the thermal expansion coefficients of various different materials inside. In this way, when the first rewiring structure 10 is used to connect with the photonic integrated circuit 70, there will be no problems of bridging and empty soldering; the specific support structure 40 has multiple openings, and the packaging layer 50 enters from the multiple openings and fills the space between the first rewiring structure 10 and the second rewiring structure 30, and covers the electronic components 20, thereby achieving the function of fixing and increasing the supporting force.

[0059] For example, the first redistribution layer and the second redistribution layer can be redistribution layers composed of conductive materials and dielectric materials. It should be noted that the process can adopt the redistribution layer formation technology currently known or developed in the future, and this application does not specifically limit this. For example, the redistribution layer can be formed by including but not limited to photolithography, electroplating, chemical plating, etc. Here, the dielectric material may include organic and / or inorganic substances, wherein the organic substance may be, for example, polyamide fiber (Polyamide, PA), polyimide (Polyimide, PI), epoxy resin (Epoxy), poly-p-phenylene benzobisoxazole (Poly-p-phenylene benzobisoxazole, PBO) fiber, FR-4 epoxy glass cloth laminate, PP (PrePreg, prepreg material or semi-cured resin, semi-cured sheet), ABF (Ajinomoto Build-up Film), etc., and the inorganic substance may be, for example, silicon (Si), glass, ceramic, silicon oxide, silicon nitride, tantalum oxide, etc. The conductive material may include a seed layer and a metal layer. Here, the seed layer may be, for example, titanium (Ti), tungsten (W), nickel (Ni), etc., and the metal layer may be, for example, gold (Au), silver (Ag), aluminum (Al), nickel (Ni), palladium (Pd), copper (Cu) or an alloy thereof.

[0060] For example, the encapsulation layer 50 may be formed of various molding compounds. For example, the molding compound may include epoxy resin, filler, catalyst, pigment, release agent, flame retardant, coupling agent, hardener, low stress absorber, adhesion promoter, ion trapping agent, etc.

[0061] Continue to refer Figure 4 The electronic device provided in the embodiment of the present application further includes: a first conductive structure 60, which is covered by the encapsulation layer 50 and connects the first rewiring structure 10 and the second rewiring structure 30; wherein the first conductive structure 60 is used to transmit signals between the first rewiring structure 10 and the second rewiring structure 30, and the support structure 40 does not transmit signals between the first rewiring structure 10 and the second rewiring structure 30. In order to ensure the signal connection between the first rewiring structure 10 and the second rewiring structure 30, the first conductive structure 60 includes a plurality of first conductive pillars 63, and the specific structure and shape of the first conductive pillars 63 are not limited, for example, they can be copper pillars.

[0062] Continue to refer Figure 4 Since the electronic device provided in the embodiment of the present application has certain spatial limitations, in order to effectively save space, in some specific implementations, the width of the newly added support structure 40 can be limited, that is, on any cross-section of the electronic device, the width of the support structure 40 can be limited to be smaller than the width of the first conductive column 63.

[0063] In some specific embodiments, the upper surface of the support structure 40 is substantially flush with the upper surface of the first conductive structure 60, which can better protect the first conductive structure 60 from damage due to external forces during preparation and use, and can also reduce the risk of short circuits. The flush surface can avoid the connection between the first conductive structure 60 and adjacent components, which may cause short circuits and other problems.

[0064] The electronic device provided by the present embodiment further includes a photonic integrated circuit 70, which is disposed on the upper surface of the first rewiring structure 10 and is electrically connected to the electronic component 20. For example, the photonic integrated circuit 70 is mainly used to process optical signals, while the electronic component 20 is mainly responsible for processing electrical signals, and the photoelectric conversion process between the photonic integrated circuit 70 and the electronic component 20 is realized through the connection of the first rewiring structure 10.

[0065] Optionally, the electronic device provided in the embodiment of the present application further includes a second conductive structure 80, which is disposed between the electronic component 20 and the first rewiring structure 10, and the second conductive structure 80 electrically connects the electronic component 20 and the first rewiring structure 10. The second conductive structure 80 realizes the electrical connection between the electronic component 20 and the first rewiring structure 10, and also has a certain heat dissipation effect, dissipating the heat of the electronic component 20.

[0066] Specifically, the second conductive structure 80 includes a plurality of second conductive pillars 81. Since the volume of the electronic component 20 is relatively small, the width of the second conductive pillars 81 is selected as follows, that is, in any cross section of the electronic device, the width of the second conductive pillars 81 is smaller than the width of the support structure 40. Exemplarily, the second conductive pillars 81 are copper pillars.

[0067] In order to ensure the stability of the electronic component 20 and the second redistribution structure 30, the adhesive layer 90 is disposed between the electronic component 20 and the second redistribution structure 30. For example, the adhesive layer 90 can be a liquid or film-state organic substance, such as: non-conductive paste (NCP, Non-Conductive Paste), non-conductive film (NCF, Non-Conductive Film), anisotropic conductive paste (ACP, Anisotropic Conductive Paste), anisotropic conductive film (ACF, Anisotropic Conductive Film), polyimide (Polyimide, PI), epoxy resin (Epoxy), resin (Resin), PP (PrePreg, prepreg material or semi-cured resin, semi-cured sheet), ABF (Ajinomoto Build-up Film), glue, etc.

[0068] In order to prevent the overflow of glue from affecting the connection between the first redistribution structure 10 and the conductive structure, the area of ​​the adhesive layer 90 is limited on the basis of ensuring the stability of the connection, that is, the orthographic projection of the electronic component 20 on the first redistribution structure 10 coincides with the orthographic projection of the adhesive layer 90 on the first redistribution structure 10. For example, the lower surface of the encapsulation layer 50 is flush with the lower surface of the adhesive layer 90.

[0069] The electronic device provided in the embodiment of the present application further includes a substrate 100, which is located on the lower surface of the first rewiring structure 10, and the substrate 100 is electrically connected to the first rewiring structure 10. For example, the substrate 100 may include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate 100 may be made of a non-conductive material, such as glass, plastic, or a sapphire wafer, etc. Further alternatively, the substrate 100 may have a semiconductor device or circuit formed therein.

[0070] The electronic device provided in the embodiment of the present application further includes a third conductive structure 110, which is located between the first rewiring structure 10 and the photonic integrated circuit 70, and the first rewiring structure 10 and the photonic integrated circuit 70 are electrically connected through the third conductive structure 110. For example, the number of the third conductive structure 110 can be selected as needed, and the specific structure and shape of the third conductive structure 110 are not limited. For example, it can include one or a combination of at least two of a pad / pad, UBM (underbump metal), a copper column and a bump. Among them, the bump can be, for example, a gold bump (Gold bump, usually rectangular, gold), a solder bump (solder bump, usually round, copper plus tin), a pillar bump (Pillar bump, usually a pillar octagon or polygon, copper plus tin or lead plus tin). Exemplarily, the third conductive structure 110 includes a copper column arranged on the first rewiring structure 10 and a bump arranged on the copper column, and a copper column or Pad or UBM arranged on the photonic integrated circuit 70.

[0071] In addition, the electronic device provided in the embodiment of the present application further includes a fourth conductive structure 120, which is located between the substrate 100 and the second rewiring structure 30, and the substrate 100 and the second rewiring structure 30 are electrically connected through the fourth conductive structure 120. For example, the number of the fourth conductive structure 120 can be selected as needed, and the specific structure and shape of the fourth conductive structure 120 are not limited, for example, it can include a pad / pad (Pad), UBM (underbump metal), a copper column and a bump (bump) One or a combination of at least two. Among them, the bump can be, for example, a gold bump (Gold bump, usually rectangular, gold), a solder bump (solder bump, usually round, copper plus tin), a pillar bump (Pillar bump, usually a pillar octagon or polygon, copper plus tin or lead plus tin). Exemplarily, the fourth conductive structure 120 includes a copper column arranged on the second rewiring structure 30 and a bump arranged on the copper column, and a copper column or Pad or UBM arranged on the substrate 100.

[0072] In some specific embodiments, a support structure 40 is arranged on the periphery of the first conductive structure 60. Such an arrangement will neither affect the position of the first conductive structure 60 nor increase the difficulty of the process. Moreover, since the position of the first conductive structure 60 does not change, the stability of the connection between the first rewiring structure 10 and the second rewiring structure 30 can be better guaranteed.

[0073] refer to Figure 5 , Figure 6 and Figure 7 , Figure 5 is a top view of an electronic integrated circuit in an electronic device of the present application; Figure 6 is an enlarged schematic diagram of a partial longitudinal cross-sectional structure of the first support portion 41 in the present application; Figure 7 4 is an enlarged schematic diagram of a partial longitudinal cross-sectional structure of the second support portion 42 in the present application; Figure 5 As shown, the support structure 40 includes a first support portion 41 and a second support portion 42; in order to protect the electronic component 20 from being affected by the external environment, the electronic component 20 is encapsulated; specifically, the support structure 40 is first manufactured and then the encapsulation layer 50 is filled. In order not to affect the molding material of the encapsulation layer 50 from flowing from the support structure 40 into the first rewiring structure 10 and the second rewiring structure 30, the support structure 40 may be provided with a plurality of openings, for example, Figure 6 As shown, the first support portion 41 has a plurality of first openings 411, such as Figure 7 As shown, the second support portion 42 has a plurality of second openings 421. In some specific embodiments, the plurality of first conductive pillars 63 in the first conductive structure 60 have sparse and dense regions, that is, the first conductive pillars 63 are densely arranged in some positions and sparsely arranged in some positions, and the dense or sparse first conductive pillars 63 will affect the flow speed of the molding material in the molding process, so the size of the area of ​​the opening on the support structure 40 can be set accordingly, so that the opening area of ​​the area where the first conductive pillars 63 are densely arranged is larger, and the area of ​​the area where the first conductive pillars 63 are sparsely arranged is smaller, for example, the area of ​​the first opening 411 is smaller than the area of ​​the second opening 421.

[0074] For ease of understanding, continue to refer to Figure 5, the first conductive structure 60 is divided into a first distribution area 61 and a second distribution area 62, the first distribution area 61 corresponds to the first support portion 41, and the second distribution area 62 corresponds to the second support portion 42; that is, the first distribution area 61 is adjacent to the first support portion 41, and the second distribution area 62 is adjacent to the second support portion 42. The first conductive structure 60 includes a plurality of first conductive pillars 63, and the first conductive pillars 63 are located in the first distribution area 61 and the second distribution area 62, wherein the density of the first conductive pillars 63 located in the first distribution area 61 is less than the density of the first conductive pillars 63 located in the second distribution area 62. That is to say, the first conductive pillars 63 located in the first distribution area 61 are arranged sparsely, so the resistance of the molding material flowing in the first distribution area 61 is small, so the corresponding opening area of ​​the first support portion 41 can be relatively small; the first conductive pillars 63 located in the second distribution area 62 are arranged densely, so the resistance of the molding material flowing in the second distribution area 62 is large, so the corresponding opening area of ​​the second support portion 42 needs to be relatively large. Of course, the area of ​​each first opening 411 of the first support portion 41 is the same, or the area of ​​each first opening 411 is different, or some of the first openings 411 in the plurality of first openings 411 have the same area, and some of the first openings 411 have different areas. Of course, the area of ​​each second opening 421 of the second support portion 42 is the same, or the area of ​​each second opening 421 is different, or some of the second openings 421 in the plurality of second openings 421 have the same area, and some of the second openings 421 have different areas. However, it is necessary to ensure that the average area of ​​the first opening 411 in the plurality of first openings 411 is smaller than the average area of ​​the second opening 421 in the plurality of second openings 421.

[0075] like Figure 8A-8I Schematic diagram of the manufacturing steps of the electronic device of the present application. To facilitate understanding of the electronic device provided in the embodiment of the present application, the manufacturing steps of the electronic device of the present application are now described as follows:

[0076] First, if Fig. 8A As shown, a first carrier 130 is provided; Figure 8B In the embodiment, a second redistribution structure 30 is formed on a first carrier 130, and a plurality of first conductive pillars 63 and a support structure 40 are formed on a side of the second redistribution structure 30 away from the first carrier 130, wherein the plurality of first conductive pillars 63 serve as a first conductive structure 60; Figure 8C In the embodiment, the electronic component 20 is connected to the second redistribution structure 30 through the adhesive layer 90, and a plurality of second conductive pillars 81 are pre-formed on the side of the electronic component 20 away from the adhesive layer 90, and the plurality of second conductive pillars 81 serve as the second conductive structure 80; Fig.8D in Figure 8CBased on the structure of , a molding material is used for molding to form a packaging layer 50, and a grinding process is used to grind and polish the structure of the formed packaging layer 50 to obtain a flat surface and precise size, and the end surfaces of the first conductive pillar 63 and the second conductive pillar 81 are exposed from the packaging layer 50; Fig. 8E In the embodiment, a first redistribution structure 10 is formed on the upper surface of the encapsulation layer 50, and a third conductive structure 110 is formed on the upper surface of the first redistribution structure 10; Fig.8F In Fig. 8E The structure on the substrate is transferred to the second carrier 140; Figure 8G In the embodiment, a fourth conductive structure 120 is formed on the second redistribution structure exposed after the first carrier 130 is removed; Figure 8H In Figure 8G The structure is transferred to the third carrier 150; Figure 8I In, yes Figure 8G The second carrier 140 is removed.

[0077] refer to Fig. 9 , Fig. 9 4 is a schematic diagram showing the effect of deformation rate of the electronic integrated module 2 after the support structure 40 is used in the electronic device of the present application. Fig. 9 It can be seen that in existing electronic devices, due to the current welding and packaging, after the thermal process production, if the percentage of the electronic integrated module 2 producing a larger M-shaped warping is 100%, the deformation percentage of the electronic integrated module 2 in the electronic device with the support structure 40 is significantly reduced, and the deformation percentage is about 89%.

[0078] Although the present application has been described and illustrated with reference to the specific embodiments of the present application, these descriptions and illustrations do not limit the present application. It is clearly understood by those skilled in the art that various changes can be made, and equivalent elements can be substituted in the embodiments without departing from the true spirit and scope of the present application as defined by the appended claims. The illustrations may not necessarily be drawn to scale. Due to variables in the manufacturing process, etc., there may be differences between the technical reproduction in the present application and the actual implementation. There may be other embodiments of the present application that are not specifically described. The description and illustrations should be regarded as illustrative, not restrictive. Modifications may be made to adapt specific circumstances, materials, material compositions, methods or processes to the goals, spirits and scopes of the present application. All such modifications fall within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a specific order, it should be understood that these operations can be combined, subdivided or reordered to form equivalent methods without departing from the teachings of the present application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit the present application.

Claims

1. An electronic device, characterized in that: include: The first rewiring structure; a second rewiring structure, the second rewiring structure being arranged opposite to the first rewiring structure; an electronic component, disposed between the first rewiring structure and the second rewiring structure, and electrically connected to the first rewiring structure; A support structure, disposed between the first rewiring structure and the second rewiring structure, for enhancing the structural strength of the electronic device, and having a plurality of openings; The packaging layer covers the electronic component and is disposed between the first redistribution structure, the second redistribution structure and the supporting structure.

2. The electronic device according to claim 1, characterized in that: Also includes: A first conductive structure is covered by the packaging layer and connects the first rewiring structure and the second rewiring structure; wherein the first conductive structure is used to transmit signals between the first rewiring structure and the second rewiring structure, and the supporting structure does not transmit signals between the first rewiring structure and the second rewiring structure.

3. The electronic device according to claim 2, characterized in that: The support structure includes a first support portion and a second support portion; The first supporting portion has a plurality of first openings, the second supporting portion has a plurality of second openings, and the area of ​​the first openings is smaller than the area of ​​the second openings.

4. The electronic device according to claim 3, characterized in that: The first conductive structure is divided into a first distribution area and a second distribution area, the first distribution area corresponds to the first supporting portion, and the second distribution area corresponds to the second supporting portion; The first conductive structure includes a plurality of first conductive pillars, which are located in the first distribution area and the second distribution area, wherein a density of the first conductive pillars in the first distribution area is lower than a density of the first conductive pillars in the second distribution area.

5. The electronic device according to claim 4, characterized in that: In any cross section of the electronic device, the width of the support structure is smaller than the width of the first conductive column.

6. The electronic device according to claim 5, characterized in that: An upper surface of the support structure is substantially flush with an upper surface of the first conductive structure.

7. The electronic device according to claim 2, characterized in that: It also includes a second conductive structure, which is disposed between the electronic component and the first redistribution structure, and the second conductive structure electrically connects the electronic component and the first redistribution structure.

8. The electronic device according to claim 7, characterized in that: The second conductive structure includes a plurality of second conductive pillars; In any cross section of the electronic device, the width of the second conductive column is smaller than the width of the supporting structure.

9. The electronic device according to claim 1, characterized in that: It also includes a substrate, which is located on the lower surface of the first redistribution structure, and the substrate is electrically connected to the first redistribution structure.

10. The electronic device according to any one of claims 1 to 9, characterized in that: The electronic component is located on the upper surface of the second redistribution structure, and the electronic component is electrically connected to the second redistribution structure.