Gallium nitride monolithic integrated half-bridge with insulating substrate
By using insulated substrates and interdigital structures in gallium nitride monolithic integrated half-bridge, the substrate bias effect and leakage current problems are solved, the frequency efficiency and reliability of the device are improved, and the cost is reduced.
Patent Information
- Application Number
- CN202420006230.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-02
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2034-01-02
AI Technical Summary
The existing GaN monolithic integrated half-bridge has substrate bias effect, crosstalk and leakage current problems, resulting in low device reliability and conversion efficiency, and the use of traditional silicon-based substrates increases cost and heat dissipation problems.
Insulating substrates, including sapphire, diamond and other materials, are used to combine buffer layers, barrier layers and isolation structures to reduce substrate bias effects and reduce parasitic effects through interdigital structures and metal interconnections.
Effectively eliminate substrate bias effect and leakage current, reduce production costs, improve device frequency efficiency and reliability, and improve the consistency of half-bridge integrated circuits.
Smart Images
Figure CN222146235U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of power electronics and power semiconductors, and in particular relates to a gallium nitride monolithic integrated half bridge with an insulating substrate. Background Art
[0002] The half-bridge module is one of the core topologies in the field of power electronics technology, which is used to control the output of the power supply. It consists of two switching tubes that can convert the input voltage into an output voltage of different amplitudes and frequencies. The half-bridge circuit has broad application prospects in many fields, such as AC to DC power supplies, motor drivers, solar inverters, etc. The half-bridge circuit has the advantages of high efficiency, low cost and reliability. At present, power chips are mainly in the form of discrete components and integrated ICs with drivers. Discrete components have good design flexibility, but the parasitic parameters of the external drive circuit inevitably cause the drive loop to oscillate, the conversion efficiency decreases, and even the tube explodes. Therefore, the monolithic integrated IC has better reliability. Traditional silicon power tubes generally adopt a vertical structure, which is not suitable for monolithic integration technology. However, gallium nitride devices are particularly suitable for preparing monolithic integrated half-bridges due to their mature planar technology.
[0003] At present, the GaN monolithic integrated half-bridge with silicon as substrate has problems such as substrate bias effect, severe crosstalk and large leakage current, which makes the interference between the upper and lower tubes of the half-bridge extremely serious, which seriously hinders the promotion of GaN monolithic integrated half-bridge. In the prior art, the substrate bias effect of the monolithic integrated half-bridge can be effectively suppressed by using SOI (Silicon-On-Insulator) substrate and deep trench isolation process in the SOI substrate.
[0004] However, the SOI substrate will affect the heat dissipation of the device, and the deep trench isolation process and the SOI substrate itself will greatly increase the cost of the chip. In addition, conventional GaN half-bridge modules are generally obtained by sealing discrete components, which requires wire bonding packaging, which will lead to serious parasitic effects, thereby affecting the switch, causing serious frequency drop and even reliability problems. Therefore, providing a device that can effectively solve the substrate bias effect in the GaN half-bridge circuit and has high reliability has become an urgent problem to be solved. Utility Model Content
[0005] In order to solve the above problems existing in the prior art, the utility model provides a gallium nitride monolithic integrated half bridge with an insulating substrate. The technical problem to be solved by the utility model is achieved through the following technical solutions:
[0006] A gallium nitride monolithic integrated half-bridge with an insulating substrate, comprising:
[0007] Insulating substrate;
[0008] Two transistor structures are located on the upper surface of the insulating substrate;
[0009] The isolation structure is located between the two transistor structures, and there is a gap between the lower surface and the upper surface of the insulating substrate.
[0010] In a specific embodiment, each of the transistor structures comprises:
[0011] A buffer layer, located on the upper surface of the insulating substrate;
[0012] A barrier layer, located on the upper surface of the buffer layer;
[0013] A cap layer, located on an upper surface of the barrier layer;
[0014] A source electrode, located on the upper surface of the barrier layer and on one side of the cap layer;
[0015] A drain electrode, located on the upper surface of the barrier layer and on the other side of the cap layer;
[0016] The gate is located on the upper surface of the cap layer.
[0017] In a specific embodiment, the buffer layer has a thickness of 50 nm to 7000 nm, and the material includes one or more of GaN and AlGaN.
[0018] In a specific embodiment, the barrier layer has a thickness of 5-50 nm and is made of AlGaN.
[0019] In a specific embodiment, the cap layer has a thickness less than 500 nm, and the material includes one or more of p-GaN, InGaN, and AlGaN.
[0020] In a specific embodiment, the source, the drain and the gate are all interdigitated structures, and the number of interdigitated fingers is 5-500.
[0021] In a specific embodiment, the materials of the source electrode, the drain electrode and the gate electrode include one or more of Ti, Al, TiAl, Ni, Au, Ta and TiN.
[0022] In a specific embodiment, the insulating substrate includes one of a sapphire substrate, a high-resistance Si substrate, a high-resistance SiC substrate, a diamond substrate, a glass substrate, a ceramic substrate, and a polymer substrate.
[0023] In a specific embodiment, the isolation structure includes a mesa isolation structure or an ion implantation structure.
[0024] Compared with the prior art, the utility model has the following beneficial effects:
[0025] The gallium nitride monolithic integrated half-bridge of the utility model can effectively eliminate the substrate bias effect, crosstalk, leakage current and other problems in the traditional gallium nitride half-bridge circuit by using an insulating substrate, and can greatly reduce the production cost of the half-bridge integrated circuit, improve the area efficiency, switching frequency and conversion efficiency of the device, and thus improve the consistency and reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a structural schematic diagram of a gallium nitride monolithic integrated half-bridge with an insulating substrate provided by an embodiment of the utility model;
[0027] Figure 2 It is a circuit diagram of a gallium nitride monolithic integrated half-bridge with an insulating substrate provided by an embodiment of the utility model;
[0028] Figure 3 It is a layout of a gallium nitride monolithic integrated half bridge with an insulating substrate provided by an embodiment of the utility model;
[0029] Figure 4 It is a switching characteristic curve diagram of the GaN half-bridge with an insulating substrate and the GaN half-bridge with a silicon-based substrate during the switching process provided by the embodiments of the present utility model.
[0030] Reference numerals:
[0031] 1: insulating substrate; 2: isolation structure; 3: buffer layer; 4: barrier layer; 5: cap layer; 6: source; 7: drain; 8: second gate. DETAILED DESCRIPTION
[0032] The present invention is further described in detail below in conjunction with specific embodiments, but the implementation methods of the present invention are not limited thereto.
[0033] Embodiment 1
[0034] See also Figure 1 , Figure 1 It is a structural schematic diagram of a gallium nitride monolithic integrated half-bridge with an insulating substrate provided by an embodiment of the utility model.
[0035] The present invention provides a gallium nitride monolithic integrated half-bridge with an insulating substrate, comprising: an insulating substrate 1, two transistor structures and an isolation structure 2. The two transistor structures are located on the upper surface of the insulating substrate 1, the isolation structure 2 is located between the two transistor structures, and there is a gap between the lower surface of the isolation structure 2 and the upper surface of the insulating substrate 1.
[0036] Specifically, see Figure 1In this embodiment, the gallium nitride monolithic integrated half-bridge uses an insulating substrate 1, which can get rid of the substrate bias effect of traditional silicon-based gallium nitride devices. Therefore, the isolation structure 2 does not need to be prepared by deep trench isolation technology, and only needs to isolate the two transistor structures.
[0037] Specifically, each transistor structure includes: a buffer layer 3, a barrier layer 4, a cap layer 5, a source 6, a drain 7 and a gate 8. The buffer layer 3 is located on the upper surface of the insulating substrate 1, the barrier layer 4 is located on the upper surface of the buffer layer 3, and the cap layer 5 is located on the upper surface of the barrier layer 4. The source 6 is located on the upper surface of the barrier layer 4 and on one side of the cap layer 5. The drain 7 is located on the upper surface of the barrier layer 4 and on the other side of the cap layer 5. The gate 8 is located on the upper surface of the cap layer 5.
[0038] Specifically, see Figure 1 and Figure 2 The isolation structure 2 extends from the upper surface of the barrier layer 4 to the inside of the buffer layer 3 to isolate the two transistor structures. One of the two transistor structures and the insulating substrate 1 constitutes an upper tube, and the other transistor structure and the insulating substrate 1 constitute a lower tube. The source 6 of the upper tube and the drain 7 of the lower tube are interconnected on the chip using metal. The connection point between the source 6 of the upper tube and the drain 7 of the lower tube is the half-bridge output pole V SN The switches of the upper and lower tubes are controlled by PWM modulation signals inputted by their respective gates 8. The high-voltage signal is connected to the half-bridge circuit through the drain 7 of the upper tube, and the high-voltage loop is finally connected to the ground wire GND from the source 6 of the lower tube. When the gate voltage of the device is lower than its threshold voltage, the device is in the off state. When the gate voltage is higher than its threshold voltage and reaches its preset working voltage, the device is in the on state. Through on-chip monolithic integration and interconnection, the parasitic problems caused by traditional wire bonding between the upper and lower tubes of the half-bridge can be minimized to the greatest extent, achieving better heat distribution, effectively reducing the production cost of the half-bridge, and omitting the traditional tube screening process.
[0039] Specifically, the insulating substrate 1 includes one of a sapphire substrate, a high-resistance Si substrate, a high-resistance SiC substrate, a diamond substrate, a glass substrate, a ceramic substrate, and a polymer substrate. The isolation structure 2 includes a table isolation structure or an ion implantation structure. The thickness of the buffer layer 3 is 50nm to 7000nm, and the material includes one or more of GaN and AlGaN. The thickness of the barrier layer 4 is 5 to 50nm, and the material includes AlGaN. The thickness of the cap layer 5 is less than 500nm, and the material includes one or more of p-GaN, InGaN, and AlGaN. Preferably, when the buffer layer 3 material includes AlGaN, the Al component is 5% to 50%. When the cap layer 5 material includes p-GaN, the doping ions include magnesium ions, and the doping concentration is less than 10 21 cm -3 .
[0040] Specifically, the insulating substrate 1 in this embodiment uses a sapphire substrate. The sapphire substrate is a single crystal material composed of aluminum oxide. The mechanical properties of the sapphire substrate are stronger and the warping is easier to control. The sapphire substrate is an insulating material. The devices made on the sapphire substrate can withstand extremely high withstand voltage in the vertical direction, and there is no parasitic channel in the lateral direction. A thinner gallium nitride epitaxial layer can be epitaxially grown to prepare ultra-high voltage transistors. The gallium nitride half-bridge circuit integrated on the sapphire substrate can get rid of the substrate bias effect of silicon-based gallium nitride, and normal half-bridge operation can be achieved without the use of deep trench isolation technology and SOI substrate. Please refer to Figure 4 , Figure 4 This is a switching characteristic curve diagram of the GaN half-bridge with an insulating substrate and the GaN half-bridge with a silicon-based substrate during the switching process provided by the embodiment of the utility model. It can be clearly seen from the figure that the voltage V SN Unstable. This is because the carriers in the upper tube channel are partially depleted due to the substrate bias effect, and the upper tube conduction voltage drop increases sharply, causing the final conduction to V SN The voltage of the node decreases. SN The signal is very stable, which directly proves that the insulating substrate 1 can effectively suppress the substrate bias effect. Preferably, the wafer size of the sapphire substrate is 2 to 12 inches.
[0041] Specifically, the source electrode 6, the drain electrode 7 and the gate electrode 8 are all interdigitated structures, and the number of interdigitated fingers is 5 to 500. The materials of the source electrode 6, the drain electrode 7 and the gate electrode 8 include one or more of Ti, Al, TiAl, Ni, Au, Ta and TiN.
[0042] Specifically, see Figure 3 The gate 8 of the interdigital structure is located between the source 6 and the drain 7. The source 6 of the upper tube and the drain 7 of the lower tube are interconnected through the on-chip metal. The high-voltage signal is connected to the half-bridge circuit through the drain 7 of the upper tube, and the source 6 of the lower tube is grounded. The materials of the source 6, drain 7 and gate 8 can be a stacked electrode formed by multiple types of Ti, Al, TiAl, Ni, Au, Ta, TiN, or an alloy structure.
[0043] The present embodiment provides a gallium nitride monolithic integrated half-bridge with an insulating substrate. By using an insulating substrate 1, the problems of substrate bias effect, crosstalk, leakage current, etc. in the traditional gallium nitride half-bridge circuit can be effectively eliminated, and the production cost of the half-bridge integrated circuit can be greatly reduced, and the area efficiency, switching frequency and conversion efficiency of the device can be improved, thereby improving the consistency and reliability of the device.
[0044] The above contents are further detailed descriptions of the present invention in combination with specific preferred implementations, and the specific implementation of the present invention cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. A gallium nitride monolithic integrated half-bridge with an insulating substrate, characterized in that: include: Insulating substrate (1); Two transistor structures are located on the upper surface of the insulating substrate (1); The isolation structure (2) is located between the two transistor structures, and there is a gap between the lower surface and the upper surface of the insulating substrate (1).
2. The gallium nitride monolithic integrated half-bridge with an insulating substrate according to claim 1, characterized in that: Each of the transistor structures comprises: A buffer layer (3) located on the upper surface of the insulating substrate (1); A barrier layer (4) located on the upper surface of the buffer layer (3); A cap layer (5) located on the upper surface of the barrier layer (4); A source electrode (6) is located on the upper surface of the barrier layer (4) and on one side of the cap layer (5); A drain electrode (7), located on the upper surface of the barrier layer (4) and on the other side of the cap layer (5); The gate (8) is located on the upper surface of the cap layer (5).
3. The gallium nitride monolithic integrated half bridge with insulating substrate according to claim 2, characterized in that: The source electrode (6), the drain electrode (7) and the gate electrode (8) are all interdigitated structures, and the number of interdigitated fingers is 5 to 500.