Thin film transistor structure based on carbon nanotubes
By using high K dielectric material and multi-layer structure design in transistors, the problem of increased leakage current caused by thinning of silicon dioxide gate oxide dielectric is solved, the reliability and dielectric performance of the device are improved, and the more Good thermal stability and electrical conductivity.
Patent Information
- Application Number
- CN202421462107.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-25
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2034-06-25
AI Technical Summary
As the transistor size decreases, the thickness of silicon dioxide as gate oxide dielectric material is thinned, resulting in a tunneling effect that increases leakage current, improves device loss and reduces reliability.
High K dielectric material is used to replace silica as gate dielectric, and through epitaxial layer, metal layer, substrate layer and multi-layer structure design, combined with carbon nanotube technology, a thicker physical gate dielectric layer is formed to reduce the tunneling effect.
It effectively reduces leakage current, improves the reliability and dielectric properties of the device, avoids material reactions at high temperatures, and achieves better thermal stability and conductivity.
Smart Images
Figure CN222282009U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of transistors, in particular to a thin film transistor structure based on carbon nanotubes. Background Art
[0002] Transistor refers to any single component based on semiconductor materials. Transistor has multiple functions such as detection, rectification, amplification, switching, voltage regulation, signal modulation, etc. Transistor can be used for a variety of digital and analog functions.
[0003] The patent with announcement number CN213845281U discloses a thin film transistor structure, wherein the driving thin film transistor includes a first gate, a drain, a first source, a gate insulating layer, a first active layer, an etching stop layer, a first pixel electrode, a second pixel electrode and a first light shielding layer; the first gate, the drain and the first source are arranged in the same layer; the gate insulating layer is arranged on the first gate, the drain and the first source; the first active layer is arranged on the gate insulating layer; the etching stop layer is arranged on the first active layer and the gate insulating layer, and the etching stop layer is provided with a first hole and a second hole; the first pixel electrode is connected to the first source through the first hole, the second pixel electrode is connected to the drain through the second hole, and the first light shielding layer is used to block light from irradiating the first active layer. In the above technical solution, the first light shielding layer prevents light from damaging the active layer, thereby ensuring the stability of the thin film transistor.
[0004] As shown in the above technologies, the development of the semiconductor field has always revolved around the theme of reducing device size, and the dielectric layer of conventional materials has gradually restricted the miniaturization of microelectronic devices. Silicon dioxide has always been the gate oxide dielectric material of transistors. As the size of transistors gradually decreases, the thickness of the gate oxide dielectric is also continuously reduced. The tunnel effect will cause a significant increase in leakage current, thereby increasing device loss and reducing device reliability. Utility Model Content
[0005] In view of the shortcomings of the prior art, the utility model provides a thin film transistor structure based on carbon nanotubes, which solves the problem that silicon dioxide has always been the gate oxide dielectric material of transistors. As the size of transistors is gradually reduced, the thickness of the gate oxide dielectric is also continuously reduced. The tunnel effect will cause a significant increase in leakage current, thereby increasing device loss and reducing device reliability.
[0006] To achieve the above objectives, the utility model is implemented through the following technical solutions: a carbon nanotube-based thin film transistor structure, comprising:
[0007] An epitaxial layer, wherein a placeholder groove is formed on a surface of the epitaxial layer;
[0008] A substrate layer, the top of which is fixedly connected to the bottom of the epitaxial layer;
[0009] A metal layer, the top of the metal layer is fixedly connected to the bottom of the substrate layer, and the material of the metal layer is aluminum;
[0010] A high-K dielectric material, the high-K dielectric material is located on top of the epitaxial layer and is fixedly connected thereto, and the high-K dielectric material is rectangular in shape;
[0011] A gate material, the gate material is located on top of the high-K dielectric material and is fixedly connected thereto;
[0012] A drain electrode material, one side of which is fixedly connected to a surface of the gate material;
[0013] A source material, one side of which is fixedly connected to the surface of the gate material.
[0014] Preferably, a substrate is disposed inside the placeholder slot, and the substrate is made of silicon.
[0015] Preferably, a wear-resistant layer is provided on one side of the metal layer, and the material of the wear-resistant layer is ceramic.
[0016] Preferably, the gate material has a rectangular bottom and a trapezoidal top.
[0017] Preferably, the drain material is evenly arranged in multiple layers.
[0018] Preferably, the source material is uniformly arranged in multiple layers.
[0019] Beneficial Effects
[0020] The utility model provides a thin film transistor structure based on carbon nanotubes. Compared with the prior art, it has the following beneficial effects:
[0021] (1) The carbon nanotube-based thin film transistor structure comprises an epitaxial layer, a surface of the epitaxial layer is provided with a placeholder groove; a substrate layer, the top of the substrate layer is fixedly connected to the bottom of the epitaxial layer; a metal layer, the top of the metal layer is fixedly connected to the bottom of the substrate layer, and the material of the metal layer is aluminum; a high-K dielectric material, the high-K dielectric material is located on the top of the epitaxial layer and is fixedly connected thereto, and the shape of the high-K dielectric material is rectangular; a gate material, the gate material is located on the top of the high-K dielectric material and is fixedly connected thereto; a drain material, the material of the drain material is uniformly arranged in multiple layers, and one side of the drain material is fixedly connected to the surface of the gate material; a source material, the material of the source material is uniformly arranged in multiple layers, and one side of the source material is fixedly connected to the surface of the gate material, using a high The setting of K dielectric material, "K" represents the dielectric constant, which generally refers to the ability of the material to concentrate the electric field. High-k material is used to replace silicon dioxide as the gate dielectric. In addition to having a higher k value (between tens and one hundred), it has better thermal stability with silicon, avoiding the reaction of high-k material with silicon substrate at high temperature; it has a wide bandgap and a high potential barrier to effectively reduce the gate tunneling current, etc., and can obtain a gate dielectric layer with a larger physical thickness under the same equivalent gate oxide layer thickness, thereby improving the gate leakage current, solving the problem that silicon dioxide has always been the gate oxide dielectric material of transistors. As the size of transistors gradually decreases, the thickness of the gate oxide dielectric is also continuously thinned, and the tunneling effect will cause a significant increase in leakage current, thereby increasing device loss and reducing device reliability.
[0022] (2) The carbon nanotube-based thin film transistor structure has a substrate arranged inside the placeholder groove, the substrate material is silicon, a wear-resistant layer is arranged on one side of the metal layer, the wear-resistant layer material is ceramic, the gate material is rectangular at the bottom and trapezoidal at the top, and the gate material, drain material, and source material are arranged in a uniform and symmetrical multilayer arrangement, so that it has better dielectric properties (i.e., high uniformity, low leakage current and high dielectric strength). The main reason is that the symmetrical multilayer structure has a stable cubic structure and has no defects of forming electrical weak points in a large area. The drain material and the source material can form a quasi-van der Waals structure with the 2D material, which can be used to solve the contact problem between the two-dimensional pipeline and the three-dimensional gate dielectric in the crystal. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a three-dimensional schematic diagram of the utility model;
[0024] Figure 2 For this utility model Figure 1 A partial enlarged view of the middle A;
[0025] Figure 3 It is a front view of the utility model;
[0026] Figure 4 It is a cross-sectional view of the utility model.
[0027] In the figure: 1. Epitaxial layer; 2. Placeholder groove; 3. Substrate layer; 4. Metal layer; 5. High-K dielectric material; 6. Gate material; 7. Drain material; 8. Source material. DETAILED DESCRIPTION
[0028] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0029] See also Figure 1-4 , the utility model provides two technical solutions:
[0030] Embodiment 1, a carbon nanotube-based thin film transistor structure, comprising:
[0031] An epitaxial layer 1, wherein a placeholder groove 2 is provided on the surface of the epitaxial layer 1;
[0032] A substrate layer 3, wherein the top of the substrate layer 3 is fixedly connected to the bottom of the epitaxial layer 1;
[0033] A metal layer 4, the top of the metal layer 4 is fixedly connected to the bottom of the substrate layer 3, and the material of the metal layer 4 is aluminum. Aluminum is used to manufacture the metallization layer of the power transistor to improve the conductivity and corrosion resistance of the transistor;
[0034] A high-K dielectric material 5, which is located on the top of the epitaxial layer 1 and is fixedly connected thereto, and the high-K dielectric material 5 is rectangular in shape;
[0035] A gate material 6, the gate material 6 is located on the top of the high-K dielectric material 5 and is fixedly connected thereto;
[0036] Drain material 7, wherein the drain material 7 is evenly arranged in multiple layers, and one side of the drain material 7 is fixedly connected to the surface of the gate material 6;
[0037] Source material 8, source material 8 is evenly arranged in multiple layers, one side of source material 8 is fixedly connected to the surface of gate material 6, and is used in transistor wires and electrodes to improve the conductivity and heat dissipation of the transistor. By using the setting of high-K dielectric material 5, "K" represents the dielectric constant, which generally refers to the ability of the material to concentrate the electric field. High-k material is used to replace silicon dioxide as the gate dielectric. In addition to having a higher k value (between tens and one hundred), it has better thermal stability with silicon, avoiding the reaction of high-k material with silicon substrate at high temperature; it has a wide band gap and a high potential barrier to effectively reduce the gate tunneling current, etc., and can obtain a gate dielectric layer with a larger physical thickness under the same equivalent gate oxide layer thickness, thereby improving the gate leakage current, solving the problem that silicon dioxide has always been the gate oxide dielectric material of the transistor. As the size of the transistor is gradually reduced, the thickness of the gate oxide dielectric is also continuously reduced, and the tunneling effect will cause a significant increase in leakage current, thereby increasing device loss and reducing device reliability.
[0038] Embodiment 2 mainly differs from Embodiment 1 in that: a thin film transistor structure based on carbon nanotubes is provided, a substrate is provided inside the placeholder groove 2, the material of the substrate is silicon, a wear-resistant layer is provided on one side of the metal layer 4, the material of the wear-resistant layer is ceramic, the gate material 6 is rectangular at the bottom and trapezoidal at the top, and the gate material 6, the drain material 7, and the source material 8 are provided in a uniform and symmetrical multilayer arrangement, so that it has better dielectric properties (i.e., high uniformity, low leakage current and high dielectric strength). The main reason is that the symmetrical multilayer structure has a stable cubic structure, and it does not form the defect of electrical weak points in a large area. The drain material 7 and the source material 8 can form a quasi-van der Waals structure with the 2D material, which can be used to solve the contact problem between the two-dimensional pipeline and the three-dimensional gate dielectric in the crystal.
[0039] "K" stands for dielectric constant, which generally refers to the ability of a material to concentrate an electric field. SiO2 has always been the gate oxide dielectric material of transistors. As the size of transistors gradually decreases, the thickness of the gate oxide dielectric is also continuously reduced. When the dielectric thickness is reduced to less than 2nm, the tunneling effect will cause a significant increase in leakage current, thereby increasing device losses and reducing device reliability. The method of thinning the gate oxide dielectric and increasing gate capacitance has already faced physical limits. According to the calculation formula of gate capacitance, using a new gate dielectric material with a dielectric constant higher than SiO2 is another feasible method. Compared with high-k dielectrics (k=16), the use of high-k dielectrics can increase the capacitance by 1.6 times and reduce the leakage current by 0.01 times.
[0040] Meanwhile, the contents not described in detail in this specification belong to the prior art known to those skilled in the art.
[0041] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.
[0042] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A carbon nanotube-based thin film transistor structure, characterized in that: include: An epitaxial layer (1), wherein a placeholder groove (2) is provided on the surface of the epitaxial layer (1); A substrate layer (3), the top of the substrate layer (3) being fixedly connected to the bottom of the epitaxial layer (1); A metal layer (4), the top of the metal layer (4) is fixedly connected to the bottom of the substrate layer (3), and the material of the metal layer (4) is aluminum; A high-K dielectric material (5), the high-K dielectric material (5) is located on the top of the epitaxial layer (1) and is fixedly connected thereto, and the high-K dielectric material (5) is in a rectangular shape; A gate material (6), the gate material (6) being located on top of the high-K dielectric material (5) and fixedly connected thereto; A drain electrode material (7), one side of the drain electrode material (7) being fixedly connected to the surface of the gate electrode material (6); A source material (8), one side of the source material (8) is fixedly connected to the surface of the gate material (6).
2. The carbon nanotube-based thin film transistor structure according to claim 1, characterized in that: A substrate is arranged inside the placeholder slot (2), and the substrate is made of silicon.
3. The carbon nanotube-based thin film transistor structure according to claim 1, characterized in that: A wear-resistant layer is arranged on one side of the metal layer (4), and the material of the wear-resistant layer is ceramic.
4. The carbon nanotube-based thin film transistor structure according to claim 1, characterized in that: The gate material (6) has a rectangular bottom and a trapezoidal top.
5. The carbon nanotube-based thin film transistor structure according to claim 1, characterized in that: The drain electrode material (7) is evenly arranged in multiple layers.
6. The carbon nanotube-based thin film transistor structure according to claim 1, characterized in that: The source material (8) is evenly arranged in multiple layers.