Display device

Abstract

A display device includes: a substrate including a display area in which pixels are disposed and a non-display area; a common voltage transmission line disposed in the non-display area and transmitting a common voltage to the pixels; a data output wiring disposed in the non-display area and connected to a data line transmitting a data voltage to the pixels; and a sacrificial wiring disposed between the common voltage transmission line and the data output wiring, and not connected to the data line.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0006726, filed on January 17, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] The display device is a device that displays an image and includes a liquid crystal display ("LCD") device, an organic light emitting diode ("OLED") display device, a quantum dot light emitting diode ("QLED") display device, a micro light emitting diode display device, or the like.

[0005] In various display devices including organic light emitting diode display devices, moisture penetration and the like may occur depending on the use environment. This may cause corrosion of wiring, so that there is a problem of deterioration in reliability of the display device. Therefore, a display device with improved environmental reliability is desired. Utility Model Content

[0006] Embodiments provide a display device having improved long-term reliability by preventing damage to wiring. Embodiments are for preventing or delaying corrosion of wiring disposed in a peripheral area of ​​a display device and reducing the degree of corrosion.

[0007] Specifically, when moisture penetration occurs in a display device, corrosion due to a potential difference between two adjacent metals (eg, galvanic corrosion) may occur. Embodiments are provided to delay or prevent corrosion due to a potential difference between adjacent wirings.

[0008] The display device in the embodiment includes: a substrate including a display area and a non-display area, and a pixel is in the display area; a common voltage transmission line is arranged in the non-display area and transmits a common voltage to the pixel; a data output wiring is arranged in the non-display area and connected to a data line that transmits a data voltage to the pixel; and a sacrificial wiring is arranged between the common voltage transmission line and the data output wiring and is not connected to the data line.

[0009] In an embodiment, the display device may further include a data driver disposed in the non-display area. The data driver may include: a first terminal outputting the data voltage; and a sacrificial terminal applying a predetermined voltage to the sacrificial wiring.

[0010] In an embodiment, the sacrificial terminal may apply a voltage higher than the common voltage and lower than or equal to the data voltage.

[0011] In an embodiment, the non-display area may include a bending area. The data output wiring may include a first portion extending from the data driver toward the bending area, a second portion connected to the first portion and passing through the bending area, a third portion connected to the second portion and extending toward the display area, and a data contact portion electrically connecting the second portion and the third portion.

[0012] In an embodiment, the first end of the sacrificial wiring may be connected to the sacrificial terminal, and the second end of the sacrificial wiring may include a sacrificial contact portion. The sacrificial contact portion may include a dummy wiring overlapping the second end of the sacrificial wiring and a dummy connection electrode connecting the second end of the sacrificial wiring and the dummy wiring.

[0013] In an embodiment, the sacrificial wiring may extend from the sacrificial terminal toward the bending region, and may be bent toward the data output wiring to shield the data contact portion.

[0014] In an embodiment, the sacrificial wiring may be bent at least once.

[0015] In an embodiment, the sacrificial wiring may be disposed in the same layer as the common voltage transmission line, or an organic layer may be disposed between the sacrificial wiring and the common voltage transmission line.

[0016] In an embodiment, a display device in another embodiment includes: a substrate including a display area and a non-display area, and a pixel is in the display area; a common voltage transmission line, which is arranged in the non-display area and transmits a common voltage to the pixel; a data output wiring, which is arranged in the non-display area and connected to a data line that transmits a data voltage to the pixel; a pad portion, which is arranged in the non-display area and includes a first terminal that outputs the common voltage and a second terminal that outputs a voltage higher than the common voltage; and a sacrificial wiring, which is arranged between the common voltage transmission line and the data output wiring, connected to the pad portion, and not connected to the data line.

[0017] In an embodiment, the display device may further include a high potential wiring extending from the second terminal and connected to the sacrificial wiring. The second terminal may output at least one of a gate high voltage, a driving voltage, and a ground voltage to the high potential wiring.

[0018] In an embodiment, the display device may further include a data driver disposed in the non-display area. The non-display area may include a bending area. The data output wiring may include a first portion extending from the data driver toward the bending area, a second portion connected to the first portion and passing through the bending area, a third portion connected to the second portion and extending toward the display area, and a data contact portion electrically connecting the second portion and the third portion. The sacrificial wiring may extend toward the bending area and may be bent toward the data output wiring to shield the data contact portion.

[0019] In an embodiment, the sacrificial wiring may include a shape bent at least once.

[0020] In an embodiment, the sacrificial wiring may be disposed in the same layer as the common voltage transmission line, or an organic layer may be disposed between the sacrificial wiring and the common voltage transmission line.

[0021] In an embodiment, a display device in another embodiment may include: a substrate including a display area and a non-display area, and a pixel is in the display area; a common voltage transmission line is arranged in the non-display area and transmits a common voltage to the pixel; a data output wiring is arranged in the non-display area and connected to a data line that transmits a data voltage to the pixel; a crack detection line is arranged in the non-display area and transmits a crack detection voltage; and a sacrificial wiring is arranged between the common voltage transmission line and the data output wiring, connected to the crack detection line, and not connected to the data line.

[0022] In an embodiment, the display device may further include a data driver disposed in the non-display area. The non-display area may include a bending area. The data output wiring may include a first portion extending from the data driver toward the bending area, a second portion connected to the first portion and passing through the bending area, a third portion connected to the second portion and extending toward the display area, and a data contact portion electrically connecting the second portion and the third portion. The sacrificial wiring may extend from the crack detection line toward the bending area, and may be bent toward the data output wiring to shield the data contact portion.

[0023] In an embodiment, the sacrificial wiring may be bent at least once.

[0024] In an embodiment, the sacrificial wiring may be disposed in the same layer as the common voltage transmission line, or an organic layer may be disposed between the sacrificial wiring and the common voltage transmission line.

[0025] A display device in another embodiment of the present disclosure includes: a substrate including a display area and a non-display area, wherein a pixel is in the display area; a common voltage transmission line disposed in the non-display area and transmitting a common voltage to the pixel; a data output wiring disposed in the non-display area and connected to a data line transmitting a data voltage to the pixel; a plurality of touch wirings disposed in the non-display area and including a ground wiring; and a sacrificial wiring connected to the ground wiring and not connected to the data line. The ground wiring extends parallel to a touch wiring adjacent to the ground wiring among the plurality of touch wirings and is not connected to a touch sensor disposed in the display area.

[0026] In an embodiment, the display device may further include a data driver disposed in the non-display area. The non-display area may include a bending area. The data output wiring may include a first portion extending from the data driver toward the bending area, a second portion connected to the first portion and passing through the bending area, a third portion connected to the second portion and extending toward the display area, and a data contact portion electrically connecting the second portion and the third portion. The first end of the sacrificial wiring may be connected to the ground wiring, and the second end of the sacrificial wiring may shield the data contact portion.

[0027] In an embodiment, the sacrificial wiring may be disposed in the same layer as the common voltage transmission line, or an organic layer may be disposed between the sacrificial wiring and the common voltage transmission line.

[0028] According to the embodiment, corrosion caused by the potential difference between adjacent wirings can be delayed or prevented. Therefore, a display device with improved environmental reliability can be provided. According to the embodiment, a sacrificial wiring can be arranged between adjacent wirings where a potential difference occurs to delay the corrosion of the wiring and reduce the degree of corrosion. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other exemplary embodiments, advantages and features of the present disclosure will become more apparent by further describing exemplary embodiments of the present disclosure in detail with reference to the accompanying drawings, in which:

[0030] Figure 1 is a schematic perspective view of an embodiment showing a usage state of a display device;

[0031] Figure 2 is an exploded perspective view of an embodiment of a display device;

[0032] Figure 3 is a schematic plan view of an embodiment of wiring of a display panel;

[0033] Figure 4 is a schematic cross-sectional view of an embodiment of a display area of ​​a display panel;

[0034] Figure 5 is an enlarged arrangement diagram of an embodiment of a second peripheral area of ​​a display panel;

[0035] Figure 6 Yes Figure 5 A partial enlarged view of an embodiment of region A;

[0036] Figure 7 and Figure 8 is along Figure 6 A cross-sectional view taken along line AA' of an embodiment;

[0037] Fig. 9 is along Figure 6 A cross-sectional view taken along line BB' of ; and

[0038] Figures 10 to 18 is an enlarged view of an embodiment of the periphery of the bending area. DETAILED DESCRIPTION

[0039] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the present disclosure are shown. As those skilled in the art will appreciate, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

[0040] In order to clearly describe the present disclosure, parts or portions irrelevant to the description are omitted, and the same or similar constituent elements are denoted by the same reference numerals throughout the specification.

[0041] In addition, in the drawings, the size and thickness of each element are arbitrarily shown for ease of description, and the present disclosure is not necessarily limited to those shown in the drawings. In the drawings, the thickness of layers, films, panels, regions, areas, etc. are exaggerated for clarity. In the drawings, the thickness of some layers and areas is exaggerated for ease of description.

[0042] It will be understood that when an element such as a layer, film, region, area, or substrate is referred to as being "on" or "over" another element, the element may be directly on the other element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements. Furthermore, in the specification, the term "on..." or "over..." means positioned or disposed on or below an object part, and does not necessarily mean positioned or disposed on the upper side of the object part based on the direction of gravity.

[0043] In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “comprising” or “including”, will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0044] Furthermore, throughout the specification, the phrase “in a plan view” or “on a plane” means observing a target portion from the top, and the phrase “in a cross-sectional view” or “in a cross section” means observing a cross section formed by vertically cutting the target portion from the side.

[0045] In addition, throughout the specification, "connected" means not only when two or more elements are directly connected, but also when two or more elements are indirectly connected through other elements, and when they are physically connected or electrically connected, and further, it can be represented by different names depending on position or function, and can also be referred to as a case where respective parts that are substantially integrated are linked to each other.

[0046] In addition, throughout the specification, when it is mentioned that an element such as a wiring, layer, film, zone, region, substrate, plate or constituent element "extends in the first direction or the second direction (or extends along the first direction or the second direction)", this not only means a straight line shape extending straight in the corresponding direction, but may mean a structure that basically extends in the first direction or the second direction, is partially bent, has a zigzag structure, or extends while having a curved structure.

[0047] In the drawings, symbols "DR1", "DR2", and "DR3" are used to indicate directions, wherein "DR1" is a first direction, "DR2" is a second direction perpendicular to the first direction, and "DR3" is a third direction perpendicular to the first direction and the second direction. In addition, unless otherwise specified, the overlap of two components means that the two components overlap in the third direction DR3 (e.g., in a direction perpendicular to the upper surface of the substrate).

[0048] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0049] Unless otherwise defined herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless expressly so defined herein, terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense.

[0050] In the following, we will Figures 1 to 3 A schematic structure of a display device is described.

[0051] Figure 1 is a schematic perspective view showing an embodiment of a use state of a display device, Figure 2 is an exploded perspective view of an embodiment of a display device, and Figure 3 is a schematic plan view of an example of wiring of a display panel.

[0052] refer to Figure 1 , the display device 1000 in the embodiment can display moving images or still images. The display device 1000 can be used for display screens of portable electronic devices (such as mobile phones, smart phones, tablet personal computers ("PCs"), mobile communication terminals, electronic notes, electronic books, portable multimedia players ("PMPs"), navigation devices, or ultra-mobile PCs ("UMPCs"), etc.) and various products (such as televisions, laptop computers, monitors, billboards, or Internet of Things ("IoT") products, etc.). In addition, the display device 1000 in the embodiment can be used for wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays ("HMDs"). For ease of description, Figure 1 It is shown that the display device 1000 is used as a smartphone.

[0053] The display device 1000 may display an image in the third direction DR3 at a display surface parallel to the first direction DR1 and the second direction DR2. The display surface on which the image is displayed may correspond to a front surface of the display device 1000 and may correspond to a front surface of the cover window WU.

[0054] In the illustrated embodiment, the front surface (or upper surface) and the rear surface (or lower surface) of each member are defined based on the direction in which the image is displayed. The front surface and the rear surface may face away from each other in the third direction DR3, and the normal direction of each of the front surface and the rear surface may be parallel to the third direction DR3. The separation distance between the front surface and the rear surface in the third direction DR3 may correspond to the thickness of the display device 1000 in the third direction DR3.

[0055] The display device 1000 in the embodiment can detect a user's input applied from the outside. The user's input may include various types of external inputs, such as a part of the user's body, light, heat, or pressure, etc. The user's input may be provided in various forms.

[0056] refer to Figure 1 and Figure 2 , the display device 1000 may include a cover window WU, a housing HM, a display panel DP, and an optical element ES. In an embodiment, the cover window WU and the housing HM may be coupled to form an appearance of the display device 1000.

[0057] The cover window WU may include an insulating panel. In an embodiment, for example, the cover window WU may include glass, plastic, or any combination thereof, or may be composed of, for example, glass, plastic, or any combination thereof. The front surface of the cover window WU may define the front surface of the display device 1000. The transmission area TA may be an optically transparent area.

[0058] The blocking area BA may define the shape of the transmission area TA. The blocking area BA may be adjacent to the transmission area TA and may surround the transmission area TA. The blocking area BA may be an area having a relatively low light transmittance compared to the transmission area TA. The blocking area BA may include an opaque material that blocks light. The blocking area BA may have a predetermined color.

[0059] The display panel DP may include a display area DA and a non-display area PA surrounding the display area DA. The display area DA may be an area in which pixels operate to emit light according to electrical signals. The display panel DP may include a touch sensor layer capable of sensing touch. In an embodiment, the display area DA may be an area in which an image is displayed by including pixels, and may be an area in which a touch sensor TE (see FIG. 1 ) is provided above the pixels in the third direction DR3. Figure 3 ) to sense the area of ​​external input.

[0060] A light emitting element and a pixel circuit portion that generates a light emitting current and transmits the light emitting current to each of the plurality of light emitting elements may be formed in the display area DA. In an embodiment, for example, one light emitting element and one pixel circuit portion are also referred to as a pixel PX. A pixel PX may be defined as the smallest unit of light emission.

[0061] The display area DA may include an assembly area EA, and specifically, may include a first assembly area EA1 and a second assembly area EA2. The first assembly area EA1 and the second assembly area EA2 are shown to be spaced apart from each other, but at least a portion of the first assembly area EA1 may be connected to at least a portion of the second assembly area EA2. The first assembly area EA1 or the second assembly area EA2 may be an area in which a component using infrared light, visible light, sound, or the like is disposed thereunder.

[0062] The optical element ES may be disposed under the display panel DP. The optical element ES may include a first optical element ES1 overlapping the first assembly area EA1 and a second optical element ES2 overlapping the second assembly area EA2.

[0063] The first optical element ES1 may be an electronic element that uses light. In an embodiment, for example, the first optical element ES1 may be a sensor that receives and uses light (e.g., an infrared sensor), a sensor that outputs and senses light to measure distance or recognize fingerprints, or a small lamp that outputs light. The first optical element ES1 may be replaced by an electronic element that uses sound (such as a speaker that outputs sound). The electronic element that uses light may use light of various wavelength bands such as visible light, infrared light, or ultraviolet light. The second optical element ES2 may be at least one of a camera, an infrared camera, a dot projector, an infrared illuminator, and a time-of-flight sensor.

[0064] The non-display area PA of the display panel DP may at least partially overlap the blocking area BA of the cover window WU. The non-display area PA may be an area covered by the blocking area BA. The non-display area PA may be adjacent to the display area DA and may surround the display area DA. An image may not be displayed in the non-display area PA, and a driving circuit portion or driving wiring, etc. for driving the display area DA may be provided. The non-display area PA may include a first peripheral area PA1 provided outside the display area DA and a peripheral area PA2 including a data driver 50, a connection wiring, and a bending area (e.g., Figure 3 In the embodiment, as shown in FIG. Figure 2 As shown in , for example, the first peripheral area PA1 may be disposed at three sides of the display area DA, and the second peripheral area PA2 may be disposed at the remaining side of the display area DA.

[0065] The second peripheral area PA2 may include Figure 3The display area DA and the first peripheral area PA1 may have a flat state substantially parallel to a plane defined by the first direction DR1 and the second direction DR2, and one side of the second peripheral area PA2 may extend from the flat state to have a flat state again after passing through the bending area BDA. At least a portion of the second peripheral area PA2 may be bent and assembled to be disposed at the rear surface of the display area DA. In an embodiment, the second peripheral area PA2 may not be bent.

[0066] The data driver 50 may be disposed on the second peripheral area PA2, and may be disposed on the bent portion, or may be disposed at one side of the opposite sides of the bent portion. The data driver 50 may be provided in the form of a chip.

[0067] The data driver 50 may be electrically connected to the display area DA to transmit an electrical signal to the display area DA. In an embodiment, for example, the data driver 50 may provide a data signal to the pixel PX disposed in the display area DA. The data driver 50 may include various circuits or may be designed to provide various electrical signals to the display area DA.

[0068] refer to Figure 3 , Figure 3 The pad portion 80 may be disposed at an end of the second peripheral area PA2 of the display panel DP, and the pad portion 80 may be electrically connected to a flexible printed circuit board FPCB including a controller 85. The controller 85 disposed at the flexible printed circuit board FPCB may include a controller for driving the display device 1000 (see Figure 2 ) or a connector for power supply, etc. In an embodiment, for example, the controller 85 may include a touch driver and may be electrically connected to the touch sensor TE provided in the display area DA through the touch wiring 40. The controller 85 may be provided as an integrated circuit chip provided (e.g., mounted) on the flexible printed circuit board FPCB. The touch driver may be provided (e.g., mounted) as a separate driving chip. In an embodiment, a rigid printed circuit board ("PCB") may be used instead of the flexible printed circuit board FPCB.

[0069] refer to Figure 3 The display panel DP may include a substrate 110 including a display area DA and a non-display area PA. The non-display area PA may include a first peripheral area PA1 surrounding at least a portion of the display area DA and a second peripheral area PA2 disposed under the display area DA.

[0070] The display panel DP includes pixels PX. The pixels PX may be arranged in the display area DA. Each of the plurality of pixels PX includes a light emitting element and a pixel circuit portion connected to the light emitting element. In an embodiment, for example, each pixel PX may emit red light, green light, blue light or white light, and may include, for example, an organic light emitting diode.

[0071] The display panel DP may include signal lines and a pad portion 80. The signal lines may include a gate line GL, a data line DL, a driving voltage line PL, a driving voltage transmission line 60 or a common voltage transmission line 70, and the like.

[0072] The gate lines GL may extend across the display area DA in a first direction DR1 and may be spaced apart from each other in a second direction DR2 crossing the first direction DR1. The gate lines GL may be connected to the gate driver 20 to receive a gate signal.

[0073] The data line DL and the driving voltage line PL may extend across the display area DA in the second direction DR2 and may be spaced apart from each other in the first direction DR1. The data line DL may be connected to the data driver 50 to receive a data signal.

[0074] The driving voltage transmission line 60 may be disposed in the non-display area PA. The driving voltage transmission line 60 may be connected to the driving voltage line PL and may transmit a driving voltage.

[0075] The common voltage transmission line 70 may be disposed in the non-display area PA. The common voltage transmission line 70 may be disposed to surround the display area DA. The common voltage transmission line 70 may transmit a common voltage to an electrode of a light emitting element constituting a pixel PX.

[0076] The gate driver 20 may be disposed at opposite sides of the display area DA in the first direction DR1. The gate driver 20 may generate a gate signal to transmit the generated gate signal to the pixel PX through the gate line GL. The pixel PX may receive the gate signal from two gate drivers 20 disposed at opposite sides.

[0077] For example, the data driver 50 may be disposed at one side of the display panel DP and may be disposed in the second peripheral area PA2. The data driver 50 may generate a data voltage to be applied to each pixel PX to transfer the generated data voltage to each data line DL.

[0078] The bending area BDA, the data driver 50, and the pad portion 80 may be disposed in the second peripheral area PA2 of the non-display area PA.

[0079] The bending area BDA may extend across the display panel DP in the first direction DR1 in the second peripheral area PA2. The bending area BDA may be an area between the display area DA and the data driver 50. The bending area BDA may be an area that is bendable or in a bent state. The portion bent at the bending area BDA to be disposed outside the bending area BDA may be bent toward the rear side of the display panel DP so that the bent portion is not visible from the front side. Wiring may pass through the bending area BDA, and a plurality of wirings may extend from the bending area BDA approximately in the second direction DR2.

[0080] The pad portion 80 may be disposed at one edge of the display panel DP and may be disposed outside the bending area BDA. That is, the bending area BDA may be disposed between the display area DA and the pad portion 80.

[0081] The pad portion 80 may include terminals P1, P2, P3, and P4 that may be disposed along the first direction DR1. The terminals P1, P2, P3, and P4 may be electrically connected to the terminals FPCB_P of the flexible printed circuit board FPCB. The flexible printed circuit board FPCB may transmit a signal or power of the controller 85 to the display panel DP through the terminals P1, P2, P3, and P4 of the pad portion 80.

[0082] The controller 85 may change an image signal transmitted from the outside into an image data signal, and transmit the changed signal to the data driver 50 through the terminal P1. In addition, the controller 85 may receive a vertical synchronization signal, a horizontal synchronization signal, and a clock signal to generate a control signal for controlling the driving of the gate driver 20 and the data driver 50. The generated control signal may be transmitted to the gate driver 20 and the data driver 50 through the terminal P1. The controller 85 transmits a driving voltage to the driving voltage transmission line 60 through the terminal P2. In addition, the controller 85 may transmit a common voltage to each of the plurality of common voltage transmission lines 70 through the terminal P4. The controller 85 may transmit a touch driving signal to the touch wiring 40 through the terminal P3.

[0083] The data output wiring 30 and the control line 25 may be disposed in the non-display area PA. The data output wiring 30 may extend from the data driver 50 to the display area DA. The data output wiring 30 may supply a data voltage received from the data driver 50 to the data line DL. The gate control line 25 may extend from the data driver 50 to the gate driver 20. The gate control line 25 may supply a gate control signal received from the data driver 50 to the gate driver 20.

[0084] The driving voltage transmission line 60 is disposed in the non-display area PA. In an embodiment, for example, the driving voltage transmission line 60 may be disposed between the data driver 50 and the display area DA. The driving voltage transmission line 60 provides a driving voltage to the pixel PX. In an embodiment, for example, the driving voltage transmission line 60 may be disposed in the first direction DR1 and may be connected to the driving voltage line PL disposed in the second direction DR2.

[0085] The common voltage transmission line 70 is disposed in the non-display area PA. The common voltage transmission line 70 may have a shape surrounding the substrate 110. The common voltage transmission line 70 may transmit a common voltage to one electrode (eg, a cathode) of a light emitting element included in the pixel PX.

[0086] Figure 4 is a schematic cross-sectional view of a display area of ​​a display panel. Figure 4 The portion shown in FIG. 1 may correspond to the display area DA (see FIG. Figure 3 ) in an approximate three pixel region.

[0087] The display panel may generally include a substrate 110, a first transistor T1 and a second transistor T2 formed over the substrate 110, and a light emitting element (or light emitting device) LED connected to the first transistor T1. The light emitting element LED may correspond to a pixel PX (see Figure 3 ).

[0088] The substrate 110 may be a flexible substrate including a polymer such as polyimide, polyamide, or polyethylene terephthalate, etc. The substrate 110 may also be a glass substrate.

[0089] The barrier layer 111 may be disposed on the substrate 110 to prevent the penetration of moisture or oxygen, etc. The barrier layer 111 may include a material such as silicon nitride (SiN x ), silicon oxide (SiO x ) or silicon oxynitride (SiO x N y ) and the like, and may have a single layer or multiple layers.

[0090] The buffer layer 120 may be disposed on the barrier layer 111. The buffer layer 120 may improve the characteristics of the semiconductor layer by blocking impurities from the substrate 110 during formation of the semiconductor layer, and may relieve stress of the semiconductor layer by planarizing the surface of the substrate 110. The buffer layer 120 may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The buffer layer 120 may also include amorphous silicon.

[0091] The semiconductor layers A1 and A2 may be disposed on the buffer layer 120. The semiconductor layers A1 and A2 may include a first region, a second region, and a channel region between the first region and the second region.

[0092] The first gate insulating layer 141 may be disposed on the semiconductor layers A1 and A2. The first gate insulating layer 141 may include, for example, silicon nitride (SiN x ), silicon oxide (SiO x ) or silicon oxynitride (SiO x N y ) and the like, and may have a single layer or multiple layers.

[0093] A first gate conductive layer including gate electrodes G1 and G2, etc., may be disposed on the first gate insulating layer 141. Each component of the first gate conductive layer may include or be composed of the same material in the same process. The first gate conductive layer may include a metal or metal alloy such as molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), etc., and may be a single layer or a multilayer.

[0094] The second gate insulating layer 142 may be disposed on the first gate conductive layer. The second gate insulating layer 142 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may have a single layer or multiple layers.

[0095] A second gate conductive layer, which may include an upper electrode C2 of a storage capacitor, etc., may be disposed on the second gate insulating layer 142. The upper electrode C2 may overlap the gate electrode G1, and the upper electrode C2, the gate electrode G1, and the second gate insulating layer 142 between the upper electrode C2 and the gate electrode G1 may constitute a storage capacitor. Each component of the second gate conductive layer may include the same material or be composed of the same material in the same process. The second gate conductive layer may include a metal or a metal alloy such as molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), etc., and may be a single layer or a multilayer.

[0096] The first intermediate insulating layer 161 may be disposed on the second gate conductive layer. The first intermediate insulating layer 161 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may have a single layer or multiple layers. When the first intermediate insulating layer 161 is a multilayer, the lower layer may include silicon nitride, and the upper layer may include silicon oxide.

[0097] A first data conductive layer including first electrodes SE1 and SE2 and second electrodes DE1 and DE2 may be disposed on the first intermediate insulating layer 161. The first electrode SE1 and the second electrode DE1 may be connected to the first region and the second region of the semiconductor layer A1, respectively, through contact holes defined in the insulating layers 141, 142, and 161. One of the first electrode SE1 and the second electrode DE1 may be a source electrode, and the other of the first electrode SE1 and the second electrode DE1 may be a drain electrode. The first electrode SE2 and the second electrode DE2 may be connected to the first region and the second region of the semiconductor layer A2, respectively, through contact holes defined in the insulating layers 141, 142, and 161. One of the first electrode SE2 and the second electrode DE2 may be a source electrode, and the other of the first electrode SE2 and the second electrode DE2 may be a drain electrode. Each component of the first data conductive layer may include or consist of the same material in the same process.

[0098] The first data conductive layer may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) or copper (Cu), etc., and may be a single layer or multiple layers. In an embodiment, for example, the first data conductive layer may include a lower layer, an intermediate layer and an upper layer, the lower layer including a refractory metal such as molybdenum, chromium, tantalum or titanium, the intermediate layer including a metal with a relatively low resistivity such as aluminum, copper or silver, etc., and the upper layer including a refractory metal. In an embodiment, for example, the first data conductive layer may have a three-layer structure such as titanium / aluminum / titanium (Ti / Al / Ti).

[0099] The semiconductor layer A1, the gate electrode G1, the first electrode SE1, and the second electrode DE1 may constitute a first transistor T1. The first transistor T1 may be a driving transistor or a transistor connected to one electrode of the driving transistor. The semiconductor layer A2, the gate electrode G2, the first electrode SE2, and the second electrode DE2 may constitute a second transistor T2. The second transistor T2 may be a transistor connected to the gate electrode G1.

[0100] The first planarization layer 181 may be disposed on the first data conductive layer. The first planarization layer 181 may be an organic insulating layer. In an embodiment, for example, the first planarization layer 181 may include an organic insulating material such as poly(methyl methacrylate) or a general polymer such as polystyrene, a polymer derivative having a phenol group, an acryl-based polymer, an imide-based polymer such as polyimide, or a siloxane-based polymer.

[0101] A second data conductive layer including a driving voltage line PL and a first connection electrode LE1, etc., may be disposed on the first planarization layer 181. The first connection electrode LE1 may be connected to the second electrode DE1 of the first transistor T1 through a contact hole defined in the first planarization layer 181. The second data conductive layer may include or be composed of the same material in the same process. The second data conductive layer may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) or copper (Cu), etc., and may be a single layer or multiple layers. In an embodiment, for example, the second data conductive layer may have a three-layer structure such as titanium / aluminum / titanium (Ti / Al / Ti).

[0102] The second planarization layer 182 may be disposed on the second data conductive layer. The second planarization layer 182 may be an organic insulating layer. In an embodiment, for example, the second planarization layer 182 may include an organic insulating material such as poly(methyl methacrylate) or a general polymer such as polystyrene, a polymer derivative having a phenol group, an acryl-based polymer, an imide-based polymer such as polyimide, a siloxane-based polymer, etc.

[0103] A third data conductive layer including a data line DL and a second connection electrode LE2 may be disposed on the second planarization layer 182. The second connection electrode LE2 may be connected to the first connection electrode LE1 through a contact hole defined in the second planarization layer 182. The third data conductive layer may include the same material or be composed of the same material in the same process. The third data conductive layer may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), copper (Cu), etc., and may be a single layer or a multilayer. In an embodiment, for example, the third data conductive layer may have a three-layer structure such as titanium / aluminum / titanium (Ti / Al / Ti).

[0104] Although it has been described above that the second data conductive layer includes the driving voltage line PL and the third data conductive layer includes the data line DL, in embodiments, the first data conductive layer or the second data conductive layer may include the driving voltage line PL and / or the data line DL. The signal line included in each data conductive layer may be changed differently.

[0105] Each conductive layer (eg, the first gate conductive layer, the second gate conductive layer, the first data conductive layer, the second data conductive layer, or the third data conductive layer) disposed in the display area DA may include a conductive layer disposed in the non-display area PA (see FIG. Figure 3) in various wiring portions. In an embodiment, for example, the first data conductive layer, the second data conductive layer and / or the third data conductive layer may include a plurality of wiring portions passing through the plurality of data conductive layers. Figure 3 The driving voltage transmission line 60, the common voltage transmission line 70 or the data output wiring 30 of the bending area BDA in the non-display area PA will be referred to below. Figure 5 describe.

[0106] The third planarization layer 183 may be disposed on the third data conductive layer. The third planarization layer 183 may be an organic insulating layer. In an embodiment, for example, the third planarization layer 183 may include an organic insulating material such as poly(methyl methacrylate) or a general polymer such as polystyrene, a polymer derivative having a phenol group, an acryl-based polymer, an imide-based polymer such as polyimide, a siloxane-based polymer, etc.

[0107] A pixel conductive layer including a pixel electrode 191 may be disposed on the third planarization layer 183. The pixel electrode 191 may be connected to the second connection electrode LE2 by passing through a contact hole in the third planarization layer 183. The pixel electrode 191 may be electrically connected to the second electrode DE1 to receive a driving current for controlling the brightness of the light emitting element LED. The pixel conductive layer may include the same material or be composed of the same material in the same process. The pixel conductive layer may include a metal such as silver (Ag), lithium (Li), calcium (Ca), aluminum (Al), magnesium (Mg) or gold (Au). The pixel conductive layer may include a transparent conductive oxide ("TCO") such as indium tin oxide ("ITO") or indium zinc oxide ("IZO").

[0108] The pixel defining layer 360 may be disposed on the pixel conductive layer. A pixel opening 365A, 365B, or 365C overlapping the pixel electrode 191 may be defined in the pixel defining layer 360. The pixel defining layer 360 may include an organic insulating material such as poly(methyl methacrylate) or a general polymer such as polystyrene, a polymer derivative having a phenol group, an acryl-based polymer, an imide-based polymer such as polyimide, or a siloxane-based polymer. The pixel defining layer 360 may be a black pixel defining layer 360 including a black dye or pigment. The black pixel defining layer 360 may improve contrast and may prevent reflection by a metal layer disposed thereunder.

[0109] The light-emitting layers 370A, 370B, and 370C (also collectively referred to as the light-emitting layers 370) may be disposed on the pixel electrode 191. At least a portion of the light-emitting layers 370A, 370B, and 370C may be disposed in the pixel openings 365A, 365B, and 365C. The light-emitting layers 370A, 370B, and 370C may include a material layer that uniquely emits light of a basic color such as red, green, or blue. The light-emitting layers 370A, 370B, and 370C may have a structure in which a material layer emitting light of different colors is stacked. In addition to the light-emitting layers 370A, 370B, and 370C, at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer may be disposed on the pixel electrode 191.

[0110] The common electrode 270 may be disposed on the light emitting layers 370A, 370B, and 370C and the pixel defining layer 360. The common electrode 270 may be provided in common for all pixels PX. The common electrode 270 may include a metal such as calcium (Ca), barium (Ba), magnesium (Mg), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or lithium (Li). The common electrode 270 may include a transparent conductive oxide ("TCO") such as indium tin oxide ("ITO") or indium zinc oxide ("IZO").

[0111] The pixel electrode 191, the light emitting layers 370A, 370B, and 370C, and the common electrode 270 form a light emitting element LED. The pixel electrode 191 may be an anode of the light emitting element LED, and the common electrode 270 may be a cathode of the light emitting element LED.

[0112] The encapsulation layer 390 may be disposed on the common electrode 270. The encapsulation layer 390 may encapsulate the light emitting element LED to prevent moisture and oxygen from penetrating from the outside. The encapsulation layer 390 may be a thin film encapsulation layer including one or more inorganic layers and one or more organic layers. In an embodiment, for example, the encapsulation layer 390 may have a three-layer structure of inorganic layer / organic layer / inorganic layer.

[0113] The touch sensor layer may be disposed on the encapsulation layer 390 .

[0114] The touch sensor layer may include a first insulating layer 410 disposed on the encapsulation layer 390. The first insulating layer 410 may cover the encapsulation layer 390 to protect the encapsulation layer 390 and may prevent moisture from penetrating. The first insulating layer 410 may reduce parasitic capacitance between the common electrode 270 and the touch electrode 451.

[0115] A first touch conductive layer including a bridge 452 and the like may be disposed on the first insulating layer 410, and a second insulating layer 420 may be disposed on the first touch conductive layer. A second touch conductive layer including a touch electrode 451 may be disposed on the second insulating layer 420, and a passivation layer 430 may be disposed on the second touch conductive layer.

[0116] The touch electrode 451 may include a first touch electrode and a second touch electrode forming a mutual inductance capacitor. The bridge 452 may electrically connect the first touch electrode or the second touch electrode. In an embodiment, for example, the first touch electrodes adjacent to each other and separated from each other may be connected to the bridge 452 through a contact hole defined in the second insulating layer 420, and may be electrically connected through the bridge 452.

[0117] The first insulating layer 410 and the second insulating layer 420 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may be a single layer or multiple layers. The passivation layer 430 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, or may include an organic material such as an acryl-based polymer or a polyimide-based resin.

[0118] The first touch electrode layer and the second touch electrode layer may have a mesh shape in which an opening overlapping with the pixel PX is defined. The first touch electrode layer may include the same material or be composed of the same material in the same process. The second touch electrode layer may include the same material or be composed of the same material in the same process. Each of the first touch electrode layer and the second touch electrode layer may include a metal such as aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), silver (Ag), chromium (Cr) or nickel (Ni).

[0119] The anti-reflection part 300 may be disposed above the touch sensor layer. The anti-reflection part 300 may prevent external light incident from the outside from being reflected by wiring and the like and being recognized.

[0120] Figure 5 is an enlarged layout diagram of an embodiment of the second peripheral area of ​​the display panel. The wiring structure of the second peripheral area will refer to Figure 4 Description of the cross-sectional structure.

[0121] refer to Figure 5 Combined with Figure 3, the driving voltage transmission line 60 may include a first portion 61 extending from the terminal P2 of the pad portion 80 toward the bending area BDA, a second portion 62 connected to the first portion 61 and passing through the bending area BDA, and a third portion 63 connected to the second portion 62 and extending toward the display area DA. The second portion 62 of the driving voltage transmission line 60 may be disposed in the bending area BDA and the periphery of the bending area BDA. The driving voltage transmission line 60 may be connected to the driving voltage line PL of the display area DA to supply a driving voltage to the pixel PX.

[0122] The driving voltage transmission line 60 may include or consist of at least one of the plurality of conductive layers constituting the display area DA. The second portion 62 of the driving voltage transmission line 60 included in the bending area BDA may have the same layer position as the first portion 61 and the third portion 63 in the cross section, or may have a different layer position than the first portion 61 and the third portion 63 in the cross section.

[0123] In the embodiments, for example, reference is made to Figure 4 , the first portion 61 of the driving voltage transmission line 60 may be disposed in the same layer as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA, and may be formed in the same process as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA. That is, the first portion 61 of the driving voltage transmission line 60 may be formed as a first data conductive layer. The second portion 62 of the driving voltage transmission line 60 may be disposed in the same layer as the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA, and may be formed in the same process as the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA. That is, the second portion 62 of the driving voltage transmission line 60 may be formed as a second data conductive layer.

[0124] The common voltage transmission line 70 may include a first portion 71 extending from the terminal P4 of the pad portion 80 toward the bending area BDA, a second portion 72 connected to the first portion 71 and passing through the bending area BDA, and a third portion 73 connected to the second portion 72 and extending toward the display area DA. The third portion 73 of the common voltage transmission line 70 may include a shielding portion 73a extending and protruding in the first direction DR1. The common voltage transmission line 70 may transmit a common voltage to each pixel PX.

[0125] The common voltage transmission line 70 may include at least one of the plurality of conductive layers constituting the display area DA. The second portion 72 of the common voltage transmission line 70 disposed in the bending area BDA may have the same layer position as the first portion 71 and the third portion 73 in the cross section, or may have a different layer position than the first portion 71 and the third portion 73 in the cross section.

[0126] In the embodiments, for example, reference is made to Figure 4 , the first portion 71 of the common voltage transmission line 70 may be disposed in the same layer as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA, and may be formed in the same process as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA. That is, the first portion 71 of the common voltage transmission line 70 may be formed as a first data conductive layer. The second portion 72 of the common voltage transmission line 70 passing through the bending area BDA may be disposed in the same layer as the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA, and may be formed in the same process as the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA. That is, the second portion 72 of the common voltage transmission line 70 may be formed as a second data conductive layer. The shielding portion 73a of the common voltage transmission line 70 may be disposed around the bending area BDA, and may include or consist of a second data conductive layer.

[0127] The wiring formed in the first data conductive layer may be connected to the wiring formed in the second data conductive layer through a contact hole penetrating the first planarization layer 181. The wiring formed in the second data conductive layer may be connected to the wiring formed in the third data conductive layer through a contact hole penetrating the second planarization layer 182. The wiring formed in the first data conductive layer and the wiring formed in the third data conductive layer may be connected through a contact hole penetrating the first planarization layer 181 and the second planarization layer 182.

[0128] Therefore, the wiring formed in each conductive layer can be connected to a wiring to which the same voltage is applied using a contact hole penetrating an insulating layer provided between the conductive layers.

[0129] The touch wiring 40 may be connected to the terminal P3 of the pad portion 80 and may be connected to the touch sensor TE (see FIG. 1 ) provided in the display area DA. Figure 3 ) provides a touch driving signal. The touch wiring 40 may include a first touch conductive layer or a second touch conductive layer or be composed of the first touch conductive layer or the second touch conductive layer. The touch wiring 40 may include a ground wiring disposed in the non-display area PA and at least partially surrounding the display area DA.

[0130] The data output wiring 30 may include a first portion 31 extending from the terminals S1 and S2 of the data driver 50 toward the bending area BDA, a second portion 32 connected to the first portion 31 and passing through the bending area BDA, and a third portion 33 connected to the second portion 32 and extending toward the display area DA. The data output wiring 30 may be connected to each of the terminals S1 and S2 of the data driver 50 to transmit a data voltage received from the data driver 50 to the data line.

[0131] The data output wiring 30 may include or consist of at least one of the plurality of conductive layers constituting the display area DA. The second portion 32 of the data output wiring 30 included in the bending area BDA may have the same layer position as the first portion 31 and the third portion 33 in the cross section, or may have a different layer position than the first portion 31 and the third portion 33 in the cross section.

[0132] In the embodiments, for example, reference is made to Figure 4 , the first portion 31 of the data output wiring 30 adjacent to the data driver 50 may be formed as a first gate conductive layer including the gate electrodes G1 and G2 of the display area DA or a second gate conductive layer including the upper electrode C2 of the storage capacitor. The second portion 32 of the data output wiring 30 passing through the bending area BDA may include or consist of a second data conductive layer including the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA. The third portion 33 of the data output wiring 30 after passing through the bending area BDA may be formed as a first gate conductive layer or a second gate conductive layer to extend to the display panel.

[0133] The wiring formed in the first gate conductive layer can be connected to the wiring formed in the second gate conductive layer through the contact hole defined in the second gate insulating layer 142. The wiring formed in the second gate conductive layer can be connected to the wiring formed in the second data conductive layer through the contact hole passing through the first intermediate insulating layer 161 and the first planarizing layer 181. Therefore, the wiring formed in each conductive layer can be connected to the wiring to which the same voltage is applied using the contact hole penetrating the insulating layer provided between the conductive layers.

[0134] refer to Figure 5, in a plan view, the third portion 33 of the data output wiring 30 may overlap the touch wiring 40. Therefore, coupling or noise may occur at the touch wiring 40 according to a voltage change of a signal applied to the data output wiring 30. In an embodiment, a shielding portion 73a as a portion of the common voltage transmission line 70 extending and protruding in the first direction DR1 may be formed between the touch wiring 40 and the data output wiring 30, thereby protecting (shielding) the voltage characteristics of the touch wiring 40 from voltage fluctuations in another portion.

[0135] In an embodiment, for example, the third portion 33 of the data output wiring 30 may be formed as a first gate conductive layer, and the touch wiring 40 may be formed as a first touch conductive layer. The shielding portion 73a of the common voltage transmission line 70 may be formed as any one of a first data conductive layer, a second data conductive layer, and a third data conductive layer disposed between the first gate conductive layer and the first touch conductive layer. That is, the third portion 33 of the data output wiring 30, the shielding portion 73a as a part of the common voltage transmission line 70, and the touch wiring 40 may be sequentially disposed from the bottom in the third direction DR3.

[0136] Therefore, since the touch wiring 40 may not be affected by the voltage fluctuation of the data output wiring 30 , it is possible to prevent the occurrence of noise and coupling of signals.

[0137] When a portion of the common voltage transmission line 70 extends as the shielding portion 73a, the common voltage transmission line 70 and the data output wiring 30 may be disposed adjacent to each other. Therefore, corrosion may occur due to the potential difference between the common voltage transmission line 70 and the data output wiring 30 adjacent to the common voltage transmission line 70. The greater the potential difference between adjacent wirings, the faster the corrosion occurs, and the smaller the potential difference, the slower the corrosion occurs. The following embodiments can prevent or delay the corrosion of the data output wiring 30 by reducing the potential difference between the common voltage transmission line 70 and the data output wiring 30 adjacent to the common voltage transmission line 70.

[0138] Figure 6 Yes Figure 5 A partial enlarged view of an embodiment of area A.

[0139] The shielding portions 73a and 73b of the common voltage transmission line 70 may be disposed above and below the bending area BDA based on the bending area BDA. In an embodiment, for example, the shielding portions 73a and 73b may be disposed around the bending area BDA and may be formed as a second data conductive layer.

[0140] Based on the bending area BDA, the touch wiring 40 may include a first portion 41 disposed below the bending area BDA, a second portion 42 passing through the bending area BDA, and a third portion 43 disposed above the bending area BDA. The touch wiring 40 may transmit a touch drive signal to the touch sensor layer. The touch wiring 40 may include a first portion 41 disposed below the bending area BDA, a second portion 42 passing through the bending area BDA, and a third portion 43 disposed above the bending area BDA. Figure 3 ) and at least partially surrounds the display area DA (see Figure 3 ) ground wiring.

[0141] In an embodiment, the first portion 41 and the third portion 43 of the touch wiring 40 may be formed as a first touch conductive layer or a second touch conductive layer, and the second portion 42 of the touch wiring 40 passing through the bending area BDA may be formed as a second data conductive layer. The first portion 41 and the second portion 42 of the touch wiring 40 may be connected through a contact hole defined in the contact portion CNT1a, and the second portion 42 and the third portion 43 of the touch wiring 40 may be connected through a contact hole defined in the contact portion CNT1b.

[0142] The data output wiring 30 may transfer the data voltage to the data line of the display area DA through the first portion 31 extending from the data driver 50, the second portion 32 passing through the bending area BDA and the periphery of the bending area BDA, and the third portion 33 connected to the second portion 32 and extending toward the display area. The second portion 32 of the data output wiring 30 passing through the bending area BDA may extend across the bending area BDA and may be electrically connected to the third portion 33 through the data contact portion CNT3.

[0143] refer to Figure 6 , the shielding portion 73a, which is a portion of the common voltage transmission line 70 extending and protruding in the first direction DR1, may be disposed adjacent to the data contact portion CNT3 of the data output wiring 30, and when a voltage difference between the two wirings occurs, corrosion may occur at the data output wiring 30 having a relatively high potential.

[0144] In an embodiment, the common voltage applied to the common voltage transmission line 70 may be a constant voltage of negative polarity. For example, the data voltage applied to the data output wiring 30 disposed adjacent to the common voltage transmission line 70 may be a relatively high potential voltage. In an embodiment, for example, the common voltage applied to the common voltage transmission line 70 may be approximately -2.5 volts (V), and the data voltage applied to the data output wiring 30 may be approximately 5V. In this case, the potential difference between the two wirings may be approximately 7.5V, and when a potential difference occurs between adjacent wirings, the high potential wiring may corrode under environmental reliability conditions (e.g., a moisture permeable environment). Therefore, corrosion may occur at the data contact portion CNT3 of the data output wiring 30 that transmits the data signal, resulting in a display panel DP (see Figure 3 ) defects.

[0145] In an embodiment, the sacrificial wiring 10 may be disposed between the shielding portion 73a of the common voltage transmission line 70 and the data contact portion CNT3 of the data output wiring 30. The data driver 50 may include a sacrificial terminal S0 for applying a voltage to the sacrificial wiring 10. One end of the sacrificial wiring 10 may be connected to the sacrificial terminal S0 to receive a predetermined voltage, and the other end of the sacrificial wiring 10 may not be connected to a wiring disposed in the display area DA. In an embodiment, for example, the sacrificial wiring 10 may not be connected to the data line DL (see FIG. 1 ) of the display area DA. Figure 3 ), so that even when the sacrificial wiring 10 is damaged, the driving of the display panel DP is not affected.

[0146] The sacrificial terminal S0 may be arranged at the data driver 50, and a predetermined voltage may be applied to the sacrificial wiring 10. The output value of the sacrificial terminal S0 may be determined as a voltage between the voltage levels of two adjacent wirings. In an embodiment, the sacrificial terminal S0 may replicate the output of the first terminal S1 adjacent to the sacrificial terminal S0 to output the replicated output without being fixed to a predetermined voltage. In other words, the sacrificial terminal S0 may output the same voltage as the voltage of the first terminal S1. In this case, the voltage difference between the output signal of the sacrificial terminal S0 and the output signal of the first terminal S1 may not occur. This may be advantageous in terms of corrosion.

[0147] The sacrificial wiring 10 may be disposed between the common voltage transmission line 70 and the data output wiring 30 , and may be connected to the sacrificial terminal S0 of the data driver 50 to receive a voltage higher than the common voltage and lower than or equal to the data voltage.

[0148] In an embodiment, for example, the common voltage applied to the common voltage transmission line 70 may be about -5V, and the data voltage output from the first terminal S1 connected to the data output wiring 30 may be about +5V. In this case, the sacrificial terminal S0 may output an intermediate potential between the common voltage (about -5V) and the data voltage (about +5V) or a voltage equal to the data voltage. The sacrificial terminal S0 may copy the data voltage (about +5V) of the first terminal S1 to output the data voltage (about +5V) of the first terminal S1. Therefore, the potential difference between the two wirings may be reduced, so that the corrosion of the data output wiring 30 including the data contact portion CNT3 may be delayed or prevented.

[0149] The sacrificial wiring 10 may be connected at the sacrificial terminal S0 to be arranged across the bending area BDA in the second direction DR2. The sacrificial wiring 10 may be arranged between the common voltage transmission line 70 and the data output wiring 30. The sacrificial wiring 10 may be arranged to extend from the sacrificial terminal S0 and to cross between the shielding portion 73a of the common voltage transmission line 70 and the data contact portion CNT3 of the data output wiring 30.

[0150] In an embodiment, the sacrificial wiring 10 may be bent at least once to ensure a sufficient length in a relatively small area. In an embodiment, for example, the sacrificial wiring 10 may extend in the second direction DR2, may be bent and extended in the opposite direction of the first direction DR1, and may then be bent and extended in the opposite direction of the second direction. That is, the sacrificial wiring 10 may be bent twice to be arranged in a C-shape. In an alternative embodiment, the sacrificial wiring 10 may be bent four times in the same manner to be arranged in a The sacrificial wiring 10 may be arranged in an I-shape without being bent. The length, number of bends, and shape of the sacrificial wiring 10 may be variously changed.

[0151] exist Figure 6 , the description has been made based on the wiring arranged above the bending area BDA, but the shielding portion 73b of the common voltage transmission line 70 can be arranged below the bending area BDA, and the corrosion of the data output wiring 30 can be prevented or delayed by arranging a sacrificial wiring (not shown) between the common voltage transmission line 70 and the data output wiring 30.

[0152] Figure 7 and Figure 8 It is along Figure 6 A cross-sectional view taken along line AA' of an embodiment.

[0153] Figure 7 and Figure 8 With the setting Figure 4 The display area DA of the display device (see Figure 3) in the same order as the stacking structure, and Figure 7 and Figure 8 Some components are omitted. Detailed description of the configurations that are the same as those of the previous embodiment is omitted. The omitted configurations follow the description of the previous embodiment.

[0154] refer to Figure 7 , including gate electrodes G1 and G2 (see Figure 4 ) may be disposed on the first gate insulating layer 141. The first gate conductive layer may include a metal or a metal alloy such as molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may be a single layer or a multilayer.

[0155] The second gate insulating layer 142 may be disposed on the first gate conductive layer. The second gate insulating layer 142 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may be a single layer or a multi-layer.

[0156] Data output wiring 30 (see Figure 6 ) may be disposed on the second gate insulating layer 142. The third portion 33 of the data output wiring 30 may be connected to the upper electrode C2 (see FIG. 1 ) of the storage capacitor of the display area DA. Figure 4 ) is disposed in the same layer and may be formed in the same process as the upper electrode C2 of the storage capacitor of the display area DA. That is, the third portion 33 of the data output wiring 30 may be formed as a second gate conductive layer. In an embodiment, the third portion 33 of the data output wiring 30 may be formed as a first gate conductive layer. The second gate conductive layer may include a metal or a metal alloy such as molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may be a single layer or multiple layers.

[0157] The first intermediate insulating layer 161 may be disposed on the second gate conductive layer. The first intermediate insulating layer 161 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may be a single layer or a multi-layer.

[0158] The first planarization layer 181 may be disposed on the first intermediate insulating layer 161. The first planarization layer 181 may be an organic insulating layer.

[0159] The sacrificial wiring 10 and the common voltage transmission line 70 (see Figure 6 ) may be disposed on the first planarization layer 181. The sacrificial wiring 10 and the shielding portion 73a may be connected to the driving voltage line PL (see FIG. Figure 4 ) and the first connection electrode LE1 (see Figure 4) is disposed in the same layer and may be formed in the same process as the driving voltage line PL and the first link electrode LE1 of the display area DA. That is, the sacrificial wiring 10 and the shielding portion 73a may be formed as a second data conductive layer.

[0160] Reference together Figure 6 The sacrificial wiring 10 may be disposed to cross between the common voltage transmission line 70 including the shielding portion 73a and the data output wiring 30 in a plan view, and may be disposed in the same layer (e.g., the second data conductive layer) as the common voltage transmission line 70 in a cross section. The sacrificial wiring 10 may have an intermediate potential between the potential of the common voltage transmission line 70 and the potential of the data output wiring 30 to reduce a potential difference between adjacent wirings, or may have the same voltage as that of the data output wiring 30 adjacent to the sacrificial wiring 10, and may be corroded instead of the data output wiring 30.

[0161] The second planarization layer 182 may be disposed on the second data conductive layer. The second planarization layer 182 may be an organic insulating layer. The pixel defining layer 360 and the spacer 365 may be disposed above or on the second planarization layer 182. The first insulating layer 410 and the second insulating layer 420 constituting the touch sensor layer may be disposed above or on the second planarization layer 182, the pixel defining layer 360, and the spacer 365. The passivation layer 430 may be disposed on the touch sensor layer.

[0162] Figure 8 Examples and Figure 7 The embodiment of the present invention is different in that the sacrificial wiring 10 and the shielding portion 73a are provided in different layers. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0163] refer to Figure 8 , the sacrificial wiring 10 may be disposed on the first intermediate insulating layer 161. The sacrificial wiring 10 may be disposed in the display area DA (see Figure 3 ) in the first electrodes SE1 and SE2 (see Figure 4 ) and the second electrodes DE1 and DE2 (see Figure 4 ) are disposed in the same layer and may be formed in the same process as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA. That is, the sacrificial wiring 10 may be formed as a first data conductive layer.

[0164] The first planarization layer 181 may be disposed on the sacrificial wiring 10. The first planarization layer 181 may be an organic insulating layer. In an embodiment, for example, the first planarization layer 181 may include an organic insulating material such as poly(methyl methacrylate) or a general polymer such as polystyrene, a polymer derivative having a phenol group, an acryl-based polymer, an imide-based polymer such as polyimide, or a siloxane-based polymer. The first planarization layer 181 may include an organic insulating material so that ions move in a moisture permeable environment.

[0165] Common voltage transmission line 70 (see Figure 6 ) may be disposed on the first planarization layer 181. The shielding portion 73a may be aligned with the driving voltage line PL (see FIG. Figure 4 ) and the first connection electrode LE1 (see Figure 4 ) is disposed in the same layer and may be formed in the same process as the driving voltage line PL and the first link electrode LE1 of the display area DA. That is, the shielding portion 73a may be formed as a second data conductive layer.

[0166] exist Figure 8 In the embodiment of the present invention, the sacrificial wiring 10 and the shielding portion 73a of the common voltage transmission line 70 are arranged in different layers, and the first planarization layer 181 is an organic insulating layer and is interposed between the sacrificial wiring 10 and the shielding portion 73a. Since ions can move within the organic layer under a moisture permeable environment, corrosion can occur due to the potential difference between the sacrificial wiring 10 and the common voltage transmission line 70.

[0167] That is, even when the sacrificial wiring 10 and a wiring adjacent to the sacrificial wiring 10 are arranged in different layers with an organic layer interposed therebetween, the sacrificial wiring 10 can be corroded instead of the adjacent wiring, so that corrosion of the adjacent wiring is prevented or delayed.

[0168] Fig. 9 It is along Figure 6 A cross-sectional view taken along line BB'. Fig. 9 yes Figure 6 Detailed description of the same configuration as that of the aforementioned embodiment is omitted.

[0169] refer to Fig. 9 , data output wiring 30 (see Figure 6 ) may be disposed on the second gate insulating layer 142. The third portion 33 of the data output wiring 30 may be aligned with the display area DA (see Figure 3 ) of the storage capacitor C2 (see Figure 4) is disposed in the same layer and may be formed in the same process as the upper electrode C2 of the storage capacitor of the display area DA. That is, the third portion 33 of the data output wiring 30 may be formed as a second gate conductive layer. The second gate conductive layer may include a metal or a metal alloy such as molybdenum (Mo), aluminum (Al), copper (Cu) or titanium (Ti), and may be a single layer or multiple layers. In an embodiment, the third portion 33 of the data output wiring 30 may be formed as a first gate conductive layer.

[0170] The first intermediate insulating layer 161 may be disposed on the second gate conductive layer. The first intermediate insulating layer 161 may include an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, and may be a single layer or multiple layers. An opening OP1 patterned to expose a portion of the third portion 33 of the data output wiring 30 may be defined in the first intermediate insulating layer 161.

[0171] The connection electrode 35 may be disposed on the first intermediate insulating layer 161. The connection electrode 35 may be connected to the first electrodes SE1 and SE2 (see FIG. 1 ) disposed in the display area DA. Figure 4 ) and the second electrodes DE1 and DE2 (see Figure 4 ) is disposed in the same layer and may be formed in the same process as the first electrodes SE1 and SE2 and the second electrodes DE1 and DE2 disposed in the display area DA. That is, the connection electrode 35 may be formed as a first data conductive layer. The connection electrode 35 may overlap the opening OP1 of the first intermediate insulating layer 161 and may be connected to the third portion 33 of the data output wiring 30. A portion of the connection electrode 35 may be disposed within the opening OP1.

[0172] The first planarization layer 181 may be disposed on the first intermediate insulating layer 161 and the connection electrode 35 . The first planarization layer 181 may be an organic insulating layer. An opening OP2 patterned to expose a portion of the connection electrode 35 may be defined in the first planarization layer 181 .

[0173] The second portion 32 of the data output wiring 30 may be disposed on the first planarization layer 181. The second portion 32 of the data output wiring 30 may be aligned with the driving voltage line PL (see FIG. 1 ) disposed in the display area DA. Figure 4 ) and the first connection electrode LE1 (see Figure 4) is disposed in the same layer and may be formed in the same process as the driving voltage line PL and the first connection electrode LE1 disposed in the display area DA. That is, the second portion 32 of the data output wiring 30 may be formed as a second data conductive layer. The second portion 32 of the data output wiring 30 may overlap with the opening OP2 of the first planarization layer 181 and may be connected to the connection electrode 35. A portion of the second portion 32 of the data output wiring 30 may be disposed within the opening OP2 of the first planarization layer 181.

[0174] The data contact portion CNT3 may include a connection electrode 35 and second and third portions 32 and 33 of the data output wiring 30 overlapping the connection electrode 35. The second portion 32 of the data output wiring 30 may be electrically connected to the third portion 33 of the data output wiring 30 through the data contact portion CNT3 including the connection electrode 35.

[0175] exist Figures 7 to 9 In the embodiment, the common voltage transmission line 70 is formed as the second data conductive layer and the sacrificial wiring 10 is formed as the first data conductive layer or the second conductive layer, but the common voltage transmission line 70 and the sacrificial wiring 10 may be formed as the third data conductive layer including the data line DL or the second connection electrode LE2 of the display area DA. In the embodiment, the common voltage transmission line 70, the data output wiring 30, and the sacrificial wiring 10 disposed between the common voltage transmission line 70 and the data output wiring 30 in a plan view may be formed in different ways using the first data conductive layer, the second data conductive layer, and / or the third data conductive layer disposed in the display area DA. In addition, the sacrificial wiring 10 may be disposed in the same layer as the common voltage transmission line 70 and / or the data output wiring 30 in a cross section, or the sacrificial wiring 10 and the common voltage transmission line 70 (or the data output wiring 30) may be disposed in different layers and an organic layer may be interposed between the sacrificial wiring 10 and the common voltage transmission line 70 (or the data output wiring 30).

[0176] Figures 10 to 18 is an enlarged view of an embodiment of the periphery of the bending area.

[0177] Fig.10 Examples and Figure 6 The embodiment of the present invention is different in that the sacrificial wiring 10 further includes sacrificial contact portions CNT10a and CNT10b. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0178] refer to Fig.10, the sacrificial contact portion CNT10a may be disposed between the shielding portion 73a of the common voltage transmission line 70 and the data contact portion CNT3 of the data output wiring 30. In addition, the shielding portion 73b of the common voltage transmission line 70 may be disposed under the bending area BDA, and the sacrificial contact portion CNT10b may be disposed between the shielding portion 73b and the data output wiring 30.

[0179] The sacrificial contact portions CNT10a and CNT10b may be connected to the data output wiring 30. Fig. 9 In the embodiment, for example, the sacrificial contact portions CNT10a and CNT10b may be at a portion of the sacrificial wiring 10, and include a dummy wiring overlapping the portion of the sacrificial wiring 10, and portions of the sacrificial wiring 10 and the dummy wiring corresponding to the second portion 32 and the third portion 33 of the data output wiring 30, respectively, and the connection electrode 35 constituting the data contact portion CNT3 (see Fig. 9 ) is connected to a dummy connection electrode. A portion of the sacrificial wiring 10 may be disposed in the same layer as the second portion 32 of the data output wiring 30, the dummy wiring may be disposed in the same layer as the third portion 33 of the data output wiring 30, and the dummy connection electrode may be disposed in the same layer as the connection electrode 35 of the data contact portion CNT3. One end of the dummy wiring overlaps a portion of the sacrificial wiring 10 and the dummy connection electrode, and the other end of the dummy wiring is not connected to the other portion.

[0180] The sacrificial wiring 10 may be connected to the sacrificial terminal S0 to receive a predetermined voltage or an adjacent data voltage. The sacrificial terminal S0 may output a voltage level between the voltage level of the common voltage transmission line 70 and the voltage level of the data output wiring 30, or may replicate the data voltage of the first terminal S1 connected to the data output wiring 30 to output the replicated data voltage of the first terminal S1.

[0181] One end of the sacrificial wiring 10 may be connected to the sacrificial terminal S0 to receive a voltage higher than the common voltage and lower than or equal to the data voltage. Therefore, the corrosion of the data output wiring 30 may be prevented or delayed by reducing the potential difference between the wirings adjacent to the sacrificial wiring 10. The other end of the sacrificial wiring 10 may include sacrificial contact portions CNT10a and CNT10b formed in the same process as the data contact portion CNT3, and may be corroded instead of the data contact portion CNT3.

[0182] Fig.11 and Fig.12 Examples and Figure 6The embodiment of the present invention is different in that the sacrificial wiring 10 overlaps the data output wiring 30 and shields the data contact portion CNT3. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0183] The sacrificial wiring 10 may be disposed on the common voltage transmission line 70 (see Figure 6 ) between the shielding portion 73a of the common voltage transmission line 70 and the data contact portion CNT3 of the data output wiring 30. The sacrificial wiring 10 may be connected to the sacrificial terminal S0 of the data driver 50 through the contact portion CNT2, and may be arranged across the bending area BDA. The sacrificial terminal S0 may output a voltage that is the same as the output value of the first terminal S1 applied to the data output wiring 30, or may output a potential between the potential of the common voltage transmission line 70 and the potential of the data output wiring 30. The sacrificial terminal S0 may copy the data voltage of the first terminal S1 adjacent to the sacrificial terminal S0 to output the copied data voltage.

[0184] The end of the sacrificial wiring 10 is bent toward the third portion 33 of the data output wiring 30 to shield the data contact portion CNT3 of the data output wiring 30 adjacent to the sacrificial wiring 10. The end of the sacrificial wiring 10 may be bent at least once to shield the data contact portion CNT3 of the data output wiring adjacent to the sacrificial wiring 10. A portion of the sacrificial wiring 10 may overlap with the third portion 33 of the data output wiring in a plan view, and may shield the data contact portion CNT3. The length, number of bends, and shape of the sacrificial wiring 10 may be variously changed.

[0185] In an embodiment, for example, Fig.11 As shown in , the sacrificial wiring 10 may cross the bending area BDA to extend along the second direction DR2, may be bent toward the third portion 33 of the data output wiring 30 to extend along the first direction DR1, and may shield the data contact portion CNT3. Fig.12 As shown in , the sacrificial wiring 10 may cross the bending area BDA to extend along the second direction DR2, then may be bent toward the third portion 33 of the data output wiring 30 to extend along the first direction DR1, then may be bent and extended again in the second direction DR2, then may be bent and extended in the opposite direction of the first direction DR1, then may be bent and extended again in the second direction DR2, and then may be bent and extended again in the first direction DR1 to shield the data contact portion CNT3. In an embodiment, the second portion 42 and the third portion 43 of the touch wiring 40 may be connected through a contact hole defined in the contact portion CNT1.

[0186] Fig.13 and Fig.14 Examples and Figure 6The embodiment of FIG. 8 is different in that the sacrificial wiring 10 is connected to the terminal P10 of the pad portion 80 . Fig.14 Examples and Fig.13 The embodiment of the present invention is different in that the sacrificial wiring 10 shields the data contact portion CNT3. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0187] exist Figures 6 to 12 In the embodiment of FIG. 1 , the sacrificial wiring 10 is connected to the sacrificial terminal S0 of the data driver 50, but in the embodiment shown, the high potential wiring 12 of the pad portion 80 is used without providing a separate sacrificial terminal. That is, the sacrificial wiring 10 may be connected to the high potential wiring 12 connected to the terminal P10 of the pad portion 80. One end of the sacrificial wiring 10 may be connected to the high potential wiring 12 to receive a predetermined voltage, and the other end of the sacrificial wiring 10 may not be connected to the high potential wiring 12 provided in the display area DA (see FIG. 1 ). Figure 3 ) in the wiring (e.g., data line DL (see Figure 3 ) or driving voltage line PL (see Figure 3 )wait).

[0188] In an embodiment, for example, the high potential wiring 12 connected to the pad portion 80 may extend from the terminal P10 of the pad portion 80 toward the bending area BDA, and may be connected to the sacrificial wiring 10 through the contact portions CNT5a and CNT5b near the bending area BDA. The high potential wiring 12 may be formed as a first gate conductive layer or a second gate conductive layer, and may be connected to the sacrificial wiring 10 formed as a first data conductive layer or a second data conductive layer through the contact portion CNT5. In an embodiment, for example, the high potential wiring 12 may be a wiring that transmits a gate high voltage, a driving voltage, a ground voltage, or the like.

[0189] The sacrificial wiring 10 can be connected to the high potential wiring 12 to receive a voltage higher than the common voltage (eg, a gate high voltage, a driving voltage, or a ground voltage, etc.). Therefore, the common voltage transmission line 70 (see Figure 6 ) and the voltage difference between the data output wiring 30, so that the corrosion of the data output wiring 30 including the data contact portion CNT3 is prevented or delayed.

[0190] Since the high potential wiring 12 extending from the pad portion 80 is formed to be disposed on the first intermediate insulating layer 161 (see FIG. 1 ) which is an inorganic insulating layer. Figure 7 ) below the first gate conductive layer or the second gate conductive layer, so the high potential wiring 12 can be unaffected by the corrosion of the sacrificial wiring 10.

[0191] refer to Fig.13, the sacrificial wiring 10 may be connected to the contact portions CNT5a and CNT5b through the high potential wiring 12 extending from the terminal P10 of the pad portion 80, and may be arranged across the bending area BDA. The sacrificial wiring 10 may be arranged between the shielding portion 73a of the common voltage transmission line 70 and the data contact portion CNT3 of the data output wiring 30. In an embodiment, the sacrificial wiring 10 may be bent at least once to ensure sufficient length in a relatively small area. The length, number of bends, and shape of the sacrificial wiring 10 may be changed variously.

[0192] In an embodiment, for example, one end of the contact portion CNT5a of the sacrificial wiring 10 connected to the high potential wiring 12 may cross the bending area BDA to extend along the second direction DR2, and then may be bent and extended in the first direction DR1 toward the data output wiring 30, and then may be bent and extended in the opposite direction of the second direction DR2. The other end of the sacrificial wiring 10 may be connected to the contact portion CNT5b of the high potential wiring 12.

[0193] In an embodiment, the sacrificial wiring 10 may be provided to shield the data contact portion CNT3 of the data output wiring 30. In an embodiment, for example, referring to Fig.14 , one end of the contact portion CNT5a of the sacrificial wiring 10 connected to the high potential wiring 12 may cross the bending area BDA to extend along the second direction DR2, and then may be bent and extended toward the third portion 33 of the data output wiring 30 in the first direction DR1 to shield the data contact portion CNT3, and then may be bent and extended in the opposite direction of the second direction DR2, and then may be bent and extended in the opposite direction of the first direction DR1, and then may be bent and extended again in the opposite direction of the second direction DR2. The other end of the sacrificial wiring 10 may be connected to the contact portion CNT5b of the high potential wiring 12. A portion of the sacrificial wiring 10 may overlap with the third portion 33 of the data output wiring 30 in a plan view, and may shield the data contact portion CNT3.

[0194] exist Fig.13 and Fig.14 In the embodiment, both ends of the sacrificial wiring 10 are connected to the high potential wiring 12 to define a closed curve, but in the embodiment, one end of the sacrificial wiring 10 may be open.

[0195] Fig.15 and Fig.16 Examples and Figure 6 The embodiment of FIG. 1 is different in that the sacrificial wiring 10 is connected to the crack detection line 90 . Fig.16 Examples and Fig.15The embodiment of the present invention is different in that the sacrificial wiring 10 shields the data contact portion CNT3. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0196] refer to Fig.15 , a crack detection line 90 for detecting a crack of the display panel may be provided between the bending area BDA and the data driver 50. In an embodiment, for example, the crack detection line 90 may extend in the first direction DR1 and may be connected to the signal transmission wiring 91. The crack detection line 90 and the signal transmission wiring 91 may be connected through a switching element SW1 that is turned on according to a gate signal. A gate electrode of the switching element SW1 may be connected to a terminal S8 of the data driver 50, a first electrode of the switching element SW1 may be connected to the crack detection line 90, and a second electrode of the switching element SW1 may be connected to the signal transmission wiring 91.

[0197] The crack detection line 90 may transmit a crack detection voltage (also referred to as a crack sensing voltage) MCD for detecting a crack of the display panel. The crack detection voltage MCD may be supplied through the crack detection line 90 and may be transmitted to the signal transmission wiring 91 through the switching element SW1. The signal transmission wiring 91 may be connected to one or more data lines.

[0198] When the circuit is normally driven, the output voltage of the terminal S9 provided in the data driver 50 may be applied to the signal transmission wiring 91 to be transmitted to the data line. When a test of the circuit is performed, the switch element SW1 may be turned on by the gate voltage output from the terminal S8, and the crack detection voltage MCD applied to the crack detection line 90 may be applied to the signal transmission wiring 91 to be transmitted to the data line through the switch element SW1. The crack detection voltage MCD may be a voltage that causes the pixel PX (see FIG. 1 ) connected to the data line to be turned on. Figure 3 ) shows the relatively high potential voltage of the highest grayscale.

[0199] refer to Fig.15 The sacrificial wiring 10 may be connected to the crack detection line 90 through the contact portions CNT5a and CNT5b and may be arranged across the bending area BDA. One end of the sacrificial wiring 10 may be connected to the crack detection line 90 to receive the crack detection voltage MCD, and the other end of the sacrificial wiring 10 may not be connected to the crack detection line 90 arranged in the display area DA (see FIG. Figure 3 ) in the wiring (e.g., data line DL (see Figure 3 ) or driving voltage line PL (see Figure 3 )wait).

[0200] The sacrificial wiring 10 may be disposed on the common voltage transmission line 70 (see Figure 6) between the shielding portion 73a of the data output wiring 30 and the data contact portion CNT3 of the data output wiring 30. In an embodiment, the sacrificial wiring 10 may be bent at least once to ensure a sufficient length in a relatively small area.

[0201] refer to Fig.16 , the sacrificial wiring 10 may be bent at least once toward the third portion 33 of the data output wiring 30 adjacent to the sacrificial wiring 10 to shield the data contact portion CNT3. A portion of the sacrificial wiring 10 may overlap the third portion 33 of the data output wiring 30 in a plan view and may shield the data contact portion CNT3. Fig.15 and Fig.16 In the embodiment, both ends of the sacrificial wiring 10 are connected to the crack detection line 90 via the wiring 11 to define a closed curve, but in the embodiment, one end of the sacrificial wiring 10 may be open. The length, number of bends, and shape of the sacrificial wiring 10 may be variously changed.

[0202] The sacrificial wiring 10 may be connected to the crack detection line 90 to receive the crack detection voltage MCD so that a voltage difference between the common voltage transmission line 70 and the data output wiring 30 is reduced. Therefore, corrosion of the data output wiring 30 including the data contact portion CNT3 may be prevented or delayed.

[0203] Fig.17 and Fig.18 Examples and Figure 6 The embodiment of FIG. 1 is different in that the sacrificial wiring 10 is connected to a portion of the touch wiring 40 . Fig.18 Examples and Fig.17 The embodiment of the present invention is different in that the sacrificial wiring 10 shields the data contact portion CNT3. Detailed description of the same configuration as that of the previous embodiment is omitted. The omitted configuration follows the description of the previous embodiment.

[0204] refer to Fig.17 , a touch wiring 40 connected to the pad portion 80 and extending in the second direction DR2 to be connected to the touch sensor layer is provided. The touch wiring 40 may be arranged approximately in parallel in the second direction DR2, and one of the plurality of touch wirings 40 may be a ground wiring 45 having a voltage of approximately 0V. From the viewpoint of preventing electrostatic discharge (“ESD”) of the touch sensor layer, the ground wiring 45 may be arranged in the display area DA (see FIG. 1 ). Figure 3 ) around to achieve the purpose of discharging static electricity. The ground wiring 45 may surround the touch sensor TE (see Figure 3 ) is provided in at least a portion of the display area DA of the display area DA. The ground wiring 45 may not be connected to the touch sensor TE of the display area DA.

[0205] refer to Fig.17, one end of the sacrificial wiring 10 may be connected to the ground wiring 45 in the touch wiring 40. The ground wiring 45 may be connected to the ground terminal TML3 of the pad portion 80 to receive a ground voltage. One end of the sacrificial wiring 10 may be connected to the ground wiring 45 to receive a ground voltage. The other end of the sacrificial wiring 10 may not be connected to a wiring (e.g., a data line DL (see FIG. 1 )) disposed in the display area DA. Figure 3 ) or driving voltage line PL (see Figure 3 ) etc.). In an embodiment, the second portion 42 may be connected to the terminal TML1 or TML2 of the pad portion 80 via the first portion 41.

[0206] The sacrificial wiring 10 may extend toward the data output wiring 30 along the first direction DR1, and then may be bent in the second direction DR2 to be disposed at the common voltage transmission line 70 (see FIG. 1 ). Figure 6 ) between the shielding portion 73a of the data output wiring 30 and the data contact portion CNT3 of the data output wiring 30. In an embodiment, the sacrificial wiring 10 may be bent at least once to ensure a sufficient length in a relatively small area. The length, number of bends, and shape of the sacrificial wiring 10 may be variously changed.

[0207] exist Fig.18 In an embodiment of the present invention, one end of the sacrificial wiring 10 may be connected to the ground wiring 45. The other end of the sacrificial wiring 10 may extend toward the data output wiring 30 along the first direction DR1, may then be bent and extended in the second direction DR2, and may then be bent and extended in the first direction DR1 again to be disposed to shield the data contact portion CNT3 of the data output wiring 30 adjacent to the sacrificial wiring 10. A portion of the sacrificial wiring 10 may overlap with the third portion 33 of the data output wiring 30 in a plan view, and may shield the data contact portion CNT3.

[0208] The sacrificial wiring 10 may be connected to the ground wiring 45 to apply a ground voltage (about 0V) which is a value between the common voltage and the data voltage, so that a voltage difference between the common voltage transmission line 70 and the data output wiring 30 is reduced. Therefore, corrosion of the data output wiring 30 including the data contact portion CNT3 may be prevented or delayed.

[0209] While the disclosure has been described in connection with what are presently considered to be practical embodiments, it is to be understood that the disclosure is not limited to the disclosed embodiments, but on the contrary is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A display device, characterized in that: The display device comprises: A substrate including a display area and a non-display area, wherein the pixels are in the display area; a common voltage transmission line, disposed in the non-display area and transmitting a common voltage to the pixel; a data output wiring disposed in the non-display area and connected to a data line that transmits a data voltage to the pixel; and A sacrificial wiring is provided between the common voltage transmission line and the data output wiring and is not connected to the data line.

2. The display device according to claim 1, characterized in that The display device further includes a data driver disposed in the non-display area. Wherein, the data driver comprises: a first terminal, outputting the data voltage; and A sacrificial terminal applies a predetermined voltage to the sacrificial wiring.

3. The display device according to claim 2, characterized in that: The sacrificial terminal applies a voltage higher than the common voltage and lower than or equal to the data voltage.

4. The display device according to claim 2, characterized in that: The non-display area includes a bending area, and The data output wiring includes a first portion extending from the data driver toward the bending area, a second portion connected to the first portion and passing through the bending area, a third portion connected to the second portion and extending toward the display area, and a data contact portion electrically connecting the second portion and the third portion.

5. The display device according to claim 4, characterized in that: A first end portion of the sacrificial wiring is connected to the sacrificial terminal, the sacrificial wiring includes a sacrificial contact portion at a second end portion of the sacrificial wiring, and The sacrificial contact portion includes a dummy wiring overlapping the second end portion of the sacrificial wiring and a dummy connecting electrode connecting the second end portion of the sacrificial wiring and the dummy wiring.

6. The display device according to claim 4, characterized in that: The sacrificial wiring extends from the sacrificial terminal toward the bending region, and is bent toward the data output wiring to shield the data contact portion.

7. The display device according to claim 1, characterized in that: The sacrificial wiring is bent at least once.

8. The display device according to claim 1, characterized in that: The sacrificial wiring is disposed in the same layer as the common voltage transmission line, or an organic layer is disposed between the sacrificial wiring and the common voltage transmission line.

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