Isolation current sampling circuit

Abstract

The utility model discloses an isolation current sampling circuit, and relates to the technical field of sampling circuits. The specific implementation scheme is as follows: a sampling resistor, a filtering loop, a compensation branch, an isolation sampling chip and a main control chip, two ends of the sampling resistor are connected with two ends of the filtering loop, the other end of the sampling resistor is also connected with GND1, one end of the compensation branch is connected with a pin 3 of the isolation sampling chip, the other end of the compensation branch is connected with GND1, and a pin 4 of the isolation sampling chip is connected with GND1; and the main control chip is connected with a pin 6 and a pin 7 of the isolation sampling chip. Compared with a common current sensor sampling circuit, the isolation current sampling circuit provided by the utility model does not need a current sensor, an operational amplifier and a common sampling chip, is simple in structure and lower in cost, and improves the sampling precision by adding a filtering loop and a compensation branch on an analog part in an original chip circuit.

Description

Technical Field

[0001] The utility model relates to the technical field of sampling circuits, in particular to an isolated current sampling circuit. Background Art

[0002] In the field of modern power electronics and electrical automation, it is crucial to accurately and in real time monitor and control the current parameters in DC circuits. However, in practical applications, we face a technical challenge: traditional current detection methods, such as current transformers, are not suitable for DC circuits.

[0003] The current transformer works based on the principle of electromagnetic induction. When AC current passes through the primary winding, an induced voltage is generated in the secondary winding, thereby indirectly measuring the current. However, since DC current does not have an alternating component and its magnetic flux is constant, it is impossible to generate an induced electromotive force on the secondary side of the current transformer, making it impossible to effectively detect DC current.

[0004] Therefore, in DC circuits, we use current sensors to sample current. Current sensors, such as Hall effect current sensors and Rogowski coils, can directly or indirectly sense and convert DC current signals into processable electrical signals. Although these sensors can effectively solve the problem of DC current detection, their sampling circuit designs are usually more complicated. Utility Model Content

[0005] Based on this, the utility model provides an isolated current sampling circuit to solve the problem of complex design of the traditional sampling circuit using a current transformer for current sampling.

[0006] The utility model provides an isolated current sampling circuit, comprising:

[0007] Sampling resistor, filter circuit, compensation branch, isolation sampling chip, main control chip;

[0008] The two ends of the sampling resistor are connected to the two ends of the filtering circuit, the other end of the sampling resistor is also connected to GND1, one end of the compensation branch is connected to pin 3 of the isolation sampling chip, the other end of the compensation branch is connected to GND1, and pin 4 of the isolation sampling chip is connected to GND1; the main control chip is connected to pins 6 and 7 of the isolation sampling chip.

[0009] The filtering circuit includes a filtering resistor and a filtering capacitor. One end of the filtering resistor is connected to one end of the sampling resistor, the other end of the filtering resistor is connected to one end of the filtering capacitor, and the other end of the filtering capacitor is connected to GND1.

[0010] Pin 2 of the isolation sampling chip is connected to a point between the filter resistor and the filter capacitor.

[0011] The compensation branch includes a compensation resistor, one end of the compensation resistor is connected to pin 3 of the isolation sampling chip, and the other end of the compensation resistor is connected to GND1.

[0012] Pin 1 of the isolation sampling chip is connected to VCC1, pin 3 of the isolation sampling chip is connected to VCC2, and pin 5 of the isolation sampling chip is connected to GND2.

[0013] The isolation sampling chip is a Σ-ΔADC isolation sampling chip; the analog part of the isolation sampling chip inputs a voltage signal of 0 to 64 mV, the digital part inputs a clock CLK of 10 MHZ and outputs a corresponding data bit DAT.

[0014] The filter resistor has a value of 10-100Ω.

[0015] The resistance value of the compensation resistor is equal to the resistance value of the filter resistor.

[0016] The main control chip is internally provided with a Sinc3 digital extraction filter for filtering high-frequency noise.

[0017] Beneficial effects: Compared with ordinary current sensor sampling circuits, the isolated current sampling circuit provided by the utility model does not require current sensors, operational amplifiers, or ordinary sampling chips, has a simple structure and lower cost, and adds filtering circuits and compensation branches to the analog part of the original chip circuit, thereby improving the sampling accuracy.

[0018] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present utility model, nor are they intended to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present utility model.

[0020] Figure 1 It is a principle diagram of a sampling circuit provided by the utility model;

[0021] Figure 2 This is the schematic diagram of the existing sampling circuit. DETAILED DESCRIPTION

[0022] The following is a description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0023] The utility model provides an isolated current sampling circuit, comprising:

[0024] Sampling resistor R1, filter circuit, compensation branch, isolation sampling chip U1, main control chip;

[0025] The two ends of the sampling resistor R1 are connected to the two ends of the filtering circuit, the other end of the sampling resistor R1 is also connected to GND1, one end of the compensation branch is connected to pin 3 of the isolation sampling chip U1, the other end of the compensation branch is connected to GND1, and pin 4 of the isolation sampling chip U1 is connected to GND1; the main control chip is connected to pins 6 and 7 of the isolation sampling chip U1.

[0026] The filtering circuit includes a filtering resistor R2 and a filtering capacitor C1, one end of the filtering resistor R2 is connected to one end of the sampling resistor R1, the other end of the filtering resistor R2 is connected to one end of the filtering capacitor C1, and the other end of the filtering capacitor C1 is connected to GND1.

[0027] Preferably, the current is converted into voltage through the sampling resistor R1, and the filter resistor R2 and the filter capacitor C1 form a filter circuit, which can filter out high-frequency noise in the input analog quantity. The voltage passes through the filter circuit to form a new waveform. The new waveform is the analog quantity and is input into the isolation sampling chip U1 through pin 2 of the isolation sampling chip U1.

[0028] The analog part and digital part inside the isolated sampling chip U1 are completely electrically isolated. The analog part is directly connected to the power circuit, and the digital part is directly connected to the control circuit, meeting the isolation requirements of the power circuit and the control circuit.

[0029] Pin 2 of the isolation sampling chip U1 is connected to a point between the filter resistor R2 and the filter capacitor C1.

[0030] The compensation branch includes a compensation resistor R3 , one end of the compensation resistor R3 is connected to pin 3 of the isolation sampling chip U1 , and the other end of the compensation resistor R3 is connected to GND1 .

[0031] Pin 1 of the isolation sampling chip U1 is connected to VCC1, pin 3 of the isolation sampling chip U1 is connected to VCC2, and pin 5 of the isolation sampling chip U1 is connected to GND2.

[0032] Furthermore, VCC1 is 5V, and VCC2 is the same as the power supply of the main control chip, which is generally 3.3V. The sampling resistor R1 is generally in the main power circuit, and has a large voltage difference with the control voltage VCC2, so VCC1 and VCC2 need to be isolated, and the isolation voltage is generally greater than 1500V.

[0033] The isolation sampling chip U1 is a Σ-ΔADC isolation sampling chip; the analog part of the isolation sampling chip U1 inputs a voltage signal of 0 to 64 mV, and the digital part inputs a 10 MHZ clock CLK and outputs a corresponding data bit DAT.

[0034] The main control chip outputs a 10MHZ clock CLK signal to the isolated sampling chip U1, and the isolated sampling chip U1 outputs a data bit DAT with a frequency of 10MHZ. When the analog value is -64mV, the probability that DAT is 0 is greater than 99.8%; when the analog value is 0mV, the probability that DAT is 0 is equal to 50%; when the analog value is 64mV, the probability that DAT is 1 is greater than 99.8%. In other words, the probability that DAT is 1 (or 0) corresponds to the size of the input analog value, and the corresponding relationship is linear within the range of -50mV to 50mV for the analog input.

[0035] The main control chip reads the data bit DAT at the falling edge of the 10MHZ clock CLK. DAT is equivalent to a digital signal with a sampling frequency of 10MHZ and a bit width of 1bit. After being processed by the Sinc3 digital extraction filter program inside the control chip, high-frequency noise can be filtered out and it becomes a digital signal with a sampling frequency of 300KHZ and a bit width of 16bit.

[0036] The value of the filter resistor R2 is 10-100Ω.

[0037] The resistance of the compensation resistor R3 is equal to the resistance of the filter resistor R2.

[0038] Adding compensation resistor R3, which is equal to R2, can effectively reduce the DC bias of the output data. When there is no current in the actual measurement (analog input 0mV), the output DC bias is greatly affected by R2 when there is no R3. The larger R2 is, the larger the DC bias is.

[0039] The main control chip is internally provided with a Sinc3 digital extraction filter for filtering high-frequency noise.

[0040] "SINC3" is a digital decimation filter. In the field of digital signal processing, it is mainly used to reduce the sampling rate while maintaining the spectral characteristics of the signal without aliasing. The filter is designed based on the SINC function (i.e. sin(x) / x function) and has ideal low-pass filtering characteristics.

[0041] Figure 1 The sampling circuit schematic diagram provided by the utility model is as follows: Figure 2 It is a schematic diagram of an existing sampling circuit; the present application adds a filter capacitor C1 as a filter branch in the analog part of the existing sampling circuit. The filter capacitor C1 and the filter resistor R2 form a first-order RC filter circuit, which can filter out high-frequency noise in the input analog quantity. When there is no current (analog input 0mV), the output AC ripple is about 0.4% without filter capacitor C1, and the output AC ripple is about 0.3% after adding filter capacitor C1. The compensation resistor R3 is added, and the compensation resistor R3 is equal to the filter resistor R2, which can effectively reduce the DC bias of the output data; when there is no current (analog input 0mV), the output DC bias is greatly affected by the filter resistor R2 when there is no compensation resistor R3. The larger the filter resistor R2, the larger the DC bias. When the filter resistor R2=100Ω, the DC bias is greater than 0.5%. After adding compensation resistor R3, the output DC bias is reduced by 0.1%. (The above tests are all processed by the Sinc3 digital extraction filter program and output 16-bit width data). The utility model adds a filter branch and a compensation branch to the analog part of the original chip circuit to improve the sampling accuracy.

[0042] The above is only a specific implementation of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. An isolated current sampling circuit, characterized in that: include: Sampling resistor, filter circuit, compensation branch, isolation sampling chip, main control chip; The two ends of the sampling resistor are connected to the two ends of the filtering circuit, the other end of the sampling resistor is also connected to GND1, one end of the compensation branch is connected to pin 3 of the isolation sampling chip, the other end of the compensation branch is connected to GND1, and pin 4 of the isolation sampling chip is connected to GND1; the main control chip is connected to pins 6 and 7 of the isolation sampling chip.

2. The isolated current sampling circuit according to claim 1, characterized in that: The filtering circuit includes a filtering resistor and a filtering capacitor. One end of the filtering resistor is connected to one end of the sampling resistor, the other end of the filtering resistor is connected to one end of the filtering capacitor, and the other end of the filtering capacitor is connected to GND1.

3. The isolated current sampling circuit according to claim 2, characterized in that: Pin 2 of the isolation sampling chip is connected to a point between the filter resistor and the filter capacitor.

4. The isolated current sampling circuit according to claim 3, characterized in that: The compensation branch includes a compensation resistor, one end of the compensation resistor is connected to pin 3 of the isolation sampling chip, and the other end of the compensation resistor is connected to GND1.

5. The isolated current sampling circuit according to claim 1, characterized in that: Pin 1 of the isolation sampling chip is connected to VCC1, pin 3 of the isolation sampling chip is connected to VCC2, and pin 5 of the isolation sampling chip is connected to GND2.

6. An isolated current sampling circuit according to any one of claims 1 to 5, characterized in that: The isolation sampling chip is a Σ-ΔADC isolation sampling chip; the analog part of the isolation sampling chip inputs a voltage signal of 0 to 64 mV, the digital part inputs a clock CLK of 10 MHZ and outputs a corresponding data bit DAT.

7. The isolated current sampling circuit according to claim 2, characterized in that: The filter resistor has a value of 10-100Ω.

8. The isolated current sampling circuit according to claim 4, characterized in that: The resistance value of the compensation resistor is equal to the resistance value of the filter resistor.

9. The isolated current sampling circuit according to claim 8, characterized in that: The main control chip is internally provided with a Sinc3 digital extraction filter for filtering high-frequency noise.

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