Current limiting circuit for protecting test chip and test system
By designing a current limiting circuit for semiconductor chip testing, the problem of excessive current load damage to the power supply is solved, effective limiting and protection of current is achieved, and the probability of damage to the test system is reduced.
Patent Information
- Application Number
- CN202420047957.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-08
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2034-01-08
AI Technical Summary
During semiconductor chip testing, it is easy to cause excessive current load, resulting in damage to the power supply.
Design a current limiting circuit to protect the test chip, including a power input terminal, a conversion integration unit, a current setting unit and a control switch. Through the current limiting switch module and a current limiting module, the current limiting and protection are achieved.
It effectively reduces the burden of current load in the circuit, reduces the chance of damage to the test system, and protects the chip to be tested and the power supply.
Smart Images
Figure CN222441352U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductor chip testing, in particular to a current limiting circuit and a testing system for protecting a test chip. Background Art
[0002] With the rapid development of electronic information technology, any link in the semiconductor supply chain needs to avoid devices with poor performance, which has led to high-standard chip testing requirements. The main purpose of chip testing is to verify whether the quality of the chip to be tested meets the standards required by customers, on the one hand to eliminate defective products, and on the other hand to improve the reliability of the chip.
[0003] In the semiconductor chip testing process of the prior art, the current is occasionally too large, that is, the actual current exceeds the standard range, causing the entire test circuit system to be affected. For example, when the actual current exceeds the standard range, there is a certain probability that the current load is too heavy, which directly damages the power supply. Therefore, the industry needs to design a circuit system to solve the above technical problems. Utility Model Content
[0004] The technical problem to be solved by the utility model is: how to design a current limiting circuit for protecting a test chip, which can effectively reduce the burden of the current load in the circuit and reduce the probability of damage to the test system.
[0005] To solve the above problems, the embodiments of the utility model propose a current limiting circuit and a test system for protecting the test chip. The inventor has found through research that when engineers test chips, the current load is likely to be too heavy, which directly damages the power supply. The reason is that the existence of defective chips causes abnormal circuit parameters. The present application solves the above problems. Even if a defective chip is encountered during the test, the burden of the current load in the circuit can be effectively reduced, reducing the probability of damage to the test system.
[0006] In the first aspect, an embodiment of the utility model proposes a current limiting circuit for protecting a test chip, wherein the circuit is connected to a chip to be tested during chip testing, and the current limiting circuit for protecting a test chip comprises: a power input terminal, a conversion integrated unit, a current setting unit, and a control switch; the positive pole of the power input terminal is connected to the IN pin of the conversion integrated unit, the positive pole of the power input terminal is connected to the control switch, the control switch is connected to the EN pin of the conversion integrated unit, and the negative pole of the power input terminal is grounded; the OUT pin of the conversion integrated unit is connected to the chip to be tested, the I SET pin of the conversion integrated unit is connected to the current setting unit, one end of the current setting unit is connected to the chip to be tested and the other end of the current setting unit is grounded.
[0007] Its further technical solution is that the conversion integrated unit includes a system driving module, an undervoltage lockout module, a temperature detection module, a current limiting module, and a current value detection module; the positive pole of the power input end is connected to the IN pin of the conversion integrated unit, the IN pin of the conversion integrated unit is connected to the undervoltage lockout module, the undervoltage lockout module is connected to the system driving module, the control switch is connected to the EN pin of the conversion integrated unit, and the EN pin of the conversion integrated unit is connected to the system driving module; the system driving module is connected to the temperature detection module, the system driving module is connected to the current limiting module, the current limiting module is connected to the I SET pin of the conversion integrated unit, the current limiting module is connected to the current value detection module, and the current value detection module is connected to the OUT pin of the conversion integrated unit.
[0008] Its further technical solution is that the conversion integrated unit also includes a current limiting switch module; the first end of the current limiting switch module is connected to the system driving module, the second end of the current limiting switch module is connected to the positive pole of the power input end, and the third end of the current limiting switch module is connected to the OUT pin of the conversion integrated unit.
[0009] A further technical solution is that the OUT pin of the conversion integrated unit is connected to the VCC pin of the chip to be tested, and the current setting unit is connected to the VSS pin of the chip to be tested.
[0010] A further technical solution is that the current setting unit is an adjustable resistor, and current limiting of the entire circuit is achieved by controlling the resistance change of the adjustable resistor.
[0011] A further technical solution is that after the state of the control switch changes, the output signal of the conversion integrated unit changes.
[0012] In a second aspect, an embodiment of the present utility model further provides a test system, wherein the test system comprises a current limiting circuit for protecting the test chip as described in the first aspect.
[0013] A further technical solution is that the test system also includes a power supply, the number of current limiting circuits for protecting the test chip is at least three, and the power input terminals of at least three current limiting circuits are connected to the power supply.
[0014] During the semiconductor chip testing process of the prior art, the current is occasionally too large, that is, the actual current exceeds the standard range, causing the entire test circuit system to be affected. For example, when the actual current exceeds the standard range, there is a certain probability that the current load is too heavy, which directly damages the power supply. After research, the inventor found that when engineers perform chip testing, it is easy for the current load to be too heavy, which directly damages the power supply. The reason is that the presence of defective chips causes abnormal circuit parameters. The present application solves the above problem. Even if a defective chip is encountered during testing, it can effectively reduce the burden of the current load in the circuit and reduce the probability of damage to the test system. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0016] Figure 1 The present invention is a circuit block diagram of a current limiting circuit for protecting a test chip.
[0017] Figure 2 This is another circuit block diagram of the current limiting circuit for the protection test chip proposed by the utility model.
[0018] Figure 3 This is another circuit block diagram of the current limiting circuit for the protection test chip proposed by the utility model.
[0019] Figure 4 This is a logic control diagram of the current limiting circuit of the protection test chip proposed by the utility model.
[0020] Figure 5 The utility model is a circuit block diagram of the test system proposed. DETAILED DESCRIPTION
[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments. Similar component numbers in the drawings represent similar components. Obviously, the embodiments to be described below are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the utility model.
[0022] It should be understood that the terms used in the utility model embodiment description are only for the purpose of describing specific embodiments and are not intended to limit the utility model embodiment. As used in the utility model embodiment description and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0023] Example
[0024] See also Figures 1 to 5 , is a current limiting circuit 100 for protecting a test chip proposed in an embodiment of the utility model. The circuit is connected to a chip to be tested 200 during chip testing. The current limiting circuit 100 for protecting a test chip comprises: a power input terminal 1a, a conversion integrated unit 1, a current setting unit 2, and a control switch 3; the positive electrode IN+ of the power input terminal 1a is connected to the IN pin of the conversion integrated unit 1, the positive electrode I N+ of the power input terminal 1a is connected to the control switch 3, the control switch 3 is connected to the EN pin of the conversion integrated unit 1, and the negative electrode I N- of the power input terminal 1a is grounded; the OUT pin of the conversion integrated unit 1 is connected to the chip to be tested 200, the I SET pin of the conversion integrated unit 1 is connected to the current setting unit 2, one end of the current setting unit 2 is connected to the chip to be tested 200 and the other end of the current setting unit 2 is grounded.
[0025] During the semiconductor chip testing process of the prior art, the current is occasionally too large, that is, the actual current exceeds the standard range, causing the entire test circuit system to be affected. For example, when the actual current exceeds the standard range, there is a certain probability that the current load is too heavy, which directly damages the power supply. After research, the inventor found that when engineers perform chip testing, it is easy for the current load to be too heavy, which directly damages the power supply. The reason is that the presence of defective chips causes abnormal circuit parameters. The present application solves the above problem. Even if a defective chip is encountered during testing, it can effectively reduce the burden of the current load in the circuit and reduce the probability of damage to the test system.
[0026] Further, the conversion integrated unit 1 of the current limiting circuit 100 of the protection test chip includes a system driving module 10, an undervoltage lockout module 20, a temperature detection module 30, a current limiting module 40, and a current value detection module 50; and also includes a current limiting switch module 60. The positive electrode I N+ of the power input terminal 1a is connected to the IN pin of the conversion integrated unit 1, the IN pin of the conversion integrated unit 1 is connected to the undervoltage lockout module 20, the undervoltage lockout module 20 is connected to the system driving module 10, the control switch 3 is connected to the EN pin of the conversion integrated unit 1, and the EN pin of the conversion integrated unit 1 is connected to the system driving module 10; the system driving module 10 is connected to the temperature detection module 30, the system driving module 10 is connected to the current limiting module 40, the current limiting module 40 is connected to the I SET pin of the conversion integrated unit 1, the current limiting module 40 is connected to the current value detection module 50, and the current value detection module 50 is connected to the OUT pin of the conversion integrated unit 1. The first end of the current limiting switch module 60 is connected to the system driving module 10, the second end of the current limiting switch module 60 is connected to the positive electrode IN+ of the power input terminal 1a, and the third end of the current limiting switch module 60 is connected to the OUT pin of the conversion integrated unit 1. The system driving module 10 compares and amplifies the input signals of each channel, and the output signal drives the current limiting switch module 60 to be turned on or off.
[0027] In the above scheme, when the input voltage exceeds the range, the undervoltage lockout module 20 takes effect, and the system drive module 10 outputs a signal to turn off the current limiting switch module 60, at which time the output power supply is disconnected and the protection function takes effect. A further scheme is that when the temperature detection module 30 exceeds the preset temperature range, the overheat protection function takes effect, and the system drive module 10 outputs a signal to turn off the current limiting switch module 60, at which time the output power supply is disconnected and the protection function takes effect. A further scheme is that when the current value detection module 50 exceeds the preset range of the current setting module 2, the current limiting function of the current limiting module 40 takes effect, and the system drive module 10 outputs a signal to turn off the current limiting switch module 60, at which time the output power supply is disconnected and the protection function takes effect.
[0028] In the above scheme, the details of the EN pin in the system can be found in Figure 4 The EN pin is a functional pin of the system. When the control switch 3 is turned on, the EN pin is at a high level, and the system driving module 10 outputs a signal to turn on the current limiting switch module 60. When the control switch 3 is turned off, the EN pin is at a low level, and the system driving module 10 outputs a signal to turn off the current limiting switch module 60.
[0029] Furthermore, the OUT pin of the conversion integrated unit 1 of the current limiting circuit 100 of the protection test chip is connected to the VCC pin of the chip under test 200, and the current setting unit 2 is connected to the VSS pin of the chip under test 200. Furthermore, the current setting unit 2 of the current limiting circuit 100 of the protection test chip is an adjustable resistor, and the current limiting of the entire circuit is achieved by controlling the resistance change of the adjustable resistor. Furthermore, after the state of the control switch 3 changes, the output signal of the conversion integrated unit 1 changes, see Figure 4 In one embodiment, the above scheme is applicable to the chip to be tested, and the technical indicators are a power supply voltage of 2.5 to 5.5V and a current of 0.4 to 2A, that is, a current limiting protection power supply structure.
[0030] The scheme described in the present application can perform soft-start output or shutdown by enabling the start-up EN signal of the EN pin, so that the circuit system can effectively reduce the huge peak current generated during the hot plug process during operation; in addition, the scheme aims at unexpected situations that may occur when the power supply system is working, and realizes overcurrent detection, overcurrent protection, undervoltage lockout module, and overheating protection function through the internal current limiting power supply circuit, so as to achieve the beneficial effects of setting the current protection point, disconnecting the power supply output end, protecting the chip to be tested, and protecting the power supply.
[0031] Furthermore, the embodiment of the utility model also proposes a test system, including a current limiting circuit 100 for protecting a test chip as described in any of the above embodiments. Furthermore, the test system also includes a power supply 300, and the number of the current limiting circuits 100 for protecting a test chip is at least three, and the power input terminals 1a of at least three current limiting circuits 100 are connected to the power supply 300. The power supply in the test system is shared by multiple current limiting circuits, and the current limiting circuit will automatically shut down the current limiting setting module when the state is abnormal. Therefore, even if one of the current limiting circuits is abnormal, it will not affect the power supply, and will not affect the remaining current limiting circuits.
[0032] The beneficial effects of the present application include: on the one hand, when the current of the chip to be tested is too large and exceeds the set current range, the system current limits the power supply and shuts off the output to protect the chip; on the other hand, it can prevent the power supply from being damaged due to excessive chip current, and prevent negative impacts on other tests that share the same power supply.
[0033] To sum up, when engineers conduct chip testing, it is easy for the current load to be too heavy, which in turn directly damages the power supply. The reason is that the presence of defective chips causes abnormal circuit parameters. The present application solves the above problem. Even if a defective chip is encountered during testing, the burden of the current load in the circuit can be effectively reduced, thereby reducing the chance of damage to the test system.
[0034] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.
[0035] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0036] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be connected, detachably connected, or integrated; it can be mechanically connected or electrically connected; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0037] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0038] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.
[0039] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is intended to include these modifications and variations.
[0040] The above is a specific implementation of the utility model, but the protection scope of the utility model is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the utility model, and these modifications or replacements should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model should be based on the protection scope of the claims.
Claims
1. A current limiting circuit for protecting a test chip, characterized in that: The circuit is used to connect with the chip to be tested during the chip testing process, and the current limiting circuit for protecting the test chip includes: Power input terminal, conversion integrated unit, current setting unit, control switch; The positive electrode of the power input terminal is connected to the IN pin of the conversion integrated unit, the positive electrode of the power input terminal is connected to the control switch, the control switch is connected to the EN pin of the conversion integrated unit, and the negative electrode of the power input terminal is grounded; The OUT pin of the conversion integrated unit is connected to the chip under test, the ISET pin of the conversion integrated unit is connected to the current setting unit, one end of the current setting unit is connected to the chip under test and the other end of the current setting unit is grounded.
2. The current limiting circuit for protecting a test chip according to claim 1, characterized in that: The conversion integrated unit includes a system driving module, an undervoltage lockout module, a temperature detection module, a current limiting module, and a current value detection module; The positive pole of the power input terminal is connected to the IN pin of the conversion integrated unit, the IN pin of the conversion integrated unit is connected to the undervoltage lockout module, the undervoltage lockout module is connected to the system drive module, the control switch is connected to the EN pin of the conversion integrated unit, and the EN pin of the conversion integrated unit is connected to the system drive module; The system driving module is connected to the temperature detection module, the system driving module is connected to the current limiting module, the current limiting module is connected to the ISET pin of the conversion integrated unit, the current limiting module is connected to the current value detection module, and the current value detection module is connected to the OUT pin of the conversion integrated unit.
3. The current limiting circuit for protecting a test chip according to claim 2, characterized in that: The conversion integrated unit also includes a current limiting switch module; a first end of the current limiting switch module is connected to the system driving module, a second end of the current limiting switch module is connected to the positive pole of the power input end, and a third end of the current limiting switch module is connected to the OUT pin of the conversion integrated unit.
4. The current limiting circuit for protecting a test chip according to claim 3, characterized in that: The OUT pin of the conversion integrated unit is connected to the VCC pin of the chip to be tested, and the current setting unit is connected to the VSS pin of the chip to be tested.
5. The current limiting circuit for protecting a test chip according to claim 4, characterized in that: The current setting unit is an adjustable resistor, and current limiting of the entire circuit is achieved by controlling the resistance change of the adjustable resistor.
6. The current limiting circuit for protecting a test chip according to claim 5, characterized in that: After the state of the control switch changes, the output signal of the conversion integrated unit changes.
7. A testing system, characterized in that: The test system comprises the current limiting circuit for protecting the test chip as claimed in claims 1 to 6.
8. The test system according to claim 7, characterized in that: The test system also includes a power supply. The number of current limiting circuits for protecting the test chip is at least three, and the power input terminals of at least three current limiting circuits are all connected to the power supply.