Mask plate for PVD (physical vapor deposition) seed layer plating of HJT (high junction transistor) battery

By using a mask plate made of hard materials on the HJT battery, the area where coating is not required is blocked, and the damage problem of the PVD process to the TCO blue film is solved, achieving a more efficient battery production process.

CN222476721UActive Publication Date: 2025-02-14陕西众森电能科技有限公司
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Patent Information

Application Number
CN202421231258.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-05-31
Publication Date
2025-02-14
Estimated Expiration
2034-05-31

AI Technical Summary

Technical Problem

In the prior art, when the copper seed layer is prepared by using the PVD process, it will bombard the transparent conductive oxide (TCO) blue film, causing damage to the blue film and affecting battery performance.

Method used

A mask plate composed of hard material is used, and a plurality of hollowed-out thin grids are provided on the mask plate to block areas where coating is not required and protect the blue film from damage from the PVD process.

Benefits of technology

By using the mask plate, it is possible to reduce the damage of blue film by more than 80%, reduce the problem of battery efficiency reduction when the PVD seed layer of HJT battery is plated, and at the same time simplify the production process and improve the production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a PVD (Physical Vapor Deposition) process of an HJT (High Junction Transistor) battery, in particular to a mask plate for a PVD plating seed layer of the HJT battery, and aims to overcome the defects that in the prior art, when a metal transition layer is prepared by adopting the PVD process, a TCO (Transient Conductive Oxide) is bombarded, a blue film is damaged, and the performance of the battery is influenced. The utility model relates to a mask plate for a PVD (Physical Vapor Deposition) seed layer of an HJT (High Junction Transistor) battery. The mask plate is provided with a grid line area, the grid line area is composed of a plurality of hollow fine grids, and the grid line area corresponds to a film coating area of the HJT battery needing to be plated with a seed layer through PVD (Physical Vapor Deposition).
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Description

Technical Field

[0001] The utility model relates to a PVD process for an HJT battery, in particular to a mask plate for a PVD plating seed layer of the HJT battery. Background Art

[0002] Heterojunction (HJT) cells have higher bifaciality, open circuit voltage and efficiency, and are considered to be the mainstream technology products of the next generation of cells. Metal electrodes are the key step in making heterojunction cells. However, the consumption of low-temperature silver paste used in existing heterojunction cells is huge and expensive, which makes its manufacturing cost high and hinders the marketization of heterojunction cells. At present, the metallization process of heterojunction cells usually uses a silver-free path. Common methods include electroplating copper, silver-clad copper, base metal wire welding and copper-tin paste screen printing. Except for silver-clad copper, which can be directly screen-printed on the cell, the remaining paths require coating to construct a metal transition layer to connect the transparent conductive oxide (TCO) with the metal electrode to ensure the bonding strength and good contact between the metal electrode and the TCO. The metal transition layer is mostly copper and its alloys, generally called copper seed layer, which is made by physical vapor deposition (PVD) process. However, when the copper seed layer is prepared by PVD process, it will bombard the TCO, causing damage to its blue film and affecting the battery performance. Utility Model Content

[0003] The utility model aims to solve the problem in the prior art that when a metal transition layer is prepared by a PVD process, bombardment on TCO occurs, causing damage to the blue film and affecting the battery performance, and provides a mask plate for the PVD plating seed layer of an HJT battery.

[0004] To achieve the above purpose, the technical solutions provided by the utility model are as follows:

[0005] A mask plate for PVD plating seed layer of HJT battery, which is special in that: it includes a mask plate, the mask plate is made of hard material; the mask plate is provided with a grid line area, the grid line area is composed of a plurality of hollowed-out fine grids, and the grid line area corresponds to the coating area of ​​the HJT battery that needs to be PVD plated seed layer.

[0006] The hollowing refers to a transparent setting on the mask plate, which can be formed by various processes.

[0007] Furthermore, each of the fine grids is composed of a continuous fine grid that is continuously distributed.

[0008] Furthermore, each of the fine grids is composed of a discontinuous fine grid that is distributed discontinuously.

[0009] Furthermore, the width k of each of the fine grids satisfies the following condition: 0.1 mm ≤ k ≤ 0.8 mm;

[0010] The thickness of the mask plate is 0.01-0.2 mm.

[0011] Furthermore, the width k of the fine grid is 0.1-0.5 mm.

[0012] Furthermore, the mask plate is made of one or more hard materials selected from stainless steel, aluminum, copper, and molybdenum.

[0013] Furthermore, the disconnection length of the intermittent fine grid is not greater than 0.5 mm.

[0014] Beneficial effects of the utility model:

[0015] 1. The utility model is used to reduce the problem of damage to the blue film of the HJT battery during PVD plating of the seed layer, which leads to a decrease in battery efficiency. The mask plate is made of hard material, has a certain mechanical strength, is not easy to deform, and can be used repeatedly.

[0016] 2. The mask plate of the utility model adopts a specific thickness and a fine grid width, which cooperate with each other to increase the protection area of ​​the blue film while ensuring that the subsequent process can have better alignment accuracy and better mechanical strength.

[0017] 3. The mask plate of the utility model is used to shield the area on the battery surface that does not need metallization, protect the battery surface from damage during the PVD process, and can reduce more than 80% of the damage, so that there is no need for additional steps to process the battery surface and the mask plate during processing and production, simplifying the production process and improving production efficiency.

[0018] 4. The utility model is suitable for various silver-free metallization schemes such as electroplating, metal wire welding and screen printing of copper-containing slurries, and has broad application prospects and practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the structure of the continuous fine grid in the first embodiment of the utility model;

[0020] Figure 2 This is a schematic diagram of the structure of the intermittent fine grid in the second embodiment of the utility model;

[0021] Description of reference numerals:

[0022] 1-mask, 2-continuous fine grid, 3-intermittent fine grid. DETAILED DESCRIPTION

[0023] Embodiment 1

[0024] The mask plate used for the PVD plating seed layer of the HJT battery in the utility model is made of hard material, and can be composed of one or more metal materials such as stainless steel, aluminum, copper, molybdenum, etc. The thickness of the mask plate 1 is 0.01-0.2mm. If the thickness of the mask plate 1 is too small, its mechanical strength will be affected. If the thickness is too large, it will increase the difficulty of plating near the edge of the mask plate 1, resulting in a decrease in the flatness of the edge of the coating. Therefore, under the premise of ensuring the mechanical strength of the mask plate 1, its thickness can be as small as possible.

[0025] The mask plate 1 is graphically provided with a grid line area, which is provided corresponding to the coating area of ​​the HJT cell. The grid line area is composed of a plurality of hollowed-out thin grids, and each thin grid is composed of a continuous thin grid 2 that is continuously distributed, such as Figure 1 shown.

[0026] The method of using mask plate 1 to perform PVD seed layer coating can protect the area that does not need coating, avoiding damage to the blue film of TCO during the PVD process. The exposed area of ​​mask plate 1 is less than 20% of the entire battery area, so this method can reduce more than 80% of the damage.

[0027] Before coating, the blue film is placed at a fixed position of the battery, and then covered with a mask plate 1, which is also fixed in a fixed area of ​​the coating tank to ensure that the seed layer is accurately positioned.

[0028] At present, the grid lines of heterojunction batteries include fine grids and main grids, and the grid line widths are all within 0.1mm. The fine grid width k in the grid line area of ​​the mask plate 1 needs to be greater than the grid line width of the heterojunction battery, so it is at least 0.1mm and does not exceed 0.8mm. The fine grid width will affect the alignment accuracy during subsequent welding and screen printing. The smaller the fine grid width, the higher the alignment accuracy requirement, but the larger the protection area for the battery blue film. Therefore, after balancing the equipment alignment accuracy and reducing the degree of damage to the battery blue film, the fine grid width is adjusted between 0.1 and 0.5mm. The fine grid arrangement mode of the grid line area of ​​the mask plate 1, as well as the length, spacing and number of the fine grids are adjusted according to the grid lines required for the metallization process of the heterojunction battery.

[0029] The utility model adopts the above-mentioned mask plate 1 to perform PVD plating seed layer of HJT battery. Specifically, the above-mentioned mask plate 1 is set on the HJT battery to cover the area that does not need to be plated, and only the corresponding position of the gate line area is exposed, and the PVD process is performed on the gate line area.

[0030] In this embodiment, a stainless steel mask plate 1 with a thickness of 0.01 mm is used, and its gate line area is a continuous fine grid 2 with a width of 0.15 mm. PVD copper plating is performed using the mask plate 1 to obtain a copper layer with a thickness of 100 nm. After the plating is completed, the stainless steel mask plate 1 is removed and the subsequent copper electroplating process is performed.

[0031] Embodiment 2

[0032] The difference between this embodiment and the first embodiment is that the fine gates in the gate line region are all composed of a discontinuous fine gate 3, such as Figure 2 As shown, the intermittent fine grid 3 can enhance the strength of the mask plate 1 and extend its service life. However, since the electroplating process is to deposit the grid line after the PVD seed layer, the seed layer needs to be continuous to ensure the transmission of current, so the intermittent fine grid 3 cannot be used in the electroplating process. The breakpoint length of the intermittent fine grid 3 is not greater than 0.5mm. If the breakpoint length is too large, the interval between the prepared seed layers will be too large, affecting the seed layer's collection of the battery surface current.

[0033] In this embodiment, a copper mask plate 1 with a thickness of 0.2 mm is used, and its gate line area is a discontinuous fine gate 3 with a fine gate width of 0.5 mm and a breakpoint length of 0.4 mm. PVD copper plating is performed using the mask plate 1 to obtain a copper layer with a thickness of 200 nm. After the plating is completed, the copper mask plate 1 is removed, and the copper-containing slurry is screen-printed to produce copper-containing gate lines.

[0034] Embodiment 3

[0035] The difference between this embodiment and the first embodiment is that a copper mask plate 1 with a thickness of 0.03 mm is used, and its gate line area is a continuous fine gate 2 with a fine gate width of 0.2 mm. The mask plate 1 is used for PVD plating of copper-nickel alloy to obtain a coating thickness of 150 nm. After the plating is completed, the copper mask plate 1 is removed and a metal wire is welded as a gate line.

Claims

1. A mask plate for PVD plating seed layer of HJT battery, characterized by: It comprises a mask plate (1), wherein the mask plate (1) is made of a hard material; The mask plate (1) is provided with a grid line area, the grid line area is composed of a plurality of hollowed-out thin grids, and the grid line area corresponds to a coating area of ​​the HJT battery that needs to be subjected to PVD coating of a seed layer.

2. The mask plate for PVD plating seed layer of HJT battery according to claim 1, characterized in that: Each of the fine grids is composed of a continuous fine grid (2) that is continuously distributed.

3. The mask plate for PVD plating seed layer of HJT battery according to claim 1, characterized in that: Each of the fine grids is composed of a discontinuous fine grid (3) distributed discontinuously.

4. The mask plate for PVD plating seed layer of HJT battery according to any one of claims 1-3, characterized in that: The width k of each of the fine grids satisfies the following condition: 0.1 mm ≤ k ≤ 0.8 mm; The thickness of the mask plate (1) is 0.01-0.2 mm.

5. The mask plate for PVD plating seed layer of HJT battery according to claim 4, characterized in that: The width k of the fine grid is 0.1-0.5 mm.

6. The mask plate for PVD plating seed layer of HJT battery according to claim 1, characterized in that: The mask plate (1) is made of one or more hard materials selected from the group consisting of stainless steel, aluminum, copper and molybdenum.

7. The mask plate for PVD plating seed layer of HJT battery according to claim 3, characterized in that: The disconnection length of the intermittent fine grid (3) is no greater than 0.5 mm.