Capacitive sensor

By dividing the probe and grounding area on the insulating substrate of the capacitance sensor and transmitting electrical signals using vias, the problem of low measurement accuracy caused by the parasitic capacitance in the capacitance sensor is solved, and higher measurement accuracy and stability are achieved. Reduces design and maintenance costs.

CN222528662UActive Publication Date: 2025-02-25GUANGDONG UNIV OF TECH +1
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Patent Information

Application Number
CN202421420103.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-20
Publication Date
2025-02-25
Estimated Expiration
2034-06-20

AI Technical Summary

Technical Problem

Parasitic capacitance in the line in the capacitance sensor results in low measurement accuracy, affecting sensitivity and stability.

Method used

By dividing the front of the insulating substrate into a probe area and a grounding area, and setting up a copper plating layer on these areas, the vias on the insulating substrate transmit electrical signals to the probe and grounding end, avoiding the use of driving cables.

Benefits of technology

It effectively reduces parasitic capacitance in the line, improves the measurement accuracy and stability of the capacitance sensor, and reduces design complexity, maintenance difficulty and cost.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model is suitable for the technical field of sensors, and provides a capacitive sensor which comprises a capacitive digital conversion chip and an insulating substrate, a groove is formed in the front face of the insulating substrate and divides the front face of the insulating substrate into a measuring head area and a grounding area, a first via hole is formed in the measuring head area, and a second via hole is formed in the grounding area. A second via hole is formed in the grounding area, and copper plating layers are arranged on the measuring head area, the grounding area, the inner wall of the first via hole and the inner wall of the second via hole; the capacitance digital conversion chip is arranged on the back face of the insulating substrate, a detection pin of the capacitance digital conversion chip is electrically connected with the inner wall of the first via hole, and a grounding pin of the capacitance digital conversion chip is electrically connected with the inner wall of the second via hole. The stray capacitance in the capacitive sensor circuit can be reduced, the measurement precision and stability of the capacitive sensor can be improved, and the cost can be reduced at the same time.
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Description

Technical Field

[0001] The present application belongs to the field of sensor technology, and in particular relates to a capacitive sensor. Background Art

[0002] Parasitic capacitance in capacitive sensors refers to the unintended capacitive coupling between the sensor and its surroundings. This parasitic capacitance may adversely affect the performance of the sensor, including:

[0003] Reduced sensitivity: Parasitic capacitance will be connected in parallel with the effective capacitance of the sensor, resulting in an increase in the equivalent capacitance during actual measurement, thereby reducing the sensitivity of the sensor and making the sensor slow to respond to changes in the measured value;

[0004] Impact on measurement accuracy: Parasitic capacitance will be connected in parallel with the rated capacitance of the sensor, causing the equivalent capacitance value of the sensor to change, thereby affecting the measurement precision and accuracy of the sensor;

[0005] Reduced stability: Parasitic capacitance may change with environmental conditions (such as temperature and humidity), causing the sensor output to be unstable and affecting the accuracy of long-term measurements.

[0006] In order to reduce the parasitic capacitance in the capacitive sensor, existing solutions mostly use drive cable technology to reduce the parasitic capacitance, that is, use a drive cable to connect the probe and controller of the capacitive sensor. However, due to the existence of the drive cable, parasitic capacitance exists in the line, resulting in low measurement accuracy of the capacitive sensor. Utility Model Content

[0007] The embodiment of the present application provides a capacitive sensor, which can solve the problem of low measurement accuracy of the capacitive sensor caused by parasitic capacitance in the circuit.

[0008] The present application embodiment provides a capacitive sensor, including a capacitive digital conversion chip, and the capacitive sensor also includes an insulating substrate, a groove is provided on the front side of the insulating substrate, the groove divides the front side of the insulating substrate into a probe area and a grounding area, a first via hole is provided in the probe area, a second via hole is provided in the grounding area, and the probe area, the grounding area, the inner wall of the first via hole, and the inner wall of the second via hole are all provided with a copper plating layer;

[0009] The capacitance-to-digital conversion chip is arranged on the back side of the insulating substrate, the detection pin of the capacitance-to-digital conversion chip is electrically connected to the inner wall of the first via hole, and the ground pin of the capacitance-to-digital conversion chip is electrically connected to the inner wall of the second via hole.

[0010] Optionally, the copper-plated layer in the probe area is a probe of the capacitive sensor, and a detection pin of the capacitance-to-digital conversion chip is electrically connected to the probe through an inner wall of the first via hole.

[0011] Optionally, the copper-plated layer in the grounding area serves as a grounding terminal of the capacitive sensor, and a grounding pin of the capacitance-to-digital conversion chip is electrically connected to the grounding terminal through an inner wall of the second via hole.

[0012] Optionally, the first via hole and the second via hole both pass through the front side and the back side of the insulating substrate.

[0013] Optionally, a capacitance signal transmission pin of the capacitance-to-digital conversion chip is electrically connected to a signal transmission end of a controller of the capacitance sensor.

[0014] Optionally, the controller is a single chip microcomputer.

[0015] Optionally, a data output terminal of the controller is electrically connected to a data input terminal of a display screen of the capacitive sensor.

[0016] Optionally, the groove is a circular groove.

[0017] Optionally, the insulating substrate is a ceramic substrate.

[0018] Optionally, the capacitance-to-digital conversion chip is welded on the back side of the insulating substrate.

[0019] The above solution of the present application has the following beneficial effects:

[0020] In an embodiment of the present application, the front side of the insulating substrate is divided into a probe area and a grounding area, and copper-plated layers are respectively arranged on the probe area and the grounding area, the copper-plated layer in the probe area is used as a probe of the capacitive sensor, and the copper-plated layer in the grounding area is used as a grounding terminal of the capacitive sensor. At the same time, a capacitance-to-digital conversion chip is arranged on the back side of the insulating substrate, and electrical signals are transmitted to the probe and the grounding terminal through vias on the insulating substrate. Compared with the method of driving cables in the prior art, there is no need to drive cables, but electrical signals are transmitted through vias. Therefore, while effectively reducing the parasitic capacitance in the line and improving the measurement accuracy and stability of the capacitive sensor, the design complexity, maintenance difficulty and cost of the capacitive sensor are reduced.

[0021] Other beneficial effects of the present application will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 A schematic diagram of the structure of a capacitive sensor provided in one embodiment of the present application;

[0024] Figure 2 A schematic diagram of the back side of an insulating substrate provided in one embodiment of the present application;

[0025] Figure 3 A measurement principle diagram of a capacitive sensor provided in one embodiment of the present application;

[0026] Figure 4 This is a schematic diagram of a fixed chip capacitor directly soldered on a circuit board pad in an experiment of this application;

[0027] Figure 5 This is a schematic diagram of a fixed chip capacitor connected to a circuit board pad through a driving cable in an experiment of this application;

[0028] Figure 6 A curve diagram of the capacitance value measured in an experiment of the present application without a driving cable;

[0029] Figure 7 This is a curve diagram of the capacitance value measured in an experiment of this application with a driving cable.

[0030] [Description of Reference Numerals]

[0031] 100, insulating substrate; 101, groove; 102, probe area; 103, grounding area; 104, first via; 105, second via; 106, capacitance-to-digital conversion chip; 1061, grounding pin; 1062, detection pin; 107, peripheral circuit; 108, connector; 109, controller; 110, display; 200, object to be measured; 400, fixed chip capacitor; 500, pad; 600, circuit board; 700, drive cable. DETAILED DESCRIPTION

[0032] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0033] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0034] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0035] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0036] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0037] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0038] In response to the problems of high design complexity, difficult maintenance and high cost of current capacitive sensors, an embodiment of the present application provides a capacitive sensor, which divides the front side of an insulating substrate into a probe area and a ground area, and respectively sets copper plating layers on the probe area and the ground area, and uses the copper plating layer in the probe area as the probe of the capacitive sensor, and the copper plating layer in the ground area as the ground terminal of the capacitive sensor. At the same time, a capacitance-to-digital conversion chip is set on the back side of the insulating substrate, and electrical signals are transmitted to the probe and the ground terminal through vias on the insulating substrate. Compared with the method of driving cables in the prior art, there is no need to drive cables, but electrical signals are transmitted through vias. Therefore, while effectively reducing the parasitic capacitance in the line and improving the measurement accuracy and stability of the capacitive sensor, the design complexity, maintenance difficulty and cost of the capacitive sensor are reduced.

[0039] The capacitive sensor provided in the present application is exemplarily described below in conjunction with specific embodiments.

[0040] like Figures 1 to 3 As shown, the capacitive sensor provided in the embodiment of the present application includes a capacitance-to-digital conversion chip 106 and an insulating substrate 100. A groove 101 is provided on the front side of the insulating substrate 100. The groove 101 divides the front side of the insulating substrate 100 into a probe area 102 and a grounding area 103. A first via hole 104 is provided in the probe area 102, and a second via hole 105 is provided in the grounding area 103.

[0041] The probe region 102, the grounding region 103, the inner wall of the first via hole 104, and the inner wall of the second via hole 105 are all provided with a copper plating layer; the first via hole 104 and the second via hole 105 both penetrate the front and back sides of the insulating substrate 100. Specifically, a layer of copper can be plated on the front side of the insulating substrate 100, the inner wall of the first via hole 104, and the inner wall of the second via hole 105 by copper plating, and then a groove 101 is etched on the front side of the insulating substrate 100 by etching, so as to divide the front side of the insulating substrate 100 into the probe region 102 and the grounding region 103.

[0042] The capacitance-to-digital conversion chip 106 is disposed on the back of the insulating substrate 100, the detection pin 1062 of the capacitance-to-digital conversion chip 106 is electrically connected to the inner wall of the first via 104, and the ground pin 1061 of the capacitance-to-digital conversion chip 106 is electrically connected to the inner wall of the second via 105. As an optional example, the capacitance-to-digital conversion chip 106 can be welded on the back of the insulating substrate 100, that is, the capacitance-to-digital conversion chip 106 is disposed on the back of the insulating substrate 100 by welding. It can be understood that in practical applications, the capacitance-to-digital conversion chip 106 can be welded to the back of the insulating substrate 100 through a circuit board, and the insulating substrate 100 can serve as the top of the capacitive sensor housing.

[0043] The copper-plated layer in the probe area 102 is the probe of the capacitive sensor, and the detection pin 1062 of the capacitance-to-digital conversion chip 106 is electrically connected to the probe through the inner wall of the first via 104; the copper-plated layer in the grounding area 103 is the grounding terminal of the capacitive sensor, and the grounding pin 1061 of the capacitance-to-digital conversion chip 106 is electrically connected to the grounding terminal through the inner wall of the second via 105. For example, the detection pin 1062 of the capacitance-to-digital conversion chip 106 can be connected to the inner wall of the first via 104 through a copper wire on a circuit board, and the grounding pin 1061 of the capacitance-to-digital conversion chip 106 can be connected to the inner wall of the second via 105 through a copper wire on a circuit board.

[0044] Specifically, after the capacitive sensor is powered on, the copper-plated layer of the probe area 102 (i.e., the probe) serves as one plate of the capacitive sensor, and the measured object 200 serves as the other plate of the capacitive sensor. Due to changes in external signals (such as displacement, pressure, liquid level, etc.), the capacitance between the two plates changes. The capacitance-to-digital conversion chip 106 can be connected to the probe through the first via 104, identify the capacitance change, and convert the identified analog value (i.e., capacitance change) into a digital value and output it to the controller 109 of the capacitive sensor. After being processed by the controller 109, the digital change (such as pressure of 100 MPa) is displayed on the display screen 110 of the capacitive sensor, and the change in the external signal can be measured. In this process, parasitic capacitance is often generated in the line between the probe and the capacitance-to-digital conversion chip. The longer the line, the greater the parasitic capacitance. It is worth mentioning that compared with the method of driving cables in the prior art, the capacitive sensor of the present application does not need to drive cables, but transmits electrical signals through vias, which can maximize the shortening of this line. Moreover, this line is built into the circuit board (that is, the circuit board where the capacitance digital conversion chip is located) and the insulating substrate 100, and is not affected by external electromagnetic fields, thereby improving the stability of signal transmission. Therefore, the capacitive sensor of the present application effectively reduces the parasitic capacitance in the line, improves the measurement accuracy of the capacitive sensor, and reduces the design complexity, maintenance difficulty and cost of the capacitive sensor.

[0045] It is understandable that the present application mainly solves the problem of the great influence on the measurement result due to the presence of parasitic capacitance in the circuit by adjusting the setting mode, position, connection relationship, etc. of the capacitance-to-digital conversion chip 106 and the probe. The connection relationship and working principle between the probe, the capacitance-to-digital conversion chip and other components of the capacitance sensor are consistent with the connection relationship and working principle between the probe, the capacitance-to-digital conversion chip and other components of the capacitance sensor in the commonly used capacitance sensor. Therefore, the structure and working principle of the capacitance-to-digital conversion chip, the peripheral circuit 107, the controller 109, etc. required for the operation of the capacitance-to-digital conversion chip will not be described in detail here.

[0046] In some embodiments of the present application, in order to facilitate the transmission of signals (i.e., the above-mentioned digitized capacitance change) between the capacitance digital conversion chip 106 and the controller 109, the capacitance signal transmission pin of the capacitance digital conversion chip 106 is electrically connected to the signal transmission end of the controller 109 of the capacitance sensor. As a preferred example, the controller 109 can be a single-chip microcomputer, and the capacitance signal transmission pin of the capacitance digital conversion chip 106 is electrically connected to the signal transmission end of the controller 109 of the capacitance sensor through a connector 108. It can be understood that the controller 109 can supply power to the capacitance digital conversion chip 106 through a power transmission line, and is connected to the capacitance signal transmission pin of the capacitance digital conversion chip 106 through a serial peripheral interface (SPI) / integrated circuit bus (IIC) to transmit signals (such as capacitance change).

[0047] In some embodiments of the present application, in order to facilitate the display of the above-mentioned digital change, the data output terminal of the controller 109 is electrically connected to the data input terminal of the display screen 110 of the capacitive sensor.

[0048] In some embodiments of the present application, the groove 101 may be a circular groove to facilitate forming a probe and a ground terminal on the front surface of the insulating substrate 100. It is understood that the shape of the groove 101 may be adjusted according to actual needs, and the specific shape of the groove 101 is not limited in the embodiments of the present application.

[0049] In some embodiments of the present application, the insulating substrate 100 may be a ceramic substrate. Since the ceramic substrate has excellent thermal stability, can maintain structural stability in a high temperature environment, and is not prone to thermal expansion or thermal deformation, there is no need to worry about the effect of the heat generated by the capacitance-to-digital conversion chip 106 on the ceramic substrate.

[0050] The capacitive sensor of the present application is exemplarily described below with reference to specific experimental data.

[0051] Experimental Figures 4 to 5 As shown in the figure, the influence of parasitic capacitance in ordinary drive cables on measurement accuracy is analyzed through comparative experiments. Figure 4 Solder the 6pF fixed chip capacitor 400 directly to the pad 500 of the circuit board 600 (equivalent to directly connecting the 6pF fixed chip capacitor 400 to the detection pin of the capacitance-to-digital conversion chip on the circuit board 600). Figure 5 Two driving cables 700 are added (some parasitic capacitance exists in the driving cables 700).

[0052] The experimental results are as follows Figure 6 to Figure 7As shown, it can be seen that using the copper wire in the circuit board 600 as a signal transmission line will be more stable, the parasitic capacitance will be very small and almost unchanged, and the measured capacitance value will be closer to the true value. Therefore, the capacitive sensor proposed in this application can effectively reduce the parasitic capacitance, improve the stability, sensitivity and measurement accuracy of the output signal, and compared with the use of drive cables, this application uses the perforation and surface copper plating technology to make the probe of the capacitive sensor and the capacitance digital conversion chip into an integrated structure, and realizes the electrical signal transmission between the two through the via, which can minimize the parasitic capacitance in the line, improve the measurement accuracy, stability and sensitivity of the capacitive sensor, and save costs.

[0053] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles described in the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A capacitive sensor, comprising a capacitance-to-digital conversion chip, characterized in that: The capacitive sensor further comprises an insulating substrate, a groove is provided on the front side of the insulating substrate, the groove divides the front side of the insulating substrate into a probe area and a grounding area, a first via hole is provided in the probe area, a second via hole is provided in the grounding area, and the probe area, the grounding area, the inner wall of the first via hole and the inner wall of the second via hole are all provided with a copper plating layer; The capacitance-to-digital conversion chip is disposed on the back side of the insulating substrate, a detection pin of the capacitance-to-digital conversion chip is electrically connected to the inner wall of the first via hole, and a ground pin of the capacitance-to-digital conversion chip is electrically connected to the inner wall of the second via hole.

2. The capacitive sensor according to claim 1, characterized in that: The copper-plated layer in the probe area is the probe of the capacitive sensor, and the detection pin of the capacitance-to-digital conversion chip is electrically connected to the probe through the inner wall of the first via hole.

3. The capacitive sensor according to claim 1, characterized in that: The copper-plated layer in the grounding area is the grounding terminal of the capacitive sensor, and the grounding pin of the capacitance-to-digital conversion chip is electrically connected to the grounding terminal through the inner wall of the second via hole.

4. The capacitive sensor according to claim 1, characterized in that: The first via hole and the second via hole both penetrate the front side and the back side of the insulating substrate.

5. The capacitive sensor according to claim 1, characterized in that: The capacitance signal transmission pin of the capacitance-to-digital conversion chip is electrically connected to the signal transmission end of the controller of the capacitance sensor.

6. The capacitive sensor according to claim 5, characterized in that: The controller is a single chip microcomputer.

7. The capacitive sensor according to claim 5, characterized in that: The data output terminal of the controller is electrically connected to the data input terminal of the display screen of the capacitive sensor.

8. The capacitive sensor according to claim 1, characterized in that: The groove is a circular groove.

9. The capacitive sensor according to claim 1, characterized in that: The insulating substrate is a ceramic substrate.

10. The capacitive sensor according to claim 1, characterized in that: The capacitance-to-digital conversion chip is welded on the back side of the insulating substrate.