Display device
By designing a specific inorganic pattern in the inorganic layer of the display device and combining with the thin film encapsulation layer, the problems of high reflectivity and buckling or cracking during folding in the prior art are solved, and the effects of reducing reflectivity and enhancing stability are achieved.
Patent Information
- Application Number
- CN202323316037.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-09
- Filing Date
- 2023-12-06
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2033-12-06
AI Technical Summary
The existing display devices have shortcomings in reflectivity and buckling or cracking during folding, and it is difficult to simultaneously reduce reflectivity and minimize buckling or cracking due to folding.
A display device is adopted, which includes a light emitting element, an inorganic layer and a thin film encapsulation layer. The inorganic layer includes a first inorganic pattern in the bending region, and the adhesion between the inorganic layer and the film encapsulation layer is enhanced by the design of the extension, the protrusion, the bent portion and the hole.
The reflectivity of the display device is effectively reduced, and the occurrence of buckling or cracking is minimized during the folding process, thereby improving the stability and display effect of the display device.
Smart Images

Figure CN222532146U_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a display device. Background Art
[0002] Recently, as interest in information display has been increasing, research and development of display devices have been continuously conducted. Utility Model Content
[0003] An object of the present disclosure is to provide a display device which can reduce reflectivity while minimizing buckling or cracking due to folding.
[0004] The objects of the present disclosure are not limited to the objects mentioned above, and other technical objects not mentioned can be clearly understood by those of ordinary skill in the art using the following description.
[0005] According to an embodiment, a display device may have a first region, a second region, and a bending region between the first region and the second region, and the display device may include a light emitting element, an inorganic layer disposed on the light emitting element, and a thin film encapsulation layer disposed on the inorganic layer. The inorganic layer may include a first inorganic pattern in the bending region.
[0006] The first inorganic pattern may include an extension portion and a protrusion portion protruding from the extension portion.
[0007] The first inorganic pattern may include an extension portion and a bent portion bent from the extension portion.
[0008] The first inorganic pattern may include holes spaced apart from each other.
[0009] The inorganic layer may at least partially cover the light emitting element in the first region.
[0010] The first region and the second region may be spaced apart from each other in a first direction, and the bending region may extend in a second direction intersecting the first direction.
[0011] The first region may include a first edge region extending in the second direction on an edge of the first region, and the inorganic layer may further include a second inorganic pattern in the first edge region.
[0012] The second region may include a second edge region extending in the second direction on an edge of the second region, and the inorganic layer may further include a third inorganic pattern in the second edge region.
[0013] The first to third inorganic patterns may have the same pattern in a plan view.
[0014] The thin film encapsulation layer may contact the first to third inorganic patterns.
[0015] The inorganic layer may include bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta), and molybdenum oxide (MoO 3 ) at least one of.
[0016] The inorganic layer may have a refractive index greater than or equal to about 1.0.
[0017] The extinction coefficient of the inorganic layer may be less than or equal to about 4.0.
[0018] According to an embodiment, a display device may have a first region and a second region spaced apart from each other in a first direction and a bending region disposed between the first region and the second region and bendable relative to a bending axis extending in a second direction intersecting the first direction, the display device may include a light emitting element, an inorganic layer disposed on the light emitting element, and a thin film encapsulation layer disposed on the inorganic layer. The inorganic layer may include a first inorganic pattern in the bending region.
[0019] The first region may include a first edge region extending in the second direction on an edge of the first region, and the inorganic layer may further include a second inorganic pattern in the first edge region.
[0020] The second region may include a second edge region extending in the second direction on an edge of the second region, and the inorganic layer may further include a third inorganic pattern in the second edge region.
[0021] The thin film encapsulation layer may contact the first to third inorganic patterns.
[0022] The display device may further include a reflection control layer disposed on the inorganic layer.
[0023] The display device may further include a light blocking layer disposed between the inorganic layer and the reflection control layer.
[0024] The reflection control layer may contain a pigment or a dye.
[0025] Features of other embodiments are included in the detailed description and accompanying drawings.
[0026] According to the above-mentioned embodiments, the inorganic pattern may be partially formed in the folding area, the first edge area, and / or the second edge area to enhance the adhesion between the inorganic layer and the thin film encapsulation layer. Therefore, even when the display device is repeatedly folded, buckling or cracking in the folding area, the first edge area, and / or the second edge area may be minimized.
[0027] The effects of the embodiments of the present disclosure are not limited to the contents exemplified above, and various effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A top plan view illustrating an unfolded state of a foldable electronic device according to an embodiment.
[0029] Figure 2 Example Figure 1 A side view of a foldable electronic device in a folded state.
[0030] Figure 3 A schematic cross-sectional view illustrating a display panel according to an embodiment.
[0031] Figure 4 A top plan view illustrating a display panel according to an embodiment.
[0032] Figure 5 A schematic cross-sectional view illustrating a display panel according to an embodiment.
[0033] Figure 6 is a top plan view of an inorganic pattern according to an embodiment.
[0034] Figure 7 is a top plan view of an inorganic pattern according to an embodiment.
[0035] Figure 8 is a top plan view of an inorganic pattern according to an embodiment.
[0036] Fig. 9 is a top plan view of an inorganic pattern according to an embodiment.
[0037] Fig.10 is a top plan view of an inorganic pattern according to an embodiment.
[0038] Fig.11 is a top plan view of an inorganic pattern according to an embodiment. DETAILED DESCRIPTION
[0039] By referring to the following detailed description and the accompanying drawings of the embodiments, it is easier to understand the advantages and features of the present disclosure and the methods for implementing the present disclosure. However, the present disclosure can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. The embodiments are provided so that the present disclosure will be more detailed and complete, and will fully convey the scope of the present disclosure to those skilled in the art.
[0040] The terms used herein are only used to describe the purpose of specific embodiments and are not intended to be restrictive. As used herein, the singular forms "one" and "said" are intended to also include plural forms, unless the context clearly indicates otherwise. It will be further understood that the terms "comprise", "comprising" and "having" when used in the present disclosure clearly specify the presence of stated elements, steps, operations and / or devices, but do not exclude the presence or increase of one or more other elements, steps, operations and / or devices.
[0041] The term "connected" or "coupled" may broadly refer to a physical and / or electrical connection or coupling. This may broadly refer to a direct or indirect connection or coupling, and an integral or non-integral connection or coupling.
[0042] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it may be directly on, connected to, or coupled to another element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements. Moreover, when an element is referred to as being "in contact with," etc., another element, the element may be "electrically in contact with" or "physically in contact with" another element; or "indirectly in contact with" or "directly in contact with" another element. Throughout this specification, the same reference numerals represent the same constituent elements.
[0043] Although the terms "first", "second", etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, within the technical spirit of the present disclosure, the first component described below may be the second component.
[0044] It is also noted that as used herein, the terms "substantially," "about," and other similar terms are used as terms of approximation rather than terms of degree, and as such, are used to account for the inherent variations in measured, calculated, and / or provided values that those of ordinary skill in the art would recognize.
[0045] For the purpose of this disclosure, "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. Moreover, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0046] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an ideal or overly formal sense unless clearly defined in the specification.
[0047] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0048] Figure 1 A top plan view illustrating an unfolded state of a foldable electronic device according to an embodiment. Figure 2 Example Figure 1 A side view of a foldable electronic device in a folded state. Figure 1 and Figure 2 A display panel PNL provided in a foldable electronic device is illustrated.
[0049] refer to Figure 1 and Figure 2 , as an embodiment of a foldable electronic device, a display device (particularly, a display panel PNL included in the display device) will be described. The display panel PNL may include a first area A1, a second area A2 and / or a folding area (or bending area) FA. The first area A1 and the second area A2 may be spaced apart from each other in a first direction (X-axis direction). The folding area FA may be located between the first area A1 and the second area A2. The folding area FA may be folded (or bent) around a folding axis (or bending axis) A extending in a second direction (Y-axis direction) intersecting the first direction (X-axis direction).
[0050] When the display panel PNL is folded, the first area A1 and the second area A2 may face each other. For example, the first area A1 and the second area A2 may be connected to the hinge structure H located at the folding axis A to rotate relative to the hinge structure H. The first area A1 and the second area A2 may have shapes symmetrical to each other, but the present disclosure is not necessarily limited thereto. When the foldable electronic device (e.g., the display panel PNL) is unfolded, the hinge structure H may be covered by the first area A1 and the second area A2 without being exposed. When the display panel PNL is folded, the hinge structure H may be at least partially exposed to the outside after the first area A1 and the second area A2 are rotated.
[0051] The first area A1 may include a first display area DA1 that displays an image and a first non-display area NDA1 that does not display an image. The first non-display area NDA1 may be disposed adjacent to the first display area DA1.
[0052] The second area A2 may include a second display area DA2 displaying an image and a second non-display area NDA2 not displaying an image. The second non-display area NDA2 may be disposed adjacent to the second display area DA2.
[0053] The first display area DA1, the second display area DA2 and / or the folding area FA may configure a screen on which an image is displayed, and the first non-display area NDA1 and the second non-display area NDA2 may be areas other than the first display area DA1, the second display area DA2 and / or the folding area FA.
[0054] For better understanding and ease of description, Figure 1 , the structure of the display panel PNL is briefly illustrated with the first display area DA1, the second display area DA2 and the folding area FA as the center. However, in embodiments, at least one driving circuit component (e.g., at least one of a scan driver and a data driver), wiring and / or pad may be provided in the display panel PNL.
[0055] The pixel unit PXU may be disposed in the first display area DA1, the second display area DA2, and / or the folding area FA. The pixel unit PXU may include a first pixel PXL1, a second pixel PXL2, and / or a third pixel PXL3. Hereinafter, when any one of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 is arbitrarily referred to, or when two or more pixels thereof are broadly referred to, they will be referred to as "pixels PXL".
[0056] PXL can be based on stripes or PENTILE TM However, the arrangement structure of the pixels PXL is not limited thereto, and the pixels PXL may be arranged in the display area DA in various structures and / or methods.
[0057] In an embodiment, two or more pixels PXL emitting light of different colors may be disposed in the first display area DA1, the second display area DA2, and / or the folding area FA. For example, a first pixel PXL1 emitting light of a first color, a second pixel PXL2 emitting light of a second color, and a third pixel PXL3 emitting light of a third color may be arranged in the first display area DA1, the second display area DA2, and / or the folding area FA. At least one of the first to third pixels PXL1, PXL2, and PXL3 disposed adjacent to each other may form a pixel unit PXU that may emit light of various colors. For example, the first pixel PXL1 may be a red pixel emitting red light, the second pixel PXL2 may be a green pixel emitting green light, and the third pixel PXL3 may be a blue pixel emitting blue light, but the present disclosure is not limited thereto. Figure 3 The illustrated pixel unit PXU includes a first pixel PXL1, a second pixel PXL2 and a third pixel PXL3, but the present disclosure is not necessarily limited thereto, and in an embodiment, the pixel unit PXU may include a first pixel PXL1, two second pixels PXL2 and a third pixel PXL3.
[0058] The first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may each include a first light emitting element ( Figure 3 LD1 in), the second light emitting element ( Figure 3 LD2) and the third light emitting element ( Figure 3 LD3 in the first pixel PXL1, the second pixel PXL2 and the third pixel PXL3 can emit light of the first color, the second color and the third color, respectively. However, the present disclosure is not limited thereto, and the color of light emitted by each pixel PXL can be changed differently.
[0059] Figure 3 A schematic cross-sectional view illustrating a display panel according to an embodiment. Figure 3 A schematic cross section of a portion of the display panel PNL in the first display area DA1 or the second display area DA2 is illustrated. Figure 4 A top plan view illustrating a display panel according to an embodiment. Figure 5 A schematic cross-sectional view illustrating a display panel according to an embodiment. Figure 5 A schematic cross-sectional view illustrating a portion of the display panel PNL in the folding area FA, the first edge area EA1, or the second edge area EA2. Figures 6 to 11 A top plan view of an inorganic pattern according to an embodiment is illustrated.
[0060] refer to Figure 3, the first to third pixels PXL1 , PXL2 , and PXL3 may each include a light emitting area EMA, and the non-light emitting area NEMA may be located between the light emitting areas EMA of the first to third pixels PXL1 , PXL2 , and PXL3 .
[0061] The first to third pixels PXL1 , PXL2 , and PXL3 may each include a pixel circuit layer PCL, a display element layer DPL, and a thin film encapsulation layer TFE sequentially disposed on a substrate SUB.
[0062] The substrate SUB may form a base surface. The substrate SUB may include a transparent insulating material to transmit light. The substrate SUB may be a rigid substrate or a flexible substrate. For example, the rigid substrate may be one of a glass substrate, a quartz substrate, a glass ceramic substrate, and a crystallized glass substrate. The flexible substrate may be one of a film substrate and a plastic substrate including a polymer organic material. For example, the flexible substrate may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate, but the present disclosure is not necessarily limited thereto.
[0063] The pixel circuit layer PCL may include a pixel circuit provided on a substrate SUB. The pixel circuit layer PCL may include a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer (e.g., a protective layer) PSV, and a via layer VIA sequentially stacked on the substrate SUB in a third direction (Z-axis direction).
[0064] The buffer layer BFL may be an inorganic insulating film including an inorganic material. The buffer layer BFL may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and such as aluminum oxide (AlO x ) of the metal oxide of the substrate SUB. The buffer layer BFL may be provided as a single layer, or at least a double layer or more layers. In the case where the buffer layer BFL is provided as a multilayer, each of the multilayers may be made of the same material or a different material. Depending on the material of the substrate SUB, process conditions, etc., the buffer layer BFL may be omitted.
[0065] The transistor T may be disposed on the buffer layer BFL. The transistor T may include an active pattern ACT, a gate electrode GE, a first transistor electrode TE1, and a second transistor electrode TE2.
[0066] The active pattern ACT may be disposed on the buffer layer BFL. The active pattern ACT may include a polysilicon semiconductor. For example, the active pattern ACT may be formed by a low temperature polysilicon process. However, the present disclosure is not necessarily limited thereto, and the active pattern ACT may be formed of an oxide semiconductor, a metal oxide semiconductor, or the like.
[0067] Each active pattern ACT may include a channel region, a first contact region connected to one end of the channel region, and a second contact region connected to the other end of the channel region. The channel region, the first contact region, and the second contact region may be formed by a semiconductor layer that is not doped with impurities or doped with impurities. For example, the first contact region and the second contact region may be formed by a semiconductor layer doped with impurities, and the channel region may be formed by a semiconductor layer that is not doped with impurities. For example, p-type impurities may be used as impurities, but the present disclosure is not limited thereto. One of the first contact region and the second contact region may be a source region, and the other of the first contact region and the second contact region may be a drain region.
[0068] The gate insulating layer GI may be disposed on the active pattern ACT. The gate insulating layer GI may be an inorganic film (or inorganic insulating film) including an inorganic material. For example, the gate insulating layer GI may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and such as aluminum oxide (AlO x ) at least one of metal oxides. However, the material of the gate insulating layer GI is not limited thereto. In an embodiment, the gate insulating layer GI may be formed as an organic film (or organic insulating film) containing an organic material. The gate insulating layer GI may be provided as a single layer or a multilayer of at least two or more layers.
[0069] The gate electrode GE may be disposed on the gate insulating layer GI. The gate electrode GE may overlap the channel region of the active pattern ACT in a plan view. The gate electrode GE may be formed to have a single-layer structure including a material selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), aluminum neodymium (AlNd), titanium (Ti), aluminum (Al), silver (Ag), and alloys thereof, or may be formed to have a double-layer structure or a multi-layer structure including a low resistance material such as molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag) in order to reduce line resistance.
[0070] The interlayer insulating layer ILD may be disposed on the gate electrode GE. The interlayer insulating layer ILD and the gate insulating layer GI may include the same material, or the interlayer insulating layer ILD may include one or more materials selected from materials that may be included in the gate insulating layer GI.
[0071] The first transistor electrode TE1 and the second transistor electrode TE2 may be disposed on the interlayer insulating layer ILD.
[0072] The first transistor electrode TE1 of the transistor T may contact a first contact region of one end of the active pattern ACT through a contact hole penetrating the interlayer insulating layer ILD and the gate insulating layer GI. In the case where the first contact region is a source region, the first transistor electrode TE1 may be a first source electrode.
[0073] The second transistor electrode TE2 of the transistor T may contact the second contact region of the other end of the active pattern ACT through a contact hole penetrating the interlayer insulating layer ILD and the gate insulating layer GI. In the case where the second contact region is a drain region, the second transistor electrode TE2 may be a second drain electrode.
[0074] Each of the first and second transistor electrodes TE1 and TE2 and the gate electrode GE may contain the same material, or each of the first and second transistor electrodes TE1 and TE2 may contain one or more materials selected from materials that may be contained in the gate electrode GE.
[0075] The passivation layer PSV may be disposed on the first transistor electrode TE1 and the second transistor electrode TE2. The passivation layer PSV may be an inorganic film (or inorganic insulating film) including an inorganic material or an organic film (or organic insulating film) including an organic material. The inorganic film may include, for example, silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and such as aluminum oxide (AlO x ) The organic film may include, for example, at least one of polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin and benzocyclobutene resin.
[0076] In an embodiment, the passivation layer PSV and the interlayer insulating layer ILD may include the same material, but the present disclosure is not limited thereto. The passivation layer PSV may be provided as a single layer or a multi-layer of at least a double layer or more.
[0077] The via layer VIA may be disposed on the passivation layer PSV. The via layer VIA and the passivation layer PSV may include the same material, or the via layer VIA may include at least one selected from the materials that may be included in the passivation layer PSV. In an embodiment, the via layer VIA may be an organic film made of an organic material.
[0078] The display element layer DPL may be disposed on the pixel circuit layer PCL. The display element layer DPL may include a light emitting element LD that emits light. The first to third pixels PXL1, PXL2, and PXL3 may include first to third light emitting elements LD1, LD2, and LD3, respectively.
[0079] The first light emitting element LD1 may include an anode electrode AE, a first light emitting layer EML1, and a cathode electrode CE. The second light emitting element LD2 may include an anode electrode AE, a second light emitting layer EML2, and a cathode electrode CE. The third light emitting element LD3 may include an anode electrode AE, a third light emitting layer EML3, and a cathode electrode CE. For example, the first to third light emitting elements LD1, LD2, and LD3 may be top-emission organic light emitting elements.
[0080] The anode electrodes AE of the pixels PXL may be disposed in the emission area EMA and may be spaced apart from each other. The anode electrode AE of each pixel PXL may be electrically connected to the first transistor electrode TE1 of the transistor T of each pixel PXL through a contact hole penetrating the via layer VIA and the passivation layer PSV.
[0081] The bank PDL may be disposed on the anode electrode AE and the via layer VIA. The bank PDL may define (or partition) the emission area EMA of each pixel PXL. The bank PDL may include an opening partially exposing the anode electrode AE of each pixel PXL, and the opening may correspond to the emission area EMA of each pixel PXL.
[0082] The bank PDL may be an organic insulating layer made of an organic material, such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like.
[0083] In an embodiment, the dam PDL may include a light absorbing material, or may be used to absorb light introduced from the outside by a light absorber applied to the dam PDL. For example, the dam PDL may include a carbon-based black pigment. However, the present disclosure is not necessarily limited thereto, and the dam PDL may include an opaque metal material with a high light absorptivity, such as chromium (Cr), molybdenum (Mo), an alloy (MoTi) of molybdenum (Mo) and titanium (Ti), tungsten (W), vanadium (V), niobium (Nb), tantalum (Ta), manganese (Mn), cobalt (Co), or nickel (Ni).
[0084] The light emitting layer EML of each pixel PXL may be disposed on the anode electrode AE exposed by the bank PDL. The cathode electrode CE may be disposed on the light emitting layer EML. The cathode electrode CE may be disposed throughout the first to third pixels PXL1, PXL2, and PXL3. For example, the cathode electrode CE may be provided as a common electrode, but the present disclosure is not necessarily limited thereto.
[0085] The cathode electrode CE may be formed of a metal layer including at least one of Ag (silver), Mg (magnesium), Al (aluminum), Pt (platinum), Pd (palladium), Au (gold), Ni (nickel), Nd (neodymium), Ir (iridium), Cr (chromium) and alloys thereof and / or a transparent conductive layer including at least one of ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide) and ITZO (indium tin zinc oxide). In an embodiment, the cathode electrode CE may be formed of a double layer or more layers including a thin metal layer, for example, a triple layer of ITO / Ag / ITO.
[0086] The inorganic layer INL may be disposed on the cathode electrode CE. The inorganic layer INL may reduce reflectivity and increase transmittance to achieve an efficient display panel PNL. The inorganic layer INL may include bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta), and molybdenum oxide (MoO 3 For example, the inorganic layer INL can be formed by depositing bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta) and molybdenum oxide (MoO 3 ) are formed by at least one of the following. The refractive index of the inorganic layer INL may be greater than or equal to about 1.0. For example, the refractive index of the inorganic layer INL may be in the range of about 1.0 to about 3.0. The extinction coefficient of the inorganic layer INL may be less than or equal to about 4.0. For example, the extinction coefficient of the inorganic layer INL may be in the range of about 0.5 to about 4.0. As described above, by providing an inorganic layer INL with a low extinction coefficient, a high-efficiency display panel PNL can be achieved by reducing the reflectivity and improving the transmittance by inducing interference between the reflected light of the electrode layer and the inorganic layer INL. The thickness of the inorganic layer INL in the third direction (Z-axis direction) may be about to about , but the present disclosure is not necessarily limited thereto.
[0087] like Figure 3 As shown in FIG. 1 , the inorganic layer INL may at least partially cover the first display area DA1 or the second display area DA2. For example, the inorganic layer INL may cover the first display area DA1 except for the first edge area ( Figure 4 The portion other than EA1 in the second display area DA2 except the second edge area ( Figure 4 EA2) in the above. Figure 5 As shown in FIG. 1 , the inorganic layer INL may at least partially cover the light emitting element LD in the first area A1 .
[0088] The inorganic layer INL may include an inorganic pattern PT. Figure 4 As shown in FIG. 1 , in a plan view, the inorganic pattern PT may include a first inorganic pattern PT1 overlapping the folding area FA, a second inorganic pattern PT2 overlapping the first display area DA1 , and / or a third inorganic pattern PT3 overlapping the second display area DA2 .
[0089] The first inorganic pattern PT1 may be arranged in the second direction (Y-axis direction) within the folding area FA.
[0090] The second inorganic pattern PT2 may overlap the first edge area EA1 of the first display area DA1 in a plan view. The first edge area EA1 may be an area extending in the second direction (Y-axis direction) on an edge of the first display area DA1 in the first direction (X-axis direction). The second inorganic pattern PT2 may be arranged in the first edge area EA1 along the second direction (Y-axis direction).
[0091] The third inorganic pattern PT3 may overlap the second edge area EA2 of the second display area DA2 in a plan view. The second edge area EA2 may be an area extending in the second direction (Y-axis direction) on an edge of the second display area DA2 in the first direction (X-axis direction). The third inorganic pattern PT3 may be arranged in the second edge area EA2 along the second direction (Y-axis direction).
[0092] The thin film encapsulation layer TFE disposed on the inorganic layer INL (or the inorganic pattern PT) may contact the first to third inorganic patterns PT1, PT2, and PT3. In an embodiment, the inorganic pattern PT may expose the upper surface of the light emitting element LD (or the cathode electrode CE) disposed thereunder. The thin film encapsulation layer TFE may contact the upper surface of the light emitting element LD (or the cathode electrode CE) exposed by each inorganic pattern PT.
[0093] The first to third inorganic patterns PT1, PT2, and PT3 may be formed in the same pattern. In an embodiment, the first to third inorganic patterns PT1, PT2, and PT3 may have different patterns.
[0094] refer to Figure 6, the inorganic pattern PT may include an extension portion EP and protrusions PP1 and PP2 protruding from the extension portion EP. The extension portion EP may extend in the second direction (Y-axis direction). The first protrusion PP1 may protrude from the extension portion EP in the first direction (X-axis direction). The second protrusion PP2 may protrude from the extension portion EP in a direction opposite to the first direction (X-axis direction). In this embodiment, the width W of the inorganic pattern PT in the first direction (X-axis direction) (for example, the distance from the end of the first protrusion PP1 to the end of the second protrusion PP2) may be in the range of about 10 μm to about 15 μm, but the present disclosure is not necessarily limited thereto.
[0095] Figure 6 The case where the first protrusion PP1 and the second protrusion PP2 protrude from the same position of the extension portion EP in opposite directions is exemplified, but the present disclosure is not necessarily limited thereto. Figure 7 and Figure 8 As shown in FIG. 1 , the first protrusions PP1 and the second protrusions PP2 may be alternately arranged in the second direction (Y-axis direction) and may protrude in the first direction (X-axis direction). In a plan view, each of the first protrusions PP1 and the second protrusions PP2 may be formed in various shapes, such as a triangular shape (see FIG. 1 ). Figure 7 ), trapezoidal shape (see Figure 8 ) and circular shapes.
[0096] refer to Fig. 9 , the inorganic pattern PT may include a plurality of extensions EP1, EP2, and EP3. The first to third extensions EP1, EP2, and EP3 may each extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction). The second extension EP2 may be disposed between the first extension EP1 and the third extension EP3. The first protrusion PP1 and the second protrusion PP2 may protrude from the second extension EP2 in the first direction (X-axis direction) and intersect with the first extension EP1 or the third extension EP3. For example, the first protrusion PP1 may protrude from the second extension EP2 in the first direction (X-axis direction) and intersect with the third extension EP3. The second protrusion PP2 may protrude from the second extension EP2 in the opposite direction to the first direction (X-axis direction) and intersect with the first extension EP1.
[0097] refer to Fig.10 , the inorganic pattern PT may include an extension portion EP and bent portions BP1 and BP2 bent from the extension portion EP. The extension portion EP may extend in the second direction (Y-axis direction). The first bent portion BP1 may be bent from the extension portion EP in the first direction (X-axis direction). The second bent portion BP2 may be bent from the extension portion EP in a direction opposite to the first direction (X-axis direction).
[0098] refer to Fig.11 The inorganic patterns PT may each include holes HL spaced apart from each other, for example, holes HL spaced apart from each other in the second direction (Y-axis direction). The inorganic patterns PT may be spaced apart from each other in the second direction (Y-axis direction), and at least one hole HL is between the inorganic patterns PT.
[0099] In the above-mentioned embodiment, in the case where the inorganic pattern PT is partially formed in the folding area FA, the first edge area EA1 and / or the second edge area EA2, the contact area between the inorganic layer INL and the thin film encapsulation layer TFE can be increased to enhance the adhesive strength. For example, in the case where the inorganic layer INL is continuously formed in the folding area FA, the first edge area EA1 and / or the second edge area EA2, the average peeling force can be in the range of about 0.06 gf / inch to about 0.45 gf / inch, and in the case where the inorganic layer INL includes the inorganic pattern PT formed in the folding area FA, the first edge area EA1 and / or the second edge area EA2, the average peeling force can be in the range of about 0.23 gf / inch to about 0.86 gf / inch. It can be confirmed that the adhesive force can be improved by partially forming the inorganic pattern PT in the folding area FA, the first edge area EA1 and / or the second edge area EA2. Accordingly, even in the case of repeated folding in the folding area FA, the occurrence of buckling or cracking in the folding area FA, the first edge area EA1 and / or the second edge area EA2 may be minimized.
[0100] refer to Figure 5 , the thin film encapsulation layer TFE may be disposed on the display element layer DPL. The thin film encapsulation layer TFE may have a single-layer structure or a multi-layer structure. The thin film encapsulation layer TFE may include a plurality of insulating layers covering the light emitting element LD. The thin film encapsulation layer TFE may include at least one inorganic film and at least one organic film. For example, the thin film encapsulation layer TFE may have a structure in which inorganic films and organic films are alternately stacked on each other. In an embodiment, the thin film encapsulation layer TFE may be an encapsulation substrate of a layer disposed on the light emitting element LD and bonded to the substrate SUB through a sealant.
[0101] The sensing layer TS may be disposed on the thin film encapsulation layer TFE. The sensing layer TS may include a first insulating layer INS1, a first sensing conductive layer MT1, a second insulating layer INS2, a second sensing conductive layer MT2 and / or a third insulating layer INS3.
[0102] The first insulating layer INS1 may include an inorganic insulating film including an inorganic material or an organic insulating film including an organic material. The inorganic insulating film may include an inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x), silicon oxynitride (SiO x N y ), aluminum oxide (Al x O y ), titanium oxide (TiO x ), Tantalum Oxide (Ta x O y ), hafnium oxide (HfO x ) or zinc oxide (ZnO x ), but the present disclosure is not limited thereto. The organic insulating film may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin, but the present disclosure is not necessarily limited thereto. In an embodiment, the first insulating layer INS1 may be omitted, or may be configured as the uppermost layer of the thin film encapsulation layer TFE.
[0103] The first sensing conductive layer MT1 may be disposed on the first insulating layer INS1 or the thin film encapsulation layer TFE. The first sensing conductive layer MT1 may be partially open in a plan view and may not overlap with the light emitting element LD of each pixel PXL. For example, the first sensing conductive layer MT1 may be disposed in the non-light emitting area NEMA adjacent to the light emitting area EMA.
[0104] The first sensing conductive layer MT1 may include a metal layer or a transparent conductive layer. For example, the metal layer may include molybdenum, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), poly (3,4-ethylenedioxythiophene) (PEDOT), and metal nanowires, but the present disclosure is not necessarily limited thereto. The first sensing conductive layer MT1 may form a connection electrode connecting the sensing electrode.
[0105] The second insulating layer INS2 may be disposed on the first sensing conductive layer MT1. The second insulating layer INS2 and the first insulating layer INS1 may include the same material, or the second insulating layer INS2 may include one or more materials selected from materials that may be included in the first insulating layer INS1.
[0106] The second sensing conductive layer MT2 may be disposed on the second insulating layer INS2. The second sensing conductive layer MT2 may be partially open in a plan view and may not overlap with the light emitting element LD of each pixel PXL. For example, the second sensing conductive layer MT2 may be disposed in the non-light emitting area NEMA adjacent to the light emitting area EMA.
[0107] The second sensing conductive layer MT2 and the first sensing conductive layer MT1 may include the same material, or the second sensing conductive layer MT2 may include one or more materials selected from materials that may be included in the first sensing conductive layer MT1.
[0108] The second sensing conductive layer MT2 may be electrically connected to the first sensing conductive layer MT1 through a contact hole penetrating the second insulating layer INS2. The second sensing conductive layer MT2 may form a sensing electrode.
[0109] The third insulating layer INS3 may be disposed on the second sensing conductive layer MT2. The third insulating layer INS3 may include an organic film, but the present disclosure is not necessarily limited thereto. In an embodiment, the third insulating layer INS3 may be formed of an inorganic film, or may have a structure in which organic films and inorganic films are alternately stacked on each other.
[0110] The light blocking layer LBP may be disposed on the display element layer DPL, the thin film encapsulation layer TFE and / or the sensing layer TS. The light blocking layer LBP may include an opening overlapping the light emitting element LD in a plan view. For example, the light blocking layer LBP may be disposed to overlap the non-light emitting area NEMA around the light emitting area EMA.
[0111] The light blocking layer LBP may include a light blocking material to prevent light leakage and color mixing defects. For example, the light blocking layer LBP may include a black matrix, but the present disclosure is not necessarily limited thereto. In an embodiment, the light blocking layer LBP may include carbon black (CB) and / or titanium black (TiBK).
[0112] The reflection control layer RF may be disposed on the light blocking layer LBP. The reflection control layer RF may selectively absorb light reflected from the inside of the display panel PNL according to the wavelength of the light reflected from the inside of the display panel PNL, thereby improving visibility while preventing the light efficiency of the display panel PNL from being reduced. The reflection control layer RF may improve display quality by minimizing reflection of external light.
[0113] The reflection control layer RF may include a dye, a pigment, or a combination thereof. For example, the reflection control layer RF may include an oxazine compound, a cyanine compound, a porphyrazine compound, or a squarylium compound, but the present disclosure is not necessarily limited thereto.
[0114] The maximum absorption wavelength of the reflection control layer RF may be within a first wavelength range of about 490 nm to about 505 nm or within a second wavelength range of about 585 nm to about 600 nm. For example, the reflection control layer RF may absorb light having a wavelength outside the red, green, or blue emission wavelength range, thereby realizing a display panel PNL having excellent light efficiency.
[0115] Since the reflection control layer RF is provided on the display panel PNL, a separate polarizing plate and / or color filter can be omitted. Accordingly, the light loss of the display panel PNL can be minimized while maintaining the external light reflection performance. In the case where a separate color filter is provided, a reflection color band phenomenon may generally occur, and in order to compensate for this, an organic layer for planarization may need to be additionally applied, resulting in a thicker display panel and unfavorable characteristics in processing. The display panel PNL according to an embodiment may be provided with a reflection control layer RF to reduce the number of masks and realize a high-quality display device with a thin thickness.
[0116] A window WD may be provided on the reflection control layer RF. The window WD may protect members therebelow from external impacts and provide an input surface and / or a display surface to a user.
[0117] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure belongs will be able to make various modifications and changes.Therefore, the embodiments of the present disclosure described above can be implemented separately or in combination with each other.
[0118] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the attached claims, and should be interpreted as all technical spirits within the equivalent scope are included in the scope of the present disclosure.
Claims
1. A display device comprising a first area, a second area, and a bending area between the first area and the second area, characterized in that: The display device comprises: Light emitting element; an inorganic layer, disposed on the light-emitting element; and A thin film encapsulation layer is disposed on the inorganic layer, The inorganic layer includes a first inorganic pattern in the bending region.
2. The display device according to claim 1, characterized in that The first inorganic pattern includes an extension portion and a protrusion protruding from the extension portion.
3. The display device according to claim 1, characterized in that The first inorganic pattern includes an extension portion and a bent portion bent from the extension portion.
4. The display device according to claim 1, characterized in that The first inorganic pattern includes holes spaced apart from each other.
5. The display device according to claim 1, characterized in that The inorganic layer at least partially covers the light emitting element in the first region.
6. The display device according to claim 1, characterized in that The first region and the second region are spaced apart from each other in a first direction, and The bending region extends in a second direction intersecting the first direction.
7. The display device according to claim 6, characterized in that The first region includes a first edge region extending in the second direction at an edge of the first region, and The inorganic layer further includes a second inorganic pattern in the first edge region.
8. The display device according to claim 1, characterized in that: The inorganic layer includes one of bismuth, ytterbium, nickel, cobalt, beryllium, vanadium, titanium, zirconium, tungsten, tantalum, and molybdenum oxide.
9. The display device according to claim 1, characterized in that: The refractive index of the inorganic layer is greater than or equal to 1.
0.
10. The display device according to claim 1, characterized in that: The extinction coefficient of the inorganic layer is less than or equal to 4.0.