Gain-adjustable low-noise amplifier capable of optimizing linearity
By designing a linear bias adjustment module and impedance adjustment network in a low-noise amplifier, nonlinearity problems in low-gain states are solved, linearity and current utilization are improved, distortion risk is reduced, and input dynamic range is expanded.
Patent Information
- Application Number
- CN202420586710.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-03-24
- Filing Date
- 2024-03-25
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2034-03-25
AI Technical Summary
In the low gain state, the current and voltage at the bias point are small, resulting in severe nonlinearity in the low noise amplifier, resulting in poor linearity of the output signal and distortion of the system.
A gain adjustable low noise amplifier with optimized linearity is designed, and a linear bias adjustment module is adopted, including a first current adjustment unit, a second current adjustment unit, an adaptive bias main circuit and a biasing unit. The appropriate operating current is configured through different switch combinations to improve the linearity of the low noise amplifier in a low power consumption state.
Through the adaptive bias adjustment network, the linearity of the low-noise amplifier in low-power and low-gain mode is improved, the possibility of system distortion is reduced, and the good matching of gain and current is achieved through the impedance adjustment network, expanding the input dynamic range.
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Abstract
Description
Technical Field
[0001] The present application relates to the field of radio frequency front-end technology, and in particular to a gain-adjustable low-noise amplifier with optimized linearity. Background Art
[0002] The RF low noise amplifier (LNA) plays an important role in the RF receiver. As the first-stage active device of the RF receiving system, it needs to have a certain gain to amplify the weak signal received by the antenna and suppress the noise interference of the system's subsequent modules. Its own noise also needs to be as low as possible to ensure that the entire system has a high sensitivity. When the system receives a high-power signal from the antenna, in order to ensure that the system does not distort, the LNA is required to have the ability to reduce gain and expand dynamic range. Therefore, a linearity-optimized gain-adjustable low noise amplifier is an inevitable choice.
[0003] In traditional technology, there are two main types of gain-adjustable low-noise amplifiers: the first is based on attenuators to achieve gain adjustment, which has a low integration level and is no longer applicable; the second is to achieve gain adjustment by adjusting the bias. Although this amplifier can adjust current and gain, it has low linearity, especially in low-gain mode, where the linearity deteriorates significantly. High linearity plays an important role in reducing interference from adjacent channels and the generation of intermodulation components in the spectrum, but the usual means of improving linearity will deteriorate noise and gain. Therefore, the design of linearity-optimized gain-adjustable low-noise amplifiers needs to ensure a low noise figure while meeting the maximum gain requirement, and it is currently a hot topic of research.
[0004] HBT processes such as SiGe and GaAs have lower noise characteristics and larger transconductance gm, and have natural advantages in achieving low-power low-noise amplifiers with higher gain and linearity. Therefore, they can be used as process choices for the design of gain-adjustable low-noise amplifiers with optimized linearity. However, the gain-adjustable low-noise amplifier under this process uses a traditional bias adjustment network to adjust the gain and current. At low gain, the current and voltage at the bias point are small, and the LNA has serious nonlinearity, resulting in poor linearity of the output signal and distortion in the system.
[0005] However, the current low noise amplifier has the following technical problems:
[0006] In the low gain state, the current and voltage at the bias point are small, and the LNA is prone to serious nonlinearity, resulting in poor linearity of the output signal and distortion in the system. Utility Model Content
[0007] Based on this, it is necessary to provide a gain-adjustable low-noise amplifier with optimized linearity and high current utilization, which can provide corresponding operating current for the low-noise amplifier at different gain levels and meet the matching and noise requirements at different gains, in order to solve the above technical problems.
[0008] The present application provides a gain-adjustable low-noise amplifier with optimized linearity. The low-noise amplifier comprises:
[0009] A linear bias adjustment module, used for adjusting the operating current and linearity of the low noise amplifier based on the adjustable operating current;
[0010] The linear bias adjustment module includes a first current adjustment unit, a second current adjustment unit, an adaptive bias main circuit and a bias unit;
[0011] The first current regulating unit is connected to the bias unit, and comprises a corresponding switch component, and the corresponding switch component configures the required working current for the bias unit according to different gain gears;
[0012] The second current regulating unit is connected to the adaptive bias main circuit, and comprises a corresponding switch component, and the corresponding switch component configures the required working current for the adaptive bias main circuit according to different gain gears; the bias unit is used to realize the bias adjustment of the low noise amplifier based on the adjustable working current output by the first current regulating unit;
[0013] The adaptive bias main circuit is connected to the second current regulating unit and is used to adjust the linearity of the low noise amplifier based on the dynamically adjustable working current output by the second current regulating unit.
[0014] In one of the embodiments, the bias unit comprises a bias transistor;
[0015] The first current regulating unit includes at least one first current branch, the first current branch includes at least one switch S11 and at least one transistor M11, the switch S11 and the transistor M11 in the same first current branch are connected in series, and the output end of the first current branch is simultaneously connected to the base and the collector of the bias transistor;
[0016] The second current regulating unit comprises at least one second current branch, the second current branch comprises at least one switch S12 and at least one transistor M12, the switch S12 and the transistor M12 in the same first current branch are connected in series, and the output end of the second current branch is connected to the adaptive bias main circuit;
[0017] The first current regulating unit and the second current regulating unit are both independently controlled.
[0018] In one embodiment, the low noise amplifier further includes an input unit and an output unit, the input unit includes an input transistor, the output unit includes an output transistor, and the adaptive bias main circuit includes:
[0019] A first bias branch and a second bias branch, one end of the first bias branch and the second bias branch are connected to the second current regulating unit at the same time, the other end of the first bias branch is grounded, and the other end of the second bias branch is connected to the input transistor, the first bias branch and the second bias branch each include a plurality of elements and the number of elements in the first bias branch is greater than that in the second bias branch.
[0020] In one embodiment, the adaptive bias main circuit includes:
[0021] The first bias branch includes a diode D1 and a diode D2, the second bias branch includes a diode D3, the forward ports of the diode D1 and the diode D3 are connected to the second current regulating unit at the same time, and the negative port of the diode D3 is connected to the base of the input transistor;
[0022] and / or;
[0023] The first bias branch includes a transistor Q51 and a transistor Q52, the second bias branch includes a transistor Q53, the collectors and bases of the transistors Q51, Q52 and Q53 are short-circuited, the collectors of the transistors Q51 and Q53 are connected to the second current regulating unit, and the emitter of the transistor Q53 is connected to the base of the input transistor;
[0024] and / or;
[0025] The first bias branch includes an NMOS tube M51 and an NMOS tube M52, and the second bias branch includes an NMOS tube M53. The drains and gates of the NMOS tubes M51, M52 and M53 are short-circuited, the drains of the NMOS tubes M51 and M52 are connected to the second current regulating unit, and the source of the NMOS tube M53 is connected to the base of the input transistor.
[0026] In one embodiment, the low noise amplifier also includes an input matching adjustment module and an output matching adjustment module, the input matching adjustment module is connected to the input unit, the output matching adjustment module is connected to the output unit, and the input matching adjustment module and the output matching adjustment module both include a combination of one or more of a resistance adjustment circuit, an inductance adjustment circuit, and a capacitance adjustment circuit.
[0027] In one embodiment, the resistance adjustment circuit includes:
[0028] A resistance adjustment branch, wherein the resistance adjustment branch includes a resistance adjustment switch and an adjustment resistor, wherein the resistance adjustment switch is connected in series with the adjustment resistor, and different resistance adjustment branches are connected in parallel, or the resistance adjustment switch is connected in parallel with the adjustment resistor, and different resistance adjustment branches are connected in series, and the resistance adjustment switch in the same resistance adjustment branch controls the on and off of the resistance adjustment branch.
[0029] In one embodiment, the capacitance adjustment circuit includes:
[0030] A capacitor adjustment branch, wherein the capacitor adjustment branch includes a capacitor adjustment switch and an adjustment capacitor, wherein the capacitor adjustment switch is connected in series with the adjustment capacitor, and different capacitor adjustment branches are connected in parallel, or the capacitor adjustment switch is connected in parallel with the adjustment capacitor, and different capacitor adjustment branches are connected in series, and the capacitor adjustment switch in the same capacitor adjustment branch controls the on and off of the capacitor adjustment branch.
[0031] In one embodiment, the inductance adjustment circuit includes:
[0032] An inductance regulating branch, wherein the inductance regulating branch comprises an inductance regulating switch and a regulating inductor, wherein the inductance regulating switch is connected in series with the regulating inductor, and different inductance regulating branches are connected in parallel, or the inductance regulating switch is connected in parallel with the regulating inductor, and different inductance regulating branches are connected in series, and the inductance regulating switch in the same inductance regulating branch controls the on and off of the inductance regulating branch.
[0033] In one embodiment, the low noise amplifier further includes an output unit and a feedback regulation module, and the feedback regulation module includes:
[0034] A main feedback unit connected between the input unit and the linear bias adjustment module, the main feedback unit comprising a feedback switch and a first feedback resistance adjustment circuit, the feedback switch being connected to the feedback resistance adjustment circuit;
[0035] A secondary feedback unit, connected to the primary feedback unit and the output unit at the same time, the secondary feedback unit comprising a feedback capacitor and a second feedback resistance adjustment circuit;
[0036] The main feedback unit and the secondary feedback unit are both used to adjust the gain, input-output matching, linearity and gain phase of the low noise amplifier.
[0037] In one embodiment, the low noise amplifier further comprises an output unit, wherein the output unit comprises an output transistor, and the collector of the input transistor is connected to the emitter of the output transistor.
[0038] The above-mentioned gain-adjustable low-noise amplifier with optimized linearity can achieve the following beneficial effects by being derived through the technical features in the patent:
[0039] On the basis of the traditional bias adjustment network, an adaptive bias adjustment network is set to form a linear bias adjustment module, which is used to configure the corresponding working current for the bias main circuit of the low noise amplifier under different gain gears, which helps to improve the linearity of the low noise amplifier in a low power state, so as to meet the linearity requirements of the low noise amplifier in a low power and low gain mode in the application, thereby helping to reduce the possibility of distortion of the low noise amplifier in the application. On the other hand, multiple impedance adjustment networks such as input matching adjustment modules and output matching adjustment modules are configured on the basis of the linearized bias adjustment network, which helps to achieve gain adjustment and current adjustment through different switch combinations of each adjustment network, so that the gain and working current of the low noise amplifier can achieve good impedance matching and phase matching capabilities, which ultimately helps to expand the input dynamic range of the low noise amplifier. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 The overall structural block diagram of a gain-adjustable low-noise amplifier with optimized linearity in one embodiment;
[0041] Figure 2 A schematic diagram of a network structure of a first current regulating unit or a second current regulating unit in an embodiment;
[0042] Figure 3 is a schematic diagram of a first network structure of an adaptive bias main circuit in one embodiment;
[0043] Figure 4 is a schematic diagram of a second network structure of an adaptive bias main circuit in another embodiment;
[0044] Figure 5 is a schematic diagram of a third network structure of an adaptive bias main circuit in another embodiment;
[0045] Figure 6 A schematic diagram of a network structure of a resistance adjustment circuit in one embodiment;
[0046] Figure 7 A schematic diagram of a network structure of a capacitance adjustment circuit in one embodiment;
[0047] Figure 8 is a schematic diagram of a network structure of an inductance adjustment circuit in one embodiment;
[0048] Fig. 9 It is a circuit structure schematic diagram of a gain-adjustable low-noise amplifier with optimized linearity in a specific embodiment;
[0049] Fig.10 The figure is a schematic diagram showing a comparison of the linearity of a gain-adjustable low-noise amplifier with optimized linearity and a traditional low-noise amplifier in an embodiment. DETAILED DESCRIPTION
[0050] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0051] It should be noted that when an element is referred to as being "disposed on" another element, it may be directly on the other element or there may be an element in the middle. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an element in the middle. The terms "fit", "bottom" and similar expressions used herein are for illustrative purposes only and are not intended to be the only implementation method.
[0052] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0053] In the present disclosure, unless otherwise clearly specified and limited, the terms "assembly", "installation", "connection", "fixation" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral molding; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0055] In traditional technology, there are two main types of gain-adjustable low-noise amplifiers: the first is based on attenuators to achieve gain adjustment, which has a low integration level and is no longer applicable; the second is to achieve gain adjustment by adjusting the bias. Although this amplifier can adjust current and gain, it has low linearity, especially in low-gain mode, where the linearity deteriorates significantly. High linearity plays an important role in reducing interference from adjacent channels and the generation of intermodulation components in the spectrum, but the usual means of improving linearity will deteriorate noise and gain. Therefore, the design of linearity-optimized gain-adjustable low-noise amplifiers needs to ensure a low noise figure while meeting the maximum gain requirement, and it is currently a hot topic of research.
[0056] HBT processes such as SiGe and GaAs have lower noise characteristics and larger transconductance gm, and have natural advantages in realizing low-power low-noise amplifiers with higher gain and linearity. Therefore, they can be used as process choices for the design of gain-adjustable low-noise amplifiers with optimized linearity. However, the gain-adjustable low-noise amplifier under this process uses a traditional bias adjustment network to adjust the gain and current. There is still a problem that when the gain is low, the current and voltage at the bias point are small, the LNA has serious nonlinearity, resulting in poor linearity of the output signal and distortion of the system. However, in the low-gain state, the current and voltage at the bias point are small, and the LNA is prone to serious nonlinearity, resulting in poor linearity of the output signal and distortion of the system.
[0057] Based on this, this scheme provides a gain-adjustable low-noise amplifier with optimized linearity, which can be Figure 1 As shown, the low noise amplifier includes: a linear bias adjustment module 100, an input matching adjustment module 200, an output matching adjustment module 300, a feedback adjustment module 400, an input transistor Q02 and an output transistor Q03.
[0058] Exemplarily, the linear bias adjustment module 100 is used to make the low noise amplifier in a bias state of optimizing linearity based on an adjustable working current, and may include: a first current adjustment unit 102, a second current adjustment unit 104, an adaptive bias main circuit 106, and a bias unit Q01. Among them, the first current adjustment unit 102 and the bias unit Q01 together constitute a traditional bias adjustment network, thereby providing a conventional static working point for the low noise amplifier, and adjusting the working current of the low noise amplifier through the first current adjustment unit 102. Among them, the second current adjustment unit 104 and the adaptive bias main circuit 106 together constitute an adaptive bias adjustment network, so that when the low noise amplifier receives a large signal, the low noise amplifier is current compensated, thereby helping to offset the trend of the circuit node base voltage becoming smaller due to the large signal swing, maintaining the stability of the base bias of the input transistor Q02, and thus achieving the effect of improving the linearity of the low noise amplifier. On the other hand, the adaptive bias adjustment network composed of the second current adjustment unit 104 and the adaptive bias main circuit 106 can also assist in the adjustment of the static working point of the low noise amplifier. Specifically, the linear bias adjustment module 100 can configure the operating current of the low-noise amplifier at different gain levels through different switch combinations in the first current adjustment unit 102 and the second current adjustment unit 104, so that the low-noise amplifier can be in a bias state with better linearity to simultaneously meet the linearity requirements and low power consumption requirements of the circuit system.
[0059] Exemplarily, the input matching adjustment module 200 is used to adjust the gain, input matching impedance, linearity and gain phase of the low noise amplifier, and may include: capacitor C01, capacitor adjustment circuit 202 and inductance adjustment circuit 204. The input matching adjustment module 200 can participate in the input impedance matching and gain adjustment of the low noise amplifier, so that the low noise amplifier can have better input impedance and linearity when it is in different gain gears. On the other hand, in addition to participating in gain adjustment, the capacitor adjustment circuit 202 and the inductance adjustment circuit 204 in the input matching adjustment module 200 can also perform phase adjustment so that the phase of different gain gears fluctuates within a reasonable range.
[0060] Exemplarily, the output matching adjustment module 300 is used to adjust the gain, output matching impedance, linearity and gain phase of the low noise amplifier, and may include: capacitor C05, inductive load L01, resistance adjustment circuit 302, resistance adjustment circuit 304 and capacitance adjustment circuit 306. The output matching adjustment module 300 can participate in the output impedance matching and gain adjustment of the low noise amplifier, so that the low noise amplifier can have better output impedance and linearity when it is in different gain gears. On the other hand, in addition to participating in gain adjustment, the capacitance adjustment circuit 306 in the output matching adjustment module 300 can also perform phase adjustment to ensure that the phase of different gain gears fluctuates within a reasonable range.
[0061] Exemplarily, the input transistor Q02 may be an input transistor of a low noise amplifier, and may be used to amplify a radio frequency input signal. The base of the input transistor Q02 may be connected to one end of the capacitor adjustment circuit 202, one end of the capacitor C01, one end of the capacitor C02, one end of the adaptive bias main circuit 106, and the base of the bias unit Q01. The emitter of the input transistor Q02 is connected to the other end of the capacitor adjustment circuit 202 and one end of the inductance adjustment circuit 204. The collector of the input transistor Q02 may be connected to the emitter of the output transistor Q03.
[0062] Exemplarily, the output transistor Q03 can be an output transistor of a low noise amplifier, which can be used to output a radio frequency signal and improve the isolation between the radio frequency input signal and the radio frequency output signal. The base of the output transistor Q03 can be connected to one end of the capacitor C04 and the bias voltage VB. The emitter of the output transistor Q03 is connected to the collector of the input transistor Q02. The collector of the output transistor Q03 can be connected to the load inductor L01, one end of the resistance adjustment circuit 302, the capacitor C05, and one end of the capacitance adjustment circuit 306.
[0063] The feedback adjustment module 400 can be used to adjust the gain, input-output matching, linearity and gain phase of the low noise amplifier.
[0064] By implementing the above-mentioned gain-adjustable low-noise amplifier with optimized linearity, the following beneficial effects can be achieved:
[0065] On the basis of the traditional bias adjustment network, an adaptive bias adjustment network is set to form a linear bias adjustment module, which is used to configure the corresponding working current for the bias main circuit of the low noise amplifier under different gain gears, which helps to improve the linearity of the low noise amplifier in a low power state, so as to meet the linearity requirements of the low noise amplifier in a low power and low gain mode in the application, thereby helping to reduce the possibility of distortion of the low noise amplifier in the application. On the other hand, multiple impedance adjustment networks such as input matching adjustment modules and output matching adjustment modules are configured on the basis of the linearized bias adjustment network, which helps to achieve gain adjustment and current adjustment through different switch combinations of each adjustment network, so that the gain and working current of the low noise amplifier can achieve good impedance matching and phase matching capabilities, which ultimately helps to expand the input dynamic range of the low noise amplifier.
[0066] In one embodiment, the Figure 2 As shown, the first current regulating unit 102 and the second current regulating unit 104 may adopt the same network structure.
[0067] Exemplarily, the first current regulating unit 102 or the second current regulating unit 104 may include: a first current branch composed of a switch S11 and a PMOS amplifier tube M11 connected in series, and a second current branch composed of a switch S12 and a PMOS transistor M12 connected in series. It should be noted that the first current branch or the second current branch may not be limited to two, but may be one or more, and the number of PMOS transistors in each current branch may be one or more.
[0068] In implementation, when there is only one current branch, the current regulation network is a fixed current network, which provides a fixed current for the bias unit Q01, thereby providing a determined static operating point for the input transistor Q02. When there are multiple current branches, the current regulation network can control the on-off of the switch, select different currents for the bias unit Q01, and thus realize the bias adjustment function of the LNA. It should be noted that the circuit architecture in the first current regulation unit 102 and the circuit architecture of the second current regulation unit 104 can be consistent but independent of each other in control. Under independent control, the first current regulation unit 102 or the second current regulation unit 104 can control the on-off of the switch, configure different operating currents for the adaptive bias main circuit 106, and thus realize auxiliary adjustment and linearity improvement that help to realize the bias of the low noise amplifier.
[0069] In this embodiment, multiple independently controlled current branches are configured in the first current regulating unit 102 or the second current regulating unit 104, which helps to achieve flexible current regulation, and ultimately helps to achieve auxiliary regulation of the bias of the low noise amplifier and improve the linearity.
[0070] In one embodiment, the adaptive bias main circuit 106 may include a first bias branch and a second bias branch. The first bias branch and the second bias branch may be connected to the second current regulating unit at the same time. The first bias branch or the second bias branch may be connected to the input transistor Q02.
[0071] In one embodiment, the first bias branch and the second bias branch in the adaptive bias main circuit 106 can be composed of diodes, transistors or MOS tubes. The first bias branch and the second bias branch can both include multiple elements and the number of elements in the first bias branch is greater than that in the second bias branch.
[0072] For example, it can be Figure 3 As shown, the adaptive bias circuit 150-a composed of diodes includes: a first bias branch composed of a diode D1 and a diode D2, a second bias branch composed of a diode D3, the forward ports of the diodes D1 and D3 are connected to the first current regulating unit 102, and the negative port of the diode D3 is connected to the base of the input transistor Q02 of the low noise amplifier.
[0073] For example, it can be Figure 4 As shown, the adaptive bias circuit 150-b composed of bipolar transistors may include: a first bias branch composed of a transistor Q51 and a transistor Q52, a second bias branch composed of a transistor Q53, the collectors and bases of the transistors Q51, Q52 and Q53 are short-circuited and can be converted into a diode connection state, the collectors of the transistors Q51 and Q53 are connected to the first current regulating unit 102, and the emitter of the transistor Q53 can be connected to the base of the input transistor Q02 of the low noise amplifier.
[0074] For example, it can be Figure 5 As shown, the adaptive bias circuit 150-c composed of NMOS transistors includes: a first bias branch composed of NMOS transistors M51 and NMOS transistors M52, a second bias branch composed of NMOS transistors M53, the drains and gates of the NMOS transistors M51, M52, and M53 are short-circuited and converted into a diode connection state, the drains of the NMOS transistors M51 and M53 are connected to the first current regulating unit 102, and the source of the NMOS transistor M53 is connected to the base of the input transistor Q02 of the low noise amplifier.
[0075] In this embodiment, the specific structure of the adaptive bias main circuit 106 has a variety of optional configuration modes, which helps technicians to make corresponding configurations according to actual usage requirements, thereby improving the flexibility of the low noise amplifier in application.
[0076] In one embodiment, the input matching adjustment module 200 and the output matching adjustment module 300 may include a combination of one or more of a resistance adjustment circuit, an inductance adjustment circuit, and a capacitance adjustment circuit.
[0077] In one embodiment, the Figure 6 As shown, the resistance adjustment circuit 302 can be a parallel resistance adjustment circuit 302-a, or a series resistance adjustment circuit 302-b, or a combination of a parallel resistance adjustment circuit 302-a and a series resistance adjustment circuit 302-b. Specifically, different resistance adjustment circuits can be selected according to different application requirements and tuning methods. Among them, the parallel resistance adjustment circuit 302-a includes: a resistance control branch composed of a switch S21 and a resistor R21 connected in series, another resistance control branch composed of a switch S22 and a resistor R22 connected in series, and the two resistance control branches are connected in parallel to form a network 320-a; wherein the series resistance adjustment circuit 302-b includes: a resistance control branch composed of a switch S23 and a resistor R23 connected in parallel, another resistance control branch composed of a switch S24 and a resistor R24 connected in parallel, and the two resistance control branches are connected in series to form a network 302-b. It should be noted that the resistance control branches in the parallel resistance adjustment circuit 302-a and the series resistance adjustment circuit 302-b may not be limited to two, but may be one or more; the resistance value of each resistor may be the same or different, and multiple resistors may be combined into different resistance values by turning on and off the switch to realize the resistance adjustment function in the circuit. It should be noted that the series and parallel resistance adjustment circuits that can be selected in other resistance adjustment circuits are the same as those that can be selected in the resistance adjustment circuit 302.
[0078] In one embodiment, the Figure 7As shown, the capacitor adjustment circuit 202 can be a parallel capacitor adjustment circuit 202-a, a series capacitor adjustment circuit 202-b, or a combination of the parallel capacitor adjustment circuit 202-a and the series capacitor adjustment circuit 202-b. Specifically, different capacitor adjustment circuits can be selected according to different application requirements and tuning methods. The parallel capacitor adjustment circuit 202-a includes: a capacitor control branch composed of a switch S31 and a capacitor C31 in series, another capacitor control branch composed of a switch S32 and a capacitor C32 in series, and the two capacitor control branches are connected in parallel to form the parallel capacitor adjustment circuit 202-a; wherein the series capacitor adjustment circuit 202-b includes: a capacitor control branch composed of a switch S33 and a capacitor C33 in parallel, another capacitor control branch composed of a switch S34 and a capacitor C34 in parallel, and the two capacitor control branches are connected in series to form the series capacitor adjustment circuit 202-b. It should be noted that the capacitance control branches of the parallel capacitance adjustment circuit 202-a and the series capacitance adjustment circuit 202-b are not limited to two, but can be one or more. The capacitance values of the capacitors can be the same or different, and they form different capacitance values through the on and off of the switch to realize the capacitance adjustment function in the circuit. It should be noted that the series and parallel capacitance adjustment circuits that can be selected by the capacitance adjustment circuit 202 are the same as the case where the capacitance adjustment circuit 202 can be selected.
[0079] In one embodiment, the Figure 8 As shown, the inductance adjustment circuit 204 can be a parallel inductance adjustment circuit 204-a, a series inductance adjustment circuit 204-b, or a combination of the parallel inductance adjustment circuit 204-a and the series inductance adjustment circuit 204-b. Specifically, different inductance adjustment circuits can be selected according to different application requirements and tuning methods. The parallel inductance adjustment circuit 204-a includes: an inductance control branch composed of a switch S41 and an inductor L41 connected in series, another inductance control branch composed of a switch S42 and an inductor L42 connected in series, and the two inductance control branches are connected in parallel to form the parallel inductance adjustment circuit 204-a; the series inductance adjustment circuit 204-b includes: an inductance control branch composed of a switch S43 and an inductor L43 connected in parallel, another inductance control branch composed of a switch S44 and a resistor L44 connected in parallel, and the two inductance control branches are connected in series to form the series inductance adjustment circuit 204-b. It should be noted that the inductance control branches of the parallel inductance adjustment circuit 204-a and the series inductance adjustment circuit 204-b are not limited to two, it can be one or more; the inductance value of each inductor can be the same or different, and they are combined into different inductance values through the on and off of the switch to realize the inductance adjustment function in the circuit.
[0080] In one embodiment, the feedback adjustment module 400 may include:
[0081] The main feedback unit includes a feedback switch and a feedback resistance adjustment circuit 420. Specifically, the feedback capacitor C02, the resistance adjustment circuit 420, the switch S01, and the feedback capacitor C03 are connected in series in sequence. One end of the feedback adjustment module 400 is connected to the base of the input transistor Q02, and the other end is connected to the collector of the output transistor Q03. The main feedback unit participates in the input and output impedance matching and gain adjustment of the low noise amplifier, which can make the low noise amplifier have good linearity and matching when it is in different gain gears.
[0082] The secondary feedback unit includes a feedback capacitor and the feedback resistance adjustment circuit 520. Specifically, the feedback capacitor C04, the resistance adjustment circuit 520, and the feedback adjustment module 400 are connected to the base of the output transistor Q03 at one end, and the collector of the output transistor Q03 at the other end. The secondary feedback unit participates in the output impedance matching and gain adjustment of the low noise amplifier, so that the low noise amplifier has good linearity and matching when it is in different gain gears.
[0083] In one embodiment, the collector of the input transistor Q02 is connected to the emitter of the output transistor Q03. Specifically, the collector of the input transistor Q02 is connected to the emitter of the output transistor Q03 to form a cascode architecture; the base of the input transistor Q02 is connected to one end of the capacitance adjustment circuit 202, one end of the capacitor C01, one end of the capacitor C02, one end of the adaptive bias main circuit 106, and the base of the bias unit Q01; the emitter of the input transistor Q02 is connected to the other end of the capacitance adjustment circuit 202 and one end of the inductance adjustment circuit 204. The base of the output transistor Q03 is connected to one end of the capacitor C04 and the bias voltage VB; the emitter of the output transistor Q03 is connected to the collector of the input transistor Q02 to form a cascode architecture; the collector of the output transistor Q03 is connected to the load inductor L01, one end of the resistance adjustment circuit 302, the capacitor C05, and one end of the capacitance adjustment circuit 202.
[0084] In one embodiment, the manufacturing process of the low noise amplifier may include: SiGe, GaAs-pHEMT, HBT, BJT and other processes.
[0085] In one embodiment, the low noise amplifier can be implemented in various ways such as IC, RFIC, digital-analog hybrid IC, ASIC, etc.
[0086] In a most specific embodiment, it can be Fig. 9As shown, the linearization bias network is composed of a first current regulating unit 102 for controlling the main bias, a second current regulating unit 104 for controlling the adaptive bias, a bias unit Q01, a diode D1, a diode D2, and a diode D3; the input matching network 200 is composed of a capacitor C01, a capacitor C31, a capacitor C32, an inductor L43, an inductor L44, a switch S43, a switch S44, a switch S31, and a switch S32; the output matching network 300 is composed of an inductor L01, a capacitor C05, a capacitor C35, a resistor R21, a resistor R22, a resistor R26, a switch S35, a switch S21, a switch S22, and a switch S26; the main feedback regulation module is composed of a capacitor C05, a capacitor C31, a resistor R23, a resistor R24, a switch S23, a switch S24, and a switch S01; the secondary feedback regulation module is composed of a capacitor C04, a resistor R25, and a switch S25; the first-stage transistor Q02 and the second-stage transistor Q03 form a cascode structure.
[0087] Exemplarily, when switches S43, S44, S01 and the first current regulating unit 102 controlling the main bias and the second current regulating unit 104 controlling the adaptive bias are all closed, and all other switches are disconnected, the maximum active gain of the low noise amplifier can be obtained; by adjusting any other switch, the gain can be gradually reduced to 0dB gain or even negative gain. When switches S01, S23, S24, S26, S35 are closed and all other switches are disconnected, the maximum passive gain of the low noise amplifier (a negative value, i.e., insertion loss) can be obtained, and by adjusting any other switch, the insertion loss can be gradually increased. A variety of switch combinations can achieve a variety of different levels of gain adjustment.
[0088] For example, it can be Fig.10 As shown in Figure 1, the linearity of the gain-adjustable low noise amplifier with a linearized bias adjustment network and the gain-adjustable LNA with a traditional bias adjustment structure are compared. In order to make the variables relatively simple, Fig. 9 The negative port of the diode D3 in the circuit is disconnected from the RF circuit, and a gain-adjustable low-noise amplifier with a conventional bias structure is obtained. The comparison results can be shown in the following table:
[0089] LNA Type Current Gain Noise Figure Input 1dB compression point Conventional Biased LNA 4mA 21dB 0.7dB -19dB This application LNA 4mA 21dB 0.7dB -13dB
[0090] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0091] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A gain-adjustable low-noise amplifier with optimized linearity, characterized in that: The low noise amplifier comprises: A linear bias adjustment module, used for adjusting the operating current and linearity of the low noise amplifier based on the adjustable operating current; The linear bias adjustment module includes a first current adjustment unit, a second current adjustment unit, an adaptive bias main circuit and a bias unit; The first current regulating unit is connected to the bias unit, and comprises a corresponding switch component, and the corresponding switch component configures the required working current for the bias unit according to different gain gears; The second current regulating unit is connected to the adaptive bias main circuit, and comprises a corresponding switch component, and the corresponding switch component configures the required working current for the adaptive bias main circuit according to different gain gears; the bias unit is used to realize the bias adjustment of the low noise amplifier based on the adjustable working current output by the first current regulating unit; The adaptive bias main circuit is connected to the second current regulating unit and is used to adjust the linearity of the low noise amplifier based on the dynamically adjustable working current output by the second current regulating unit.
2. The gain-adjustable low-noise amplifier with optimized linearity according to claim 1, characterized in that: The bias unit includes a bias transistor; The first current regulating unit includes at least one first current branch, the first current branch includes at least one switch S11 and at least one transistor M11, the switch S11 and the transistor M11 in the same first current branch are connected in series, and the output end of the first current branch is simultaneously connected to the base and the collector of the bias transistor; The second current regulating unit comprises at least one second current branch, the second current branch comprises at least one switch S12 and at least one transistor M12, the switch S12 and the transistor M12 in the same first current branch are connected in series, and the output end of the second current branch is connected to the adaptive bias main circuit; The first current regulating unit and the second current regulating unit are both independently controlled.
3. The gain-adjustable low-noise amplifier with optimized linearity according to claim 2, characterized in that: The low noise amplifier further includes an input unit and an output unit, wherein the input unit includes an input transistor, and the adaptive bias main circuit includes: A first bias branch and a second bias branch, one end of the first bias branch and the second bias branch are connected to the second current regulating unit at the same time, the other end of the first bias branch is grounded, and the other end of the second bias branch is connected to the input transistor, the first bias branch and the second bias branch each include a plurality of elements and the number of elements in the first bias branch is greater than that in the second bias branch.
4. The gain-adjustable low-noise amplifier with optimized linearity according to claim 3, characterized in that: The adaptive bias main circuit comprises: The first bias branch includes a diode D1 and a diode D2, and the second bias branch includes a diode D3. The forward ports of the diode D1 and the diode D3 are connected to the second current regulating unit at the same time, and the negative port of the diode D3 is connected to the base of the input transistor.
5. The gain-adjustable low-noise amplifier with optimized linearity according to claim 3, characterized in that: The low noise amplifier also includes an input matching adjustment module and an output matching adjustment module, the input matching adjustment module is connected to the input unit, the output matching adjustment module is connected to the output unit, and the input matching adjustment module and the output matching adjustment module both include a combination of one or more of a resistance adjustment circuit, an inductance adjustment circuit, and a capacitance adjustment circuit.
6. The gain-adjustable low-noise amplifier with optimized linearity according to claim 5, characterized in that: The resistance adjustment circuit comprises: A resistance adjustment branch, wherein the resistance adjustment branch includes a resistance adjustment switch and an adjustment resistor, wherein the resistance adjustment switch is connected in series with the adjustment resistor, and different resistance adjustment branches are connected in parallel, or the resistance adjustment switch is connected in parallel with the adjustment resistor, and different resistance adjustment branches are connected in series, and the resistance adjustment switch in the same resistance adjustment branch controls the on and off of the resistance adjustment branch.
7. The gain-adjustable low-noise amplifier with optimized linearity according to claim 5, characterized in that: The capacitance adjustment circuit comprises: A capacitor adjustment branch, wherein the capacitor adjustment branch includes a capacitor adjustment switch and an adjustment capacitor, wherein the capacitor adjustment switch is connected in series with the adjustment capacitor, and different capacitor adjustment branches are connected in parallel, or the capacitor adjustment switch is connected in parallel with the adjustment capacitor, and different capacitor adjustment branches are connected in series, and the capacitor adjustment switch in the same capacitor adjustment branch controls the on and off of the capacitor adjustment branch.
8. The gain-adjustable low-noise amplifier with optimized linearity according to claim 5, characterized in that: The inductance adjustment circuit comprises: An inductance regulating branch, wherein the inductance regulating branch comprises an inductance regulating switch and a regulating inductor, wherein the inductance regulating switch is connected in series with the regulating inductor, and different inductance regulating branches are connected in parallel, or the inductance regulating switch is connected in parallel with the regulating inductor, and different inductance regulating branches are connected in series, and the inductance regulating switch in the same inductance regulating branch controls the on and off of the inductance regulating branch.
9. The gain-adjustable low-noise amplifier with optimized linearity according to claim 3, characterized in that: The low noise amplifier further includes a feedback regulation module, and the feedback regulation module includes: A main feedback unit connected between the input unit and the linear bias adjustment module, the main feedback unit comprising a feedback switch and a first feedback resistance adjustment circuit, the feedback switch being connected to the feedback resistance adjustment circuit; A secondary feedback unit, connected to the primary feedback unit and the output unit at the same time, the secondary feedback unit comprising a feedback capacitor and a second feedback resistance adjustment circuit; The main feedback unit and the secondary feedback unit are both used to adjust the gain, input-output matching, linearity and gain phase of the low noise amplifier.
10. The gain-adjustable low-noise amplifier with optimized linearity according to claim 3, characterized in that: The output unit includes an output transistor, and a collector of the input transistor is connected to an emitter of the output transistor.