Solid-State Devices TRIZ Cases

A TFT substrate integrates antenna unit regions with liquid crystal layers to enable beam scanning functionality.

Varying organic layer thicknesses within sub-pixels balances front brightness and color viewing angle by creating localized micro-cavities.

Buried films fill wiring layer level differences to prevent peeling and chipping during semiconductor wafer lamination.

A split-gate flash memory array design shares bit lines between adjacent cells to minimize the total number of conductive paths required.

Functional patterns with varying resistance values control transverse current leakage in OLED substrates, improving color purity and reducing power consumption.

Plasma and ozone surface activation enables room temperature bonding of SOI wafers, preventing thermal deformation and cracking.

Nested coupling parts enable vertical elongation of the display panel, resolving stability issues during shape changes while maintaining image quality.

Alternating III-nitride layers facilitate carrier tunneling while balancing thermal stress between silicon substrates and GaN films.

Dedicated electroforming contacts limit conductive filament growth in resistive random-access memory cells.

Masking layer with lower etching rate enables precise pattern transfer, reducing non-display area and bezel width in flexible OLED devices.

A 3D stacked semiconductor memory device uses cell pillars with variable resistance layers to achieve multiple resistance levels.

A disposable photosensitive dry film supports thin wafers during backgrinding and solder reflow, preventing breakage without adding permanent thickness.

Contact holes expose conductive film bottoms in the frame area, allowing continuous metal layers that reduce frame size while preventing voids.

Localized substrate doping raises parasitic capacitor threshold voltage, suppressing inversion charge and reducing harmonic generation in RF switches.

Housing side opening protrusions guide lead frame formation during manufacturing, preventing mechanical damage to the enclosure structure.

Fill insulation films create planar surfaces for hard mask patterning, preventing pinholes and resist residues in high-aspect-ratio recesses.

Blocking grooves in the encapsulation member reduce oxygen and moisture infiltration paths, enhancing OLED reliability without increasing substrate thickness.

Molded body encloses through contacts to form a continuous carrier, reducing production complexity and costs.

A film-forming ink uses a biased solvent to inhibit π-conjugated compound aggregation.

Mask pattern compensation adjusts overlapping conductive layer widths to prevent photoresist breakage at ramp angles and signal transmission abnormalities.

Varying subsidiary layer thicknesses across substrate areas corrects resonant range mismatches to eliminate the reddish viewing effect.

Auxiliary capacitance electrode portions overlap pixel electrodes to form capacitors while remaining spatially separated from other conductive layer regions.

Varying refractive indices in isolation structures reduces optical cross-talk between adjacent pixel regions, improving auto-focusing performance.

Optical structure with layered refractive indices manages light transmission to reduce leakage in display non-display areas.

A tandem OLED unit boosts luminous intensity while a non-tandem unit limits power draw in mixed structures.

A magnetic memory device uses a non-linear element to control current paths between interconnects.

Dual data lines flank pixel columns to minimize coupling capacitance, reducing crosstalk and image flicker.

Saturating erase operation uses tunneling current to control floating gate charge levels in non-volatile memory cells.

A split-gate flash memory structure integrates a high-k metal gate stack to reduce control gate thickness and simplify fabrication.

A multi-layer aluminum oxide protection film deposited by atomic layer deposition on light-emitting diodes.

Uniform layer thicknesses in QD-LED pixels combined with a low refractive index bridge reduce total internal reflection trapping.

Separating the fluorescent layer from the LED via a transparent substrate prevents heat-induced deterioration and maintains long-term light efficiency.

Embedding source lines within a dielectric layer eliminates conductive plugs, reducing memory cell size and increasing density.

A pixel array uses a reflective structure to redirect incident light, enhancing light reception efficiency in image sensors.

A display device uses a thinned substrate area with a through hole to electrically connect pad electrodes and signal lines via conductive material.

Vertical bit-line pillars reduce wire lengths in 3D memory devices, lowering power consumption while managing transistor arrangement complexity.

An aluminum nitride shielding plate prevents light reflections from the read-out circuit, ensuring uniform image intensity distribution.

A circular polarizer integrates a phase difference plate and linear polarizer with a touch layer on an OLED display.

A substrate contact with high thermal conductivity material creates a direct heat path from the resistor into the silicon substrate.

A three-dimensional semiconductor device uses a segmented second substrate with pattern portions and a wider plate portion to enhance integration.

Melts joining bumps to attach semiconductor substrates to support wafers, bypassing adhesive limitations that restrict high-temperature processing.

A detector module uses a separate interposer and multi-lead flex cable routed through an integrated circuit recess to connect the direct conversion crystal.

Protrusions in the encapsulation layer scatter and diffract light to reduce total reflection, improving light extraction efficiency.

A metal oxide insulating layer with a higher work function creates an interface dipole barrier between the source drain electrode and the organic semiconductor.

Composite adhesive film uses moisture absorbent particles within a curable resin matrix to prevent degradation of organic electronic devices.

A multi-layer mask frame assembly directs deposition material through patterned openings to define precise organic light-emitting display structures.

Stacked Al2O3 and TaN layers react to form dual metal gates, resolving work function control challenges in three-dimensional FinFET devices.

Porous pixel defining layers scatter confined light toward the emitting surface, resolving low extraction efficiency in OLEDs.

A semiconductor light emitting device uses a second resin covering the outer edge of a first resin to reflect emitted light and shape the distribution pattern.