This invention overcomes the shortcomings of uncontrollable hardware interrupts in existing general control architectures and provides a hardware interrupt fault-tolerant
emergency control method and
system based on a brain-like independent architecture. It simulates the brain and
cerebellum division of labor logic in the
human brain, realizes complete isolation between the
emergency control link and hardware interrupts, and completes
millisecond-level emergency takeover when the main processor is abnormal, eliminating the risk of equipment loss of control.