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Array packaging substrate and method for judging cutting mode of packaging array

An array packaging and packaging technology, which is applied in the judgment field of substrates and cutting methods, can solve problems such as wrong cutting of the package array 100, and achieve the effect of reducing the possibility of wrong cutting

Active Publication Date: 2008-02-06
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] It is worth noting that when the size difference of the chip packages on the two package arrays 100 is not large, the operator usually cannot visually judge the difference between the array packaging substrates 110 of different specifications, and sometimes the arrays of different specifications The positioning marks 118 of the package substrate 110 are the same, so the cutting equipment may make wrong cuts on the package array 100

Method used

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  • Array packaging substrate and method for judging cutting mode of packaging array
  • Array packaging substrate and method for judging cutting mode of packaging array
  • Array packaging substrate and method for judging cutting mode of packaging array

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Embodiment Construction

[0042] FIG. 2A is a schematic cross-sectional view of a package array according to an embodiment of the present invention. FIG. 2B is a schematic bottom view of a package array according to an embodiment of the present invention. Please refer to FIG. 2A and FIG. 2B together, the package array 200 includes an array package substrate 210 and a plurality of chips 220 .

[0043] The array package substrate 210 has a first surface 210a and a second surface 210b opposite to each other. In this embodiment, the array package substrate 210 has two sets of pattern groups 212, and these pattern groups 212 are respectively arranged at two corners of the second surface 210b. It should be noted that although the number of pattern groups 212 in this embodiment is two, this embodiment is not intended to limit the number of pattern groups 212 in the present invention. In other embodiments of the present invention, the array package substrate 210 may have more than two pattern groups 212 .

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Abstract

The present invention relates to an array sealing basal plate with a plurality of design groups. Each design group comprises a positioning design and a cutting distinguishing design, wherein, the cutting distinguishing design represents the cutting manner used for the array sealing basal plate. The array sealing basal plate is provided with a plurality of cutting distinguishing designs, so before cutting the sealing body array, the cutting device can firstly distinguish the cutting distinguishing design to judge that the setting cutting manner is inosculated with the cutting manner corresponding to the cutting distinguishing design, thereby the array sealing basal plate can reduce the possibility for producing errors of cutting.

Description

technical field [0001] The invention relates to a method for judging a substrate and a cutting method, in particular to a method for judging an array packaging substrate and a cutting method. Background technique [0002] In recent years, with the rapid development of electronic technology and the emergence of high-tech electronic industries, electronic products with more humanization and better functions are constantly being introduced, and are designed towards the trend of light, thin, short and small. Among them, in order to enable the chip packages in these electronic products to be produced quickly and in large quantities, most of the current semiconductor packaging processes use array packaging substrates to improve production efficiency. [0003] 1A-1B are schematic diagrams of a conventional process for manufacturing package arrays. First, as shown in FIG. 1A , an array package substrate 110 is provided. The array package substrate 110 has an upper surface 110a and...

Claims

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Application Information

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IPC IPC(8): H01L23/488H01L23/544H01L21/66H01L21/78
CPCH01L2224/16225H01L2224/32225H01L2224/73204H01L2924/15311
Inventor 夏铭德杨胜朝郭政樟林建铭林俊宏张育诚
Owner CHIPMOS TECH INC