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Selective poisoning of data during runahead

A run-ahead, selected technology used in electrical digital data processing, concurrent instruction execution, machine execution devices, etc., to solve problems such as polluting caches

Inactive Publication Date: 2014-05-14
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While runahead can reveal other potential stalls, continuing execution with missing or invalid data can pollute the cache

Method used

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  • Selective poisoning of data during runahead
  • Selective poisoning of data during runahead
  • Selective poisoning of data during runahead

Examples

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Embodiment Construction

[0009] In modern microprocessors, instructions are often executed in a pipeline. Such instructions may be issued to individual execution mechanisms in the pipeline either individually or as bundles of micro-ops. Regardless of the form in which an instruction is issued for execution, when the instruction is issued, it may be dispatched without knowing whether a miss or exception will occur during execution of the instruction. It can take some time to resolve some misses / exceptions before the microprocessor is able to make progress on subsequent instructions. This way, the microprocessor can stall while trying to resolve the root cause of the long latency event.

[0010] Some microprocessors can be configured to execute instructions prospectively while the root cause of the stall is being resolved. Proactive execution is typically directed at discovering other potential stalls so that the microprocessor can begin to resolve those stalls as well, potentially saving processing t...

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Abstract

Embodiments related to selecting a runahead poison policy from a plurality of runahead poison policies during microprocessor operation are provided. An example method includes causing the microprocessor to enter runahead upon detection of a runahead event and implementing a first runahead poison policy selected from a plurality of runahead poison policies operative to manage runahead poison injection during runahead. The example method also includes during microprocessor operation, selecting a second runahead poison policy operative to manage runahead poison injection differently from the first runahead poison policy.

Description

technical field [0001] The present invention relates to a method of operating a microprocessor and to a microprocessor. Background technique [0002] Instructions in a microprocessor sometimes stall, that is, stop advancing until the stall is resolved. Because it is helpful to uncover other independent stalls among subsequent instructions, the microprocessor can implement a runahead operation configured to detect other stalls while the initial stall is being resolved. While runahead can uncover other potential stalls, continuing execution with missing or invalid data can pollute the cache. Contents of the invention [0003] The present invention provides a method for operating a microprocessor. The method includes: upon detection of a runahead event, causing the microprocessor to enter runahead; during runahead, implementing a first selected from a plurality of runahead poison policies operative to manage runahead poison injection a runahead poison policy; and, during o...

Claims

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Application Information

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IPC IPC(8): G06F9/38
CPCG06F9/30189G06F9/3842G06F11/3024G06F11/3409G06F2201/885
Inventor 马格努斯·埃克曼詹姆斯·范·策恩保罗·塞维斯
Owner NVIDIA CORP
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