Deterministic evaluation and control method of multi-core multi-thread computer system
A computer system and control method technology, applied in the direction of program control design, calculation, multi-program device, etc., to achieve the effect of low cost, solving "deterministic" series of problems, and flexible control
Inactive Publication Date: 2019-03-12
SHENYANG AEROSPACE UNIVERSITY
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Problems solved by technology
In summary, although multi-core and multi-threading have brought about a significant improvement in computing performance, they will encounter problems such as "determinism" when they are directly used in fields such as airborne computing that require extremely high reliability and real-time performance. A series of problems need to be solved urgently
However, the lack of accurate, adaptable, and easy-to-implement quantitative evaluation and control methods for "deterministic" problems is an important factor that makes this problem difficult to solve
Method used
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[0104] The specific implementation of the present invention requires the cooperation design and completion of the system structure level and the OS level. Here, a typical application scenario is used to illustrate the implementation process of the method, such as figure 2 As shown: Assuming that a multi-core multi-threaded airborne partition system uses 4-core processors, each processing core supports 2-way SMT, a total of 128 computing tasks (threads), divided into 16 partitions (P1-P16) on average, each The partition includes 8 computing tasks (T1-T4). Assuming that the resource reserve ratio is 20%, the progress offset urgency threshold of each thread is Ek=-3.0 (k=1, 2,...,128), and the dynamic division and adjustment model is based on the "resource-schedule offset urgency". All kinds of key resources (such as processor core allocation time, number of physical registers, cache and I / O access opportunities and numbers, etc.) that play a role in regulating the performance ...
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The invention discloses a multi-core and multi-threaded computer system certainty evaluation and control method. The method comprises the following steps: (1) defining certainty series evaluation and control indexes, comprising accumulated progress deviation, progress deviation urgency, system certainty and the like; (2) designing control mechanisms for resource reservation, performance sprint and the like, so as to realize prediction and control on various thread running progresses; (3) building a resource-progress deviation urgency dynamic division adjustment model. The method has the characteristics that (1) the indexes are quantified, so quantitative description and calculation on various threads and the system certainty are realized; (2) the model is simple and the adaptability is high, so relatively accurate certainty prediction and control on different thread combination running conditions can be realized; (3) the control is flexible, and operation system level and hardware level resource allocation is supported for performance adjustment and control; (4) the implementation cost is low, the implementation is easy on the basis of an existing system structure, and the certainty series problems in a multi-core and multi-threaded computer system can be relieved and even solved.
Description
technical field [0001] The invention relates to a deterministic evaluation and control method of a multi-core multi-thread computer system, in particular to a deterministic evaluation and control method of a multi-core-based airborne computer partition system. The invention belongs to the field of computer system design and is used for performance design, prediction and control of multi-core and multi-thread computer systems, especially multi-core airborne computer system structures. The specific application areas are multi-core and multi-threaded computer systems with high requirements for determinism and real-time performance, especially the allocation of hardware resources such as processor cores, registers, cache, I / O, and operating systems for multi-core-based airborne computer partition systems. The design and implementation of functions such as level partition scheduling and thread scheduling. Background technique [0002] The integrated avionics system (referred to ...
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IPC IPC(8): G06F9/50G06F11/30G06F11/34
CPCG06F9/5011G06F9/5038G06F11/3006G06F11/3017G06F11/3409G06F11/3476G06F2209/501G06F2209/508
Inventor 杨华刘冰石祥斌潘琢金
Owner SHENYANG AEROSPACE UNIVERSITY