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Ethernet application layer protocol control system and method based on hardware acceleration

An application layer protocol and hardware acceleration technology, which is applied in the computer field, can solve problems such as system instability, failure to recover, and attacks, and achieve the effects of CPU acceleration, reducing the burden on the CPU, and improving efficiency

Active Publication Date: 2021-09-14
深圳市龙信信息技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This processing method not only has very low processing efficiency, but also brings a huge operating burden to the CPU. The long-term high-load operation of the CPU will also lead to system instability, and it is also easy to be attacked; once the CPU fails, it will It will directly cause the system to crash and the data will be damaged, so there are problems of unreliability, safety and irrecoverability

Method used

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  • Ethernet application layer protocol control system and method based on hardware acceleration
  • Ethernet application layer protocol control system and method based on hardware acceleration
  • Ethernet application layer protocol control system and method based on hardware acceleration

Examples

Experimental program
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Effect test

Embodiment 1

[0021] A kind of Ethernet application layer protocol control system based on hardware acceleration, see figure 1 ,

[0022] Including an FPGA electrically connected to the CPU;

[0023] Described FPGA is provided with a plurality of processing engines, realizes the parallel processing of application layer network protocol packet; Described FPGA is used for receiving application layer network protocol packet, carries out protocol analysis to described application layer network protocol packet, and utilizes multiple parallel The protocol identification algorithm matches the analysis results, and performs corresponding control operations according to the matching results; the control operations include discarding or forwarding application-layer network protocol packets that do not require in-depth processing, and application-layer network protocol packets that will require in-depth processing transmitted to the CPU for processing;

[0024] The FPGA is also used to receive the p...

Embodiment 2

[0049] A kind of Ethernet application layer protocol control method based on hardware acceleration, see figure 2 , including the following steps:

[0050] S1: FPGA receives the application layer network protocol packet, and performs protocol analysis on the application layer network protocol packet;

[0051] S2: The FPGA uses a variety of parallel protocol recognition algorithms to match the analysis results, and performs corresponding control operations according to the matching results; the control operations include discarding or forwarding application layer network protocol packets that do not require in-depth processing, and performing The deeply processed application layer network protocol packet is transmitted to the CPU for processing;

[0052] S3: The FPGA receives the processing result returned by the CPU after processing the application layer network protocol packet, forwards the processing result, and realizes the protocol control of the application layer.

[00...

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Abstract

In the Ethernet application layer protocol control system based on hardware acceleration provided by the present invention, the FPGA performs protocol analysis on the application layer network protocol packet, and uses a variety of parallel protocol recognition algorithms to match the analysis results, and performs corresponding control operations according to the matching results , Discard or forward the application-layer network protocol packets that do not require in-depth processing, transmit the application-layer network protocol packets that require in-depth processing to the CPU for processing; receive and forward the processing results returned by the CPU, and realize the protocol control of the application layer. The system uses a combination of software and hardware to increase the communication connection between the FPGA and the CPU, transfer the process of parsing and processing the application layer network protocol packet in the CPU to the FPGA in the prior art, and process the application in parallel through the FPGA. Layer network protocol packets, capture and intercept the application layer network protocol packets that need to be processed by the CPU and send them back to the CPU for processing, thereby greatly reducing the burden on the CPU, improving the efficiency of Ethernet application layer protocol control, and realizing CPU acceleration.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to an Ethernet application layer protocol control system and method based on hardware acceleration. Background technique [0002] The data processing performed by the traditional CPU on the received application layer network protocol packets includes protocol packet analysis, control operations, etc. Among them, the analysis of the protocol packet, the control operation and other processing are all operated by the CPU, and the CPU can only process the protocol packet one by one in the way of serial identification and serial control. This processing method not only has very low processing efficiency, but also brings a huge operating burden to the CPU. The long-term high-load operation of the CPU will also lead to system instability, and it is also easy to be attacked; once the CPU fails, it will It directly leads to system crash and data damage, so there are problems o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L29/06H04L29/08
CPCH04L69/22H04L69/329
Inventor 王斌
Owner 深圳市龙信信息技术有限公司
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