Wiring method and device, equipment and storage medium

Abstract

The invention discloses a wiring method and device, equipment and a storage medium. The method comprises the following steps: determining at least two chip units to be wired; selecting at least one first chip unit from the at least two chip units to be wired; wherein each first chip unit is a chip unit of which all connection points of pins are covered by a power supply network; determining a wiring constraint condition between the at least one first chip unit and a corresponding power supply network to obtain at least one wiring constraint condition; and according to the at least one wiring constraint condition, wiring the at least one first chip unit, so that at least one connection point of a pin of the at least one first chip unit is not covered by a power supply network.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a wiring method, device, equipment and storage medium. Background technique [0002] With the rapid development of intelligent electronic devices, chip units in intelligent electronic devices are closely related to semiconductors. With the shortening of the semiconductor manufacturing process, the power supply network is becoming more and more dense, and the pins of the chip unit are getting shorter and shorter. When wiring the chip unit, if the chip unit and the power supply network are distributed on different circuit layers, it may be When the connection points of the pins of the chip unit are covered by the power network, the user needs to manually change the layout. Due to the large number of changes, the overall wiring speed is affected. [0003] Therefore, continue to find a technical solution to increase the wiring speed. Contents of the invention [0004] In view of this, ...

AI Technical Summary

Problems solved by technology

With the shortening of the semiconductor manufacturing process, the power supply network is becoming more and more dense, and the pins of the chip unit are getting shorter and shorter. When wiring the chip unit, if the chip unit and the power supply network are distributed on different circuit layers, it may be In the case that the connection points of the pins of the chip unit are covered by the power network, the user needs to manually change the layout. Due to the large number of changes, the overall wiring speed is affected

Images