Mainboard power supply module, power supply method, power supply device and electronic device

Abstract

Provided are a motherboard power supply module, a power supply method, a power supply device, and an electronic device. The motherboard power supply module includes a preset number of driving MOSs, the driving MOSs are divided into preset groups, each group includes two driving MOSs, and the two driving MOSs in each group share a first input capacitor; the two driving MOSs in each group are connected to a power supply through the shared first input capacitor; the output end of each driving MOS is connected to an inductor, and the output end of the inductor is connected to a load via at least one output capacitor. In this way, a larger first input capacitor can be used to reduce the price of the motherboard.

Description

Technical Field

[0001] The present application relates to the technical field of manufacturing motherboard components, and in particular to a motherboard power supply module, a power supply method, a power supply device and an electronic device. Background Art

[0002] In the design of the BUCK circuit of the notebook motherboard power supply, a large number of capacitor components are required. In the design of the power supply of the notebook motherboard to the CPU / GPU, because the current demand is very large, IC is required to control multiple groups of BUCKs to supply power together to meet the CPU / GPU's demand for high current. At present, multiple groups of BUCK circuits are used to power the CPU / GPU, in which each driving MOS is equipped with enough capacitors. The motherboard has limited space and cannot place capacitors that are too large, so the price is expensive. Summary of the invention

[0003] The present application is proposed to solve the above technical problems existing in the prior art. The present application aims to provide a motherboard power supply module, a power supply method, a power supply device and an electronic device, which can save space on the motherboard and facilitate the use of a larger first input capacitor, thereby reducing the price of the motherboard.

[0004] According to a first scheme of the present application, a mainboard power supply module is provided, comprising a preset number of driving MOSs, wherein the driving MOSs are divided into preset groups, each group comprising two driving MOSs, and the two driving MOSs in each group share a first input capacitor; the two driving MOSs in each group are connected to a power supply through the shared first input capacitor; the output end of each driving MOS is connected to an inductor, and the output end of the inductor is connected to a load via at least one output capacitor.

[0005] According to the second scheme of the present application, a mainboard power supply method is provided, comprising: configuring the mainboard power supply module described in each embodiment of the present application on the mainboard; controlling the preset timing of the start time of each driving MOS in the mainboard power supply module by configuring a register; and starting each driving MOS to supply power to the load based on the preset timing.

[0006] According to a third solution of the present application, a power supply device is provided, and the power supply device includes the mainboard power supply module described in each embodiment of the present application.

[0007] According to a fourth solution of the present application, there is provided an electronic device, including: a mainboard, wherein the mainboard is configured with the mainboard power supply module described in each embodiment of the present application.

[0008] Compared with the prior art, the beneficial effects of the embodiments of the present application are:

[0009] The motherboard power supply module provided in the embodiment of the present application divides all the driving MOS into multiple groups, each group includes two driving MOS, and the two driving MOS in each group share a first input capacitor, so that the space on the motherboard can be effectively saved, which is conducive to placing a larger first input capacitor. At the same time, when using a larger first input capacitor, the capacitance value can also be increased, which is conducive to obtaining better electrical characteristics. By sharing a first input capacitor with two driving MOS, more space on the motherboard can be saved, thereby configuring a first input capacitor with a volume exceeding a threshold volume, thus greatly reducing the cost of manufacturing the motherboard.

[0010] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above description and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In the drawings, which are not necessarily drawn to scale, the same reference numerals may describe similar parts in different views. Similar reference numerals with letter suffixes or different letter suffixes may represent different examples of similar components. The accompanying drawings generally illustrate various embodiments by way of example and not by way of limitation, and together with the description and claims, serve to illustrate the disclosed embodiments. Such embodiments are illustrative and exemplary and are not intended to be exhaustive or exclusive embodiments of the present device.

[0012] Figure 1 A schematic diagram of the structure of a mainboard power supply module according to an embodiment of the present application is shown.

[0013] Figure 2 A schematic diagram of two mutually mirrored driving MOSs in the same group according to an embodiment of the present application is shown.

[0014] Figure 3 A schematic diagram showing a second input capacitor configured for a single driving MOS according to an embodiment of the present application is shown.

[0015] Figure 4 A schematic diagram showing the startup timing of each driving MOS according to the power supply control described in the embodiment of the present application. DETAILED DESCRIPTION

[0016] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is described in detail below in conjunction with the accompanying drawings and specific implementation examples. The embodiments of the present application are further described in detail below in conjunction with the accompanying drawings and specific implementation examples, but are not intended to limit the present application.

[0017] The words "first", "second" and similar words used in this application do not indicate any order, quantity or importance, but are only used to distinguish. The words "include" or "comprises" and similar words used in this application mean that the elements before the word include the elements listed after the word, and do not exclude the possibility of covering other elements. In this application, each step is merely an example of the execution order, not a limitation. The technical solution of this application is not limited to the execution order described in the embodiments. The steps in the execution order can be combined, decomposed, or swapped, as long as the logical relationship of the execution content is not affected.

[0018] All terms (including technical terms or scientific terms) used in this application have the same meaning as those understood by ordinary technicians in the field to which this application belongs, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an idealized or extremely formal sense, unless explicitly defined herein. Methods and devices known to ordinary technicians in the relevant field may not be discussed in detail, but where appropriate, the methods and devices should be considered as part of the specification.

[0019] exist Figure 1 In the embodiment, the mainboard power supply module includes a preset number of driving MOS, and the driving MOS is divided into preset groups, each group includes two driving MOS, and the two driving MOS in each group share a first input capacitor 103; the two driving MOS in each group are connected to the power supply 100 through the shared first input capacitor 103; the output end of each driving MOS is connected to the inductor 104, and the output end of the inductor 104 is connected to the load 106 via at least one output capacitor 105. Specifically, a preset number of driving MOS is configured on the notebook mainboard. Assuming the preset number is 6, it can be a first driving MOS 1021, a second driving MOS 1022, a third driving MOS 1023, a fourth driving MOS 1024, a fifth driving MOS 1025, and a sixth driving MOS 1026.

[0020] This is only used as an example and does not constitute a specific limitation on the preset number. The preset number can be adjusted according to the actual needs of the user, and the number of preset groups can also be adjusted according to the preset number. For example, when the preset number is 6, the number of preset groups is 3, and when the preset number is 8, the number of preset groups is 4.

[0021] like Figure 1As shown, the power supply 100 can be an RT8120 chip, and the power supply 100 controls the first drive MOS 1021, the second drive MOS 1022, the third drive MOS 1023, the fourth drive MOS 1024, the fifth drive MOS 1025, and the sixth drive MOS 1026 to supply power together to meet the load's demand for large current. Among them, the first drive MOS 1021, the second drive MOS 1022, the third drive MOS 1023, the fourth drive MOS 1024, the fifth drive MOS 1025, and the sixth drive MOS 1026 are divided into three groups, that is, the first drive MOS 1021 and the second drive MOS 1022 are the first group, the third drive MOS 1023 and the fourth drive MOS 1024 are the second group, and the fifth drive MOS 1025 and the sixth drive MOS 1026 are the third group. The two driving MOSs in each group share a first input capacitor 103. Therefore, when 6 driving MOSs are configured on the mainboard, only 3 first input capacitors 103 need to be configured, which greatly saves the space of the mainboard and allows a larger first input capacitor 103 to be configured, which is beneficial to reducing the manufacturing cost of the mainboard.

[0022] The preset number of driving MOSs are of the same type, for example, the driving MOSs may all be 8-pin SOIC packages, which is beneficial to improving the balance and stability of current input. The load is a CPU or a GPU.

[0023] The power supply 100 controls two driving MOS in each group through a shared first input capacitor 103. The output end of each driving MOS is connected to the inductor 104, and the output end of the inductor 104 is connected to the load 106 via at least one output capacitor 105. Specifically, the PWM (Plus Width Modulator) chip on the notebook motherboard generates a pulse waveform with adjustable width. When the voltage across the load 106 is to be reduced, the switching action of the driving MOS begins to take effect, and the power supply 100 charges the inductor 104 and reaches the required voltage; when the voltage across the load 106 is increased, the power supply 100 disconnects the power supply through the switching action of the driving MOS tube, and the inductor 104 releases energy and continues to supply power to the load 106. As the energy stored in the inductor 104 is continuously consumed, the voltage across the load 106 begins to gradually decrease again, and the power supply 100 is charged again through the switching action of the driving MOS. In this way, the charging and discharging process is continuously performed in a cycle, thereby forming a stable voltage, so that the voltage across the load 106 will not suddenly increase or decrease.

[0024] In some embodiments of the present application, the two driving MOS in each group are mirror images of each other, and each driving MOS is a MOS tube of the same type. Figure 2As shown, the seventh drive MOS 2001 and the eighth drive MOS 2002 are mirror images of each other, and the types are exactly the same. The first upper bridge MOS 2011 and the second upper bridge MOS 2012 are symmetrical, the first lower bridge MOS 2021 and the second lower bridge MOS 2022 are symmetrical, the first driver 2031 and the second driver 2032 are symmetrical, and the first input interface 2041 and the second input interface 2042 are symmetrical. In this way, the seventh drive MOS 2001 and the eighth drive MOS 2002 can share the same first input capacitor 205, so that the input paths of the power supplies of the seventh drive MOS 2001 and the eighth drive MOS 2002 are the same. This is only used as an exemplary description and does not constitute a specific limitation on the drive MOS structure. For example, for different types of drive MOS, their input interfaces may be located at different positions of the drive MOS.

[0025] In some embodiments of the present application, the volume of the first input capacitor is larger than the volume of the second input capacitor configured for each single driving MOS. Specifically, Figure 3 It is shown that a respective second input capacitor 301 is configured for a single driving MOS 300, so that the number of the second input capacitors 301 will increase, occupying more space on the motherboard. Based on the motherboard power supply module provided by the embodiment of the present application, every two driving MOS 300 are mirror images of each other and share a first input capacitor, which can release space on the motherboard, so that a larger first input capacitor can be used, so that the volume of the first input capacitor is larger than the volume of the second input capacitor 301 configured for a single driving MOS 300, thereby greatly reducing the cost of the motherboard.

[0026] In some embodiments of the present application, each driving MOS is started according to a preset timing, wherein the time interval between the start-up of the two driving MOS in each group is separated by a threshold time. That is to say, the two driving MOS in each group cannot be turned on at the same time, but must be separated by a threshold time, so that the voltage change frequency across the first input capacitor shared by the two driving MOS in each group can be kept at a minimum state. Moreover, the time interval between the start-up of the two driving MOS in each group is separated by a threshold time. On the one hand, the change frequency of the first input capacitor is very small, for example, it only becomes twice that before the start-up (while starting the two driving MOS in each group in sequence will increase the change frequency of the first input capacitor to 6 times); on the other hand, the influence on the capacitance of the first input capacitor is very small, and the capacitance value to be increased can be calculated according to the change frequency of the voltage across the first input capacitor, thereby appropriately increasing the capacitance of the first input capacitor.

[0027] Among them, back to Figure 1For example, the preset timing sequence may be to sequentially turn on the first drive MOS 1021, the third drive MOS 1023, the fifth drive MOS 1025, the second drive MOS 1022, the fourth drive MOS 1024, and the sixth drive MOS 1026. Of course, the first drive MOS 1021, the fourth drive MOS 1024, the second drive MOS 1022, the fifth drive MOS 1025, the third drive MOS 1023, and the sixth drive MOS 1026 may also be sequentially turned on. This is only used as an example and does not constitute a limitation on the specific preset timing sequence. The threshold time is also not limited and can be configured by the user according to the number of drive MOS, the number of groups, or other related factors.

[0028] In some embodiments of the present application, when the number of the preset groups is 3, as Figure 1 As shown, it includes a first driving MOS 1021, a second driving MOS 1022, a third driving MOS 1023, a fourth driving MOS 1024, a fifth driving MOS 1025, and a sixth driving MOS 1026. The first driving MOS 1021 and the second driving MOS 1022 share the first input capacitor 103 as a first group of driving MOS; the third driving MOS 1023 and the fourth driving MOS 1024 share the first input capacitor 103 as a second group of driving MOS; the fifth driving MOS 1025 and the sixth driving MOS 1026 share the first input capacitor 103 as a third group of driving MOS. In some other embodiments, as Figure 4 As shown, the first pin 4001 of the power supply 400 controls the first driving MOS 4011, the second pin 4002 controls the fourth driving MOS 4014, the third pin 4003 controls the second driving MOS 4012, the fourth pin 4004 controls the fifth driving MOS 4015, the fifth pin 4005 controls the third driving MOS 4013, and the sixth pin 4006 controls the sixth driving MOS 4016.

[0029] The first pin 4001, the second pin 4002, the third pin 4003, the fourth pin 4004, the fifth pin 4005, and the sixth pin 4006 are arranged in sequence and started in sequence. In this way, the timing of each driving MOS being turned on can be adjusted so that each driving MOS is turned on according to a preset timing, so that the oscillation frequency of the voltage and current across the first input capacitor will not increase too much, so that the requirement can be met by appropriately increasing the capacitance value, and when the capacitance value of the same first input capacitor is not increased much, the cost will not be increased too much.

[0030] In some embodiments of the present application, a mainboard power supply method is provided, wherein the mainboard power supply module described in each embodiment of the present application is configured on the mainboard, and the preset timing of the start-up time of each driving MOS in the mainboard power supply module is controlled by configuring a register, and based on the preset timing, each driving MOS is started to supply power to the load. By modifying the start-up timing of each driving MOS in the register, the start-up timing of each driving MOS can be controlled to avoid starting two driving MOS in the same group at the same time.

[0031] In some embodiments of the present application, a power supply device is provided, and the power supply device includes the mainboard power supply module described in each embodiment of the present application.

[0032] In some embodiments of the present application, an electronic device is provided, including: a mainboard, wherein the mainboard is configured with the mainboard power supply module described in each embodiment of the present application. The electronic device may be a laptop computer, a tablet, etc. Using the mainboard power supply module can greatly reduce production costs.

[0033] This application describes various operations or functions that may be implemented as software codes or instructions or defined as software codes or instructions. Such content may be source code or differential code ("incremental" or "patch" code) that can be directly executed ("object" or "executable" form). Software codes or instructions may be stored in a computer-readable storage medium, and when executed, may cause a machine to perform the described functions or operations, and include any mechanism for storing information in a form accessible to a machine (e.g., a computing device, an electronic system, etc.), such as recordable or non-recordable media (e.g., read-only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.).

[0034] The exemplary methods described in this application may be implemented at least in part by a machine or computer. The implementation of such a method may include software code, such as microcode, assembly language code, high-level language code, etc. Various software programming techniques may be used to create various programs or program modules. For example, a program portion or program module may be designed with or by means of Java, Python, C, C++, assembly language, or any known programming language. One or more of such software portions or modules may be integrated into a computer system and / or a computer-readable medium. Such software code may include computer-readable instructions for executing various methods. The software code may form a part of a computer program product or a computer program module. In addition, in an example, the software code may be tangibly stored on one or more volatile, non-temporary or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media may include, but are not limited to, hard disks, removable disks, removable optical disks (such as optical disks and digital video disks), cassettes, memory cards or memory sticks, random access memories (RAMs), read-only memories (ROMs), etc.

[0035] In addition, although exemplary embodiments have been described herein, the scope includes any and all embodiments based on the present application with equivalent elements, modifications, omissions, combinations (e.g., various embodiments intersecting schemes), adaptations or changes. The elements in the claims will be interpreted broadly based on the language adopted in the claims, and are not limited to the examples described in this specification or during the execution of the application, and the examples will be interpreted as non-exclusive. Therefore, this specification and examples are intended to be considered as examples only, and the true scope and spirit are indicated by the claims and the full scope of their equivalents.

[0036] The above description is intended to be illustrative rather than restrictive. For example, the above examples (or one or more schemes thereof) may be used in combination with each other. For example, a person of ordinary skill in the art may use other embodiments when reading the above description. In addition, in the above-mentioned specific embodiments, various features may be grouped together to simplify the present application. This should not be interpreted as an intention that a disclosed feature that is not required to be protected is necessary for any claim. On the contrary, the subject matter of the present application may be less than all the features of a particular disclosed embodiment. Thus, the claims are incorporated herein as examples or embodiments in the specific embodiments, wherein each claim is independently a separate embodiment, and it is considered that these embodiments may be combined with each other in various combinations or arrangements. The scope of the present application should be determined with reference to the attached claims and the full scope of equivalent forms granted by these claims.

[0037] The above embodiments are only exemplary embodiments of the present application and are not intended to limit the present application. The protection scope of the present application is defined by the claims. Those skilled in the art may make various modifications or equivalent substitutions to the present application within the essence and protection scope of the present application, and such modifications or equivalent substitutions shall also be deemed to fall within the protection scope of the present application.

Claims

1. A mainboard power supply module, characterized in that: It includes three groups of driving MOS of the same type, including a first driving MOS, a second driving MOS, a third driving MOS, a fourth driving MOS, a fifth driving MOS, and a sixth driving MOS, and each driving MOS is a MOS tube of the same type; The first driving MOS and the second driving MOS are mirror images of each other and share a first input capacitor, serving as a first group of driving MOS; The third driving MOS and the fourth driving MOS are mirror images of each other and share the first input capacitor, serving as a second group of driving MOS; The fifth driving MOS and the sixth driving MOS are mirror images of each other and share the first input capacitor, serving as a third group of driving MOS; The two driving MOS in each group cannot be turned on at the same time, but must be separated by a threshold time, and the volume of the first input capacitor is larger than the volume of the second input capacitor configured for each single driving MOS; Two driving MOSs in each group that are mirror images of each other are connected to the power supply through the shared first input capacitor; The first pin of the power supply controls the first driving MOS, the second pin controls the fourth driving MOS, the third pin controls the second driving MOS, the fourth pin controls the fifth driving MOS, the fifth pin controls the third driving MOS, and the sixth pin controls the sixth driving MOS; Wherein, the first pin, the second pin, the third pin, the fourth pin, the fifth pin and the sixth pin are arranged in sequence and started in sequence; The output end of each driving MOS is connected to an inductor, and the output end of the inductor is connected to a load via at least one output capacitor.

2. The mainboard power supply module according to claim 1, characterized in that: The load is a CPU or a GPU.

3. A mainboard power supply method, characterized in that: include: A mainboard power supply module as claimed in claim 1 or 2 is configured on the mainboard; Controlling the preset timing of the start-up time of each driving MOS in the mainboard power supply module by configuring the register; Based on the preset timing, each driving MOS is started to supply power to the load.

4. A power supply device, characterized in that: The power supply device comprises the mainboard power supply module according to claim 1 or 2.

5. An electronic device, characterized in that: include: A mainboard, wherein the mainboard is provided with the mainboard power supply module according to claim 1 or 2.

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