Amplifier circuit, wireless transceiver and wireless communication device

The amplifier circuit decouples broadband matching and noise figure by matching source impedance, reducing noise interference and enhancing signal fidelity and reception efficiency in wireless communication devices.

CN119135102APending Publication Date: 2024-12-13SHANGHAI SIXIN INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411075958.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-07
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Existing wireless communication devices face challenges in reducing noise interference from amplifier circuits while maintaining efficient reception of radio frequency signals, as adjusting input impedance to reduce noise often compromises broadband matching performance.

Method used

An amplifier circuit design that decouples the relationship between broadband matching and noise figure by utilizing resistor modules to match source impedance and separate transconductance performance, allowing for noise reduction without affecting broadband matching.

Benefits of technology

The design achieves broadband input matching with reduced noise interference, improving signal fidelity and compatibility with various communication standards, ensuring efficient signal reception and transmission.

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Abstract

The embodiment of the invention provides an amplifier circuit, a wireless transceiver and wireless communication equipment, and belongs to the field of wireless communication. The amplifier circuit comprises a signal amplification module, a resistor module and a power module, the power module is connected with the resistor module and the signal amplification module, the resistor module is connected with the signal amplification module, the power module is used for providing bias voltage, and the signal amplification module is used for determining a target working mode according to the bias voltage. And according to the target working mode, a radio frequency signal of a preset signal source is amplified to obtain a target signal, and the source impedance of the preset signal source is equal to the target impedance of the resistance module. The amplifier circuit can decouple the relation between the noise coefficient and the broadband matching, the problem that the broadband matching needs to be balanced with the low noise performance is avoided, and the noise interference of the amplifier circuit to the radio frequency signal is reduced while the receiving efficiency of the receiver is ensured.
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Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to an amplifier circuit, a wireless transceiver and a wireless communication device. Background Art

[0002] In the related field, the receiver of the wireless communication device receives the radio frequency signal from the signal source, and uses the amplifier circuit arranged at the front end of the receiver to amplify the radio frequency signal to enhance the signal strength of the radio frequency signal. In order to prevent the noise in the amplifier circuit from interfering with the radio frequency signal, it is necessary to adjust the input impedance of the amplifier circuit to a specific value to reduce the noise interference. However, this will make the input impedance different from the source impedance of the signal source, resulting in low efficiency of the receiver in receiving the radio frequency signal. Therefore, how to reduce the noise interference of the amplifier circuit on the radio frequency signal while ensuring the receiving efficiency of the receiver has become a problem to be solved urgently. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides an amplifier circuit, a wireless transceiver and a wireless communication device, which can decouple the relationship between broadband matching and noise figure, thereby achieving broadband input matching and low noise at the same time.

[0004] To achieve the above object, a first aspect of an embodiment of the present application provides an amplifier circuit, the amplifier circuit comprising:

[0005] Signal amplification module;

[0006] Resistor module;

[0007] A power supply module, wherein the power supply module is connected to the resistance module and the signal amplification module respectively, and the resistance module is connected to the signal amplification module;

[0008] Among them, the power supply module is used to provide a bias voltage; the signal amplification module is used to determine the target operating mode according to the bias voltage, and amplify the radio frequency signal of the preset signal source according to the target operating mode to obtain the target signal; the source impedance of the preset signal source is equal to the target impedance of the resistance module.

[0009] The amplifier circuit proposed in the embodiment of the present application utilizes the broadband characteristics of the resistor itself, and sets a resistor module to achieve matching with the source impedance of the preset signal source. At the same time, the resistor module is connected to the power module and the signal amplification module. The bias voltage provided by the power module biases the signal amplification module, so that the signal amplification module amplifies the RF signal input by the preset signal source according to the target working mode. The design of the embodiment of the present application can decouple the relationship between the noise coefficient and the broadband matching. The broadband matching can be achieved only by designing the resistance value of the resistor module, and the signal amplification module can be allowed to perform amplification. The transconductance performance of the signal amplification module can be designed separately, thereby reducing the noise in the circuit, but it will not affect the performance of the broadband matching, avoiding the problem of the need to balance the need for broadband matching with the low noise performance, and achieving the goal of reducing the noise interference of the amplifier circuit to the RF signal while ensuring the receiving efficiency of the receiver.

[0010] In some embodiments, the signal amplification module includes a first amplification unit, a second amplification unit and an output unit, the resistance module includes a first bias resistor and a second bias resistor; the bias voltage includes a first bias voltage and a second bias voltage; the target working mode includes a first working mode and a second working mode; the radio frequency signal includes a first initial signal and a second initial signal;

[0011] The first end of the first bias resistor is connected to the first amplifying unit, and the second end of the first bias resistor is connected to the power module; the power module is used to provide the first bias voltage; the first amplifying unit is used to determine the first working mode according to the first bias voltage, and amplify the first initial signal according to the first working mode to obtain a first candidate signal;

[0012] The first end of the second bias resistor is connected to the second amplifying unit, and the second end of the second bias resistor is connected to the power module; the power module is used to provide the second bias voltage; the second amplifying unit is used to determine the second working mode according to the second bias voltage, and amplify the second initial signal according to the second working mode to obtain a second candidate signal; the target impedance is the impedance of the first bias resistor and the second bias resistor in parallel;

[0013] The output unit is connected to the first amplifying unit, the second amplifying unit and the power supply module respectively, and the output unit is used to output the target signal according to the first candidate signal and the second candidate signal.

[0014] In some embodiments, the first amplifying unit includes a first transistor, a second transistor and a third bias resistor, the first bias voltage includes a first sub-voltage and a second sub-voltage, and the first operating mode includes a first amplifying operating mode and a second amplifying operating mode;

[0015] The first end of the first bias resistor is connected to the gate of the first transistor, the source of the first transistor and the source of the second transistor are respectively connected to the power module, the drain of the first transistor is connected to the drain of the second transistor, the gate of the second transistor is connected to the first end of the third bias resistor, and the second end of the third bias resistor is connected to the power module;

[0016] The first transistor is used to determine the first amplification operation mode according to the first sub-voltage, and the second transistor is used to determine the second amplification operation mode according to the second sub-voltage.

[0017] In some embodiments, the second amplifying unit includes a third transistor, a fourth transistor and a fourth bias resistor, the second bias voltage includes a third sub-voltage and a fourth sub-voltage, and the second operating mode includes a third amplifying operating mode and a fourth amplifying operating mode;

[0018] The first end of the second bias resistor is connected to the gate of the third transistor, the source of the third transistor and the source of the fourth transistor are grounded respectively, the drain of the third transistor is connected to the drain of the fourth transistor, the gate of the fourth transistor is connected to the first end of the fourth bias resistor, and the second end of the fourth bias resistor is connected to the power module;

[0019] The third transistor is used to determine the third amplification operation mode according to the third sub-voltage, and the fourth transistor is used to determine the fourth amplification operation mode according to the fourth sub-voltage.

[0020] In some embodiments, the output unit includes a fifth transistor and a sixth transistor, the source of the fifth transistor is connected to the first amplification unit, the gate of the fifth transistor is connected to the power module, the drain of the fifth transistor is connected to the drain of the sixth transistor, and the drain of the fifth transistor is used to output the first candidate signal; the gate of the sixth transistor is connected to the power module, the source of the sixth transistor is connected to the second amplification unit, and the drain of the sixth transistor is used to output the second candidate signal.

[0021] In some embodiments, the power supply module is also used to provide an operating voltage; the amplifier circuit also includes a feedback module, a first end of the feedback module is connected to the signal amplification module, and a second end of the feedback module is connected to the power supply module; the feedback module is used to output a feedback voltage according to the target signal and a preset reference voltage; the power supply module is used to adjust the operating voltage according to the feedback voltage.

[0022] In some embodiments, the feedback module includes an operational amplifier and a low-dropout linear regulator, the first end of the operational amplifier is connected to the signal amplification module, the second end of the operational amplifier is connected to the first end of the low-dropout linear regulator, and the operational amplifier is used to output a candidate voltage based on the target signal and a preset reference voltage; the second end of the low-dropout linear regulator is connected to the power supply module, and the low-dropout linear regulator is used to output a feedback voltage based on the candidate voltage.

[0023] In some embodiments, the amplifier circuit further includes a filtering module, a first end of the filtering module is connected to the preset signal source, a second end of the filtering module is respectively connected to the resistance module and the signal amplification module, and the filtering module is used to filter the RF signal.

[0024] To achieve the above objective, a second aspect of an embodiment of the present application provides a wireless transceiver, wherein the wireless transceiver includes the amplifier circuit as described in the first aspect.

[0025] A wireless transceiver proposed in an embodiment of the present application, by using the amplifier circuit provided in an embodiment of the present application, can have better fidelity when processing signals, reduce nonlinear distortion, and enable the signal to be fully amplified during the transmission process, which helps to maintain good receiving performance in a weaker signal environment, and can also be compatible with more signal frequency bands to adapt to different communication standards and application scenarios.

[0026] To achieve the above-mentioned purpose, a third aspect of an embodiment of the present application proposes a wireless communication device, which includes the wireless transceiver as described in the second aspect.

[0027] A wireless communication device proposed in an embodiment of the present application, by using the wireless transceiver provided in an embodiment of the present application, can ensure efficient signal reception and transmission, and provide a better communication experience for users.

[0028] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings are used to provide further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0030] Figure 1 It is a circuit diagram of a common-gate amplifier;

[0031] Figure 2 It is a circuit diagram of a resistor parallel feedback amplifier;

[0032] Figure 3 is an optional module connection diagram of the amplifier circuit provided in the embodiment of the present application;

[0033] Figure 4 is another optional module connection diagram of the amplifier circuit provided in the embodiment of the present application;

[0034] Figure 5 is an optional circuit structure diagram of an amplifier circuit provided in an embodiment of the present application;

[0035] Figure 6 It is a schematic diagram of the results of the amplifier circuit provided in the embodiment of the present application in the transconductance third-order nonlinear cancellation simulation test. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0037] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0039] First, some nouns involved in this application are analyzed:

[0040] Linearity: It is a key parameter that describes the ability of an electronic device or system to maintain a linear response at different input signal levels. High linearity means that the device can accurately amplify or process the input signal without introducing significant distortion or nonlinear distortion, thereby achieving high-fidelity and accurate transmission of the signal. For devices such as amplifiers, ideally, the input signal and the output signal should be proportional. However, actual devices always have some nonlinear distortion, that is, the output signal cannot change completely in proportion to the change of the input signal. This degree of deviation from linearity is the embodiment of linearity. Nonlinear distortion will produce unwanted frequency components (such as intermodulation products) that interfere with system performance. Linearity is usually quantified by various indicators, such as third-order intercept point (IIP3), harmonic distortion (HD) and intermodulation distortion (IMD).

[0041] Transconductance: The ratio of the change in output current of a field effect transistor (FET) or other electronic device to the change in input voltage, usually represented by the symbol g. m It indicates that this index directly affects the gain and frequency response characteristics of the amplifier. In field effect transistors, transconductance reflects the control ability of the gate voltage over the drain current. A higher transconductance means that a larger output current change can be generated under a smaller input voltage change, indicating that the device has a higher amplification capability and can reduce the noise coefficient of the transistor.

[0042] Third-Order Input Intercept Point (IIP3): A key parameter for measuring the linearity of amplifiers, mixers, or other nonlinear RF devices. It indicates that under hypothetical circumstances, when the input signal power reaches a certain value, the output third-order intermodulation products (IM3, i.e., nonlinear distortion products) and the output fundamental signal components are equal in power. When two input signals of similar frequencies pass through a nonlinear device, new frequency components, called intermodulation products, are generated in the output. Third-order intermodulation products are one of the most common distortion components and are located near the input signal frequency. The higher the IIP3 value, the better the linearity of the device, and the more effectively it can process large signals without significant distortion.

[0043] Isolation: A parameter that describes the degree of signal isolation between different ports in an electronic device or system, measured in decibels (dB). The larger the value, the better the isolation effect of the system. High isolation means less coupling between input and output signals, less interference between them, and the system can more effectively prevent signal feedback and interference, which helps improve system stability, reduce distortion and noise, and ensure signal purity and integrity.

[0044] Noise Figure (NF): Defined as the logarithmic form of the ratio of the input signal-to-noise ratio to the output signal-to-noise ratio, usually in decibels (dB). The noise figure is used to indicate the amount of additional noise introduced by a device when processing a signal. The smaller the noise figure, the less noise the device introduces and the better the system performance.

[0045] Multi-gated Transistors (MGTR): A transistor structure that improves the electrical performance of the transistor by enhancing the control of the semiconductor channel current through multiple gates. Compared with traditional planar transistors, multi-gate transistors have multiple gates to control the channel current, thereby providing superior electrical performance and smaller device size.

[0046] In the relevant field, various wireless communication standards (such as Bluetooth, Wi-Fi, GPS, 2G, 3G, 4G and 5G) are widely used. Low-cost, low-power and low-area multi-mode transceivers, software radio and cognitive radio technologies have been extensively studied to support multiple communication standards and effectively utilize frequency bands. An important component of the relevant wireless communication equipment that implements multi-mode transceiver, software radio or cognitive radio is a wideband receiver, which receives the RF signal from the signal source and amplifies the RF signal using an amplifier circuit provided at the front end of the receiver to enhance the signal strength of the RF signal. The reception performance mainly depends on the broadband low-noise amplifier circuit of the first stage of the receiver RF front end.

[0047] In the related art, the design of high-performance broadband low-noise amplifier circuits involves a compromise between broadband matching, noise figure, linearity, gain, isolation, and power consumption. In the related art, impedance matching can ensure that the maximum power is transmitted from the signal source to the amplifier circuit. According to the maximum power transfer theorem, when the source impedance is equal to the load impedance, the power transmitted to the load is the largest. At the same time, impedance matching can also reduce signal reflection. In order to prevent the noise in the amplifier circuit from interfering with the RF signal, the input impedance of the amplifier circuit needs to be adjusted to a specific value to optimize the noise figure and reduce noise interference. However, this will make the input impedance different from the source impedance of the signal source, sacrificing the broadband matching performance, resulting in low efficiency of the receiver receiving the RF signal. Therefore, how to reduce the noise interference of the amplifier circuit to the RF signal while ensuring the reception efficiency of the receiver has become an urgent problem to be solved.

[0048] Common structures of existing broadband low noise amplifier circuits include common gate amplifiers and resistor parallel feedback amplifiers. Figure 1 , Figure 1It is a circuit structure diagram of a common-gate amplifier. The source impedance Rs of the signal source is connected to the source of the input transistor M1, the drain of the input transistor M1 is connected to the power supply VDD, and a preset voltage VB is applied to the gate of the input transistor M1. It can be understood that the transconductance performance of the transistor can determine the noise factor and affect the input impedance. Since the input matching requires the input impedance and the source impedance to be as equal as possible, this requires that the transconductance of the input transistor M1 needs to be maintained at a certain value, so it is difficult to reduce the noise factor of the input transistor M1, and due to the existence of the third-order nonlinear component of the transconductance of the input transistor M1, the third-order intercept point of the structure is also difficult to improve. Therefore, although this structure can achieve broadband input matching, its noise factor is high and it has only moderate linearity.

[0049] Please refer to Figure 2 , Figure 2 It is a circuit diagram of a resistor parallel feedback amplifier. The source impedance Rs of the signal source is connected to the feedback resistor R F and the gate of the input transistor M2, the source of the input transistor M2 is grounded, and its drain is connected to the feedback resistor R F and power supply, where the feedback resistor R F The value of the feedback resistor R F The two ends are connected to the input and output of the circuit respectively, so there will be a signal path from the output to the input. Therefore, the isolation of this structure is poor, and the loop gain of the entire feedback loop is low, and it has only medium linearity.

[0050] There is also a low-noise amplifier circuit that uses broadband noise cancellation technology. In theory, the circuit structure achieves mutual cancellation of the main signal path and the noise cancellation signal path. Although it can solve the contradiction between input matching and noise coefficient requirements, in actual chip production, it is impossible to achieve complete consistency of the devices in the two paths in hardware, so the final chip cannot achieve the ideal cancellation effect, and does not improve the linearity performance of the low-noise amplifier.

[0051] Based on this, the embodiments of the present application provide an amplifier circuit, a wireless transceiver and a wireless communication device, which aim to reduce the noise interference of the amplifier circuit to the radio frequency signal while ensuring the receiving efficiency of the receiver.

[0052] The amplifier circuit, wireless transceiver and wireless communication device provided in the embodiments of the present application are specifically described through the following embodiments. First, the amplifier circuit in the embodiments of the present application is described.

[0053] Please refer to Figure 3 , Figure 3The module connection diagram of the amplifier circuit provided in the embodiment of the present application, the amplifier circuit includes a signal amplification module, a resistance module and a power supply module, the power supply module is respectively connected to the resistance module and the signal amplification module, and the resistance module is connected to the signal amplification module. Among them, the source impedance of the preset signal source is equal to the target impedance of the resistance module, so as to achieve broadband matching. The power supply module is used to provide a bias voltage, and the signal amplification module is used to determine the target operating mode according to the bias voltage, and the RF signal of the preset signal source is amplified according to the target operating mode to obtain a target signal, which is a signal output after amplification processing, and can be a voltage signal.

[0054] It is understandable that the power module can provide the amplifier circuit with a bias voltage and an operating voltage, and the bias voltage can include a plurality of different voltage values, which are respectively generated by different bias circuits inside the circuit, and the specific voltage values ​​of the bias voltage and the operating voltage can be adaptively adjusted according to the actual application scenario, and the embodiments of the present application do not strictly limit this. The preset signal source is an external device that sends a radio frequency signal, which can be a radio transmitter, a satellite communication device, a mobile communication device, a radar system, etc.

[0055] According to the amplifier circuit proposed in the embodiment of the present application, the broadband characteristics of the resistor itself are utilized, and a resistor module is set to achieve matching with the source impedance of the preset signal source. At the same time, the resistor module is connected to the power module and the signal amplification module. The bias voltage provided by the power module biases the signal amplification module, so that the signal amplification module amplifies the RF signal input by the preset signal source according to the target working mode. The design of the embodiment of the present application can decouple the relationship between the noise coefficient and the broadband matching. Broadband matching can be achieved only by designing the resistance value of the resistor module, while the signal amplification module can be allowed to perform amplification work. The transconductance performance of the signal amplification module can be designed separately, thereby reducing the noise in the circuit, but will not affect the performance of broadband matching, avoiding the problem of the need to balance the need for broadband matching with low noise performance, and achieving the goal of ensuring the receiving efficiency of the receiver while reducing the noise interference of the amplifier circuit to the RF signal.

[0056] Please refer to Figure 4 , Figure 4 An optional module connection diagram of an amplifier circuit provided in an embodiment of the present application. In some embodiments, the signal amplification module includes a first amplification unit, a second amplification unit and an output unit, the resistance module includes a first bias resistor and a second bias resistor, the bias voltage includes a first bias voltage and a second bias voltage, the target operating mode includes a first operating mode and a second operating mode, and the RF signal includes a first initial signal and a second initial signal.

[0057] Wherein, the first end of the first bias resistor is connected to the first amplifying unit, the second end of the first bias resistor is connected to the power module, the power module is used to provide a first bias voltage, the first amplifying unit is used to determine a first working mode according to the first bias voltage, and amplify the first initial signal according to the first working mode to obtain a first candidate signal. The first end of the second bias resistor is connected to the second amplifying unit, the second end of the second bias resistor is connected to the power module, the power module is used to provide a second bias voltage, the second amplifying unit is used to determine a second working mode according to the second bias voltage, and amplify the second initial signal according to the second working mode to obtain a second candidate signal.

[0058] In the embodiment of the present application, since the first bias resistor and the second bias resistor are in a parallel relationship, the target impedance is the impedance formed by the first bias resistor and the second bias resistor being connected in parallel, and the target impedance is close to or equal to the source impedance. For example, when the source impedance is fifty ohms, the resistance values ​​of the first bias resistor and the second bias resistor can both be one hundred ohms, and finally the total impedance of the first bias resistor and the second bias resistor is fifty ohms, which is the same as the source impedance.

[0059] In some embodiments, the amplifier circuit further includes a filtering module, the first end of the filtering module is connected to the signal source U1, the second end of the filtering module is respectively connected to the resistance module and the signal amplification module, and the filtering module is used to filter the radio frequency signal and prevent the passage of direct current. Specifically, the above-mentioned filtering module includes a first DC blocking capacitor CBP1, a second DC blocking capacitor CBP2, a third DC blocking capacitor CBN1 and a fourth DC blocking capacitor CBN2. The first end of the first DC blocking capacitor CBP1 is connected to the preset signal source, and the second end of the first DC blocking capacitor CBP1 is respectively connected to the first bias resistor Rmp and the gate of the first transistor MP1. The first end of the second DC blocking capacitor CBP2 is connected to the preset signal source, and the second end of the second DC blocking capacitor CBP2 is respectively connected to the third bias resistor Rbp and the second transistor MP2. The first end of the third DC blocking capacitor CBN1 is connected to the preset signal source, and the second end of the third DC blocking capacitor CBN1 is respectively connected to the second bias resistor Rmn and the third transistor MN1. A first end of the fourth DC blocking capacitor CBN2 is connected to a preset signal source, and a second end of the fourth DC blocking capacitor CBN2 is connected to the fourth bias resistor Rbn and the fourth transistor MN2 respectively.

[0060] For details, please refer to Figure 5 , Figure 5A circuit structure diagram of an amplifier circuit provided in an embodiment of the present application. It should be noted that in the application scenario provided in an embodiment of the present application, the RF signal transmitted by the signal source received by the amplifier circuit is actually equivalent to a series circuit connected to the signal source U1 and the resistor Rs, wherein the impedance of the resistor Rs is equivalent to the above-mentioned source impedance. After entering the amplifier circuit, the RF signal is divided into two parts: a first initial signal and a second initial signal, and flows into the first amplification unit and the second amplification unit respectively.

[0061] In some embodiments, the first amplifying unit includes a first transistor MP1, a second transistor MP2 and a third bias resistor Rbp, wherein the first transistor MP1 and the second transistor MP2 may be P-type MOS tubes. The first bias voltage includes a first sub-voltage VA_P and a second sub-voltage VB_P, and the first operating mode includes a first amplifying operating mode and a second amplifying operating mode.

[0062] Specifically, the first end of the first bias resistor Rmp is connected to the gate of the first transistor MP1, and the second end of the first bias resistor Rmp is connected to the first sub-voltage VA_P. The source of the first transistor MP1 and the source of the second transistor MP2 are respectively connected to the power module, that is, connected to the working voltage VDD_LNA. The drain of the first transistor MP1 is connected to the drain of the second transistor MP2, and the gate of the second transistor MP2 is respectively connected to the second end of the second DC blocking capacitor CBP2 and the first end of the third bias resistor Rbp. The second end of the third bias resistor Rbp is connected to the power module, that is, connected to the second sub-voltage VB_P. The first transistor MP1 is used to determine the first amplification working mode according to the first sub-voltage VA_P, and the second transistor MP2 is used to determine the second amplification working mode according to the second sub-voltage VB_P.

[0063] It should be noted that when the inversion region of the first transistor MP1 is a transition region between a weak inversion region and a strong inversion region (i.e., CLASS AB), the first transistor MP1 is in a first amplification mode. When the inversion region of the second transistor MP2 is a strong inversion region (i.e., CLASS C), the second transistor MP2 is in a second amplification mode. It can be understood that the inversion region in which the transistor is located can be set by controlling the voltage of the gate of the transistor. When its gate voltage exceeds but is close to the threshold voltage, the inversion region of the transistor is a weak inversion region, and when its gate voltage far exceeds the threshold voltage, the inversion region of the transistor is a strong inversion region. The threshold voltage depends on the type and manufacturing process of the transistor. Therefore, the first sub-voltage VA_P and the second sub-voltage VB_P applied to the gate can be adjusted accordingly according to the relevant parameters of the first transistor MP1 and the second transistor MP2, thereby determining the first amplification mode and the second amplification mode.

[0064] In some embodiments, the second amplifying unit includes a third transistor MN1, a fourth transistor MN2 and a fourth bias resistor Rbn, wherein the third transistor MN1 and the fourth transistor MN2 can be N-type MOS tubes, the second bias voltage includes a third sub-voltage VA_N and a fourth sub-voltage VB_N, and the second operating mode includes a third amplifying operating mode and a fourth amplifying operating mode.

[0065] Specifically, the first end of the second bias resistor Rmn is connected to the gate of the third transistor MN1, and the second end of the second bias resistor Rmn is connected to the third sub-voltage VA_N. The source of the third transistor MN1 and the source of the fourth transistor MN2 are respectively grounded GND_LNA, the drain of the third transistor MN1 is connected to the drain of the fourth transistor MN2, the gate of the fourth transistor MN2 is respectively connected to the second end of the fourth DC blocking capacitor CBN2 and the first end of the fourth bias resistor Rbn, and the second end of the fourth bias resistor Rbn is connected to the power module, that is, connected to the fourth sub-voltage VB_N. The third transistor MN1 is used to determine the third amplification working mode according to the third sub-voltage VA_N, and the fourth transistor MN2 is used to determine the fourth amplification working mode according to the fourth sub-voltage VB_N.

[0066] It should be noted that when the inversion region of the third transistor MN1 is a transition region between a weak inversion region and a strong inversion region, that is, the third transistor MN1 is in the third amplification operating mode; when the inversion region of the fourth transistor MN2 is a strong inversion region, that is, the fourth transistor MN2 is in the fourth amplification operating mode.

[0067] It should be noted that the third bias resistor Rbp and the fourth bias resistor Rbn do not participate in broadband matching, but the third bias resistor Rbp and the first bias resistor Rmp are in parallel, and the fourth bias resistor Rbn and the second bias resistor Rmn are also in parallel, so theoretically, the larger the value of the third bias resistor Rbp and the fourth bias resistor Rbn, the smaller the impact on the first bias resistor Rmp and the second bias resistor Rmn. Exemplarily, when the target impedance is fifty ohms, the first bias resistor Rmp and the second bias resistor Rmn are both one hundred ohms, then the values ​​of the third bias resistor Rbp and the fourth bias resistor Rbn need to be greater than or equal to one thousand ohms, but the larger the resistance value, the larger the corresponding resistor occupies the volume, so the value of the third bias resistor Rbp and the fourth bias resistor Rbn is one thousand ohms more appropriate.

[0068] It should be noted that, in the embodiment of the present application, the first amplifying unit and the second amplifying unit use transistors of opposite types to form complementary inputs. At the same time, the multi-gate transistor (MGTR) technology is used to split the first amplifying unit into a first transistor MP1 and a second transistor MP2, and the first transistor MP1 is used as the main transistor, and its inversion region is set in CLASS AB, and the second transistor MP2 is used as an auxiliary transistor, and its inversion region is set in CLASS C. Similarly, the second amplifying unit is split into a third transistor MN1 and a fourth transistor MN2, and the third transistor MN1 is used as the main transistor, and its inversion region is set in CLASS AB, and the fourth transistor MN2 is used as an auxiliary transistor, and its inversion region is set in CLASS C. In this way, the third-order nonlinearity of the transconductance is offset to improve the third-order intercept point of the above-mentioned transistor, thereby improving the input IIP3 index, and then improving the linearity of the broadband low-noise amplifier.

[0069] In some embodiments, the output unit is connected to the first amplification unit, the second amplification unit and the power supply module respectively, and the output unit is used to output a target signal according to the first candidate signal and the second candidate signal. The target signal can be input into other circuits of the subsequent stage for other processing.

[0070] In some embodiments, the output unit includes a fifth transistor MP3 and a sixth transistor MN3, the source of the fifth transistor MP3 is connected to the first amplification unit, specifically, the drain of the first transistor MP1 and the drain of the second transistor MP2. The gate of the fifth transistor MP3 is connected to the power module, that is, the voltage VCASP is connected. The drain of the fifth transistor MP3 is connected to the drain of the sixth transistor MN3, and the drain of the fifth transistor MP3 is used to output the first candidate signal.

[0071] The gate of the sixth transistor MN3 is connected to the power module, that is, the voltage VCASN is connected. The source of the sixth transistor MN3 is connected to the second amplification unit, specifically, the drain of the third transistor MN1 and the drain of the fourth transistor MN2. The drain of the sixth transistor MN3 is used to output the second candidate signal. Finally, the first candidate signal and the second candidate signal are integrated into a target signal and output from the output terminal LNA_OUT.

[0072] It should be noted that the fifth transistor MP3 and the sixth transistor MN3 together form a common source and common gate structure, which can improve the reverse isolation of the amplifier circuit.

[0073] In some embodiments, the power module is also used to provide an operating voltage VDD_LNA, the amplifier circuit also includes a feedback module, a first end of the feedback module is connected to the signal amplification module, a second end of the feedback module is connected to the power module, the feedback module is used to output a feedback voltage according to a target signal and a preset reference voltage VCM, and the power module is used to adjust the operating voltage according to the feedback voltage. In an embodiment of the present application, the target signal is a common mode voltage between the first candidate signal and the second candidate signal.

[0074] In some embodiments, the feedback module includes an operational amplifier OP and a low-dropout linear regulator LDO. The first end of the operational amplifier OP is connected to the signal amplification module through a resistor Rc, that is, the inverting input end of the operational amplifier OP is connected to the target signal, and the non-inverting input end of the operational amplifier OP is input with a preset reference voltage VCM. The operational amplifier OP is used to output a candidate voltage VREF according to the target signal and the preset reference voltage VCM. The second end of the operational amplifier OP is connected to the first end of the low-dropout linear regulator LDO, and the second end of the low-dropout linear regulator LDO is connected to the power module, and the low-dropout linear regulator LDO is used to output a feedback voltage according to the candidate voltage VREF.

[0075] In some embodiments, the feedback voltage output by the low dropout linear regulator LDO can also be directly used as the operating voltage VDD_LNA. When the transistors in the amplifier circuit adopt a 40nm complementary metal-oxide-semiconductor (CMOS) process, the value of the feedback voltage can be 1.1V to 1.2V.

[0076] It should be noted that the conventional common-mode voltage feedback solution is to connect the common-mode voltage to the input of the operational amplifier, and the output of the operational amplifier is connected to the gate of the transistor to control the gate voltage of the transistor. Different from the conventional common-mode voltage feedback solution, the output of the operational amplifier of the embodiment of the present application controls the operating voltage VDD_LNA of the power supply to stabilize the common-mode voltage output by the amplifier, and the operational amplifier has the ability to drive the circuit.

[0077] It should be noted that the amplifier circuit provided in the embodiment of the present application forms a complementary common-source and common-gate inverter structure as a whole, which achieves high reverse isolation of the amplifier circuit. At the same time, it also utilizes current multiplexing technology, so that twice the transconductance can be obtained under the same current, thereby improving the efficiency of the power supply.

[0078] Please refer to Figure 6 , Figure 6It is a schematic diagram of the results of the third-order nonlinear cancellation of transconductance simulation test of the amplifier circuit provided in an embodiment of the present application, wherein the horizontal axis is the gate voltage of the transistor, in millivolts, and the vertical axis is the second-order derivative of the transconductance of the transistor, which parameter can reflect the linearity of the transistor and has positive and negative phases.

[0079] It should be noted that the red curve represents the second-order derivative of the transconductance of the transistor whose inversion region is set to CLASS AB as the gate voltage changes. In the embodiment of the present application, the transistors represented by the red curve are the first transistor MP1 and the third transistor MN1. The yellow curve represents the second-order derivative of the transconductance of the transistor whose inversion region is set to CLASS C as the gate voltage changes. In the embodiment of the present application, the transistors represented by the red curve are the second transistor MP2 and the fourth transistor MN2.

[0080] In the embodiment of the present application, different bias voltages are applied to the gates of a pair of transistors. If a negative transconductance second-order derivative value appears in one transistor, the transconductance second-order derivative value of the other transistor is adjusted to be positive until the absolute values ​​of the transconductance second-order derivative values ​​of the two transistors are equal, and the transconductance second-order derivatives of the pair of transistors can cancel each other out, thereby improving the linearity of the transistors. Exemplarily, the gate voltage of the first transistor MN1 is adjusted to 385 millivolts, and the transconductance second-order derivative corresponding to the first transistor MN1 is 1.0. At this time, the gate voltage of the second transistor MN2 is adjusted to 375 millivolts (because in actual simulation, the gate voltage of the second transistor MN2 has a fixed 350 millivolt deviation, so the actual gate voltage of the second transistor MN2 is 725 millivolts), and the transconductance second-order derivative corresponding to the second transistor MN2 is -1.0. At this time, the transconductance second-order derivatives of the first transistor MN1 and the second transistor MN2 cancel each other out.

[0081] An embodiment of the present application also provides a wireless transceiver, including the amplifier circuit described in the above technical solution. By using the above amplifier circuit, the wireless transceiver can have better fidelity when processing signals, reduce nonlinear distortion, and enable the signal to be fully amplified during the transmission process, which helps to maintain good receiving performance in a weaker signal environment. It can also be compatible with more signal frequency bands to adapt to different communication standards and application scenarios.

[0082] An embodiment of the present application also provides a wireless communication device, including the wireless transceiver described in the above technical solution. By using the above wireless transceiver, the wireless communication device can ensure efficient signal reception and transmission, thereby providing users with a better communication experience.

[0083] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0084] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0085] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0086] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0087] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0088] The preferred embodiments of the present disclosure are described above with reference to the accompanying drawings, but the scope of the rights of the present disclosure is not limited thereto. Any modification, equivalent substitution and improvement made by those skilled in the art without departing from the scope and essence of the present disclosure should be within the scope of the rights of the present disclosure.

Claims

1. An amplifier circuit, It is characterized in that The amplifier circuit comprises: Signal amplification module; Resistor module; A power supply module, wherein the power supply module is connected to the resistance module and the signal amplification module respectively, and the resistance module is connected to the signal amplification module; Among them, the power supply module is used to provide a bias voltage; the signal amplification module is used to determine the target operating mode according to the bias voltage, and amplify the radio frequency signal of the preset signal source according to the target operating mode to obtain the target signal; the source impedance of the preset signal source is equal to the target impedance of the resistance module.

2. An amplifier circuit according to claim 1, It is characterized in that The signal amplification module includes a first amplification unit, a second amplification unit and an output unit; the resistance module includes a first bias resistor and a second bias resistor; the bias voltage includes a first bias voltage and a second bias voltage; the target working mode includes a first working mode and a second working mode; the radio frequency signal includes a first initial signal and a second initial signal; The first end of the first bias resistor is connected to the first amplifying unit, and the second end of the first bias resistor is connected to the power module; the power module is used to provide the first bias voltage; The first amplifying unit is used to determine the first working mode according to the first bias voltage, and amplify the first initial signal according to the first working mode to obtain a first candidate signal; The first end of the second bias resistor is connected to the second amplifying unit, and the second end of the second bias resistor is connected to the power module; the power module is used to provide the second bias voltage; The second amplifying unit is used to determine the second working mode according to the second bias voltage, and amplify the second initial signal according to the second working mode to obtain a second candidate signal; The target impedance is the impedance of the first bias resistor and the second bias resistor connected in parallel; The output unit is connected to the first amplifying unit, the second amplifying unit and the power supply module respectively, and the output unit is used to output the target signal according to the first candidate signal and the second candidate signal.

3. An amplifier circuit according to claim 2, It is characterized in that The first amplifying unit includes a first transistor, a second transistor and a third bias resistor, the first bias voltage includes a first sub-voltage and a second sub-voltage, and the first operating mode includes a first amplifying operating mode and a second amplifying operating mode; The first end of the first bias resistor is connected to the gate of the first transistor, the source of the first transistor and the source of the second transistor are respectively connected to the power module, the drain of the first transistor is connected to the drain of the second transistor, the gate of the second transistor is connected to the first end of the third bias resistor, and the second end of the third bias resistor is connected to the power module; The first transistor is used to determine the first amplification operation mode according to the first sub-voltage, and the second transistor is used to determine the second amplification operation mode according to the second sub-voltage.

4. An amplifier circuit according to claim 2, It is characterized in that The second amplifying unit includes a third transistor, a fourth transistor and a fourth bias resistor, the second bias voltage includes a third sub-voltage and a fourth sub-voltage, and the second operating mode includes a third amplifying operating mode and a fourth amplifying operating mode; The first end of the second bias resistor is connected to the gate of the third transistor, the source of the third transistor and the source of the fourth transistor are grounded respectively, the drain of the third transistor is connected to the drain of the fourth transistor, the gate of the fourth transistor is connected to the first end of the fourth bias resistor, and the second end of the fourth bias resistor is connected to the power module; The third transistor is used to determine the third amplification operation mode according to the third sub-voltage, and the fourth transistor is used to determine the fourth amplification operation mode according to the fourth sub-voltage.

5. An amplifier circuit according to claim 2, It is characterized in that The output unit includes a fifth transistor and a sixth transistor, the source of the fifth transistor is connected to the first amplification unit, the gate of the fifth transistor is connected to the power module, the drain of the fifth transistor is connected to the drain of the sixth transistor, and the drain of the fifth transistor is used to output the first candidate signal; the gate of the sixth transistor is connected to the power module, the source of the sixth transistor is connected to the second amplification unit, and the drain of the sixth transistor is used to output the second candidate signal.

6. An amplifier circuit according to claim 1, It is characterized in that The power supply module is also used to provide an operating voltage; the amplifier circuit also includes a feedback module, a first end of the feedback module is connected to the signal amplification module, and a second end of the feedback module is connected to the power supply module; the feedback module is used to output a feedback voltage according to the target signal and a preset reference voltage; the power supply module is used to adjust the operating voltage according to the feedback voltage.

7. An amplifier circuit according to claim 6, It is characterized in that The feedback module includes an operational amplifier and a low-dropout linear regulator, wherein a first end of the operational amplifier is connected to the signal amplification module, a second end of the operational amplifier is connected to a first end of the low-dropout linear regulator, and the operational amplifier is used to output a candidate voltage according to the target signal and a preset reference voltage; a second end of the low-dropout linear regulator is connected to the power module, and the low-dropout linear regulator is used to output a feedback voltage according to the candidate voltage.

8. An amplifier circuit according to claim 1, It is characterized in that The amplifier circuit also includes a filtering module, a first end of the filtering module is connected to the preset signal source, a second end of the filtering module is respectively connected to the resistance module and the signal amplification module, and the filtering module is used to filter the radio frequency signal.

9. A wireless transceiver, It is characterized in that The wireless transceiver comprises an amplifier circuit as claimed in any one of claims 1 to 8.

10. A wireless communication device, It is characterized in that The wireless communication device comprises the wireless transceiver of claim 9.

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