Step thick copper embedded heat dissipation substrate and processing method thereof

Abstract

The invention discloses a step thick copper embedded heat dissipation substrate and a processing method thereof, and the processing method comprises the steps: processing an outer layer thick copper foil of the substrate into a step structure composed of a thin copper region and a thick copper region, and manufacturing an inner layer circuit on the thin copper region; pasting a first photosensitive insulating layer on the step structure, and then exposing and developing to form a first hole and a second hole of which the inner wall roughness is not greater than 5 [mu] m on the first photosensitive insulating layer; a chip is fixedly arranged on the part, exposed out of the first hole, of the thick copper area; and covering the first photosensitive insulating layer and the chip with a second photosensitive insulating layer, forming an outer circuit connected with the chip pin on the second photosensitive insulating layer, and forming a first connecting copper body connected with the inner circuit and the outer circuit in the second hole, thereby obtaining the stepped thick copper embedded heat dissipation substrate. The machining method is high in machining efficiency and precision and low in machining cost, and the obtained heat dissipation substrate is high in heat dissipation performance, high in circuit pattern fineness and small in signal loss and meets production requirements.

Description

Technical Field

[0001] The invention relates to the technical field of circuit boards, and in particular to a stepped thick copper embedded heat dissipation substrate and a processing method thereof. Background Art

[0002] Copper-based printed circuit boards are widely used in high-power, high-heat dissipation products due to their good heat dissipation performance. In conventional circuit board structures, the copper thickness of the circuit layer is uniform, with a copper thickness difference of less than 5μm; and the copper thickness of the circuit layer is proportional to its minimum line width and line spacing, that is, when the copper thickness increases, the minimum line width and line spacing of the circuit layer also increase.

[0003] With the rapid development of artificial intelligence and Internet of Things technologies, the computing speed of chips has also increased significantly, which has made the heat dissipation problem of electronic devices more prominent. It is necessary to increase the local copper thickness of the circuit layer to improve the heat dissipation performance of electronic devices. However, when producing circuit board products, while meeting high heat dissipation performance, it is also necessary to ensure that the circuit board products meet the following technical requirements: small minimum line width and line spacing of the circuit layer, high product precision, and low signal transmission loss of the product. However, the existing circuit board production process cannot meet the above technical requirements.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] In order to overcome the above-mentioned defects, the present invention provides a stepped thick copper embedded heat dissipation substrate and a processing method thereof. The processing method is simple and reasonable, with high processing efficiency / precision and low processing cost. The obtained heat dissipation substrate has high heat dissipation performance, high circuit pattern fineness and low signal loss, which well meets the production needs of circuit boards.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a processing method of a stepped thick copper embedded heat dissipation substrate, comprising:

[0007] Providing a substrate having an outer layer of thick copper foil; processing the outer layer of thick copper foil into a step structure consisting of a thin copper area and a thick copper area, and making an inner layer circuit on the thin copper area;

[0008] A first photosensitive insulating layer is attached to the step structure provided with the inner layer circuit, and then the first photosensitive insulating layer is exposed and developed to form a first hole capable of exposing at least a portion of the thick copper area and a second hole capable of exposing a portion of the inner layer circuit on the first photosensitive insulating layer, and the inner wall roughness of the first hole and the second hole is not greater than 5 μm;

[0009] Fixing the chip on the portion of the thick copper area exposed outside the first hole;

[0010] A second photosensitive insulating layer is provided on the first photosensitive insulating layer and the chip, and the pins of the chip and the second hole are exposed outside the second photosensitive insulating layer;

[0011] An outer layer circuit connected and communicated with the pins of the chip is formed on the second photosensitive insulating layer, and a first connecting copper body connected and communicated with the inner layer circuit and the outer layer circuit respectively is formed in the second hole; that is, the stepped thick copper embedded heat dissipation substrate is obtained.

[0012] As a further improvement of the present invention, the specific parameters for the exposure treatment of the first photosensitive insulating layer are: using a 41-grid exposure ruler, the number of exposure grids is 6 to 9 grids, and the exposure energy is 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7μm;

[0013] The specific parameters of developing the first photosensitive insulating layer are: the developing window accuracy is controlled within ±10 μm, the developing point is controlled at 40% to 50%, and the developing line speed is controlled at 3 to 5 m / min;

[0014] In addition, after the development process is completed on the first photosensitive insulating layer, the first photosensitive insulating layer needs to be subjected to a heat curing process with a heat curing rate of ≥90% and a UV light curing process with a light curing rate of ≥85%.

[0015] As a further improvement of the present invention, the depth of the first hole is not less than the height of the chip; when the chip is fixedly disposed on the thick copper area, there is a gap between the chip and the inner wall of the first hole for the second photosensitive insulating layer to fill.

[0016] As a further improvement of the present invention, a processing method for fixing the chip on the portion of the thick copper area exposed outside the first hole is: first, a glue layer is set on the portion of the thick copper area exposed outside the first hole through a glue dispensing process, and then the chip is mounted on the portion of the thick copper area exposed outside the first hole with its pins facing away from the thick copper area through SMT surface mounting technology, and then a curing treatment is performed to fix the chip on the thick copper area.

[0017] As a further improvement of the present invention, the second photosensitive insulating layer is exposed and developed to form a third hole that penetrates the second hole and is arranged with the same central axis, and a fourth hole that can expose the pins of the chip on the second photosensitive insulating layer, and the inner wall roughness of the third hole and the fourth hole is also not more than 5μm.

[0018] As a further improvement of the present invention, specific parameters for exposure and development of the second photosensitive insulating layer are the same as specific parameters for exposure and development of the first photosensitive insulating layer;

[0019] In addition, after the development operation is completed on the second photosensitive insulating layer, the second photosensitive insulating layer also needs to be subjected to a heat curing treatment with a heat curing rate of ≥90% and a UV light curing treatment with a light curing rate of ≥85%.

[0020] As a further improvement of the present invention, the inner diameter of the third hole is greater than the inner diameter of the second hole; the fourth hole is used to form a second connecting copper body connected and communicated with the outer layer circuit and the pins of the chip respectively.

[0021] As a further improvement of the present invention, the inner layer circuit is manufactured by using the circuit pattern manufacturing process A; and the circuit pattern manufacturing process A and the processing technology of the step structure both include pre-film coating treatment, anti-corrosion photosensitive film coating, exposure, development, etching and film stripping processing performed in sequence;

[0022] In addition, the copper thickness of the thin copper area is 15-40 μm, and the copper thickness of the thick copper area is 35-100 μm; the minimum line width and minimum line spacing of the inner layer circuit are both 50 μm.

[0023] As a further improvement of the present invention, the outer layer circuit, the first connecting copper body and the second connecting copper body are manufactured by using the circuit pattern manufacturing process B;

[0024] The circuit pattern production process B includes pretreatment, seed layer production, lamination pretreatment, anti-plating photosensitive film coating, exposure, development, pattern electroplating, film stripping and flash etching.

[0025] The present invention also provides a stepped thick copper embedded heat dissipation substrate, which is manufactured by using the processing method of the stepped thick copper embedded heat dissipation substrate described in the present invention.

[0026] The beneficial effects of the present invention are as follows: ① Compared with the inner layer circuit manufacturing method in the prior art, the present invention adopts the processing method of "first processing a step structure composed of a thin copper area and a thick copper area, and then manufacturing an inner layer circuit on the thin copper area", which not only meets the requirements of high heat dissipation performance of the circuit board product, but also meets the requirements of manufacturing fine circuit patterns. The present invention can manufacture the inner layer circuit with a minimum line width and a minimum line spacing of 50μm; in addition, the above processing method can also better save processing costs and facilitate production implementation. ② Compared with the prior art of making holes and grooves by laser processing or machining, the present invention adopts a hole processing method combining "attaching a photosensitive insulating layer, exposing and developing the photosensitive insulating layer" to manufacture the second hole, etc., which is not only simple in process, high in processing efficiency (mass production of holes can be achieved), and low in processing cost, but also has high processing accuracy and high product quality. In particular, the roughness of the inner wall of the second hole and the like is not greater than 5μm, so that the surface of the first connecting copper body and the like formed in the above hole achieves an ultra-low surface roughness, thereby greatly reducing the loss of the circuit board product signal transmission. In summary, the processing method of the stepped thick copper embedded heat dissipation substrate of the present invention is simple and reasonable, with high processing efficiency / precision and low processing cost. The obtained heat dissipation substrate has high heat dissipation performance, high circuit pattern fineness and low signal loss, which well meets the production needs of circuit boards. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a flow chart of the processing method of the stepped thick copper embedded heat dissipation substrate according to Embodiment 1 of the present invention;

[0028] Figure 2 is a schematic cross-sectional structure diagram of the substrate in Embodiment 1 of the present invention;

[0029] Figure 3 for Figure 2 A simplified schematic diagram of the cross-sectional structure of the substrate shown;

[0030] Figure 4 It is a schematic diagram of the cross-sectional structure after the outer thick copper foil of the substrate is processed into a step structure in Example 1 of the present invention;

[0031] Figure 5 is a schematic cross-sectional structure diagram of the first intermediate plate obtained in Example 1 of the present invention;

[0032] Figure 6 is a schematic cross-sectional structural diagram of the second intermediate plate obtained in Example 1 of the present invention;

[0033] Figure 7 is a schematic cross-sectional structural diagram of the third intermediate plate obtained in Example 1 of the present invention;

[0034] Figure 8is a schematic cross-sectional structural diagram of the fourth intermediate plate obtained in Example 1 of the present invention;

[0035] Fig. 9 Schematic diagram of the cross-sectional structure of the stepped thick copper embedded heat dissipation substrate obtained in Example 1 of the present invention.

[0036] Combined with the accompanying drawings, the following description is given:

[0037] 1. Substrate; 10. Outer thick copper foil; 100. Thin copper area; 101. Thick copper area; 102. Inner circuit; 10a. Inner copper foil; 11. Support unit; 12. Insulating layer; 2. First photosensitive insulating layer; 21. First hole; 22. Second hole; 3. Chip; 4. Second photosensitive insulating layer; 40. Third hole; 41. Fourth hole; 5. Outer circuit; 6. First connecting copper body; 7. Second connecting copper body. DETAILED DESCRIPTION

[0038] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0039] Embodiment 1:

[0040] Please see attached Figures 1 to 9 As shown, this embodiment 1 provides a method for processing a stepped thick copper embedded heat dissipation substrate, which mainly includes the following processing steps:

[0041] S1: providing a substrate 1 having an outer thick copper foil 10 ; processing the outer thick copper foil 10 into a step structure consisting of a thin copper region 100 and a thick copper region 101 , and manufacturing an inner layer circuit 102 on the thin copper region 100 .

[0042] For details, please refer to the attached Figure 2 As shown, in this embodiment 1, the substrate 1 preferably adopts a multi-layer board structure formed by alternately stacking multiple insulating layers 12 and multiple copper foil layers in sequence, wherein the insulating layer 12 preferably adopts a prepreg or an insulating film, and the thickness of the multiple insulating layers 12 is preferably designed to be the same thickness, but the specific thickness value is determined according to the design requirements of the heat dissipation substrate; in the multiple copper foil layers, the thickness of the two outermost copper foil layers is greater than the thickness of the other copper foil layers located between the two layers, that is: if the two outermost copper foil layers are defined as "outer thick copper foil 10", and the other copper foil layers located between the two outer thick copper foil layers 10 are defined as "inner copper foil 10a", then the thickness of the outer thick copper foil 10 (or can be called "copper thickness") is greater than the thickness of the inner copper foil 10a; further, according to the design requirements of the heat dissipation substrate, this embodiment 1 also optimizes the thickness / copper thickness of the outer thick copper foil 10 to be 35-100 μm.

[0043] In addition, according to the design requirements of the heat dissipation substrate, at least one of the two layers of the outer thick copper foil 10 can be processed in subsequent processes (such as the following: step structure processing; inner layer circuit production; first photosensitive insulation layer coating and treatment; chip mounting; second photosensitive insulation layer coating and treatment; outer layer circuit production, etc.). This embodiment 1 is described by taking the subsequent processing of one of the layers of the outer thick copper foil 10 as an example. It is understandable that when only one of the layers of the outer thick copper foil 10 is processed in subsequent processes, other structures in the substrate 1 (such as attached Figure 2 The multiple layers of insulating layers 12, multiple layers of inner copper foil 10a and the remaining outer thick copper foil 10) framed by the red box will play a supporting role as a whole. Therefore, for the sake of simplicity and clarity, this embodiment 1 simplifies the structure of the substrate 1, that is, the multiple layers of insulating layers 12, multiple layers of inner copper foil 10a and the remaining outer thick copper foil 10 in the substrate 1 are collectively referred to as the supporting unit 11. Figure 3 shown.

[0044] Based on the above structure of the substrate 1, the processing method of this embodiment 1 for processing the outer thick copper foil 10 into a step structure is: the outer thick copper foil 10 is sequentially subjected to pre-filming treatment (such as cleaning and heating and drying treatment), coated with an anti-corrosion photosensitive film (preferably an anti-corrosion photosensitive dry film), exposed, developed, alkaline etched and film stripped, so that the outer thick copper foil 10 is processed into a step structure consisting of the thin copper area 100 and the thick copper area 101. For details, please refer to the attached Figure 4 Note: The above-mentioned "pre-coating treatment, coating with photosensitive film, exposure, development, alkaline etching and film stripping" are all conventional technical means in the field of circuit board processing, so they will not be described in detail here.

[0045] Furthermore, in this embodiment 1, by controlling the depth and control of alkaline etching, the copper thickness h1 of the thin copper area 100 is optimally controlled to be 15-40 μm, and the copper thickness h2 of the thick copper area 101 is optimally controlled to be 35-100 μm. It can be understood that some areas on the outer thick copper foil 10 do not need to be etched to form the thick copper area 101, which meets the high heat dissipation performance requirements of circuit board products (such as heat dissipation substrates); some areas on the outer thick copper foil 10 need to be deeply etched to form the thin copper area 100, which meets the fine circuit production requirements of circuit board products; and the copper thickness tolerance of the thin copper area 100 is controlled within ±1 to ±3 μm.

[0046] Based on the obtained step structure, the present embodiment 1 uses the circuit pattern manufacturing process A to manufacture the inner layer circuit 102 on the thin copper area 100 (that is, the inner layer circuit 102 is integrally formed on the thin copper area 100). Figure 5 The circuit pattern production process A includes the following steps: pre-coating treatment (such as cleaning and heating and drying), coating with a photosensitive resist film (preferably a photosensitive resist dry film), exposure, development, alkaline etching and film stripping; it is a conventional technical means in the field of circuit board processing, so it will not be described in detail here.

[0047] It is understandable that, ① compared with the prior art of making a circuit pattern on a thick copper area, this embodiment 1 makes the inner layer circuit 102 on the thin copper area 100, so that the inner layer circuit 102 can be made finer, and the minimum line width and minimum line spacing of the inner layer circuit 102 are both 50μm. ② compared with the prior art of first making a circuit pattern on a thin copper area and then performing electroplating layer processing, this embodiment 1 adopts "first processing a step structure composed of a thin copper area and a thick copper area, and then making an inner layer circuit on the thin copper area", which not only meets the requirements of high heat dissipation performance of circuit board products, but also meets the requirements of making fine circuit patterns, and can also better save processing costs and facilitate production implementation.

[0048] For the convenience of description, this embodiment 1 also defines the board formed after the inner layer circuit 102 is manufactured in the above S1 as a first intermediate board.

[0049] S2: A first photosensitive insulating layer 2 is pasted on the step structure with the inner layer circuit 102, and then the first photosensitive insulating layer 2 is exposed and developed to form a first hole 21 capable of exposing at least a portion of the thick copper area 101 and a second hole 22 capable of exposing a portion of the inner layer circuit 102 on the first photosensitive insulating layer 2, and the inner wall roughness of the first hole 21 and the second hole 22 is not greater than 5μm.

[0050] Specifically, the specific processing method of the above S2 is:

[0051] S21: Cleaning and roughening the first intermediate plate to enhance the flatness and bonding strength of the first photosensitive insulating layer 2 attached to the first intermediate plate in a subsequent process.

[0052] S22: Using a vacuum lamination process to laminate the first photosensitive insulating layer 2 onto the step structure of the first intermediate plate; wherein the first photosensitive insulating layer 2 can preferably be made of a photosensitive dry film, such as a photosensitive modified epoxy resin film or an acrylic resin type photosensitive film.

[0053] S23: Expose and develop the first photosensitive insulating layer 2, wherein the specific parameters of the exposure process are: using a 41-grid exposure ruler, the number of exposure grids is 6 to 9 grids, and the exposure energy is 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7 μm; the specific parameters of the development process are: the development window accuracy is controlled within ±10 μm, the development point is controlled at 40% to 50%, and the development line speed is controlled at 3 to 5 m / min; so as to realize processing on the first photosensitive insulating layer 2 to expose at least part of the thick copper area 101 and the second hole 22 to expose part of the inner layer circuit 102. For details, please refer to the attached Figure 6 As shown. It can be understood that, based on the material properties of the first photosensitive insulating layer 2 and the preferred control of the specific processing parameters during the exposure and development process, the first hole 21 and the second hole 22 can be precisely formed, and the inner wall roughness of the first hole 21 and the second hole 22 can be no more than 5μm, which is conducive to achieving ultra-low surface roughness of the surface of the first connecting copper body 6 in the post-process, thereby greatly reducing the loss during signal transmission.

[0054] Further, according to the design requirements of the heat dissipation substrate, the hole depth of the first hole 21 is designed to be not less than the height of the chip 3 (preferably slightly greater in this embodiment), and the aperture of the first hole 21 is designed to be greater than the width of the chip 3, that is, when the chip 3 is fixedly arranged on the thick copper area 101 in the post-process, there is a gap between the chip 3 and the inner wall of the first hole 21 (see the attached Figure 7 This is beneficial and convenient for installing the chip 3 in the first hole 21, and can also allow the second photosensitive insulating layer 4 in the post-process to be filled between the chip 3 and the first hole 21, insulating and tightly wrapping the chip 3 (see the attached Figure 8 As shown), the performance of the chip 3 is effectively improved. It is understandable that the control design of the first hole 21 also reflects the control requirements of the thickness of the first photosensitive insulating layer 2 in this embodiment 1.

[0055] As for the size of the second hole 22 , this embodiment 1 does not impose any restriction requirements, and the size is determined according to the design requirements of the heat dissipation substrate.

[0056] S24: After the exposure and development treatment of the first photosensitive insulating layer 2 is completed, the first photosensitive insulating layer 2 is also cured. Furthermore, the curing treatment method preferably adopts a compound curing treatment method composed of a combination of a baking heat curing treatment with a heat curing rate ≥ 90% and a UV light curing treatment with a light curing rate ≥ 85%, wherein the order and treatment time of the above-mentioned baking heat curing treatment and UV light curing treatment are mainly determined according to the specific material of the first photosensitive insulating layer 2, and this embodiment does not impose any restrictions. Based on the above-mentioned curing treatment method, while achieving a firm combination of the first photosensitive insulating layer 2 and the step structure of the first intermediate plate, the inner wall roughness of the first hole 21 and the second hole 22 can also be further optimized, that is, further ensuring that the inner wall roughness of the first hole 21 and the second hole 22 is no more than 5μm, thereby further reducing the surface roughness of the first connecting copper body 6.

[0057] In summary, compared with the prior art of making holes and grooves by laser processing or machining, the above-mentioned hole processing method used in this embodiment 1 not only has a simple process, high processing efficiency (batch processing of the first and second holes can be achieved), and low processing cost, but also has high processing accuracy (based on high exposure alignment accuracy and high development window opening accuracy). In particular, the roughness of the inner wall of the hole can be made no more than 5μm, which greatly reduces the surface roughness of the first connecting copper body 6.

[0058] For the convenience of description, this embodiment 1 also defines a board formed by firmly combining the first photosensitive insulating layer 2 and the first intermediate board as a second intermediate board.

[0059] S3 : fixing the chip 3 on the portion of the thick copper area 101 exposed outside the first hole 21 .

[0060] Specifically, the specific processing method of the above S3 is:

[0061] S31 : Based on the second intermediate board, a glue layer is provided on a portion of the thick copper area 101 exposed outside the first hole 21 by a glue dispensing process.

[0062] S32: Using SMT surface mounting technology, mount the chip 3 on the portion of the thick copper area 101 exposed outside the first hole 21 with its pins facing away from the thick copper area 101; Figure 7 shown.

[0063] S33 : performing a heating and curing process to achieve a firm combination of the chip 3 and the thick copper region 101 , that is, to achieve a fixed arrangement of the chip 3 on the thick copper region 101 .

[0064] Note: This embodiment 1 does not impose any restrictions on the specific type and model of the chip 3, which is determined based on the design requirements of the heat dissipation substrate.

[0065] For the convenience of description, this embodiment 1 also defines a board formed by firmly combining the chip 3 and the second intermediate board as a third intermediate board.

[0066] S4: a second photosensitive insulating layer 4 is provided on the first photosensitive insulating layer 2 and the chip 3 , and the pins of the chip 3 and the second holes 22 are exposed outside the second photosensitive insulating layer 4 .

[0067] Specifically, the specific processing method of the above S4 is:

[0068] S41: Cleaning and roughening the third intermediate plate to enhance the flatness and bonding strength of the second photosensitive insulating layer 4 attached to the third intermediate plate in a subsequent process.

[0069] S42: Use vacuum lamination process to laminate the second photosensitive insulating layer 4 onto the first photosensitive insulating layer 2 and the chip 3; wherein the second photosensitive insulating layer 4 is made of the same material as the first photosensitive insulating layer 2, but has a different thickness. Specifically, the second photosensitive insulating layer 4 is thinner, but the specific thickness is determined according to the design requirements of the heat dissipation substrate. Figure 8 It can be seen that the second photosensitive insulating layer 4 is filled between the chip 3 and the first hole 21 .

[0070] S43: Expose and develop the second photosensitive insulating layer 4 to form a third hole 40 penetrating the second hole 22 and arranged coaxially with the second hole 22, and a fourth hole 41 capable of exposing the pins of the chip 3. For details, please refer to the attached Figure 8 As shown. The specific parameters for the exposure and development of the second photosensitive insulating layer 4 in this embodiment 1 are the same as the specific parameters for the exposure and development of the first photosensitive insulating layer 2, so they are not repeated here; but it can be understood that the inner wall roughness of the third hole 40 and the fourth hole 41 in this embodiment 1 can also reach no more than 5μm, which is conducive to achieving ultra-low surface roughness of the surfaces of the first connecting copper body 6 and the second connecting copper body 7 in the post-process, thereby greatly reducing the loss during signal transmission.

[0071] Furthermore, according to the design requirements of the heat dissipation substrate, the inner diameter of the third hole 40 is designed to be larger than the inner diameter of the second hole 22, so as to ensure that the third hole 40 and the second hole 22 are arranged with the same central axis; there is no restriction on the inner diameter of the fourth hole 41, as long as the pins of the chip 3 can be exposed; it is understandable that the fourth hole 41 is used to form a second connecting copper body 7 that is connected and communicated with the outer layer circuit 5 and the pins of the chip 3 respectively.

[0072] S44: After the exposure and development operations are completed on the second photosensitive insulating layer 4, the second photosensitive insulating layer 4 is also cured. Similar to the above S24, the curing treatment method used in this step can also preferably adopt a compound curing treatment method consisting of a baking heat curing treatment with a heat curing rate ≥ 90% and a UV light curing treatment with a light curing rate ≥ 85%. It can be understood that the above curing treatment method can not only make the second photosensitive insulating layer 4 and the third intermediate plate firmly bonded, but also further optimize the inner wall roughness of the third hole 40 and the fourth hole 41, and further ensure that the inner wall roughness of the third hole 40 and the fourth hole 41 is no more than 5μm.

[0073] For the convenience of description, this embodiment 1 also defines a board formed by firmly combining the second photosensitive insulating layer 4 and the third intermediate board as a fourth intermediate board.

[0074] S5: Using the circuit pattern production process B, an outer layer circuit 5 connected and communicated with the pins of the chip 3 is formed on the second photosensitive insulating layer 4, and a first connecting copper body 6 connected and communicated with the inner layer circuit 102 and the outer layer circuit 5 is formed in the second hole 22; that is, the stepped thick copper embedded heat dissipation substrate is obtained.

[0075] Specifically, the specific processing method of the above circuit pattern production process B is:

[0076] S51: Pre-treating the second photosensitive insulating layer 4 of the fourth intermediate board, such as roughening or degumming (which can be understood as thinning the second photosensitive insulating layer 4) to enhance the bonding strength of the outer layer circuit 5, the first connecting copper body 6 and the second connecting copper body 7 during molding in the subsequent process.

[0077] S52 : forming a seed layer on the surface of the second photosensitive insulating layer 4 and the inner walls of the second hole 22 , the third hole 40 and the fourth hole 41 respectively by using a copper deposition process.

[0078] S53: performing pre-coating treatments such as cleaning, heating and drying on the fourth intermediate plate with the seed layer to facilitate subsequent processes.

[0079] S54 : applying a plating-resistant photosensitive dry film to the surface of the second photosensitive insulating layer 4 , while covering the third hole 40 and the fourth hole 41 .

[0080] S55: The anti-plating photosensitive dry film is exposed and developed so that the second hole 22, the third hole 40 and the fourth hole 41 are exposed outside the anti-plating photosensitive dry film, and a local area of ​​the seed layer located on the surface of the second photosensitive insulating layer 4 is exposed outside the anti-plating photosensitive dry film to form an outer layer circuit forming area.

[0081] S56: Using a graphic electroplating process, the first connecting copper body 6 is electroplated in the second hole 22 and the third hole 40 that intersect each other, the second connecting copper body 7 is electroplated in the fourth hole 41, and the outer layer circuit 5 that is respectively connected and communicated with the first connecting copper body 6 and the second connecting copper body 7 is electroplated on the outer layer circuit forming area.

[0082] S57: After removing the anti-plating photosensitive dry film by using a film stripping liquid, the exposed seed layer (i.e., the seed layer previously covered by the anti-plating photosensitive dry film) is removed by using a flash etching process, thereby obtaining the stepped thick copper embedded heat dissipation substrate; for details, please refer to the attached Fig. 9 shown.

[0083] S6: performing conventional surface treatment, molding, electrical testing, finished product inspection, packaging and shipment on the stepped thick copper embedded heat dissipation substrate in sequence, thus completing the production of the stepped thick copper embedded heat dissipation substrate finished product required subsequently.

[0084] From the above content, it can be seen that ① compared with the inner layer circuit manufacturing method in the prior art, this embodiment 1 adopts the processing method of "first processing a step structure composed of a thin copper area and a thick copper area, and then manufacturing an inner layer circuit on the thin copper area", which not only meets the requirements of high heat dissipation performance of circuit board products, but also meets the requirements of manufacturing fine circuit patterns. This embodiment 1 can produce the inner layer circuit with a minimum line width and a minimum line spacing of 50μm; in addition, the above processing method can also better save processing costs and facilitate production implementation. ② Compared with the prior art of making holes and grooves by laser processing or machining, this embodiment 1 adopts a hole processing method that combines "pasting a photosensitive insulating layer, exposing and developing the photosensitive insulating layer" to produce the second hole, etc., which not only has a simple process, high processing efficiency (mass production of holes can be achieved), and low processing cost, but also has high processing accuracy and high product quality. In particular, the roughness of the inner wall of the second hole and other holes can be made no more than 5μm, so that the surface of the first connecting copper body, etc. formed in the above-mentioned hole can achieve ultra-low surface roughness, thereby greatly reducing the loss of circuit board product signals during transmission.

[0085] Embodiment 2:

[0086] This embodiment 2 provides a stepped thick copper embedded heat dissipation substrate, which is manufactured using the processing method of the stepped thick copper embedded heat dissipation substrate described in the above embodiment 1.

[0087] Specifically, the specific structure of the stepped thick copper embedded heat dissipation substrate described in this embodiment 2 is as follows: Fig. 9 As shown, the heat dissipation substrate includes a board body, a first photosensitive insulating layer 2, a chip 3 and a second photosensitive insulating layer 4, wherein the board body is provided with a support unit 11 and a step structure fixedly arranged on the support unit 11, the step structure is composed of a thin copper area 100 and a thick copper area 101, and an inner layer circuit 102 is integrally formed on the thin copper area 100; the first photosensitive insulating layer 2 is fixedly attached to the step structure, and the first photosensitive insulating layer 2 is provided with a first hole 21 capable of exposing at least part of the thick copper area 101 and a second hole 22 capable of exposing part of the inner layer circuit 102; the chip 3 is fixedly arranged on the portion of the thick copper area 101 exposed outside the first hole 21, That is, the chip 3 is built into the first hole 21 and fixedly connected to the thick copper area 101 at the same time; the second photosensitive insulating layer 4 is fixedly attached to the first photosensitive insulating layer 2 and the chip 3, and the second photosensitive insulating layer 4 is provided with a third hole 40 which is intersecting with the second hole 22 and arranged with the same central axis, and a fourth hole 41 capable of exposing the pins of the chip 3; in addition, a first connecting copper body 6 is electroplated in the intersecting second hole 22 and the third hole 40, a second connecting copper body 7 is electroplated in the fourth hole 41, and an outer layer circuit 5 which is respectively connected and communicated with the first connecting copper body 6 and the second connecting copper body 7 is electroplated on the second photosensitive insulating layer 4.

[0088] From the above, it can be seen that the stepped thick copper embedded heat dissipation substrate described in this embodiment 2 has many advantages such as high heat dissipation performance, high circuit pattern fineness, low signal loss, low processing cost, etc., which well meets the production needs of circuit boards.

[0089] Finally, the prefixes "first", "second", etc. of the component names in this application specification (such as the first photosensitive insulating layer, the second photosensitive insulating layer, etc.) and the suffixes "A", "B", etc. of the component names (such as circuit pattern production process A, circuit pattern production process B, etc.) are only for the convenience of description and are not used to limit the scope of the implementation of the patent of this invention.

[0090] Many specific details are described in the above description to facilitate a full understanding of the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person familiar with the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A method for processing a stepped thick copper embedded heat dissipation substrate, characterized in that: include: Providing a substrate (1) having an outer layer of thick copper foil (10); processing the outer layer of thick copper foil (10) into a step structure consisting of a thin copper region (100) and a thick copper region (101), and manufacturing an inner layer circuit (102) on the thin copper region (100); A first photosensitive insulating layer (2) is pasted on the step structure provided with the inner layer circuit (102), and then the first photosensitive insulating layer (2) is exposed and developed to form a first hole (21) capable of exposing at least a portion of the thick copper area (101) and a second hole (22) capable of exposing a portion of the inner layer circuit (102) on the first photosensitive insulating layer (2), wherein the inner wall roughness of the first hole (21) and the second hole (22) is not greater than 5 μm; The chip (3) is fixedly arranged on a portion of the thick copper area (101) exposed outside the first hole (21); A second photosensitive insulating layer (4) is provided on the first photosensitive insulating layer (2) and the chip (3), and the pins of the chip (3) and the second hole (22) are exposed outside the second photosensitive insulating layer (4); An outer layer circuit (5) connected to and in communication with the pins of the chip (3) is formed on the second photosensitive insulating layer (4), and a first connecting copper body (6) connected to and in communication with the inner layer circuit (102) and the outer layer circuit (5) is formed in the second hole (22); thus, the stepped thick copper embedded heat dissipation substrate is obtained.

2. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 1 is characterized in that: The specific parameters for the exposure treatment of the first photosensitive insulating layer (2) are: using a 41-grid exposure ruler, the number of exposure grids is 6 to 9 grids, and the exposure energy is 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7μm; The specific parameters for developing the first photosensitive insulating layer (2) are: the developing window accuracy is controlled within ±10 μm, the developing point is controlled at 40% to 50%, and the developing line speed is controlled at 3 to 5 m / min; In addition, after the development process of the first photosensitive insulating layer (2) is completed, the first photosensitive insulating layer (2) needs to be subjected to a heat curing process with a heat curing rate of ≥90% and a UV light curing process with a light curing rate of ≥85%.

3. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 1 is characterized in that: The depth of the first hole (21) is not less than the height of the chip (3); When the chip (3) is fixedly disposed on the thick copper area (101), a gap is provided between the chip (3) and the inner wall of the first hole (21) for the second photosensitive insulating layer (4) to fill.

4. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 1 is characterized in that: The processing method for fixing the chip (3) on the portion of the thick copper area (101) exposed outside the first hole (21) is as follows: firstly, a glue layer is provided on the portion of the thick copper area (101) exposed outside the first hole (21) by means of a glue dispensing process, and then, by means of SMT surface mounting technology, the chip (3) is mounted on the portion of the thick copper area (101) exposed outside the first hole (21) with its pins facing away from the thick copper area (101), and then, a curing treatment is performed, thereby achieving the goal of fixing the chip (3) on the thick copper area (101).

5. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 2, characterized in that: The second photosensitive insulating layer (4) is exposed and developed to form a third hole (40) penetrating the second hole (22) and arranged on the same central axis as the second hole (22), and a fourth hole (41) capable of exposing the pins of the chip (3), and the inner wall roughness of the third hole (40) and the fourth hole (41) is not greater than 5μm.

6. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 5, characterized in that: The specific parameters for the exposure and development process of the second photosensitive insulating layer (4) are the same as the specific parameters for the exposure and development process of the first photosensitive insulating layer (2); In addition, after the development operation is completed on the second photosensitive insulating layer (4), the second photosensitive insulating layer (4) also needs to be subjected to a heat curing treatment with a heat curing rate of ≥90% and a UV light curing treatment with a light curing rate of ≥85%.

7. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 5, characterized in that: The inner diameter of the third hole (40) is greater than the inner diameter of the second hole (22); the fourth hole (41) is used to form a second connecting copper body (7) which is connected and communicated with the outer layer circuit (5) and the pins of the chip (3) respectively.

8. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 1, characterized in that: The inner layer circuit (102) is manufactured by using a circuit pattern manufacturing process A; and the circuit pattern manufacturing process A and the processing process of the step structure both include sequentially performing pre-film coating treatment, coating with an anti-corrosion photosensitive film, exposure, development, etching and film stripping processing; In addition, the copper thickness of the thin copper area (100) is 15-40 μm, and the copper thickness of the thick copper area (101) is 35-100 μm; the minimum line width and minimum line spacing of the inner layer circuit (102) are both 50 μm.

9. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 7, characterized in that: The outer layer circuit (5), the first connecting copper body (6) and the second connecting copper body (7) are manufactured using the circuit pattern manufacturing process B; The circuit pattern production process B includes pretreatment, seed layer production, lamination pretreatment, anti-plating photosensitive film coating, exposure, development, pattern electroplating, film stripping and flash etching.

10. A stepped thick copper embedded heat dissipation substrate, characterized in that: The substrate is manufactured by the processing method of the stepped thick copper embedded heat dissipation substrate as described in any one of claims 1 to 9.

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