Circuit board, preparation method thereof and electronic equipment

Abstract

The invention discloses a circuit board and a preparation method thereof, and an electronic device, the disclosed circuit board comprises a circuit board main body (100) and a via hole structure (200), the circuit board main body (100) is provided with a hole segment (101) and a back drilling hole (102) which are communicated with each other, an orifice of the hole segment (101) is located in a first surface of the circuit board main body (100), and the hole segment (101) is located in a second surface of the circuit board main body (100). The circuit board comprises a circuit board body (100) and a hole section (101), the hole section (101) is provided with a back drilling hole (102), the hole opening of the back drilling hole (102) is located in the second surface of the circuit board body (100), the first surface and the second surface are opposite to each other, the inner wall of the hole section (101) is provided with a metal layer to form the via hole structure (200), the via hole structure (200) is filled with a first filler (300), the back drilling hole (102) is filled with a second filler (400), and the first filler (300) and the second filler (400) are arranged in the via hole structure (200). And the dielectric constant of the second filler (400) is smaller than that of the circuit board main body (100). According to the scheme, the impedance of the via hole structure can be improved.

Description

Technical Field

[0001] The present invention relates to the field of circuit board design, and in particular to a circuit board and a preparation method thereof, and electronic equipment. Background Art

[0002] With the rapid development of the electronic communication industry, the complexity and integration of communication equipment have greatly increased, and the signal rate has gradually increased. 112Gbps rate products have been commercialized, and the research and development of 224Gbps products is also very urgent. As a PCB structure that must be used in high-speed and high-density designs, the performance of vias directly affects the performance of high-speed and high-density products. One of the important indicators for measuring via performance is impedance continuity. The impedance of a via (via impedance) is generally much smaller than the characteristic impedance of the PCB transmission line connected to it, resulting in poor impedance continuity of the entire link, which can easily cause signal integrity problems.

[0003] In the related art, in order to improve the impedance of via holes, the dielectric constant of the main body of the circuit board is usually reduced or the length of the residual column is reduced by back drilling to improve the impedance of the via holes. However, when the main body of the circuit board is prepared by materials with lower dielectric constants, the cost is higher due to the higher grade of the materials. When the length of the residual column is reduced, the processing capacity of the residual column is limited, and the effect is not good. Therefore, how to effectively improve the impedance of via holes is a technical problem that needs to be solved urgently. Summary of the invention

[0004] The invention discloses a circuit board and a preparation method thereof and electronic equipment, so as to solve the problem of how to improve the impedance of via holes.

[0005] In order to solve the above-mentioned technical problems, the present invention is achieved as follows:

[0006] In a first aspect, the present application discloses a circuit board, comprising a circuit board main body and a via structure, wherein the circuit board main body is provided with a connected hole segment and a back-drilled hole, the hole opening of the hole segment is located on the first surface of the circuit board main body, and the hole opening of the back-drilled hole is located on the second surface of the circuit board main body, the first surface and the second surface are opposite to each other, the inner wall of the hole segment is provided with a metal layer to form the via structure, the via structure is filled with a first filler, and the back-drilled hole is filled with a second filler, wherein the dielectric constant of the second filler is smaller than the dielectric constant of the circuit board main body.

[0007] In a second aspect, the present application further discloses an electronic device, comprising the circuit board described in the first aspect.

[0008] In a third aspect, the present application further discloses a method for preparing a circuit board, wherein the circuit board includes a circuit board body, and the preparation method includes:

[0009] A first through hole is provided on the circuit board body;

[0010] Disposing a metal layer on the inner wall of the first through hole to form a metallized through hole;

[0011] Filling a first filler into the metallized via hole;

[0012] The metallized via hole is back-drilled on the second surface of the circuit board body to form a back-drilled hole, wherein the metallized via hole after the back-drilling process forms a via structure.

[0013] In a fourth aspect, the present application further discloses a method for preparing a circuit board, wherein the circuit board includes a circuit board body, and the preparation method includes:

[0014] A first through hole is provided on the circuit board body;

[0015] Disposing a metal layer on the inner wall of the first through hole to form a metallized through hole;

[0016] Back-drilling the metallized via hole on the second surface of the circuit board body to form a back-drilled hole, wherein the metallized via hole after the back-drilling process forms a via structure;

[0017] A first filler is filled into the via structure, and a second filler is filled into the back-drilled hole, wherein a dielectric constant of the first filler is equal to a dielectric constant of the second filler and is smaller than a dielectric constant of the circuit board body.

[0018] The technical solution adopted by the present invention can achieve the following technical effects:

[0019] The circuit board disclosed in the embodiment of the present application forms a via structure by providing a connected hole segment and a back-drilled hole, and setting a metal layer on the inner wall of the hole segment, so that the back-drilled hole can reduce the via residual column, thereby improving the via impedance to a certain extent. Furthermore, by filling the via structure with a first filler and the back-drilled hole with a second filler, and the dielectric constant of the second filler is smaller than the dielectric constant of the circuit board body, the problem of low via impedance caused by the dielectric constant of the second filler being larger than the dielectric constant of the circuit board body can be avoided, thereby further improving the impedance of the via relative to the line layer connected thereto, improving high-frequency return loss and insertion loss, and improving signal integrity and transmission structure bandwidth. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the structure of a first circuit board disclosed in an embodiment of the present invention;

[0021] Figure 2A schematic diagram of the structure of a second circuit board disclosed in an embodiment of the present invention;

[0022] Figure 3 A comparison diagram of the impedance of the via hole in the circuit board disclosed in the embodiment of the present invention and the impedance of the via hole in the circuit board in the related art; wherein the abscissa represents time, and the ordinate represents the impedance value detected by TDR (time domain reflectometry);

[0023] Figure 4 A comparison diagram of insertion loss and return loss at the via structure position of the circuit board disclosed in the embodiment of the present invention and at the via structure position of the circuit board in the related art; wherein the abscissa represents the frequency, and the ordinate represents the logarithmic amplitude-frequency characteristic;

[0024] Figure 5 A comparison diagram of insertion loss at the via structure position of the circuit board disclosed in the embodiment of the present invention and at the via structure position of the circuit board in the related art; wherein the abscissa represents the frequency, and the ordinate represents the logarithmic amplitude-frequency characteristic;

[0025] Figure 6 The present invention is a flowchart of a method for preparing a circuit board disclosed in an embodiment of the present invention.

[0026] Description of reference numerals:

[0027] 100-PCB body, 101-hole section, 102-back drilling,

[0028] 200-via structure,

[0029] 300-first filler,

[0030] 400-second filler,

[0031] 500-Line layer,

[0032] 600-shielding layer, 700-soldering pad. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0034] The technical solutions disclosed in various embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0035] In common systems, such as signal interconnection of components such as high-speed connectors, BGA (Ball Grid Array), and differential / single-ended layer switching on PCB (Printed Circuit Board), via structures play a vital role. As signal rates increase, system SI (Signal Integrity) performance becomes more sensitive to impedance continuity, and the impact of via impedance continuity on channels is particularly significant. Via impedance is affected by many factors. Since this patent is mainly aimed at signal transmission systems with rates of 112Gbps and above, in signal transmission systems with rates of 112Gbps and above, the via impedance may be high or low. This application is mainly designed for situations where the via impedance is low.

[0036] Please refer to Figures 1 to 6 The embodiment of the present invention discloses a circuit board, which may be a multi-layer structure. The circuit board includes a circuit board body 100 and a via structure 200.

[0037] The circuit board body 100 is provided with a connected hole section 101 and a back-drilled hole 102. The opening of the hole section 101 is located on the first surface of the circuit board body 100, and the opening of the back-drilled hole 102 is located on the second surface of the circuit board body 100. The first surface and the second surface are opposite to each other.

[0038] The inner wall of the hole section 101 is provided with a metal layer to form a via structure 200. The via structure 200 can be used for signal interconnection of components such as high-speed connectors and BGA, as well as differential / single-ended layer switching on the circuit board body 100.

[0039] The via structure 200 is filled with a first filler 300 , and the back-drilled hole 102 is filled with a second filler 400 , wherein the dielectric constant of the second filler 400 is smaller than the dielectric constant of the circuit board body 100 .

[0040] It should be noted that in the related art, in order to improve the via impedance, the related art improves the via impedance by reducing the dielectric constant of the circuit board body, that is, adjusting the via impedance as shown in the attached figure. Figure 1 and attached Figure 2 The horizontal Figure 1 and attached Figure 2 The materials and settings of the components arranged in the x and y directions (in the circuit board) are adjusted to improve the via impedance. Therefore, the related art improves the via impedance by adjusting the materials and settings of the components arranged in the lateral direction of the circuit board.

[0041] The circuit board disclosed in the embodiment of the present application is formed by adjusting the through-hole direction of the circuit board along the through-hole structure 200 (i.e., the through-hole direction of the circuit board). Figure 1 and attached Figure 2The via impedance is changed by adjusting the materials and arrangement of the components on the circuit board (in the z direction), etc. It should be noted that the via impedance mentioned in the embodiment of the present application refers to the impedance of the circuit board at the position of the via structure 200. When the circuit board disclosed in the embodiment of the present application opens the connected hole segment 101 and the back-drilled hole 102, a through first through hole is first opened on the circuit board, and a metal layer is provided on the inner wall of the first through hole to form a metallized via hole, and the metallized via hole is back-drilled on the second surface of the circuit board body 100 to form the back-drilled hole 102, wherein the metallized via hole after the back-drilling forms the via structure 200, and the remaining part of the first through hole after the back-drilling forms the hole segment 101.

[0042] The circuit board disclosed in the embodiment of the present application is provided with a connected hole section 101 and a back-drilled hole 102, and a metal layer is arranged on the inner wall of the hole section 101 to form a via structure 200. The back-drilled hole 102 is formed by a back-drilling process, so that the back-drilled hole 102 can reduce the via residual column, thereby improving the via impedance to a certain extent. Furthermore, by filling the first filler 300 in the via structure 200 and the second filler 400 in the back-drilled hole 102, and the dielectric constant of the second filler 400 is smaller than the dielectric constant of the circuit board body 100, the problem of low via impedance caused by the dielectric constant of the second filler 400 being larger than the dielectric constant of the circuit board body 100 can be avoided, thereby further improving the via impedance relative to the line layer connected thereto, improving high-frequency return loss and insertion loss, and improving signal integrity and transmission structure bandwidth.

[0043] To further improve the via impedance, the dielectric constant of the first filler 300 may be equal to the dielectric constant of the second filler 400. Since the dielectric constant of the second filler 400 is smaller than that of the circuit board body 100, the dielectric constant of the first filler 300 is also smaller than that of the circuit board body 100.

[0044] In another embodiment, the dielectric constant of the first filler 300 may be greater than the dielectric constant of the second filler 400 , and less than the dielectric constant of the circuit board body 100 .

[0045] The circuit board disclosed in the embodiment of the present application can further improve the impedance of the via to a certain extent by using the first filler 300 having a dielectric constant smaller than that of the circuit board body 100, thereby further improving the high-frequency return loss and insertion loss, and enhancing the signal integrity and transmission structure bandwidth. In the case where the dielectric constant of the first filler 300 is equal to the dielectric constant of the second filler 400, the materials of the first filler 300 and the second filler 400 can be the same, which is conducive to the one-time filling of the first filler 300 and the second filler 400, thereby improving the filling efficiency.

[0046] In a simpler and more effective implementation, the second filler 400 may be air. Since the dielectric constant of air is approximately the dielectric constant of a vacuum, air has a lower dielectric constant, thereby effectively improving the via impedance.

[0047] In other embodiments, the first filler 300 and the second filler 400 can be materials such as resin and green oil. Of course, the first filler 300 and the second filler 400 can also be other materials, as long as the dielectric constant of the material of the second filler 400 is smaller than the dielectric constant of the material of the circuit board body 100. The embodiments of the present application do not limit the specific materials of the first filler 300 and the second filler 400.

[0048] In a specific implementation, the circuit board may include a solder ball array packaging area, the via structure 200 may be located in the solder ball array packaging area, and the via structure 200 is used to electrically connect with the solder ball array packaging structure.

[0049] It should be noted that, when the circuit board includes a solder ball array packaging structure, the solder ball array packaging structure can be arranged in a solder ball array packaging area, and the solder ball array packaging structure is electrically connected to the via structure 200, so that the solder ball array packaging structure can be interconnected with other solder ball array packaging structures or high-speed connectors or other component signals through the via structure 200.

[0050] Optionally, the circuit board may include a connector mounting area, and the via structure 200 may be located in the connector mounting area, and the via structure 200 is used to electrically connect to the connector.

[0051] It should be noted that when the circuit board includes a connector, the connector can be arranged in the connector mounting area, and the connector is electrically connected to the via structure 200, so that the connector can be interconnected with other connectors or solder ball array packaging structures or other component signals through the via structure 200.

[0052] In one embodiment, the via structure 200 may be one, for example, one via structure 200 may be used for single-end layer switching of a circuit board to achieve signal interconnection between multiple circuit layers 500 in the circuit board.

[0053] In another embodiment, the circuit board may include at least two via structures 200, wherein two via structures 200 of the at least two via structures 200 may form a differential pair. For example, a differential pair may be used for differential signal layer switching.

[0054] Specifically, the circuit board may further include a circuit layer 500, which is disposed in the circuit board body 100, and the circuit layer 500 is electrically connected to the side wall of the via structure 200, and the side wall of the via structure 200 refers to the metal layer forming the via structure 200. The circuit board disclosed in the embodiment of the present application is provided with a circuit layer 500 electrically connected to the side wall of the via structure 200, so that the circuit layer 500 can be interconnected with other circuit layers or other components through the via structure 200.

[0055] Specifically, there may be multiple circuit layers 500, and the multiple circuit layers 500 may be arranged at intervals along the through-going direction of the via structure 200. It should be noted that, in the case of multiple via structures 200, some of the multiple circuit layers 500 may be electrically connected to one of the via structures 200, and other circuit layers 500 may be electrically connected to other via structures 200, so that the signals between the multiple circuit layers 500 and between the circuit layers 500 and other components are interconnected.

[0056] In some cases, different areas of the circuit board body 100 need to be metal isolated to control the influence of electric fields, magnetic fields, electromagnetic waves, etc. between different areas. Optionally, the circuit board may also include a shielding layer 600. The shielding layer 600 may be arranged in the circuit board body 100. The shielding layer 600 may be provided with an avoidance structure 601. The via structure 200 may be located in the avoidance structure 601 and spaced apart from the shielding layer 600.

[0057] The circuit board disclosed in the embodiment of the present application is provided with a shielding layer 600 so that the shielding layer 600 can perform metal isolation on different areas of the circuit board body 100, thereby avoiding the influence of electric fields, magnetic fields, electromagnetic waves, etc. between different areas.

[0058] It should be noted that the design of the shielding layer 600 can be arranged according to the specific design of the circuit board, and the embodiment of the present application does not limit the specific setting position of the shielding layer 600.

[0059] The circuit board disclosed in the embodiment of the present application may further include a pad 700 , which may be used to form a pad pattern of the circuit board, that is, a combination of pads designed for various special component types. The pad 700 may be disposed on the first surface and connected to the via structure 200 .

[0060] Optionally, the via structure 200 in the circuit board disclosed in the embodiment of the present application may be a differential pair structure for a BGA or connector area with a 1.0 mm pitch, a 0.8 mm pitch, etc.

[0061] like Figure 3 As shown, Figure 3The diagram shows a comparison of the via impedance of the circuit board disclosed in the embodiment of the present application and the via impedance of the circuit board in the related art. Figure 3 It can be seen that the via impedance of the circuit board in the embodiment of the present application is increased by about 3.5Ω compared with the via impedance of the circuit board in the related art, which significantly improves the continuity of the via impedance of the circuit board.

[0062] in, Figure 3 a in the figure represents the via impedance in the circuit board disclosed in the embodiment of the present application, Figure 3 The b in FIG. 1 represents the via impedance in the circuit board in the related art.

[0063] like Figure 4 As shown, Figure 4 The diagram shows a comparison of the insertion loss and return loss of the circuit board at the position of the via structure 200 disclosed in the embodiment of the present application and the circuit board in the related art at the position of the via structure. Figure 4 It can be seen that the return loss of the circuit board at the position of the via structure 200 in the embodiment of the present application is reduced by about 5 to 10 dB compared with the return loss of the circuit board at the position of the via structure in the related art. Figure 5 From the enlarged comparison of the insertion loss of the circuit board at the position of the via structure 200 disclosed in the embodiment of the present application and the insertion loss of the circuit board in the related art at the position of the via structure, it can be seen that the insertion loss of the circuit board at the position of the via structure 200 in the embodiment of the present application is improved by less than 5dB compared with the insertion loss of the circuit board in the related art at the position of the via structure, which significantly improves the transmission bandwidth and signal integrity of the circuit board at the position of the via structure 200 and improves the system margin.

[0064] in, Figure 4 c in the figure represents the return loss of the circuit board at the position of the via structure 200 disclosed in the embodiment of the present application. Figure 4 d in represents the return loss of the circuit board at the via structure position in the related art. Figure 5 The e in the figure represents the insertion loss of the circuit board at the position of the via structure 200 disclosed in the embodiment of the present application. Figure 5 The f in represents the insertion loss of the circuit board at the via structure position in the related art.

[0065] Therefore, the circuit board disclosed in the embodiment of the present application has better signal integrity characteristics at the location of the via structure 200. Compared with the circuit board in the related art, the circuit board disclosed in the embodiment of the present application can effectively improve the via impedance, improve the signal integrity of the circuit board at the location of the via structure 200, and improve the system margin.

[0066] The present application also discloses an electronic device, and the disclosed electronic device includes the circuit board disclosed in the above embodiment.

[0067] The electronic device disclosed in the embodiment of the present application can improve the via impedance of the circuit board, improve high-frequency return loss and insertion loss, and enhance signal integrity and transmission structure bandwidth by being configured to include the circuit board disclosed in the above embodiment.

[0068] In the embodiments of the present application, the electronic device may be a mobile phone, a tablet, a game console, a computer, etc. The embodiments of the present application do not limit the specific type of the electronic device.

[0069] The present application also discloses a method for preparing a circuit board. The disclosed circuit board includes a circuit board body 100. The disclosed method for preparing the circuit board includes:

[0070] S101 , opening a first through hole in the circuit board body 100 .

[0071] S102, disposing a metal layer on the inner wall of the first through hole to form a metallized through hole.

[0072] Specifically, the metal layer may be disposed on the inner wall of the first through hole by electroplating. Of course, the metal layer may also be disposed on the inner wall of the first through hole by other methods. The present application does not impose any specific limitation on the disposition of the metal layer.

[0073] S103, filling the metallized via hole with a first filler 300.

[0074] S104 , back-drilling the metallized via hole on the second surface of the circuit board body 100 to form a back-drilled hole 102 .

[0075] The metallized conductive hole after back drilling forms a via structure 200 .

[0076] The circuit board prepared by the circuit board preparation method disclosed in the embodiment of the present application can improve the via resistance of the circuit board, improve high-frequency return loss and insertion loss, and enhance signal integrity and transmission structure bandwidth.

[0077] Furthermore, after back-drilling the metallized via hole on the second surface of the circuit board body 100, the disclosed preparation method further includes:

[0078] Step A1 : filling the back-drilled hole 102 with a second filler 400 , wherein the dielectric constant of the second filler 400 is smaller than the dielectric constant of the circuit board body 100 .

[0079] The present application also discloses a method for preparing a circuit board. The disclosed circuit board includes a circuit board body 100. The disclosed method for preparing the circuit board includes:

[0080] Step B1, opening a first through hole on the circuit board body 100.

[0081] Step B2: disposing a metal layer on the inner wall of the first through hole to form a metallized through hole.

[0082] Step B3, back-drilling the metallized via hole on the second surface of the circuit board body 100 to form a back-drilled hole 102, wherein the metallized via hole after the back-drilling process forms a via structure 200.

[0083] Step B4 , filling the via structure 200 with the first filler 300 , and filling the back-drilled hole 102 with the second filler 400 .

[0084] The dielectric constant of the first filler 300 is equal to the dielectric constant of the second filler 400 , and is smaller than the dielectric constant of the circuit board body 100 .

[0085] The circuit board prepared by the circuit board preparation method disclosed in the embodiment of the present application can increase the via impedance of the circuit board, improve high-frequency return loss and insertion loss, and enhance signal integrity and transmission structure bandwidth.

[0086] The above embodiments of the present invention focus on the differences between the various embodiments. As long as the different optimization features between the various embodiments are not contradictory, they can be combined to form a better embodiment. Considering the simplicity of the text, they will not be repeated here.

[0087] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A circuit board, characterized in that: The invention comprises a circuit board body (100) and a via structure (200), wherein the circuit board body (100) is provided with a connected hole section (101) and a back-drilled hole (102), the opening of the hole section (101) is located on the first surface of the circuit board body (100), and the opening of the back-drilled hole (102) is located on the second surface of the circuit board body (100), the first surface and the second surface are opposite to each other, the inner wall of the hole section (101) is provided with a metal layer to form the via structure (200), the via structure (200) is filled with a first filler (300), and the back-drilled hole (102) is filled with a second filler (400), wherein the dielectric constant of the second filler (400) is smaller than the dielectric constant of the circuit board body (100).

2. The circuit board according to claim 1, characterized in that: The dielectric constant of the first filler (300) is equal to the dielectric constant of the second filler (400).

3. The circuit board according to claim 1, characterized in that: The dielectric constant of the first filler (300) is greater than the dielectric constant of the second filler (400), and is less than the dielectric constant of the circuit board body (100).

4. The circuit board according to claim 1, characterized in that: The second filler (400) is air.

5. The circuit board according to claim 1, characterized in that: The circuit board comprises a solder ball array packaging area, and the via structure (200) is located in the solder ball array packaging area and is used for being electrically connected to the solder ball array packaging structure.

6. The circuit board according to claim 1, characterized in that: The circuit board comprises a connector mounting area, and the via structure (200) is located in the connector mounting area and is used for being electrically connected to the connector.

7. The circuit board according to claim 1, characterized in that: The circuit board comprises at least two via structures (200), wherein two via structures (200) of the at least two via structures (200) form a differential pair.

8. The circuit board according to claim 1, characterized in that: The circuit board further comprises a circuit layer (500), wherein the circuit layer (500) is arranged in the circuit board body (100), and the circuit layer (500) is electrically connected to the side wall of the via structure (200).

9. The circuit board according to claim 1, characterized in that: The circuit board further comprises a shielding layer (600), the shielding layer (600) being arranged in the circuit board body (100), the shielding layer (600) being provided with an avoidance structure (601), the via structure (200) being located in the avoidance structure (601) and being spaced apart from the shielding layer (600).

10. An electronic device, characterized in that: A circuit board comprising any one of claims 1 to 9.

11. A method for preparing a circuit board, characterized in that: The circuit board comprises a circuit board body (100), and the preparation method comprises: A first through hole is provided on the circuit board body (100); Disposing a metal layer on the inner wall of the first through hole to form a metallized through hole; Filling a first filler (300) into the metallized via hole; The metallized via hole is back-drilled on the second surface of the circuit board body (100) to form a back-drilled hole (102), wherein the metallized via hole after the back-drilling process forms a via structure (200).

12. The preparation method according to claim 10, characterized in that: After back-drilling the metallized via hole on the second surface of the circuit board body (100), the preparation method further comprises: A second filler (400) is filled into the back-drilled hole (102), wherein the dielectric constant of the second filler (400) is smaller than the dielectric constant of the circuit board body (100).

13. A method for preparing a circuit board, characterized in that: The circuit board comprises a circuit board body (100), and the preparation method comprises: A first through hole is provided on the circuit board body (100); Disposing a metal layer on the inner wall of the first through hole to form a metallized through hole; Back-drilling the metallized via hole on the second surface of the circuit board body (100) to form a back-drilled hole (102), wherein the metallized via hole after the back-drilling process forms a via structure (200); A first filler (300) is filled into the via structure (200), and a second filler (400) is filled into the back-drilled hole (102), wherein the dielectric constant of the first filler (300) is equal to the dielectric constant of the second filler (400) and is smaller than the dielectric constant of the circuit board body (100).

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