Main-gate-free electrode structure, IBC solar cell, cell module and photovoltaic system

Abstract

The utility model relates to the technical field of solar cells, and provides a main-grid-free electrode structure, an IBC solar cell sheet, a cell assembly and a photovoltaic system, in the IBC solar cell sheet, a first connection grid line and a second connection grid line are arranged at a first disconnection area, the first connection grid line and the second connection grid line are not contacted with a first fine grid, and the second connection grid line is not contacted with a second fine grid. The first connecting grid line and the second connecting grid line are connected with the part, closest to the third edge, of the second fine grid, and the first end welding point is arranged between the first connecting grid line and the second connecting grid line and makes contact with the first connecting grid line and the second connecting grid line. Therefore, when the welding strip is subsequently welded with the first end part welding point, due to the arrangement of the first connecting grid line and the second connecting grid line, the risk of hidden cracks during welding can be reduced, the yield of the battery piece is improved, and meanwhile, the overall convergence of the second fine grid can be realized.

Description

Technical Field

[0001] The utility model relates to the technical field of solar cells, in particular to a main grid electrode-free structure, an IBC solar cell sheet, a battery assembly and a photovoltaic system. Background Art

[0002] A back-contact solar cell is a cell in which both the P-type doped layer and the N-type doped layer are arranged on the back of the silicon wafer. In the prior art, in order to reduce the use of slurry and reduce costs, a back-contact solar cell can adopt a busbar-free technical solution. In a busbar-free back-contact cell, the fine grid on the back is usually designed discontinuously, and then a welding strip is arranged in the disconnected area to achieve the convergence output. In order to achieve the welding of the welding strip, it is necessary to set a welding point on the back of the cell for welding.

[0003] In the related art, the starting welding point of the welding strip is close to the edge of the battery cell, which may easily cause hidden cracks in the battery cell during the welding process, resulting in a reduction in yield. Utility Model Content

[0004] The utility model provides a main grid electrode structure without a main grid electrode, an IBC solar cell, a battery assembly and a photovoltaic system, aiming to solve the technical problem that the existing IBC solar cell is prone to hidden cracks in the cell during welding, resulting in reduced yield.

[0005] The utility model is implemented in this way. The main grid electrode structure without a main grid electrode of the embodiment of the utility model is used for an IBC solar cell. The main grid electrode structure without a main grid electrode is arranged on the back side of the silicon substrate of the IBC solar cell. The main grid electrode structure without a main grid electrode comprises:

[0006] A plurality of first fine gates and a plurality of second fine gates, wherein the plurality of first fine gates and the plurality of second fine gates are alternately arranged in sequence along a first direction and extend along a second direction, wherein the second direction intersects the first direction, wherein in the second direction, the silicon substrate has a first edge and a second edge opposite to each other, and in the first direction, the silicon substrate has a third edge and a fourth edge opposite to each other;

[0007] In the second direction, the first fine gate has a plurality of spaced first disconnected regions, and the second fine gate has a plurality of spaced second disconnected regions, the first disconnected regions and the second disconnected regions are alternately arranged in sequence, the first disconnected regions on two adjacent first fine gates correspond to each other in the first direction, and the second disconnected regions on adjacent second fine gates correspond to each other in the first direction;

[0008] a first connection gate line and a second connection gate line disposed at the first disconnected region, the first connection gate line and the second connection gate line being spaced apart along the second direction and extending along the first direction, the first connection gate line and the second connection gate line not being in contact with the first fine gate, and the first connection gate line and the second connection gate line both being connected to a portion of the second fine gate closest to the third edge;

[0009] A first end welding point is disposed near the third edge and located at the first disconnection area, wherein the first end welding point is disposed between the first connection gate line and the second connection gate line and contacts the first connection gate line and the second connection gate line.

[0010] Furthermore, in the first direction, the distance between the first end welding point and the third edge is 1 cm-3 cm.

[0011] Furthermore, the first connecting gate line and the second connecting gate line are connected to at least three second fine gates; and / or

[0012] In the first direction, the lengths of the first connecting gate lines and the second connecting gate lines are at least four times the spacing between the first fine gates and the second fine gates.

[0013] Furthermore, the main gate electrode structure also includes a third connecting gate line, which is located at the first disconnected area and does not contact the first fine gate, and the third connecting gate line connects the first end welding point and the first connecting gate line and the part of the second fine gate between the second connecting gate line and the fourth edge.

[0014] Furthermore, the main gate electrode structure without main gate may further include a fourth connecting gate line and a fifth connecting gate line arranged at the first disconnected area, the fourth connecting gate line and the fifth connecting gate line are arranged at intervals along the second direction and extend along the first direction, the fourth connecting gate line and the fifth connecting gate line are not in contact with the first fine gate, and the fourth connecting gate line and the fifth connecting gate line are both connected to the part of the second fine gate closest to the fourth edge;

[0015] A second end welding point is disposed near the fourth edge and located at the first disconnection area, and the second end welding point is disposed between the fourth connection gate line and the fifth connection gate line and contacts the fourth connection gate line and the fifth connection gate line.

[0016] Furthermore, in the first direction, the distance between the second end welding point and the fourth edge is 1 cm-3 cm.

[0017] Furthermore, the main gate electrode structure also includes a sixth connecting gate line, which is located at the first disconnected area and connects the second end welding point and a portion of the second fine gate between the first connecting gate line, the second connecting gate line and the third edge.

[0018] Furthermore, a seventh connection gate line and an eighth connection gate line are arranged at the second disconnection area, the seventh connection gate line and the eighth connection gate line are arranged at intervals along the second direction and extend along the first direction, the seventh connection gate line and the eighth connection gate line are not in contact with the second fine gate, and the seventh connection gate line and the eighth connection gate line are both connected to a portion of the first fine gate closest to the third edge;

[0019] A third end welding point is arranged near the third edge and located at the second disconnection area, and the third end welding point is arranged between the seventh connection gate line and the eighth connection gate line and contacts the seventh connection gate line and the eighth connection gate line.

[0020] Furthermore, in the first direction, the distance between the third end welding point and the third edge is 1 cm-3 cm.

[0021] Furthermore, the seventh connecting gate line and the eighth connecting gate line are connected to at least three first fine gates; and / or

[0022] In the first direction, the lengths of the seventh connecting gate line and the eighth connecting gate line are at least four times the spacing between the first fine gate and the second fine gate.

[0023] Furthermore, the main gate electrode structure also includes a ninth connecting gate line, which is located at the second disconnection area and connects the third end welding point and the part of the first fine gate between the seventh connecting gate line and the eighth connecting gate line and the fourth edge.

[0024] Furthermore, the tenth connecting gate line and the eleventh connecting gate line are arranged at the second disconnection area, the tenth connecting gate line and the eleventh connecting gate line are arranged at intervals along the second direction and extend along the first direction, the tenth connecting gate line and the eleventh connecting gate line are not in contact with the second fine gate, and the tenth connecting gate line and the eleventh connecting gate line are both connected to the part of the first fine gate closest to the fourth edge;

[0025] A fourth end welding point is arranged close to the fourth edge and located at the second disconnection area, and the fourth end welding point is arranged between the tenth connecting gate line and the eleventh connecting gate line and contacts the tenth connecting gate line and the eleventh connecting gate line.

[0026] Furthermore, in the first direction, the distance between the fourth end welding point and the fourth edge is 1 cm-3 cm.

[0027] Furthermore, the main gate electrode structure also includes a twelfth connecting gate line, which is located at the first disconnected area and connects the fourth end welding point and the first connecting gate line, the second connecting gate line and the part of the first fine gate between the third edge.

[0028] Furthermore, a plurality of first doped layers and a plurality of second doped layers are provided on the back side of the silicon substrate, the plurality of first doped layers and the plurality of second doped layers are alternately arranged in sequence along a first direction and extend along a second direction, and the first direction intersects with the second direction; the first fine gate is provided above the first doped layer, the second fine gate is provided above the second doped layer, and the first fine gate does not extend to the first edge of the silicon substrate;

[0029] The main gate electrode-free structure further includes:

[0030] a first edge busbar line disposed close to the first edge and extending along the first direction, the first edge busbar line being electrically connected to the first fine grid; and

[0031] A second edge bus line is extended along the first direction, the second edge bus line is arranged between the first edge bus line and the first edge and is located above the second doped layer, the second edge bus line is in contact with at least one of the second doped layers and is electrically connected to an end of a portion of the second fine gate close to the first edge.

[0032] Furthermore, a portion of the second fine gate insulation penetrates the first edge bus gate line and is electrically connected to the second edge bus gate line.

[0033] Furthermore, the third edge is connected to the first edge via a first chamfer;

[0034] In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a first auxiliary grid line is provided at the first chamfer, and the first auxiliary grid line connects the second edge bus grid line and the second fine grid closest to the third edge.

[0035] Furthermore, the IBC solar cell sheet further comprises:

[0036] a third edge bus line disposed close to the second edge and extending along the first direction, the third edge bus line being electrically connected to the second fine grid, the second fine grid not extending to the second edge, and having opposite polarity to the first edge bus line; and

[0037] A fourth edge busbar line extending along the first direction, wherein the fourth edge busbar line is arranged between the third edge busbar line and the second edge and is located above the first doped layer, and the fourth edge busbar line contacts at least one of the first doped layers and is electrically connected to an end of a portion of the first fine gate close to the second edge.

[0038] Furthermore, a portion of the first fine gate insulation penetrates the third edge bus gate line and is connected to the fourth edge bus gate line.

[0039] Furthermore, the third edge is connected to the second edge via a second chamfer;

[0040] In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a third auxiliary grid line is provided at the second chamfer, and the third auxiliary grid line connects the second fine grid located at the second chamfer and the third edge bus grid line.

[0041] Furthermore, the main gate electrode-free structure further includes:

[0042] a third edge bus gate line disposed close to the second edge and extending along the first direction, the third edge bus gate line being electrically connected to the first fine gate, the first fine gate not extending to the second edge of the silicon substrate, and the third edge bus gate line having the same polarity as the first edge bus gate line; and

[0043] A fourth edge bus line is arranged near the second edge and extending along the first direction, the fourth edge bus line is arranged between the third edge bus line and the second edge and the fourth edge bus line is located above the second doped layer, the fourth edge bus line is in contact with at least one of the second doped layers and is electrically connected to an end of a portion of the second fine gate near the second edge.

[0044] Furthermore, part of the second fine gate insulation penetrates the third edge bus gate line and is connected to the fourth edge bus gate line.

[0045] Furthermore, the third edge is connected to the second edge via a second chamfer;

[0046] In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a fourth auxiliary grid line is provided at the second chamfer, and the fourth auxiliary grid line connects the fourth edge busbar line and the second fine grid closest to the third edge.

[0047] The utility model also provides an IBC solar cell sheet, comprising a plurality of main grid-free electrode structures as described in any one of the above items.

[0048] The utility model also provides a battery assembly, which comprises a plurality of the above-mentioned IBC solar cell sheets.

[0049] The utility model also provides a photovoltaic system, which comprises the above-mentioned battery assembly.

[0050] In the main grid electrode structure without main grid, IBC solar cell, battery module and photovoltaic system of the embodiment of the utility model, the first connecting grid line and the second connecting grid line are arranged at the first disconnection area, the first connecting grid line and the second connecting grid line are not in contact with the first fine grid, the first connecting grid line and the second connecting grid line are connected to the part of the second fine grid closest to the third edge, and the first end welding point is arranged between the first connecting grid line and the second connecting grid line and in contact with the first connecting grid line and the second connecting grid line. In this way, by arranging the first connecting grid line and the second connecting grid line in the first disconnection area, the second fine grid near the first edge can be connected together, so that the first end welding point can be arranged at a position far from the first edge of the silicon substrate and connected to the first connecting grid line and the second connecting grid line. In this way, when the welding strip is subsequently welded to the first end welding point, due to the arrangement of the first connecting grid line and the second connecting grid line, the risk of hidden cracks during welding can be reduced, the yield of the battery cell can be improved, and the overall convergence of the second fine grid can also be achieved.

[0051] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a schematic diagram of the structure of an IBC solar cell provided by an embodiment of the utility model;

[0053] Figure 2 yes Figure 1 A partial enlarged schematic diagram of the IBC solar cell;

[0054] Figure 3 It is another structural schematic diagram of an IBC solar cell provided by an embodiment of the utility model;

[0055] Figure 4 yes Figure 3A partial enlarged schematic diagram of the IBC solar cell;

[0056] Figure 5 yes Figure 3 A schematic cross-sectional view of an IBC solar cell at a second edge busbar line;

[0057] Figure 6 It is another partial enlarged schematic diagram of the IBC solar cell provided by the embodiment of the utility model;

[0058] Figure 7 yes Figure 3 A schematic cross-sectional view of an IBC solar cell at the fourth edge busbar line;

[0059] Figure 8 This is another partial enlarged schematic diagram of the IBC solar cell provided by the embodiment of the utility model;

[0060] Fig. 9 It is another structural schematic diagram of an IBC solar cell provided by an embodiment of the utility model;

[0061] Fig.10 yes Fig. 9 A schematic cross-sectional view of an IBC solar cell at the fourth edge busbar line;

[0062] Fig.11 It is a structural schematic diagram of a battery string provided by an embodiment of the utility model;

[0063] Fig.12 It is a structural schematic diagram of a photovoltaic system provided by an embodiment of the utility model. DETAILED DESCRIPTION

[0064] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. It should be noted that the embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the utility model, and cannot be understood as limiting the utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model.

[0065] In the description of the present invention, it is necessary to understand that the terms "up", "down", "left", "right", "horizontal", "longitudinal", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0066] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "several" is two or more, unless otherwise clearly and specifically defined.

[0067] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0068] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are merely examples, and the purpose is not to limit the utility model. In addition, the utility model may repeat reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the utility model provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0069] Embodiment 1

[0070] See also Figure 1 and Figure 2 The IBC solar cell 100 in the embodiment of the present invention may include a silicon substrate 10 and a main-gate-free electrode structure in the embodiment of the present invention, and the main-gate-free electrode structure is disposed on the back side 11 of the silicon substrate 10 .

[0071] like Figure 1 and Figure 2 As shown, the main gate-free electrode structure may include a plurality of first fine gates 20 , a plurality of second fine gates 30 , a first connecting gate line 21 , a second connecting gate line 22 and a first end welding point 23 .

[0072] A plurality of first fine gates 20 and a plurality of second fine gates 30 are alternately arranged along the first direction. In the second direction, the silicon substrate 10 has opposite first edges 101 and second edges 102 . In the first direction, the silicon substrate 10 has opposite third edges 103 and fourth edges 104 .

[0073] like Figure 1 As shown, in the second direction, the first fine gate 20 has a plurality of first disconnected regions 201 spaced apart in the second direction, and the second fine gate 30 has a plurality of second disconnected regions 301 spaced apart in the second direction.

[0074] In the second direction, the first disconnected regions 201 and the second disconnected regions 301 are alternately arranged in sequence, the first disconnected regions 201 on adjacent first fine gates 20 correspond to each other in the first direction, and the second disconnected regions 301 on adjacent second fine gates 30 correspond to each other in the first direction.

[0075] It should be noted that “the first disconnection areas 201 on the adjacent first fine grids 20 correspond to each other in the first direction, and the second disconnection areas 301 on the adjacent second fine grids 30 correspond to each other in the first direction” means that in the first direction, the first disconnection areas 201 are basically aligned and the second disconnection areas 301 are also basically aligned. “In the second direction, the first disconnection areas 201 and the second disconnection areas 301 are alternately arranged in sequence” means that in the entire IBC solar cell 100, in the second direction, the first disconnection areas 201 and the second disconnection areas 301 are alternately arranged in sequence. Specifically, the first disconnection areas 201 and the second disconnection areas 301 are used to set the welding strips to achieve busbar output.

[0076] The first connecting gate line 21 and the second connecting gate line 22 are both arranged at the first disconnection area 201, and the first connecting gate line 21 and the second connecting gate line 22 are spaced apart along the second direction and extend along the first direction. The first connecting gate line 21 and the second connecting gate line 22 are not in contact with the first fine gate 20, and the first connecting gate line 21 and the second connecting gate line 22 are both connected to the part of the second fine gate 30 closest to the third edge 103.

[0077] The first end welding point 23 is disposed near the third edge 104 and located at the first disconnection area 201. The first end welding point 23 is disposed between the first connection gate line 21 and the second connection gate line 22 and contacts the first connection gate line 21 and the second connection gate line 22. That is, the width of the first disconnection area 201 where the first end welding point 23 is disposed is greater than the width of the first disconnection area 201 at other positions.

[0078] In the main grid electrode structure without a main grid and the IBC solar cell in the embodiment of the utility model, a first connecting grid line 21 and a second connecting grid line 22 are arranged at the first disconnection area, and the first connecting grid line 21 and the second connecting grid line 22 are not in contact with the first fine grid 20. The first connecting grid line 21 and the second connecting grid line 22 are both connected to the part of the second fine grid 30 closest to the third edge 103, and the first end welding point 23 is arranged between the first connecting grid line 21 and the second connecting grid line 22 and is in contact with the first connecting grid line 21 and the second connecting grid line 22. In this way, by setting the first connecting gate line 21 and the second connecting gate line 22 in the first disconnection area 201, the second fine gate 30 close to the first edge 101 can be connected together, so that the first end welding point 23 can be set at a position farther away from the first edge 101 of the silicon substrate 10 and connected to the first connecting gate line 21 and the second connecting gate line 22. In this way, when the welding strip is subsequently welded to the first end welding point 23, due to the setting of the first connecting gate line 21 and the second connecting gate line 22, the risk of hidden cracks during welding can be reduced, the yield of the battery cell can be improved, and the overall convergence of the second fine gate 30 can also be achieved.

[0079] Specifically, in the embodiment of the present invention, the first direction may be the longitudinal direction of the IBC solar cell 100 , and the second direction may be the lateral direction of the IBC solar cell 100 , and the two directions are perpendicular to each other.

[0080] “The first fine gate 20 forms a plurality of first disconnection regions 201” means that the first fine gate 20 is an intermittent structure, and the first fine gate 20 is disconnected at the first disconnection region 201, that is, the first disconnection region 201 divides the first fine gate 20 into a plurality of parts. Similarly, “the second fine gate 30 forms a plurality of second disconnection regions 301” means that the second fine gate 30 is an intermittent structure, and the second fine gate 30 is disconnected at the second disconnection region 301, that is, the second disconnection region 301 divides the second fine gate 30 into a plurality of parts.

[0081] exist Figure 1 In the embodiment shown, the “first edge 101” refers to Figure 1 The left edge in the figure, “second edge 102” refers to Figure 1 The third edge 103 refers to the right edge of Figure 1 The fourth edge 104 refers to the upper edge of Figure 1 The lower edge of the .

[0082] It should be noted that the first end welding point 23 refers to the welding point closest to the third edge 103 at the first disconnected area 201. The first connecting gate line 21 and the second connecting gate line 22 are both connected to the second fine gate 30 closest to the third edge 103, which can be understood as the first connecting gate line 21 and the second connecting gate line 22 connecting the second fine gate 30 between the first end welding point 23 and the third edge 103.

[0083] In some embodiments, the distance between the first end weld point 23 and the third edge 103 is 1 cm-3 cm.

[0084] Thus, by preferably setting the distance between the first end welding point 23 and the third edge 103 within this reasonable range, it can be ensured that the first end welding point 23 will not cause hidden cracks in the silicon substrate 10 during the welding process, thereby improving the yield of the battery cell.

[0085] Specifically, the distance between the first end welding point 23 and the third edge 103 may be, for example, 1 cm, 1.2 cm, 1.4 cm, 1.6 cm, 1.8 cm, 2 cm, 2.2 cm, 2.4 cm, 2.6 cm, 2.8 cm, 3 cm or any value between 1 cm and 3 cm, and is not limited here.

[0086] In some embodiments, the first connecting grid line 21 and the second connecting grid line 22 connect at least three second fine grids 30. In this way, the first end welding point 23 can be arranged farther from the third edge 103, thereby reducing the risk of hidden cracks.

[0087] Specifically, Figure 1 and Figure 2 As shown, in the present invention, the first connecting gate line 21 and the second connecting gate line 22 can connect the three second fine gates 300 located closest to the third edge 103 .

[0088] In some embodiments, in the first direction, the lengths of the first connection grid line 21 and the second connection grid line 22 are at least 4 times the spacing between the first fine grid 20 and the second fine grid 30. In this way, the first end welding point 23 can also be arranged farther from the third edge 103, thereby reducing the risk of hidden cracks.

[0089] Specifically, Figure 1 and Figure 2 As shown, in the first direction, the second fine gates 30 and the first fine gates 20 are arranged in sequence, the first connecting gate lines 21 and the second connecting gate lines 22 connect the three second fine gates 30 located at the third edge 103, and the lengths of the first connecting gate lines 21 and the second connecting gate lines 22 are 4 times the spacing between the first fine gates 20 and the second fine gates 30.

[0090] See also Figure 1 and Figure 2 In some embodiments, the main gate electrode structure may further include a third connecting gate line 24, which is located at the first disconnection area 201 and does not contact the first fine gate 20, and the third connecting gate line 24 connects the first end welding point 23 and the first connecting gate line 21 and the second connecting gate line 22 and a portion of the second fine gate 30 between the fourth edge 104.

[0091] Thus, on the one hand, the anti-breaking function of the second fine grid 30 can be realized by setting the third connecting grid line 24, and on the other hand, the third connecting grid line 24 is connected to the first end welding point 23, which can also increase the welding tension of the first end welding point 23 during welding, thereby improving the reliability of welding.

[0092] Specifically, Figure 1 and Figure 2 As shown, in such an embodiment, the third connecting grid line 24 can connect the first end welding point 23 and the three second fine grids 30 below the first end welding point 23 .

[0093] Embodiment 2

[0094] Please continue reading Figure 1 and Figure 2 In some embodiments, the main gate electrode structure may further include a fourth connecting gate line 25, a fifth connecting gate line 26 and a second end welding point 27, the fourth connecting gate line 25 and the fifth connecting gate line 26 are arranged at the first disconnection area 201, the fourth connecting gate line 25 and the fifth connecting gate line 26 are arranged at intervals along the second direction and extend along the first direction, the fourth connecting gate line 25 and the fifth connecting gate line 26 are not in contact with the first fine gate 20, and the fourth connecting gate line 25 and the fifth connecting gate line 26 are both connected to the part of the second fine gate 30 closest to the fourth edge 104.

[0095] The second end solder joint 27 is disposed near the fourth edge 104 and located at the first disconnection region 201 . The second end solder joint 27 is disposed between the fourth connection gate line 25 and the fifth connection gate line 26 and contacts the fourth connection gate line 25 and the fifth connection gate line 26 .

[0096] In this way, by setting the fourth connecting gate line 25 and the fifth connecting gate line 26, the second end welding point 27 can be at a greater distance from the fourth edge 104 of the silicon substrate 10. In this way, when the welding strip is subsequently welded to the second end welding point 27, due to the setting of the fourth connecting gate line 25 and the fifth connecting gate line 26, the risk of hidden cracks during welding can be reduced, the yield of the battery cell can be improved, and the overall convergence of the second fine grid 30 can also be achieved.

[0097] Specifically, in the utility model, the first end welding point 23 and the second end welding point 27 can be respectively set at the starting welding point and the ending welding point at the first disconnection area 201, and the first end welding point 23 and the second end welding point 27 are respectively set at the upper and lower ends of the battery cell. In this way, by setting the welding points at both ends of the connecting welding strip far away from the edge of the silicon substrate, hidden cracks can be avoided during welding.

[0098] Similarly, it should be noted that the second end solder joint 27 refers to the solder joint closest to the fourth edge 104 at the first disconnected area 201. The fourth connecting gate line 25 and the fifth connecting gate line 26 both connect the portion of the second fine grid 30 closest to the fourth edge 104, which can be understood as the fourth connecting gate line 25 and the fifth connecting gate line 26 connecting the second fine grid 30 between the second end solder joint 27 and the fourth edge 104.

[0099] In some embodiments, the distance between the second end weld 27 and the fourth edge 104 is 1 cm-3 cm.

[0100] Thus, by preferably setting the distance between the second end welding point 27 and the fourth edge 104 within this reasonable range, it can be ensured that the second end welding point 27 will not cause hidden cracks in the silicon substrate during the welding process, thereby improving the yield of the battery cell.

[0101] Specifically, the distance between the second end welding point 27 and the fourth edge 104 may be, for example, 1 cm, 1.2 cm, 1.4 cm, 1.6 cm, 1.8 cm, 2 cm, 2.2 cm, 2.4 cm, 2.6 cm, 2.8 cm, 3 cm or any value between 1 cm and 3 cm, and is not limited here.

[0102] In some embodiments, the fourth connecting gate line 25 and the fifth connecting gate line 26 connect at least three second fine gates 30 .

[0103] In this way, the second end welding point 27 can be arranged farther away from the fourth edge 104, thereby reducing the risk of hidden cracks.

[0104] Specifically, Figure 1 and Figure 2 As shown, in the present invention, the fourth connecting grid line 25 and the fifth connecting grid line 26 can connect the three second thin grids located closest to the fourth edge 104 .

[0105] In some embodiments, in the first direction, the lengths of the fourth connecting grid line 25 and the fifth connecting grid line 26 are at least 4 times the spacing between the first fine grid 20 and the second fine grid 30. In this way, the second end welding point 27 can also be arranged farther from the fourth edge 104, thereby reducing the risk of hidden cracks.

[0106] Specifically, Figure 1 As shown, in the first direction, the second fine gates 30 and the first fine gates 20 are arranged in sequence, the fourth connecting gate line 25 and the fifth connecting gate line 26 connect the three second fine gates 30 located at the third edge 103, and the length of the fourth connecting gate line 25 and the fifth connecting gate line 26 is 4 times the spacing between the first fine gates 20 and the second fine gates 30.

[0107] Please continue reading Figure 1 and Figure 2 In some embodiments, the main gate electrode structure further includes a sixth connecting gate line 28, which is located at the first disconnection area 201, and the sixth connecting gate line 28 connects the second end welding point 27 and a portion of the second fine gate 30 between the fourth connecting gate line 25 and the fifth connecting gate line 26 and the third edge 103.

[0108] Thus, on the one hand, the anti-breaking function of the second fine grid 30 can be realized by setting the sixth connecting grid line 28, and on the other hand, the sixth connecting grid line 28 is connected to the first end welding point 23, which can also increase the welding tension of the first end welding point 23 during welding, thereby improving the reliability of welding.

[0109] Specifically, Figure 1 and Figure 2 As shown, in such an embodiment, the sixth connecting grid line 28 can connect the three second fine grids 30 above the first end welding point 23 and the second end welding point 27 .

[0110] Embodiment 3

[0111] Please continue reading Figure 1 and Figure 2 In some embodiments, the main gate electrode-free structure may further include a seventh connecting gate line 31 , an eighth connecting gate line 32 and a third end welding point 33 .

[0112] The seventh connection gate line 31 and the eighth connection gate line 32 are both arranged at the second disconnection area 301. The seventh connection gate line 31 and the eighth connection gate line 32 are arranged at intervals along the second direction and extend along the first direction. The seventh connection gate line 31 and the eighth connection gate line 32 are not in contact with the second fine gate 30. The seventh connection gate line 31 and the eighth connection gate line 32 are both connected to the portion of the first fine gate 20 closest to the third edge 103.

[0113] The third end solder joint 33 is disposed close to the third edge 103 and located at the second disconnection area 301 . The third end solder joint 33 is disposed between the seventh connection gate line 31 and the eighth connection gate line 32 and contacts the seventh connection gate line 31 and the eighth connection gate line 32 .

[0114] In this way, by setting the seventh connecting gate line 31 and the eighth connecting gate line 32 at the second disconnection area 301, the first fine gate 20 near the third edge 103 can be connected together, so that the third end welding point 33 can be set at a position farther away from the third edge 103 of the silicon substrate 10 and connected to the seventh connecting gate line 31 and the eighth connecting gate line 32. In this way, when the welding strip is subsequently welded to the third end welding point 33, due to the setting of the seventh connecting gate line 31 and the eighth connecting gate line 32, the risk of hidden cracks during welding can be reduced, the yield of the battery cell can be improved, and the overall convergence of the first fine gate 20 can also be achieved.

[0115] Similarly, it should be noted that the third end solder joint 33 refers to the solder joint closest to the third edge 103 at the second disconnected area 301. The seventh connecting gate line 31 and the eighth connecting gate line 32 both connect the portion of the second fine grid 30 closest to the third edge 103, which can be understood as the seventh connecting gate line 31 and the eighth connecting gate line 32 connecting the first fine grid 20 between the third end solder joint 33 and the third edge 103.

[0116] In some embodiments, the distance between the third end weld point 33 and the third edge 103 is 1 cm-3 cm.

[0117] Thus, by preferably setting the distance between the third end welding point 33 and the third edge 103 within this reasonable range, it can be ensured that the third end welding point 33 will not cause hidden cracks in the silicon substrate during the welding process, thereby improving the yield of the battery cell.

[0118] Specifically, the distance between the third end welding point 33 and the third edge 103 may be, for example, 1 cm, 1.2 cm, 1.4 cm, 1.6 cm, 1.8 cm, 2 cm, 2.2 cm, 2.4 cm, 2.6 cm, 2.8 cm, 3 cm or any value between 1 cm and 3 cm, and is not limited here.

[0119] In some embodiments, the seventh connecting gate line 31 and the eighth connecting gate line 32 connect at least three first fine gates 20 .

[0120] In this way, the third end welding point 33 can be arranged farther from the third edge 103, thereby reducing the risk of hidden cracks.

[0121] Specifically, Figure 1 and Figure 2 As shown, in the present invention, the seventh connecting gate line 31 and the eighth connecting gate line 32 can connect the three first fine gates 20 located closest to the third edge 103 .

[0122] In some embodiments, in the first direction, the lengths of the seventh connection grid line 31 and the eighth connection grid line 32 are at least 4 times the spacing between the first fine grid 20 and the second fine grid 30. In this way, the third end welding point 33 can also be arranged farther from the third edge 103, thereby reducing the risk of hidden cracks.

[0123] Specifically, Figure 2 As shown, in the first direction, the second fine gates 30 and the first fine gates 20 are arranged in sequence, the seventh connecting gate line 31 and the eighth connecting gate line 32 connect the three first fine gates 20 located at the third edge 103, and the length of the seventh connecting gate line 31 and the eighth connecting gate line 32 is 4 times the spacing between the first fine gates 20 and the second fine gates 30.

[0124] Please continue reading Figure 1 and Figure 2 In some embodiments, the main gate electrode structure may further include a ninth connecting gate line 34, which is located at the second disconnection area 301, and the ninth connecting gate line 34 connects the third end welding point 33 and a portion of the first fine gate 20 between the seventh connecting gate line 31 and the eighth connecting gate line 32 and the fourth edge 104.

[0125] Thus, on the one hand, the anti-breaking function of the first fine grid 20 can be realized by setting the ninth connecting grid line 34, and on the other hand, the ninth connecting grid line 34 is connected to the third end welding point 33, which can also increase the welding tension of the third end welding point 33 during welding, thereby improving the reliability of welding.

[0126] Specifically, Figure 2 As shown, in such an embodiment, the ninth connecting grid line 34 may connect the third end welding point 33 and the three first fine grids 20 below the third end welding point 33 .

[0127] Embodiment 4

[0128] Please refer again Figure 1 and Figure 2 In some embodiments, the main gate electrode-free structure may further include a tenth connecting gate line 35 , an eleventh connecting gate line 36 and a fourth end welding point 37 .

[0129] The tenth connecting gate line 35 and the eleventh connecting gate line 36 are arranged at the first disconnection area, the tenth connecting gate line 35 and the eleventh connecting gate line 36 are spaced apart along the second direction and extend along the first direction, the tenth connecting gate line 35 and the eleventh connecting gate line 36 are not in contact with the second fine gate 30, and the tenth connecting gate line 35 and the eleventh connecting gate line 36 are both connected to the part of the first fine gate 20 closest to the fourth edge 104.

[0130] The fourth end welding spot 37 is set into the fourth edge 104 and located at the second disconnection area 301 . The fourth end welding spot 37 is set between the tenth connecting gate line 35 and the eleventh connecting gate line 36 and contacts the tenth connecting gate line 35 and the eleventh connecting gate line 36 .

[0131] In this way, by setting the tenth connecting gate line 35 and the eleventh connecting gate line 36, the fourth end welding point 37 can be at a farther distance from the fourth edge 104 of the silicon substrate 10. In this way, when the welding strip is subsequently welded to the fourth end welding point 37, due to the setting of the tenth connecting gate line 35 and the eleventh connecting gate line 36, the risk of hidden cracks during welding can be reduced, the yield of the battery cell can be improved, and the overall convergence of the second fine grid 30 can also be achieved.

[0132] Specifically, in the present invention, the third end welding point 33 and the fourth end welding point 37 can be the starting welding point and the ending welding point at the second disconnection area 301 respectively. In this way, by setting the welding points at both ends of the welding strip far away from the edge of the silicon substrate 10, hidden cracks can be avoided during welding.

[0133] Similarly, it should be noted that the tenth connecting gate line 35 and the eleventh connecting gate line 36 both connect the part of the second fine grid 30 closest to the fourth edge 104, which can be understood as the tenth connecting gate line 35 and the eleventh connecting gate line 36 connecting the first fine grid 20 between the fourth end welding point 37 and the fourth edge 104.

[0134] In some embodiments, the distance between the fourth end weld 37 and the fourth edge 104 is 1 cm-3 cm.

[0135] Thus, by preferably setting the distance between the fourth end welding point 37 and the fourth edge 104 within this reasonable range, it can be ensured that the fourth end welding point 37 will not cause hidden cracks in the silicon substrate during the welding process, thereby improving the yield of the battery cell.

[0136] Specifically, the distance between the fourth end welding point 37 and the fourth edge 104 may be, for example, 1 cm, 1.2 cm, 1.4 cm, 1.6 cm, 1.8 cm, 2 cm, 2.2 cm, 2.4 cm, 2.6 cm, 2.8 cm, 3 cm or any value between 1 cm and 3 cm, and is not limited here.

[0137] In some embodiments, the tenth connecting gate line 35 and the eleventh connecting gate line 36 connect at least three first fine gates 20 .

[0138] In this way, the fourth end welding point 37 can be arranged farther from the fourth edge 104, thereby reducing the risk of hidden cracks.

[0139] Specifically, Figure 1As shown, in the present invention, the tenth connecting gate line 35 and the eleventh connecting gate line 36 can connect the three first fine gates 20 located closest to the fourth edge 104 .

[0140] In some embodiments, in the first direction, the lengths of the tenth connecting grid line 35 and the eleventh connecting grid line 36 are at least four times the spacing between the first fine grid 20 and the second fine grid 30. In this way, the fourth end welding point 37 can also be arranged farther from the fourth edge 104, thereby reducing the risk of hidden cracks.

[0141] Specifically, Figure 1 As shown, in the first direction, the second fine gates 30 and the first fine gates 20 are arranged in sequence, the tenth connecting gate line 35 and the eleventh connecting gate line 36 connect the three first fine gates 20 located at the third edge 103, and the length of the tenth connecting gate line 35 and the eleventh connecting gate line 36 is 4 times the spacing between the first fine gates 20 and the second fine gates 30.

[0142] See also Figure 2 In some embodiments, the main gate electrode structure may further include a twelfth connecting gate line 38, which is located at the second disconnection area 301, and the twelfth connecting gate line 38 connects the fourth end welding point 37 and a portion of the first fine gate 20 between the tenth connecting gate line 35 and the eleventh connecting gate line 36 and the third edge 103.

[0143] Thus, on the one hand, the anti-breaking function of the second fine grid 30 can be realized by setting the twelfth connecting grid line 38, and on the other hand, the connection between the twelfth connecting grid line 38 and the third end welding point 33 can also increase the welding tension of the third end welding point 33 during welding, thereby improving the reliability of welding.

[0144] Specifically, Figure 2 As shown, in such an embodiment, the twelfth connecting grid line 38 can connect the three first fine grids 20 above the third end welding point 33 and the fourth end welding point 37 .

[0145] Embodiment 5

[0146] See also Figure 3-Figure 5 In some embodiments, a back side 11 of a silicon substrate 10 is provided with a plurality of first doping layers 12 and a plurality of second doping layers 13. The plurality of first doping layers 12 and the plurality of second doping layers 13 are alternately arranged in sequence along a first direction and extend along a second direction. The first direction intersects with the second direction. In the second direction, the silicon substrate 10 has a first edge 101 and a second edge 102 that are opposite to each other.

[0147] The main gate electrode structure may further include a first edge busbar line 40 and a second edge busbar line 50. The back side 11 of the silicon substrate 10 is provided with a plurality of first doped layers 12 and a plurality of second doped layers 13, which are alternately arranged in sequence along the first direction and extend along the second direction.

[0148] The polarity of the first doping layer 12 is opposite to that of the second doping layer 13. For example, the first doping layer 12 may be a P-type doping layer, and the second doping layer 13 may be an N-type doping layer. In another example, the first doping layer 12 may be an N-type doping layer, and the second doping layer 13 may be a P-type doping layer. There is no specific limitation here. The first doping layer 12 and the second doping layer 13 may be preferentially spaced apart, and both the first doping layer 12 and the second doping layer 13 may extend to the first edge 101 and the second edge 102 of the silicon substrate 10.

[0149] The first fine gate 20 is arranged above the first doped layer 12 , and the second fine gate 30 is arranged on the second doped layer 13 . The first fine gate 20 is used to collect current of the first doped layer 12 , and the second fine gate 30 is used to collect current of the second doped layer 13 . The first fine gate 20 does not extend to the first edge 101 of the silicon substrate 10 .

[0150] See also Figure 3 and Figure 4 The first edge busbar line 40 is disposed close to the first edge 101 and extends along the first direction. The first edge busbar line 40 is electrically connected to the first fine gate 20 .

[0151] The second edge bus line 50 extends along the first direction and is disposed between the first edge bus line 40 and the first edge 101 and is located above the second doped layer 13 . The second edge bus line 50 contacts at least one second doped layer 13 and is electrically connected to an end of a portion of the second fine gate 30 close to the first edge 101 .

[0152] Specifically, the second edge busbar line 50 may be directly connected to part of the second fine grids 30 or connected to part of the second fine grids 30 through other connection lines (such as the first auxiliary grid line 60 described below). It should be noted that “part of the second fine grid 30” refers to one second fine grid 30 or multiple second fine grids 30 but not all of the second fine grids 30.

[0153] It can be understood that in the related art, the fine grids on the back side of the back-contact solar cell usually do not extend to the edges of both sides of the silicon wafer. Because if they extend to the edges, in order to collect the current of the fine grids in the edge area, it is necessary to set a welding strip at the edge to connect with the fine grids in the edge area. If the fine grid with opposite polarity to the welding strip extends to the edge of the silicon wafer, in order to avoid the welding strip at the edge position from contacting the opposite polarity fine grid, insulating glue needs to be coated between the welding strip at the edge position and each opposite polarity fine grid, which leads to a significant increase in cost and is also prone to glue leakage, thereby causing the battery cell to bend and warp.

[0154] However, if the fine gate does not extend to the edge of the silicon wafer, there will be a part of the edge area without the metal fine gate, resulting in a part of the edge area where the carriers cannot be collected, resulting in low carrier collection efficiency, efficiency loss, and lower efficiency of the battery cell.

[0155] Therefore, in the present invention, by setting the second edge bus line 50 between the first edge 101 and the first edge bus line 40 and making the second edge bus line 50 contact with at least one second doping layer 13 and connected to a portion of the second fine grid 30, the second edge bus line 50 can collect the current of the second doping layer 13 in the edge area at the first edge 101 and converge it to the adjacent same-polarity welding strip through a portion of the second fine grid 30 to achieve current collection, which can effectively reduce the efficiency loss in the edge area of ​​the first edge 101 and improve the efficiency of the battery cell.

[0156] Furthermore, since only part of the second fine grid 30 is connected to the second edge bus grid line 50, in the subsequent welding process of the opposite polarity welding strip (such as the edge welding strip 220 described below), the welding strip will only cross part of the second fine grid 30 or the connecting line connecting the second fine grid 30 and the second edge bus grid line 50 (such as the first auxiliary grid line 60 described below). There are fewer intersection points, and only a small number of points need to be arranged with insulating glue to avoid leakage, which can effectively reduce costs. At the same time, the points where the insulating glue is applied are isolated points, and it is not easy to cause leakage of glue and cause bending and warping of the battery cell. That is to say, the technical solution of the utility model can reduce the cost of insulating glue and avoid bending and warping of the battery cell due to leakage of glue, while also effectively reducing efficiency loss and ensuring the efficiency of the battery cell. In addition, through the setting of the first edge bus grid line 40, the anti-breaking function of the first fine grid 20 can also be realized, and the first fine grid 20 can be prevented from breaking as much as possible.

[0157] Specifically, in the embodiment of the present invention, the polarities of the first doping layer 12 and the second doping layer 13 are opposite, and the polarities of the first fine grid 20 and the second fine grid 30 are also opposite. For example, the first fine grid 20 is a positive fine grid line, which is used to collect the positive current in the positive region, and the second fine grid 30 is a negative fine grid line, which is used to collect the negative current in the negative region; or, the first fine grid 20 is a negative fine grid line, which is used to collect the negative current in the negative region, and the second fine grid 30 is a positive grid line, which is used to collect the positive current in the positive region. The positive fine grid line is provided in the P-type doping layer of the IBC solar cell 100, and the negative fine grid line is provided in the N-type doping layer of the IBC solar cell 100.

[0158] In the embodiment of the present utility model, in order to reduce the difficulty of manufacturing process, preferably, there is no first fine grid 20 between the first edge bus grid line 40 and the first edge 101, and preferably, there is no first fine grid 20 and second fine grid 30 between the second edge bus grid line 50 and the first edge 101. Of course, it can be understood that, in some embodiments, there may be a second fine grid 30 but not a first fine grid 20 between the second edge bus grid line 50 and the first edge 101, and the specific details are not limited here.

[0159] Furthermore, in the embodiment of the present invention, the first fine grid 20 and the second fine grid 30 may be aluminum grid lines, silver grid lines, copper grid lines, or silver-clad copper grid lines, which are not limited herein.

[0160] It is understandable that in the embodiment of the present invention, the first fine grid 20 and the second fine grid 30 can be selected to be grid lines of the same or different metal types, for example, the first fine grid 20 and the second fine grid 30 are both aluminum grid lines; or the first fine grid 20 is aluminum grid lines, and the second fine grid 30 is silver grid lines.

[0161] like Figure 3 and Figure 4 As shown, it is not difficult to understand that the second edge bus grid line 50 is in contact with the second doping layer 13 to realize the collection of current of the second doping layer 13 in the edge area. Therefore, in an embodiment of the utility model, in the first disconnection area 201 of the first fine grid 20 and the second disconnection area 301 of the second fine grid 30, the first disconnection area 201 is closest to the first edge 101, that is, in the second direction, the first disconnection area 201 and the second disconnection area 301 are arranged alternately in sequence, and at the position corresponding to the first disconnection area 201, the second fine grid 30 is not disconnected, and a welding strip in contact with the second fine grid 30 can be set at the position corresponding to the first disconnection area 201 to realize the current convergence of the first edge bus grid line 40.

[0162] Embodiment 6

[0163] See also Figure 4In some embodiments, a portion of the second fine gate 30 is insulated and penetrates the first edge bus gate line 40 to be electrically connected to the second edge bus gate line 50 .

[0164] Thus, after collecting the current of the second doping layer 13 at the edge region of the first edge 101 , the second edge bus line 50 can collect the current to the nearest soldering strip of the same polarity through the second fine grid 30 penetrating the first edge bus line 40 .

[0165] Specifically, Figure 4 As shown, in such an embodiment, the plurality of second fine gates 30 may include a plurality of first collecting fine gates 302 and a plurality of first penetrating fine gates 303, wherein the plurality of first collecting fine gates 302 are all located on the side of the first edge bus grid line 40 facing the second edge 102, and the first penetrating fine gates 303 are insulated and penetrate the first edge bus grid line 40 to connect with the second edge bus grid line 50.

[0166] That is to say, in such an embodiment, there is no first collecting fine gate 302 between the first edge bus line 40 and the first edge 101, and between the first edge bus line 40 and the first edge 101, only the position where the first edge bus line 40 is penetrated has the first penetrating fine gate 303, and the remaining positions do not have fine gates (including the first fine gate 20 and the second fine gate 30).

[0167] It should be noted that, in the embodiment of the present utility model, "part of the second fine gate 30 is insulated and penetrates the first edge bus line 40" can be understood as a first direction, where the first edge bus line 40 has a plurality of spaced-apartment areas, and the first penetrating fine gate 303 passes through the first edge bus line 40 through the partition area and does not contact the first edge bus line 40, so as to achieve physical penetration and insulation isolation.

[0168] It is understandable that in such an embodiment, the number of the first penetrating fine grids 303 may be a single one or multiple ones, and the specific number may be determined according to the size of the battery cell. When the number of the first penetrating fine grids 303 is multiple, the multiple first penetrating fine grids 303 may be arranged at intervals along the first direction, and the distance between two adjacent first penetrating fine grids 303 may be determined according to the size of the battery cell, and preferably may be arranged uniformly at intervals on the silicon substrate 10 along the first direction according to the size of the silicon substrate 10, and the specific number is not limited here.

[0169] It is not difficult to understand that in such an embodiment, the second edge bus line 50 can collect the current of the second doping layer 13 in the edge area of ​​the first edge 101, and then collect it to the nearest welding strip of the same polarity (such as the welding strip 210 mentioned below) through the first through-fine grid 303 that runs through the first edge bus line 40 to achieve convergence, and by setting multiple first through-fine grids 303, the convergence path can be effectively shortened and the loss can be reduced.

[0170] See also Figure 3 and Figure 4 , in some embodiments, the third edge 103 is connected to the first edge 101 via a first chamfer 105;

[0171] In the direction from the third edge 103 to the fourth edge 104 , the second fine gates 30 and the first fine gates 20 are arranged alternately in sequence. A first auxiliary gate line 60 is provided at the first chamfer 105 . The first auxiliary gate line 60 connects the second edge bus gate line 50 and the second fine gate 30 closest to the third edge 103 .

[0172] In this way, by disposing the first auxiliary gate line 60 at the first chamfer 105 , the current collected by the second edge bus gate line 50 can be converged to the second fine gate 30 at the third edge 103 and then converged to the nearest welding strip.

[0173] Specifically, Figure 3 As shown, the third edge 103 is the upper edge of the silicon substrate 10, the fourth edge 104 is the lower edge of the silicon substrate 10, and the first edge 101 and the third edge 103 form a first chamfer 105. In such an embodiment, a first auxiliary gate line 60 is arranged at the first chamfer 105 to connect the second edge bus gate line 50 and the second fine grid 30 at the top, and the current collected by the second edge bus gate line 50 can be converged through the first auxiliary gate line 60 and the second fine grid 30 connected to the first auxiliary gate line 60 to the adjacent welding strip, that is, the second edge bus gate line 50 can be electrically connected to the second fine grid 30 at the top through the first auxiliary gate line 60.

[0174] It is understandable that in such an embodiment, the first through-fine gate 303 and the first auxiliary gate line 60 in the above embodiment may be provided to realize current convergence together, or the first through-fine gate 303 in the above embodiment may not be provided, but the current convergence may be realized through the first auxiliary gate line 60 at the first chamfer 105. Of course, in order to avoid excessive loss caused by too long transmission path of the converged current, it is preferred to realize the convergence through the first through-fine gate 303 or through the first through-fine gate 303 and the first auxiliary gate line 60 together, which is not limited here.

[0175] like Figure 4As shown, in some embodiments, the first auxiliary gate line 60 can be arranged parallel to the first chamfer 105. This can make the gate line structure of the back side 11 simpler during manufacturing.

[0176] Furthermore, in some embodiments, the first auxiliary gate line 60 may be located above the second doping layer 13 and contact at least one second doping layer 13 .

[0177] In this way, the first auxiliary gate line 60 can realize current convergence while also realizing current collection at the edge region at the position of the first chamfer 105 , thereby further reducing efficiency loss and improving the efficiency of the cell.

[0178] Please continue reading Figure 3 and Figure 4 In some embodiments, a second auxiliary gate line 70 may be further provided at the first chamfer 105, and the second auxiliary gate line 70 connects the first fine gate 20 and the first edge bus gate line 40 located at the first chamfer 105. It should be noted that the "first fine gate 20 located at the first chamfer 105" refers to a first fine gate 20 among a plurality of first fine gates 20 that is not directly connected to the first edge bus gate line 40 and whose extension line along the second direction intersects the first chamfer 105, for example Figure 4 The top two first fine grids 20 in the.

[0179] In this way, the first fine grids 20 at the first chamfer 105 can be connected by setting the second auxiliary gate line 70 to achieve conduction between the first fine grids 20 at the first chamfer 105. When the welding strip (such as the edge welding strip 220 mentioned below) is subsequently welded, it is only necessary to contact the welding strip with the second auxiliary gate line 70 to realize the collection of the current of the first fine grids 20 at the first chamfer 105. This can avoid the situation where the current of the first fine grids 20 at the first chamfer 105 cannot be collected due to the existence of the first chamfer 105, resulting in the welding strip being unable to contact all the first fine grids 20 at the first chamfer 105 when welding the welding strip.

[0180] Specifically, Figure 4 As shown, in such an embodiment, the second auxiliary gate line 70 can also be arranged parallel to the first chamfer 105, that is, at the first chamfer 105, from the outside to the inside, the first chamfer 105, the first auxiliary gate line 60 and the second auxiliary gate line 70 are arranged in parallel in sequence.

[0181] like Figure 4As shown, it is not difficult to understand that, since the first fine grid 20 has a first disconnection area 201 at the position closest to the first edge 101, in order to achieve the convergence of the first fine grid 20 near the first edge 101, it is necessary to set a welding strip at the position of the first edge 101 to achieve conductive connection with the first fine grid 20 to achieve convergence, and due to the existence of the first chamfer 105, the length of the top first fine grid 20 is shorter, and the welding strip cannot be in contact with the top first fine grid 20 when it is vertically set, and if the welding strip is too close to the inside, it is easy to contact with the second fine grid 30 of the opposite polarity to cause leakage, therefore, by setting the second auxiliary grid line 70, the first fine grid 20 at the first chamfer 105 can be connected into a whole, and when welding the welding strip, it is only necessary to contact the welding strip with the first edge bus grid line 40 or with the first edge bus grid line 40 and the second auxiliary grid line 70 at the same time or with the remaining first fine grids 20 connected to the first edge bus grid line 40 and the second auxiliary grid line 79 to achieve the convergence of the current of all the first fine grids 20.

[0182] In some embodiments, the distance between the first edge bus bar line 40 and the first edge 101 (ie, the distance between the first edge bus bar line 40 and the first edge 101 in the second direction) is 0.5 mm to 2 mm.

[0183] In this way, setting the spacing between the first edge bus grid line 40 and the first edge 101 within this reasonable range can effectively avoid the distance between the two being too large, resulting in too large an area of ​​the edge region without fine grids, resulting in excessive efficiency loss; and can also avoid the distance between the two being too small, resulting in cold solder joints and cracks when subsequently welding the solder strip at the first edge bus grid line 40, thereby ensuring the reliability and stability of welding.

[0184] Specifically, in such an embodiment, the distance between the first edge bus line 40 and the first edge 101 can be, for example, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm, 1.2mm, 1.4mm, 1.6mm, 1.8mm, 2mm or any value between 0.5mm-2mm, and is not limited here.

[0185] Furthermore, in an embodiment of the utility model, the distance between the first edge busbar line 40 and the first edge 101 is preferably 0.8mm-1.2mm, for example 0.9mm, etc. In this way, it is possible to reduce the process difficulty while effectively avoiding excessive distance resulting in excessive area of ​​the edge area and excessive efficiency loss, while also ensuring the stability and reliability of welding.

[0186] In some embodiments, the distance between the second edge busbar line 50 and the first edge 101 (ie, the distance between the two in the second direction) is 0.3 mm to 1.2 mm.

[0187] In this way, on the one hand, it can be avoided that the distance between the second edge bus line 50 and the first edge 101 is too small, which will greatly increase the difficulty of printing the second edge bus line 50; on the other hand, it can be avoided that the distance between the second edge bus line 50 and the first edge 101 is too large, which will cause excessive efficiency loss.

[0188] Specifically, in such an embodiment, the distance between the second edge busbar line 50 and the first edge 101 may be, for example, 0.3mm, 0.4mm, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm, 1.2mm or any value between 0.3mm-1.2mm, and is not limited here.

[0189] Furthermore, in an embodiment of the present invention, the distance between the second edge busbar line 50 and the first edge 101 is preferably 0.3mm-0.6mm, for example 0.5mm, etc. In this way, it is possible to reduce the process difficulty while effectively avoiding excessive distance resulting in excessive area of ​​the edge area and excessive efficiency loss. That is, it is possible to reduce the printing difficulty while avoiding excessive efficiency loss.

[0190] In some embodiments, the width of the second edge bus bar line 50 may be 20 um-200 um.

[0191] Thus, setting the width of the second edge bus line 50 within this reasonable range can avoid the second edge bus line 50 being too small, resulting in too small current capacity and causing a fuse during the bus, and can also avoid the second edge bus line 50 being too large, resulting in a significant increase in cost.

[0192] Specifically, in such an embodiment, the width of the second edge bus line 50 may be, for example, 20um, 20um, 30um, 40um, 50um, 60um, 70um, 80um, 90um, 100um, 110um, 120um, 130um, 140um, 150um, 160um, 170um, 180um, 190um, 200um or any value between 20um-200um, and is not limited here.

[0193] In some embodiments, the width of the second edge bus line 50 may be greater than the width of the first edge bus line 40 .

[0194] In this way, since the second edge bus line 50 is used to collect the current of each second doping layer 13 in the edge area, it plays a role of collection and convergence. Therefore, the width of the second edge bus line 50 can be set to be larger than the width of the first edge bus line 40, in order to improve the current flow capacity of the second edge bus line 50 to ensure the stability of the battery cell.

[0195] Embodiment 7

[0196] See also Figure 5 In some embodiments, a passivation film layer 107 is further provided on the first doping layer 12 and the second doping layer 13, and the second edge bus line 50 is arranged on the passivation film layer 107. In the area corresponding to the second edge bus line 50 (that is, the projection area of ​​the second edge bus line 50 on the passivation film layer 107), a first opening 1071 is opened at a position corresponding to the second doping layer 13 on the passivation film layer 107, and the second edge bus line 50 is in contact with the second doping layer 13 through the first opening 1071.

[0197] In this way, by opening the first opening 1071 at a position corresponding to the second doping layer 13 on the passivation film layer 107, the second edge bus line 50 can achieve stable contact with the second doping layer 13 below the edge area during printing to collect current, while also preventing the second edge bus line 50 from contacting the first doping layer 12 and causing leakage.

[0198] Specifically, in such an embodiment, the first opening 1071 can be formed on the passivation film layer 107 by laser drilling. In order to maximize the collection of current, the first opening 1071 can be preferably opened on all the second doping layers 13, and the second edge bus line 50 contacts all the second doping layers 13 through the first opening 1071 to maximize the collection of current. It can be understood that in such an embodiment, the first opening 1071 can be opened on all the second doping layers 13, or on part of the second doping layers 13, and the specific details are not limited here.

[0199] Embodiment 8

[0200] See also Figure 3 , Figure 6 and Figure 7 In some embodiments, the IBC solar cell sheet 100 may further include a third edge bus bar line 80 and a fourth edge bus bar line 90 .

[0201] The third edge bus line 80 is close to the second edge 102 and extends along the first direction. The third edge bus line 80 is electrically connected to the second fine gate 30. The second fine gate 30 does not extend to the second edge 102 of the silicon substrate 10. The third edge bus line 80 has opposite polarity to the first edge bus line 40.

[0202] The fourth edge bus line 90 is also extended along the first direction. The fourth edge bus line 90 is arranged between the third edge bus line 80 and the second edge 102 and is located above the first doping layer 12. The fourth edge bus line 90 has an opposite polarity to the second edge bus line 50 and is in contact with at least one first doping layer 12 and is electrically connected to an end of a portion of the first fine gate 20 close to the second edge 102.

[0203] In this way, a fourth edge bus line 90 is arranged between the second edge 102 and the third edge bus line 80. The fourth edge bus line 90 is in contact with at least one first doped layer 12 and is connected to a portion of the first fine grid 20. The fourth edge bus line 90 can collect the current of the first doped layer 12 in the edge area at the second edge 102 and converge it to the adjacent same-polarity welding strip through a portion of the first fine grid 20 to achieve current collection, which can further reduce the efficiency loss in the edge area of ​​the second edge 102 and further improve the efficiency of the battery cell.

[0204] And, if Figure 3 and Figure 6 As shown, since only part of the first fine grid 20 is connected to the fourth edge busbar line 90, in the subsequent welding process of the opposite polarity welding strip (such as the edge welding strip 220 described below), the welding strip will only cross part of the first fine grid 20, and there are fewer intersection points. Only a small number of points need to be arranged with insulating glue to avoid leakage, which can effectively reduce costs. At the same time, the points where the insulating glue is applied are isolated points, and it is not easy to cause leakage of glue and cause bending and warping of the battery cell. At the same time, through the arrangement of the third edge busbar line 80, the anti-break function of the second fine grid 30 can also be realized, and the second fine grid 30 can be prevented from breaking as much as possible.

[0205] Specifically, in such an embodiment, the third edge bus line 80 at the second edge 102 has opposite polarity to the first edge bus line 40 at the first edge 101, one is a positive bus line and the other is a negative bus line. The fourth edge bus line 90 at the second edge 102 has opposite polarity to the second edge bus line 50 at the first edge 101, one is a positive bus line and the other is a negative bus line.

[0206] The second edge bus line 50 is used to collect the current of the second doping layer 13 in the edge region of the first edge 101 , and the fourth edge bus line 90 is used to collect the current of the first doping layer 12 in the edge region of the second edge 102 .

[0207] It is understandable that in such an embodiment, the third edge bus line 80 has substantially the same structure and material as the first edge bus line 40 , and the fourth edge bus line 90 has substantially the same structure and material as the second edge bus line 50 , which will not be elaborated herein.

[0208] like Figure 3 As shown, it is not difficult to understand that the fourth edge busbar line 90 is in contact with the first doping layer 12 to collect the current of the first doping layer 12 in the edge region. Figure 6 As shown, in the present embodiment, the number of the first disconnection area 201 and the second disconnection area 301 is an even number, and in the first disconnection area 201 of the first fine grid 20 and the second disconnection area 301 of the second fine grid 30, the second disconnection area 301 is closest to the second edge 102, that is, in the second direction, the first disconnection area 201 and the second disconnection area 301 are arranged alternately in sequence, and the isolation area closest to the second edge 102 is the second disconnection area 301, and at the position corresponding to the second disconnection area 301, the first fine grid 20 is not disconnected, and a welding strip in contact with the first fine grid 20 can be set at the position corresponding to the second disconnection area 301 to converge the current collected by the fourth edge bus line 90.

[0209] Embodiment 9

[0210] See also Figure 3 and Figure 6 In some embodiments, a portion of the first fine gate 20 is insulated and penetrates the third edge bus gate line 80 to connect with the fourth edge bus gate line 90 .

[0211] In this way, after collecting the current in the edge region, the fourth edge bus grid line 90 can collect the current to the nearest welding strip of the same polarity through the first fine grid 20 that penetrates the third edge bus grid line 80 to realize current collection.

[0212] Specifically, Figure 6 As shown, in such an embodiment, the plurality of first fine gates 20 may include a plurality of second collecting fine gates 22 and a plurality of second penetrating fine gates 23, the plurality of second collecting fine gates 22 are all located on the side of the third edge bus line 80 facing the first edge 101, and the second penetrating fine gates 23 are insulated and penetrate the third edge bus line 80 to connect with the fourth edge bus line 90.

[0213] That is to say, in such an embodiment, there is no second collecting fine gate 22 between the third edge bus grid line 80 and the second edge 102, and between the third edge bus grid line 80 and the second edge 102, only the position where the second edge bus grid line 50 is penetrated has the second penetrating fine gate 23, and the remaining positions do not have fine gates (including the first fine gate 20 and the second fine gate 30).

[0214] It should be noted that, in the embodiment of the present utility model, "part of the first fine gate 20 is insulated and penetrates the third edge bus line 80" can be understood as that in the first direction, the third edge bus line 80 has a plurality of spaced-apartment areas, and the second penetrating fine gate 23 passes through the third edge bus line 80 through the partition area and does not contact the third edge bus line 80, so as to achieve physical penetration and insulation isolation.

[0215] It can be understood that in such an embodiment, the number of the second penetrating fine grids 23 can be single or multiple, and the specific number can be determined according to the size of the battery cell. When the number of the second penetrating fine grids 23 is multiple, the multiple second penetrating fine grids 23 can be arranged at intervals along the first direction, and the distance between two adjacent second penetrating fine grids 23 can be determined according to the size of the battery cell. Preferably, they can be evenly spaced and arranged on the silicon substrate 10 along the first direction according to the size of the silicon substrate 10, and there is no specific limitation here.

[0216] It is not difficult to understand that in such an embodiment, the fourth edge bus line 90 can collect the current of the first doped layer 12 in the edge area of ​​the second edge 102, and then collect it to the nearest welding strip of the same polarity (such as the welding strip 210 below) through the second through-fine grid 23 that runs through the third edge bus line 80 to achieve convergence, and by setting a plurality of second through-fine grids 23, the convergence path can be effectively shortened and the loss can be reduced.

[0217] Embodiment 10

[0218] See also Figure 3 and Figure 6 , in some embodiments, the third edge 103 is connected to the second edge 102 via a second chamfer 106;

[0219] In the direction from the third edge 103 to the fourth edge 104, the second fine grids 30 and the first fine grids 20 are arranged alternately in sequence, and a third auxiliary grid line 110 is arranged at the second chamfer 106, and the third auxiliary grid line 110 connects the second fine grids 30 and the third edge bus grid line 80 located at the second chamfer 106. It should be noted that the "second fine grids 30 located at the second chamfer 106" refers to the second fine grids 30 that are not directly connected to the third edge bus grid line 80 among the plurality of second fine grids 30 and whose extension lines along the second direction intersect the second chamfer 106, for example Figure 4 The top two second fine grids 30 in FIG.

[0220] In this way, the second fine grids 30 at the second chamfer 106 can be connected by setting the third auxiliary gate line 110 to achieve conduction between the second fine grids 30 at the second chamfer 106. When the welding strip (such as the edge welding strip 220 mentioned below) is subsequently welded, it is only necessary to contact the welding strip with the third auxiliary gate line 110 to realize the collection of the current of the second fine grids 30 at the second chamfer 106. This can avoid the situation where the current of the second fine grids 30 at the second chamfer 106 cannot be collected due to the existence of the second chamfer 106, resulting in the welding strip being unable to contact all the second fine grids 30 at the second chamfer 106 when welding the welding strip.

[0221] Specifically, Figure 6 As shown, in such an embodiment, the third auxiliary gate line 110 can be arranged in parallel with the second chamfer 106, which can make the gate line structure of the back side 11 simpler during manufacturing.

[0222] like Figure 6 As shown in FIG. 1 , it is not difficult to understand that, since the second fine grid 30 has the second disconnected area 301 at the position closest to the second edge 102, in order to realize the convergence of the second fine grid 30 near the second edge 102, it is necessary to arrange a welding strip at the position of the second edge 102 to realize conductive connection with the second fine grid 30 to realize the convergence. However, due to the existence of the second chamfer 106, the length of the second fine grid 30 at the top is relatively short, and the welding strip cannot be in contact with the second fine grid 30 at the top when it is arranged vertically. If the welding strip is too close to the inside, its capacity It is easy to contact with the first fine grid 20 of the opposite polarity and cause leakage. Therefore, by setting the third auxiliary grid line 110, the second fine grid 30 at the second chamfer 106 can be connected into a whole. When welding the welding strip, it is only necessary to contact the welding strip with the third edge bus grid line 80, or with the third edge bus grid line 80 and the third auxiliary grid line 110 at the same time, or with the remaining second fine grids 30 connected to the third edge bus grid line 80 and the third auxiliary grid line 110 to achieve the current convergence of all the second fine grids 30.

[0223] Embodiment 11

[0224] See also Figure 8 In some embodiments, the third edge bus grid line 80 may include a first bus segment 81 and a second bus segment 82, and the first bus segment 81 is connected to the second fine grid 30 located at the second chamfer 106. Similarly, in such an embodiment, the "second fine grid 30 located at the second chamfer 106" refers to a second fine grid 30 among a plurality of second fine grids 30 that is not directly connected to the third edge bus grid line 80 and whose extension line along the second direction intersects the second chamfer 106, for example Figure 8 The second bus section 81 connects the second fine grids 30 except the second chamfer 106. It can be understood that Figure 8As shown, in such an embodiment, due to the existence of the second penetrating fine grid 23 , the second bus segment 82 is a discontinuous structure.

[0225] In this way, the second fine grids 30 at the second chamfer 106 can be connected into a whole through the first confluence section 81. When setting the welding strip, in order to achieve the confluence of the second fine grids 30 at the second chamfer 106, it is only necessary to contact the welding strip with any second fine grid 30 at the second chamfer 106 to achieve the confluence of all the second fine grids 30 at the second chamfer 106.

[0226] Furthermore, if Figure 8 As shown, in such an embodiment, the first bus segment 81 and the second bus segment 82 are spaced apart along the second direction, and the second bus segment 82 is closer to the second edge 102 than the first bus segment 81 .

[0227] Specifically, in such an embodiment, the top of the first bus segment 81 may be connected to the end of the topmost second fine grid 30 and extend along the first direction, so that all the second fine grids 30 at the second chamfer 106 may be connected as a whole.

[0228] It is not difficult to understand that the difference between this embodiment and the above-mentioned embodiment 10 is that in the embodiment 10, the second fine gates 30 at the second chamfer 106 are connected into a whole by setting a third auxiliary gate line 110 parallel to the second chamfer 106, while in this embodiment, the second fine gates 30 at the second chamfer 106 are connected into a whole by the first bus section 81. Both can also be used at the same time, and there is no specific limitation here.

[0229] Embodiment 12

[0230] See also Figure 7 A passivation film layer 107 is provided on the first doping layer 12 and the second doping layer 13, and the fourth edge bus line 90 is arranged on the passivation film layer 107. In the area corresponding to the fourth edge bus line 90 (that is, the projection area of ​​the fourth edge bus line 90 on the passivation film layer 107), a second opening 1072 is opened at a position corresponding to the first doping layer 12 on the passivation film layer 107, and the fourth edge bus line 90 contacts the first doping layer 12 through the second opening 1072.

[0231] In this way, by opening the second opening 1072 at a position corresponding to the first doping layer 12 on the passivation film layer 107, the fourth edge bus line 90 can achieve stable contact with the first doping layer 12 below the edge area during printing to collect current, while also preventing the fourth edge bus line 90 from contacting the second doping layer 13 and causing leakage.

[0232] Specifically, in such an embodiment, the second opening 1072 can be formed on the passivation film layer 107 by laser drilling. In order to maximize the collection of current, the second opening 1072 can be preferably opened on all the first doping layers 12, and the fourth edge bus grid line 90 contacts all the first doping layers 12 through the second opening 1072 to maximize the collection of current. Of course, in some embodiments, the second opening 1072 can also be opened on part of the first doping layer 12, which is not specifically limited here.

[0233] Embodiment 13

[0234] See also Fig. 9 In some embodiments, the third edge bus gate line 80 may also be electrically connected to the first fine gate 20 , and the first fine gate 20 does not extend to the second edge 102 of the silicon substrate 10 . The third edge bus gate line 80 has the same polarity as the first edge bus gate line 40 .

[0235] Meanwhile, in such an embodiment, the fourth edge bus line 90 has the same polarity as the second edge bus line 50 and contacts at least one second doping layer 13 and is electrically connected to an end of a portion of the second fine gate 30 close to the second edge 102 .

[0236] In such an embodiment, it is Figure 3 The difference between the examples in Fig. 9 In the example shown, the third edge bus line 80 has the same polarity as the first edge bus line 40, the fourth edge bus line 90 has the same polarity as the second edge bus line 50, and Figure 3 In the example shown, the third edge bus line 80 has an opposite polarity to the first edge bus line 40 , and the fourth edge bus line 90 has an opposite polarity to the second edge bus line 50 .

[0237] Specifically, in such an embodiment, the third edge bus line 80 and the fourth edge bus line 90 at the second edge 102 are symmetrically arranged with the first edge bus line 40 and the second edge bus line 50 at the first edge 101, and all of their structures are the same as the structure at the first edge 101, and the number of the first disconnection area 201 and the second disconnection area 301 is an odd number.

[0238] It is understandable that in such an embodiment, the third edge bus line 80 has substantially the same structure and material as the first edge bus line 40 , and the fourth edge bus line 90 has substantially the same structure and material as the second edge bus line 50 , which will not be elaborated herein.

[0239] Similarly, if Fig. 9As shown, it is not difficult to understand that the fourth edge busbar line 90 is in contact with the second doping layer 13 to collect the current of the second doping layer 13 in the edge region of the second edge 102. Fig. 9 As shown, in the present embodiment, in the first disconnection area 201 of the first fine gate 20 and the second disconnection area 301 of the second fine gate 30, the one closest to the second edge 102 is also the first disconnection area 201, that is, in the second direction, the first disconnection area 201 and the second disconnection area 301 are arranged alternately in sequence, and the isolation area closest to the second edge 102 is also the first disconnection area 201. At the position corresponding to the first disconnection area 201, the second fine gate 30 is not disconnected, and a welding point in contact with the second fine gate 30 can be set at the position corresponding to the first disconnection area 201 to realize the convergence of the current of the third edge bus line 80.

[0240] Embodiment 14

[0241] Please continue reading Fig. 9 In some embodiments, a portion of the second fine gate 30 is insulated and penetrates the third edge bus gate line 80 to be electrically connected to the fourth edge bus gate line 90 .

[0242] Thus, after collecting the current in the edge region of the second edge 102 , the fourth edge bus line 90 can collect the current to the nearest soldering strip of the same polarity through the second fine grid 30 penetrating the third edge bus line 80 to realize current collection.

[0243] Specifically, Fig. 9 As shown, as described above, in such an embodiment, the plurality of second fine gates 30 may include a plurality of first collecting fine gates 302 and a plurality of first penetrating fine gates 303. Based on the second edge 102, the plurality of first collecting fine gates 302 are all located on the side of the third edge bus line 80 facing the first edge 101, and the first penetrating fine gates 303 are insulated and penetrate the third edge bus line 80 to connect with the fourth edge bus line 90.

[0244] That is, in such an embodiment, there is no first collecting fine gate 302 between the third edge bus line 80 and the second edge 102, and between the fourth edge bus line 90 and the second edge 102, only the position where the third edge bus line 80 is penetrated has the first penetrating fine gate 303.

[0245] It should be noted that, in the embodiment of the present utility model, "part of the second fine gate 30 is insulated and penetrates the third edge bus line 80" can be understood as that in the first direction, the third edge bus line 80 has a plurality of spaced-apartment areas, and the first penetrating fine gate 303 passes through the third edge bus line 80 through the partition area and does not contact the third edge bus line 80, so as to achieve physical penetration and insulation isolation.

[0246] Similarly, in such an embodiment, the number of the first penetrating fine grids 303 may be a single one or multiple ones, which may be determined specifically according to the size of the battery cell. When the number of the first penetrating fine grids 303 is multiple, the multiple first penetrating fine grids 303 may be arranged at intervals along the first direction, and the distance between two adjacent first penetrating fine grids 303 may be determined according to the size of the battery cell, and may preferably be arranged uniformly at intervals on the silicon substrate 10 along the first direction according to the size of the silicon substrate 10, and there is no specific limitation here.

[0247] It should be noted that, in such an embodiment, the first penetrating fine gate 303 that passes through the third edge bus line 80 may be the same gate line as the first penetrating fine gate that passes through the first edge bus line 40, or may not be the same gate line. There is no specific limitation here. Preferably, they are the same gate line. When the two are the same gate line, the gate line structure at the first edge 101 is completely symmetrical with the gate line structure at the second edge 102.

[0248] See also Fig.10 In such an embodiment, on the area corresponding to the fourth edge bus line 90 (i.e., the projection area of ​​the fourth edge bus line 90 on the passivation film layer 107), a third opening 1073 is opened at a position corresponding to the second doping layer 13 on the passivation film layer 107, and the fourth edge bus line 90 is in contact with the second doping layer 13 through the third opening 1073.

[0249] In this way, by opening the third opening 1073 at a position corresponding to the second doping layer 13 on the passivation film layer 107, the fourth edge bus line 90 can achieve stable contact with the second doping layer 13 below the edge area during printing to collect current, while also avoiding leakage caused by contact between the fourth edge bus line 90 and the first doping layer 12.

[0250] Specifically, in such an embodiment, the structure of the fourth edge bus line 90 and the third opening 1073 may be the same as the structure of the second edge bus line 50 and the first opening 1071 described above, and the structures of the two may be symmetrical to each other. In this embodiment, the third opening 1073 may be formed on the passivation film layer 107 by laser drilling. In order to maximize the collection of current, the third opening 1073 may preferably be opened on all the second doping layers 13, and the fourth edge bus line 90 may contact all the second doping layers 13 through the third opening 1073 to maximize the collection of current. Of course, in some embodiments, the third opening 1073 may also be opened on part of the second doping layer 13, and there is no specific limitation here.

[0251] Embodiment 15

[0252] Please continue reading Fig. 9, in some embodiments, the third edge 103 is connected to the second edge 102 via a second chamfer 106;

[0253] In the direction from the third edge 103 to the fourth edge 104 , the second fine gates 30 and the first fine gates 20 are arranged alternately in sequence, and a fourth auxiliary gate line 120 is provided at the second chamfer 106 . The fourth auxiliary gate line 120 connects the fourth edge bus gate line 90 and the second fine gate 30 closest to the third edge 103 .

[0254] Thus, by disposing the fourth auxiliary gate line 120 at the second chamfer 106 , the current collected by the fourth edge bus gate line 90 can be converged to the second fine gate 30 at the third edge 103 and then converged to the nearest welding strip.

[0255] Specifically, Fig. 9 As shown, the third edge 103 is the upper edge of the silicon substrate 10 , the fourth edge 104 is the lower edge of the silicon substrate 10 , the first edge 101 and the third edge 103 form a first chamfer 105 , and the second edge 102 and the third edge 103 form a second chamfer 106 .

[0256] like Fig. 9 As shown, in such an embodiment, the first chamfer 105 is symmetrical to the second chamfer 106 , and the fourth auxiliary gate line 120 is symmetrical to the first auxiliary gate line 60 .

[0257] It is understandable that, in such an embodiment, the first through-fine gate 303 and the third auxiliary gate line 110 may be provided to realize current convergence together, or the first through-fine gate 303 may not be provided, but the current convergence may be realized through the fourth auxiliary gate line 120 at the second chamfer 106. Of course, in order to avoid excessive loss caused by too long transmission path of the converged current, it is preferred to realize the convergence through the first through-fine gate 303 or through the first through-fine gate 303 and the fourth auxiliary gate line 120, which is not limited here.

[0258] In some embodiments, the fourth auxiliary gate line 120 is arranged in parallel with the second chamfer 106. This can make the gate line structure of the back side 11 simpler to manufacture.

[0259] Furthermore, in some embodiments, the fourth auxiliary gate line 120 may be located above the second doping layer 13 and contact at least one second doping layer 13 .

[0260] In this way, the fourth auxiliary grid line 120 can realize current convergence while also realizing current collection at the edge region at the second chamfer 106 , thereby further reducing efficiency loss and improving the efficiency of the cell.

[0261] Please continue reading Fig. 9In some embodiments, a fifth auxiliary gate line 130 may be further provided at the first chamfer 105, and the fifth auxiliary gate line 130 connects the first fine gate 20 and the third edge bus gate line 80 located at the second chamfer 106. Similarly, it should be noted that the "second fine gate 30 located at the second chamfer 106" refers to a second fine gate 30 among a plurality of second fine gates 30 that is not directly connected to the third edge bus gate line 80 and whose extension line along the second direction intersects the second chamfer 106, for example Figure 7 The top two second fine grids 30 in FIG.

[0262] In this way, the first fine grids 20 at the second chamfer 106 can be connected by setting the fifth auxiliary gate line 130 to achieve conduction between the first fine grids 20 at the second chamfer 106. When the welding strip is subsequently welded, it is only necessary to contact the welding strip with the fifth auxiliary gate line 130 to realize the collection of current of the first fine grids 20 at the second chamfer 106. This can avoid the situation where the welding strip 210 cannot contact all the first fine grids 20 at the second chamfer 106 when welding the welding strip 210 due to the existence of the second chamfer 106, resulting in the current of the first fine grids 20 at the second chamfer 106 cannot be collected.

[0263] Specifically, Fig. 9 As shown, in such an embodiment, the fifth auxiliary gate line 130 can also be arranged in parallel with the second chamfer 106, that is, at the second chamfer 106, from the outside to the inside, the second chamfer 106, the fourth auxiliary gate line 120 and the fifth auxiliary gate line 130 are arranged in parallel in sequence, and the fifth auxiliary gate line 130 is symmetrically arranged with the second auxiliary gate line 70.

[0264] Embodiment 16

[0265] In some embodiments, the distance between the third edge bus bar line 80 and the second edge 102 (ie, the distance between the third edge bus bar line 80 and the second edge 102 in the second direction) is 0.5 mm-2 mm.

[0266] In this way, setting the spacing between the third edge bus grid line 80 and the second edge 102 within this reasonable range can effectively avoid the distance between the two being too large, resulting in too large an area of ​​the edge region without fine grids and resulting in excessive efficiency loss. It can also avoid the distance between the two being too small, resulting in cold solder joints and cracks when subsequently welding the solder strip at the third edge bus grid line 80, thereby ensuring the reliability and stability of welding.

[0267] Specifically, in such an embodiment, the distance between the third edge bus line 80 and the second edge 102 may be, for example, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm, 1.2mm, 1.4mm, 1.6mm, 1.8mm, 2mm or any value between 0.5mm-2mm, without limitation herein.

[0268] Furthermore, in an embodiment of the utility model, the distance between the third edge busbar line 80 and the second edge 102 is preferably 0.8mm-1.2mm, for example 0.9mm, etc. In this way, it is possible to reduce the process difficulty while effectively avoiding the situation where the distance is too large and the area of ​​the edge region without fine grids is too large, resulting in excessive efficiency loss. At the same time, it is also possible to ensure the stability and reliability of welding.

[0269] Embodiment 17

[0270] In some embodiments, the distance between the fourth edge busbar line 90 and the second edge 102 (ie, the distance between the second edge and the second edge) is 0.3 mm to 1.2 mm.

[0271] In this way, on the one hand, it can be avoided that the distance between the fourth edge bus grid line 90 and the second edge 102 is too small, which will greatly increase the difficulty of printing the fourth edge bus grid line 90; on the other hand, it can be avoided that the distance between the fourth edge bus grid line 90 and the second edge 102 is too large, which will cause the area of ​​the edge without fine grids to be too large and cause excessive efficiency loss.

[0272] Specifically, in such an embodiment, the distance between the fourth edge busbar line 90 and the second edge 102 may be, for example, 0.3mm, 0.4mm, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm, 1.2mm or any value between 0.3mm-1.2mm, without limitation herein.

[0273] Furthermore, in an embodiment of the utility model, the distance between the fourth edge busbar line 90 and the second edge 102 is preferably 0.3mm-0.6mm, for example 0.5mm, etc. In this way, it is possible to reduce the process difficulty while effectively avoiding the excessive distance resulting in excessive efficiency loss due to the area of ​​the edge region where no fine grid is set being too large. That is, it is possible to reduce the printing difficulty while avoiding excessive efficiency loss.

[0274] Embodiment 18

[0275] In some embodiments, the width of the fourth edge bus bar line 90 is 20 um-200 um.

[0276] Thus, setting the width of the fourth edge bus line 90 within this reasonable range can avoid the fourth edge bus line 90 being too small, resulting in too small current capacity and causing a fuse during the bus, and can also avoid the fourth edge bus line 90 being too large, resulting in a significant increase in cost.

[0277] Specifically, in such an embodiment, the width of the fourth edge bus line 90 may be, for example, 20um, 20um, 30um, 40um, 50um, 60um, 70um, 80um, 90um, 100um, 110um, 120um, 130um, 140um, 150um, 160um, 170um, 180um, 190um, 200um or any value between 20um-200um, and is not limited here.

[0278] In some embodiments, the width of the fourth edge bus line 90 is greater than the width of the third edge bus line 80 .

[0279] In this way, since the fourth edge bus line 90 is used to collect the current of each second doping layer 13 in the edge area, it plays the role of collection and convergence. Therefore, the width of the fourth edge bus line 90 can be set to be larger than the width of the third edge bus line 80, in order to improve the current flow capacity of the fourth edge bus line 90 to ensure the stability of the battery cell.

[0280] Embodiment 19

[0281] See also Fig.11 and Fig.12 The present invention further provides a photovoltaic system 100. The photovoltaic system 1000 may include a battery assembly 200 in an embodiment of the present invention. The battery assembly 200 in an embodiment of the present invention may include several IBC solar cells 100 in several embodiments of the present invention. In some embodiments, multiple IBC solar cells 100 in the battery assembly 200 may be connected in series in sequence to form a battery string. Each battery string may be connected in series, in parallel, or in series-parallel combination to realize current bus output. For example, each battery cell may be connected by welding a welding strip (including a welding strip 210 and an edge welding strip 220 described below), and each battery string may be connected by a bus bar.

[0282] It is understandable that the IBC solar cell 100 in the embodiment of the present invention can be a whole cell or a half cell, and is not specifically limited here.

[0283] like Fig.11 As shown, in two adjacent IBC solar cells 100, the first disconnection area 201 of one of the IBC solar cells 100 corresponds to the second disconnection area 301 of the other IBC solar cell 100 in the first direction, and the welding strips 210 are arranged at the first disconnection area 201 and the second disconnection area 301, and each first disconnection area 201 and each second disconnection area 301 is correspondingly provided with a welding strip 210;

[0284] Among them, in two adjacent IBC solar cells 100, the first fine grid 20 of one IBC solar cell 100 is connected to the welding strip 210 at the first disconnection area 201, and the second fine grid 30 of the other IBC solar cell 100 is connected to the welding strip 210 at the second disconnection area 301, that is, the welding strip 210 at the first disconnection area 201 can be welded to the solar cell through the first end welding point 23 and the second end welding point 25 mentioned above, and the welding strip 210 does not contact the second auxiliary grid 30 connected to the first connecting grid line 21, the second connecting grid line 22, the fourth connecting grid line 25 and the fifth connecting grid line 26. The welding strip 210 at the second disconnection area 201 can be welded to the solar cell through the third end welding point 33 and the fourth end welding point 35 mentioned above, and the welding strip 210 does not contact the first auxiliary grid 20 connected to the seventh connecting grid line 31, the eighth connecting grid line 32, the tenth connecting grid line 35 and the eleventh connecting grid line 36.

[0285] In the battery string of the embodiment of the utility model, there are the following connection modes:

[0286] 1. If Fig.11 As shown, in two adjacent IBC solar cells 100, the first edge 101 has a first edge bus bar line 40 and a second edge bus bar line 50, and the second edge 102 has a third edge bus bar line 80 and a fourth edge bus bar line 90, the first edge bus bar line 40 and the third edge bus bar line 80 have opposite polarities, and the second edge bus bar line 50 and the fourth edge bus bar line 90 have opposite polarities;

[0287] In the battery string, the first edge 101 of one of the two adjacent IBC solar cells 100 is aligned with the second edge 102 of the other, so that the first edge busbar line 40 and the third edge busbar line 80 of the two solar cells are located on the same side, and the second edge busbar line 50 and the fourth edge busbar line 90 are located on the same side. In the two IBC solar cells 100, the middle area is connected by the welding strip 210, and the edge area is welded together by the edge welding strip 220 located at the first edge 101 and the second edge 102 to achieve series connection. It is only necessary to connect the edge welding strip 220 with the grid lines of different polarities (for example Fig.11 The first through-fine grid 303 and the second through-fine grid 23) are coated with insulating glue, such as Figure 8 As shown, the edge welding strips 220 are conductively connected to the first edge bus grid line 40 and the third edge bus grid line 80 located on the same side. The edge welding strips 220 can be arranged along the first direction, and can be welded to the first edge bus grid line 40 and the third edge bus grid line 80 or to the first fine grid 20 and the second fine grid 30.

[0288] 2. In two adjacent IBC solar cells 100, only the first edge 101 has the first edge busbar line 40 and the second edge busbar line 50;

[0289] In this case, in two adjacent IBC solar cells 100, the first edge busbar lines 40 located on the same side have opposite polarities, the first fine grids of the first edge busbar lines 40 also have opposite polarities, and the second edge busbar lines 50 also have opposite polarities. That is, in two adjacent IBC solar cells 100, the first edge busbar lines 40 of one are P-type grid lines, and the first edge busbar lines 40 of the other are N-type grid lines. The two IBC solar cells 100 are welded together via welding strips located at the first edges 101 to achieve series connection.

[0290] like Fig.11 As shown, in some embodiments, in the battery string, the edge welding strip 220 can be directly welded to the first edge bus bar line 40 and the third edge bus bar line 80, and the two can be in contact or covered. Of course, in some embodiments, the edge welding strip 220 can also be located on the inner side of the first edge bus bar line 40 and the third edge bus bar line 80 (that is, located on the side of the first edge bus bar line 40 away from the first edge 101), and in two adjacent IBC solar cells 100, the edge welding strip 220 is welded to the first fine grid 20 in one of the IBC solar cells 100, and the edge welding strip 220 is welded to the second fine grid 30 in the other IBC solar cell 100.

[0291] 3. In the IBC solar cell 100, there is no first edge busbar line 40, second edge busbar line 50, third edge busbar line 80 and fourth edge busbar line 90. In this case, the battery string is connected in series in a traditional manner, which will not be described in detail here.

[0292] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0293] In addition, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A main grid-free electrode structure for an IBC solar cell, characterized in that: The main grid electrode-free structure is arranged on the back side of the silicon substrate of the IBC solar cell, and the main grid electrode-free structure comprises: A plurality of first fine gates and a plurality of second fine gates, wherein the plurality of first fine gates and the plurality of second fine gates are alternately arranged in sequence along a first direction and extend along a second direction, wherein the second direction intersects the first direction, wherein in the second direction, the silicon substrate has a first edge and a second edge opposite to each other, and in the first direction, the silicon substrate has a third edge and a fourth edge opposite to each other; In the second direction, the first fine gate has a plurality of spaced first disconnected regions, and the second fine gate has a plurality of spaced second disconnected regions, the first disconnected regions and the second disconnected regions are alternately arranged in sequence, the first disconnected regions on two adjacent first fine gates correspond to each other in the first direction, and the second disconnected regions on adjacent second fine gates correspond to each other in the first direction; a first connection gate line and a second connection gate line disposed at the first disconnected region, the first connection gate line and the second connection gate line being spaced apart along the second direction and extending along the first direction, the first connection gate line and the second connection gate line not being in contact with the first fine gate, and the first connection gate line and the second connection gate line both being connected to a portion of the second fine gate closest to the third edge; A first end welding point is disposed near the third edge and located at the first disconnection area, wherein the first end welding point is disposed between the first connection gate line and the second connection gate line and contacts the first connection gate line and the second connection gate line.

2. The main gate electrode structure according to claim 1, characterized in that: In the first direction, the distance between the first end welding point and the third edge is 1 cm-3 cm.

3. The main gate-free electrode structure according to claim 1, characterized in that: The first connecting gate line and the second connecting gate line are connected to at least three second fine gates; and / or In the first direction, the lengths of the first connecting gate lines and the second connecting gate lines are at least four times the spacing between the first fine gates and the second fine gates.

4. The main gate-free electrode structure according to claim 1, characterized in that: The main gate electrode structure also includes a third connecting gate line, which is located at the first disconnected area and does not contact the first fine gate. The third connecting gate line connects the first end welding point and the part of the second fine gate between the first connecting gate line and the second connecting gate line and the fourth edge.

5. The main gate-free electrode structure according to claim 1, characterized in that: The main gate electrode structure without main gate may further include a fourth connecting gate line and a fifth connecting gate line arranged at the first disconnected area, the fourth connecting gate line and the fifth connecting gate line are arranged at intervals along the second direction and extend along the first direction, the fourth connecting gate line and the fifth connecting gate line are not in contact with the first fine gate, and the fourth connecting gate line and the fifth connecting gate line are both connected to the part of the second fine gate closest to the fourth edge; A second end welding point is disposed near the fourth edge and located at the first disconnection area, and the second end welding point is disposed between the fourth connection gate line and the fifth connection gate line and contacts the fourth connection gate line and the fifth connection gate line.

6. The main gate-free electrode structure according to claim 5, characterized in that: In the first direction, the distance between the second end welding point and the fourth edge is 1 cm-3 cm.

7. The main gate-free electrode structure according to claim 5, characterized in that: The main gate electrode structure further includes a sixth connecting gate line, which is located at the first disconnected area and connects the second end welding point and a portion of the second fine gate between the first connecting gate line, the second connecting gate line and the third edge.

8. The main gate-free electrode structure according to claim 5, characterized in that: a seventh connection gate line and an eighth connection gate line disposed at the second disconnected region, the seventh connection gate line and the eighth connection gate line being spaced apart along the second direction and extending along the first direction, the seventh connection gate line and the eighth connection gate line not being in contact with the second fine gate, and the seventh connection gate line and the eighth connection gate line both being connected to a portion of the first fine gate closest to the third edge; A third end welding point is arranged near the third edge and located at the second disconnection area, and the third end welding point is arranged between the seventh connection gate line and the eighth connection gate line and contacts the seventh connection gate line and the eighth connection gate line.

9. The main gate-free electrode structure according to claim 8, characterized in that: In the first direction, the distance between the third end welding point and the third edge is 1 cm-3 cm.

10. The main gate-free electrode structure according to claim 8, characterized in that: The seventh connecting gate line and the eighth connecting gate line are connected to at least three first fine gates; and / or In the first direction, the lengths of the seventh connecting gate line and the eighth connecting gate line are at least four times the spacing between the first fine gate and the second fine gate.

11. The main gate-free electrode structure according to claim 8, characterized in that: The main gate electrode structure further includes a ninth connecting gate line, which is located at the second disconnected area and connects the third end welding point and a portion of the first fine gate between the seventh and eighth connecting gate lines and the fourth edge.

12. The main gate-free electrode structure according to claim 8, characterized in that: a tenth connecting gate line and an eleventh connecting gate line disposed at the second disconnected region, the tenth connecting gate line and the eleventh connecting gate line being spaced apart along the second direction and extending along the first direction, the tenth connecting gate line and the eleventh connecting gate line not being in contact with the second fine gate, and the tenth connecting gate line and the eleventh connecting gate line both being connected to a portion of the first fine gate closest to the fourth edge; A fourth end welding point is arranged close to the fourth edge and located at the second disconnection area, and the fourth end welding point is arranged between the tenth connecting gate line and the eleventh connecting gate line and contacts the tenth connecting gate line and the eleventh connecting gate line.

13. The main gate-free electrode structure according to claim 12, characterized in that: In the first direction, the distance between the fourth end welding point and the fourth edge is 1 cm-3 cm.

14. The main gate-free electrode structure according to claim 12, characterized in that: The main gate electrode structure further includes a twelfth connecting gate line, which is located at the first disconnected area and connects the fourth end welding point and a portion of the first fine gate between the first connecting gate line, the second connecting gate line and the third edge.

15. The main gate-free electrode structure according to claim 1, characterized in that: A plurality of first doped layers and a plurality of second doped layers are provided on the back side of the silicon substrate, the plurality of first doped layers and the plurality of second doped layers are alternately arranged in sequence along a first direction and extend along a second direction, and the first direction intersects with the second direction; the first fine gate is provided above the first doped layer, the second fine gate is provided above the second doped layer, and the first fine gate does not extend to a first edge of the silicon substrate; The main gate electrode-free structure further includes: a first edge busbar line disposed close to the first edge and extending along the first direction, the first edge busbar line being electrically connected to the first fine grid; and A second edge bus line is extended along the first direction, the second edge bus line is arranged between the first edge bus line and the first edge and is located above the second doped layer, the second edge bus line is in contact with at least one of the second doped layers and is electrically connected to an end of a portion of the second fine gate close to the first edge.

16. The main gate-free electrode structure according to claim 15, characterized in that: A portion of the second fine gate insulation passes through the first edge bus gate line and is electrically connected to the second edge bus gate line.

17. The main gate-free electrode structure according to claim 15, characterized in that: The third edge is connected to the first edge via a first chamfer; In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a first auxiliary grid line is provided at the first chamfer, and the first auxiliary grid line connects the second edge bus grid line and the second fine grid closest to the third edge.

18. The main gate-free electrode structure according to claim 15, characterized in that: The IBC solar cell sheet further comprises: a third edge bus line disposed close to the second edge and extending along the first direction, the third edge bus line being electrically connected to the second fine grid, the second fine grid not extending to the second edge, and having opposite polarity to the first edge bus line; and A fourth edge busbar line extending along the first direction, wherein the fourth edge busbar line is arranged between the third edge busbar line and the second edge and is located above the first doped layer, and the fourth edge busbar line contacts at least one of the first doped layers and is electrically connected to an end of a portion of the first fine gate close to the second edge.

19. The main gate-free electrode structure according to claim 18, characterized in that: A portion of the first fine gate insulation penetrates the third edge bus gate line and is connected to the fourth edge bus gate line.

20. The main gate-free electrode structure according to claim 18, characterized in that: The third edge is connected to the second edge via a second chamfer; In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a third auxiliary grid line is provided at the second chamfer, and the third auxiliary grid line connects the second fine grid located at the second chamfer and the third edge bus grid line.

21. The main gate-free electrode structure according to claim 15, characterized in that: The main gate electrode-free structure further includes: a third edge bus gate line disposed close to the second edge and extending along the first direction, the third edge bus gate line being electrically connected to the first fine gate, the first fine gate not extending to the second edge of the silicon substrate, and the third edge bus gate line having the same polarity as the first edge bus gate line; and A fourth edge bus line is arranged near the second edge and extending along the first direction, the fourth edge bus line is arranged between the third edge bus line and the second edge and the fourth edge bus line is located above the second doped layer, the fourth edge bus line is in contact with at least one of the second doped layers and is electrically connected to an end of a portion of the second fine gate near the second edge.

22. The main gate-free electrode structure according to claim 21, characterized in that: A portion of the second fine gate insulation penetrates the third edge bus gate line and is connected to the fourth edge bus gate line.

23. The main gate-free electrode structure according to claim 21, characterized in that: The third edge is connected to the second edge via a second chamfer; In the direction from the third edge to the fourth edge, the second fine grids and the first fine grids are arranged alternately in sequence, and a fourth auxiliary grid line is provided at the second chamfer, and the fourth auxiliary grid line connects the fourth edge busbar line and the second fine grid closest to the third edge.

24. An IBC solar cell sheet, characterized in that: It comprises the main gate-free electrode structure as described in any one of claims 1 to 23.

25. A battery assembly, characterized in that: Comprising several IBC solar cells as claimed in claim 24.

26. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 25.

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