Semiconductor device and method for manufacturing and packaging the same

Abstract

The present invention discloses a semiconductor device and a manufacturing and packaging method thereof, including a chip, a lead frame and a package body, wherein the lead frame includes a chip seat and pins, and also includes a guide lead, wherein the guide lead is connected to the chip and the pins respectively, and the middle section of the guide lead protrudes out of the chip, and the package body is injection molded to cover the chip and the lead frame, and the pin part protrudes out of the package body, and a pouring port is arranged on the package body, and the pouring port is arranged on a side close to the guide lead. The present invention arranges the pouring port on a side close to the guide lead, so that the package body can flow along the direction of the guide lead during injection molding, and effectively eliminates the pores and weld lines under the guide lead; the middle section of the guide lead protrudes out of the chip, so that the gap between the guide lead and the chip, and between the guide lead and the lead frame is expanded, so that the package body is smoothly filled in; the chip delamination, package body colloid cracking, water vapor intrusion, ion pollution and other problems are effectively prevented, and the service life of the semiconductor device is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic devices, and in particular relates to a semiconductor device and a manufacturing and packaging method thereof. Background Art

[0002] Semiconductor devices usually go through two processing steps: chip manufacturing and chip packaging. Therefore, the characteristics of the chip itself and the quality of the packaging technology directly determine the final performance of the semiconductor device product. Semiconductor device packaging is to carry out mechanical protection, electrical protection, internal circuit lead-out and other work on the bare chip after the tape-out. Its main process flow can be roughly divided into chip welding, wire welding, epoxy resin injection molding, lead cutting molding, and product testing. With the continuous improvement of the integration and precision of chip processing technology, the performance of the chip itself has made great progress, but the packaging technology still has many problems. For example, in the epoxy resin injection molding process, due to the thick aluminum wire welded by the emitter, pores and weld lines are easily generated under the aluminum wire. This injection molding defect causes the semiconductor device to fail in reliability under hot and cold working conditions, such as chip delamination, epoxy resin colloid cracking, water vapor intrusion, ion contamination of the chip, etc., resulting in chip damage and inability to work normally.

[0003] The invention patent with Chinese patent number CN104112678B discloses a method for manufacturing an intelligent power module, which includes the following steps: S1) providing a semi-finished intelligent power module; S2) providing a lead frame structure; S3) welding each fixing foot and making the fixing foot and the electric pin be located on opposite sides of the substrate; S4) placing the semi-finished intelligent power module in the mold cavity, and using the mold to clamp the ends of the fixing foot and the electric pin; S5) injecting a liquid encapsulation body into the mold cavity and forming a mold; S6) opening the mold and taking out the semi-finished intelligent power module after encapsulation; S7) cutting the ends of the electric pins connected together and cutting the part of the fixing foot extending out of the package body. Although the substrate in the invention patent is fixed in advance by the electric pins and the fixing feet on the opposite sides, the defective products caused by the unbalanced injection molding force are avoided, the yield rate of the package is improved, the appearance of the package hole is eliminated, and the reliability of the intelligent power module is improved, but the invention needs to be realized with the aid of a supporting tool, which is inconvenient to use.

[0004] The invention patent with Chinese patent number CN103824834B discloses a semiconductor device with an improved packaging structure and a manufacturing method thereof, wherein the semiconductor device includes a semiconductor chip, a lead frame and a packaging resin. The semiconductor chip is located in the wafer carrier island area of ​​the lead frame, and the lead frame includes a pin area, wherein the upper end of the second pin area is connected to a second bonding area. The semiconductor chip is electrically connected to the second bonding area through a metal lead. The second bonding area is larger in area than the prior art, thereby ensuring that the maximum fuse current limited by the metal lead can be effectively improved when the low chip is packaged, and the on-resistance of the device is reduced, thereby maximizing the actual current capacity of the chip. However, the arc height of the emitter aluminum wire of the invention is low. During packaging, it is difficult for the resin to enter the narrow area below the aluminum wire, which easily leads to the appearance of pores, which in turn leads to problems such as device cracking, delamination, water vapor intrusion, and ion contamination of the chip. Summary of the invention

[0005] The purpose of the present invention is to overcome the problems in the prior art that semiconductor devices are prone to reliability failure under hot and cold conditions, such as chip delamination, epoxy resin colloid cracking, water vapor intrusion, ion contamination of chips, etc., and to provide a semiconductor device and a method for manufacturing and packaging the same.

[0006] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is as follows: a semiconductor device, including a chip, a lead frame and a package body, the lead frame including a chip seat and pins, the chip seat is used to carry and fix the chip, the pins enable the chip to be electrically connected to the outside, and also includes a guide lead, the two ends of the guide lead are respectively connected to the chip and the pins, and the middle section of the guide lead protrudes out of the chip, the package body is coated on the chip and the lead frame by injection molding, and the pins partially extend out of the package body, and a pouring gate is provided on the package body, and the pouring gate is provided on a side close to the guide lead.

[0007] Furthermore, the chip includes three electrodes, namely a gate, a collector and an emitter, and the pins include a gate pin, a collector pin and an emitter pin connected to the chip electrodes correspondingly.

[0008] Furthermore, the lead wire connecting the emitter pin and the emitter is an emitter lead wire, and the emitter lead wire is a current guide lead wire.

[0009] Furthermore, the guide wire is bent upward from one end to the other end to form a curved arc structure, and the height of the curved arc is 750-1000 μm.

[0010] Furthermore, the guide wire is a metal wire.

[0011] Furthermore, the chip is fixed on the chip seat through a bonding piece.

[0012] Furthermore, the bonding member is any one of solder paste, tin wire, and nano silver.

[0013] A method for manufacturing and packaging a semiconductor device comprises the following steps:

[0014] S1: Prepare chip and lead frame;

[0015] S2: welding and fixing the chip on the chip holder of the lead frame to achieve mechanical and electrical connection;

[0016] S3: connecting the electrodes of the chip to the pins of the corresponding lead frame, and at least one electrode is connected to the pins through a guide wire;

[0017] S4: placing the semi-finished semiconductor device obtained in S3 in a mold for injection molding, and injecting the melted package into the mold through a pouring port, wherein the pouring port is arranged on a side close to the guide wire, so that the package can flow along the direction of the guide wire when filling, and remove pores and weld lines. The guide wire expands the gap between the chip, the guide wire, and the lead frame, so that the package can be better filled in;

[0018] S5: After the liquid encapsulation body is solidified, the mold is opened and the encapsulated semi-finished semiconductor device is taken out;

[0019] S6: Cutting off the excess package.

[0020] Furthermore, in S1, the lead frame is a parallel lead frame, and the parallel lead frame includes a plurality of lead frames arranged in parallel, and the lead frames are connected by connecting rods.

[0021] Furthermore, after the injection molding in step S4, the connecting rod extends out of the packaging body, and the packaging body is cut off in step S6.

[0022] Furthermore, the material of the package in S4 is epoxy resin.

[0023] From the above description of the present invention, it can be seen that compared with the prior art, the present invention provides a semiconductor device and a manufacturing and packaging method thereof, in which a pouring port of the package body is set on a side close to the guide lead, so that the package body can flow along the direction of the guide lead during injection molding, effectively eliminating the air holes and weld lines under the guide lead; the middle section of the guide lead is protruded outward from the chip to increase the arc height, thereby expanding the gap between the guide lead and the chip, and between the guide lead and the lead frame, so as to facilitate the smooth filling of the package body; effectively preventing problems such as chip delamination, package body colloid cracking, water vapor intrusion, ion contamination, and improving the service life of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of assembling the semiconductor device of the present invention;

[0025] Figure 2 This is a schematic diagram of the emitter lead structure of the present invention;

[0026] Figure 3 It is a schematic diagram of the structure after S2 is implemented;

[0027] Figure 4 It is a schematic diagram of the structure after the emitter lead welding in S3 is implemented;

[0028] Figure 5 This is a schematic diagram of the structure after S3 is implemented;

[0029] Figure 6 It is a schematic diagram of the structure after S4 is implemented;

[0030] Figure 7 This is a schematic diagram of the structure after S6 is implemented. DETAILED DESCRIPTION

[0031] The technical solutions of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0032] like Figure 1 As shown, a semiconductor device includes a chip 1, a lead frame 2, a package body 3, and a current guide wire 4. The chip includes three electrodes, namely a gate, a collector, and an emitter;

[0033] The lead frame 2 includes a chip seat 21 and pins corresponding to chip electrodes. The chip seat 21 is used to carry and fix the chip 1. The chip 1 is fixed on the chip seat 21 by a bonding member such as solder paste, tin wire or nano silver. The pins are respectively a gate pin 22, a collector pin 23 and an emitter pin 24, so that the chip is electrically connected to the outside.

[0034] The guide lead 4 is a metal lead, and the two ends of the guide lead 4 are respectively connected to the chip 1 and the pin, and the middle section of the guide lead 4 protrudes out of the chip. The lead connected to the gate pin 22 and the gate is the gate lead 41, and the lead connected to the emitter pin 24 and the emitter is the emitter lead 42. The emitter lead 42 is a guide lead, and the emitter lead 42 is bent upward from one end to the other end to form a curved arc structure. The height of the curved arc is 750 to 1000 μm. In this embodiment, the height of the curved arc is 900 μm, so that the gap between the emitter lead 42, the chip 1, and the lead frame 2 is enlarged, which is convenient for the package 3 such as epoxy resin to be smoothly filled in. Figure 2 As shown;

[0035] The package body 3 covers the chip 1, the lead frame 2 and the guide lead 4, and the lead portion extends out of the package body 3, providing physical and electrical protection, stress buffering and heat dissipation for the chip 1; the package body 3 is provided with a pouring gate 5, and the pouring gate 5 is arranged on a side close to the emitter lead 42, so that the package body 3 can flow along the direction of the emitter lead 42 during injection molding, effectively eliminating the pores and weld lines under the emitter lead 42.

[0036] A method for manufacturing and packaging a semiconductor device comprises the following steps:

[0037] S1: Prepare the chip 1 and the lead frame 2. The lead frame 2 is also provided with a connecting rod 25 to facilitate the lead frame transmission, bridging, and support. At the same time, the lead frame 2 is connected and arranged in parallel through the connecting rod 25 to form a lead frame array, which is convenient for batch automated production;

[0038] S2: solder paste, tin wire or nano silver is used to solder the chip 1 to the chip holder 21 of the lead frame 2 to achieve mechanical and electrical connection of the chip 1. Figure 3 As shown;

[0039] S3: Use ultrasonic cold welding equipment to connect the emitter of the chip 1 and the emitter pin 24 of the lead frame 2 with the emitter lead 42 to form a loop. By setting the equipment parameters to change the height of the welding head during the welding process, the emitter lead 42 is bent from the head to the end to form a curved arc, thereby increasing the arc height of the emitter lead 42. After welding, Figure 4 As shown; the gate of the chip 1 is connected to the gate pin 22 of the lead frame 2 through the gate lead 41, and after welding, Figure 5 As shown;

[0040] S4: placing the semi-finished semiconductor device obtained in S3 in a mold for injection molding, injecting the melted package body 3 such as epoxy resin into the mold through the pouring port 5, the pouring port 5 is set on the side close to the emitter lead 42, the package body can flow along the emitter lead 42 when filling, removing the pores and weld lines, the emitter lead 42 expands the gap between the chip 1, the emitter lead 42, and the lead frame 2, and the package body 3 can be better filled in, after packaging, the epoxy resin covers the chip 1, the lead frame 2 and the guide lead 4, and the pin part extends out of the package body 3, such as Figure 6 As shown;

[0041] S5: After the liquid encapsulation body is solidified, the mold is opened and the encapsulated semi-finished semiconductor device is taken out;

[0042] S6: Cutting the redundant package and the connecting rod 25 extending out of the package to separate the connected semiconductor devices, such as Figure 7 shown.

[0043] The present invention provides a semiconductor device and a manufacturing and packaging method thereof. A pouring port of a package body is arranged on a side close to an emitter lead, so that epoxy resin can flow along the direction of the emitter lead during injection molding, thereby effectively eliminating air holes and weld lines below the emitter lead. The middle section of the emitter lead is protruded outward from the chip to increase the arc height of the emitter lead, and the gap between the emitter lead, the chip and the lead frame is enlarged, so that epoxy resin is conveniently filled in smoothly. Problems such as chip delamination, epoxy resin colloid cracking, water vapor intrusion, ion pollution, etc. are effectively prevented, thereby increasing the service life of the semiconductor device.

[0044] The above are only some specific implementation methods of the present invention, but the design concept of the present invention is not limited thereto. Any non-substantial changes to the present invention using this concept shall be deemed as an infringement of the protection scope of the present invention.

Claims

1. A semiconductor device, comprising a chip, a lead frame and a package, wherein the lead frame comprises a chip seat and pins, wherein the chip seat is used to carry and fix the chip, and the pins enable the chip to be electrically connected to the outside, characterized in that: It also includes a guide lead, wherein the two ends of the guide lead are respectively connected to the chip and the pin, and the middle section of the guide lead protrudes out of the chip; the package body is coated on the chip and the lead frame by injection molding, and the pin part extends out of the package body; a pouring gate is provided on the package body, and the pouring gate is provided on a side close to the guide lead; the guide lead is bent upward from one end to the other end to form a curved arc structure, and the height of the curved arc is 750~1000μm.

2. The semiconductor device according to claim 1, wherein: The chip comprises three electrodes, namely a gate, a collector and an emitter, and the pins comprise a gate pin, a collector pin and an emitter pin connected to the chip electrodes correspondingly.

3. The semiconductor device according to claim 2, wherein: The lead wire connecting the emitter pin and the emitter is an emitter lead wire, and the emitter lead wire is a current guide lead wire.

4. The semiconductor device according to claim 1, wherein: The guide wire is a metal wire.

5. The semiconductor device according to claim 1, wherein: The chip is fixed on the chip seat through a combining piece.

6. The semiconductor device according to claim 5, characterized in that: The bonding member is any one of solder paste, solder wire and nano silver.

7. A method for manufacturing and packaging a semiconductor device, using the semiconductor device according to any one of claims 1 to 6, characterized in that: The following steps are involved: S1: Prepare chip and lead frame; S2: welding and fixing the chip on the chip holder of the lead frame to achieve mechanical and electrical connection; S3: connecting the electrodes of the chip to the pins of the corresponding lead frame, and at least one electrode is connected to the pins through a guide wire; S4: placing the semi-finished semiconductor device obtained in S3 in a mold for injection molding, and injecting the melted package into the mold through a pouring port, wherein the pouring port is arranged on a side close to the guide wire, so that the package can flow along the direction of the guide wire when filling, and remove pores and weld lines. The guide wire expands the gap between the chip, the guide wire, and the frame, so that the package can be better filled in; S5: After the liquid encapsulation body is solidified, the mold is opened and the encapsulated semi-finished semiconductor device is taken out; S6: Cutting off the excess package.

8. The method for manufacturing and packaging a semiconductor device according to claim 7, characterized in that: In S1, the lead frame is a parallel lead frame, and the parallel lead frame includes a plurality of lead frames connected and arranged in parallel, and the lead frames are connected by connecting rods.

9. The method for manufacturing and packaging a semiconductor device according to claim 8, characterized in that: After the injection molding in step S4, the connecting rod extends out of the packaging body, and the packaging body is cut off in step S6.

10. The method for manufacturing and packaging a semiconductor device according to claim 7, characterized in that: The material of the package in S4 is epoxy resin.

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