A method for improving the accuracy of captured signals in a chip tester

Abstract

The present invention relates to the technical field of chip testers, and specifically to a method for improving the accuracy of signal capture in a chip tester. The method is characterized in that it includes the following steps: S1, taking an ideal change point; S2, taking a sample point, performing a detection scan on each sample point and the ideal change point respectively, and recording each detection scan result; S3, repeating step S2 multiple times; S4, establishing a statistical data model; S5, obtaining a real change point; S6, repeating steps S2-S5; S7, calculating the overall deviation time ∆t of the signal; S8, compensating the overall deviation time ∆t at the signal input end. Compared with the prior art, all points within a time period are taken, and all points are scanned multiple times at multiple points to obtain the positions of several real points, and then the average of several real points is taken to cover the changes of the signal at various positions within a period, fully considering the distribution of the signal, obtaining the precise position of the signal change for compensation, thereby improving the signal capture accuracy.

Description

Technical Field

[0001] The invention relates to the technical field of chip testers, in particular to a method for improving the accuracy of captured signals in a chip tester. Background Art

[0002] Since the paths of each channel of the chip tester are different, the time it takes for the signal to arrive at the end of the channel will be different. Therefore, the slower transmitted signal needs to be compensated to ensure that the time it takes for the signal to arrive at the end of the channel remains consistent. This compensation needs to accurately capture the position of the signal change, but due to the uncertainty of the signal, there will be deviations every time the signal is captured. Figure 1 As shown in , when the signal rises or falls, the ideal signal is a straight line. However, the actual signal, such as Figure 2 As shown in the figure, in actual applications, there will be deviations every time the signal changes, which will cause accuracy problems when high repeatability is required. There are two main reasons why there will be deviations every time the signal changes in the chip tester. First, due to the limitations of the device accuracy inside the chip tester's FPGA and on the transmission line, the signal actually jitters within a range. This factor is a circuit characteristic and is difficult to eliminate. Second, since the minimum unit of the chip tester to generate a signal is a fixed value of 100ps, the time it generates the signal is discontinuous. For example, ideally, it can generate 10ns, 10.1ns, 10.2ns, which are multiples of 100ps, but it cannot generate 10.05ns, 10.15ns, 10.25ns. Rising or falling edges. And due to the accuracy limitations of the hardware, 100ps itself is also a variable. The chip tester system clock is 2ns, and the signal needs to take 20 steps in a 2ns cycle. These 20 steps are different for each step of the signal due to the uncertainty of the minimum unit.

[0003] The current traditional method is generally to take the average value, but the average value ignores the distribution of each signal. The signal obtained in this way is not optimal, and the position accuracy of capturing signal changes is low.

[0004] When capturing a signal, if any measurement result is used as the actual signal for processing, it will inevitably cause deviations. This is because it is only a measurement result. If it is measured at another location and time, it will be a different result. If the signal is captured randomly and compensated without optimization, when changing different test points to repeat the test, the time edge placement accuracy (hereinafter referred to as EPA) can only be + / -300Ps, and with simple average processing, the EPA can only reach + / -200ps, and the signal stability is poor.

[0005] Therefore, a method for improving the accuracy of signal capture in a chip tester is designed. All points within a time period are taken, and multi-point and multiple scans are performed on all points to obtain the positions of several real points. Several real points are then averaged to cover the changes of signals at various positions within a period. The distribution of signals is fully considered, and the precise position of signal changes is obtained for compensation, thereby improving the signal capture accuracy. Summary of the invention

[0006] In order to overcome the shortcomings of the prior art, the present invention provides a method for improving the accuracy of signal capture in a chip tester. All points within a time period are taken, and all points are scanned multiple times at multiple points to obtain the positions of several real points. The several real points are then averaged to cover the changes of the signal at various positions within a period. The distribution of the signal is fully considered, and the precise position of the signal change is obtained for compensation, thereby improving the signal capture accuracy.

[0007] In order to achieve the above object, a method for improving the accuracy of captured signals in a chip tester is designed, which is characterized by comprising the following steps:

[0008] S1, take 21 points at 100ps interval as the ideal change point P of the signal change n ;

[0009] S2, taking the ideal change point P1 as the center, select 5 time points at 100ps intervals before and after as sample points, perform detection scans on each sample point and the ideal change point P1, and record the results of each detection scan. If a signal change is detected, it is recorded as P, and if no signal change is detected, it is recorded as F;

[0010] S3, repeating the detection scan of step S2 for each sample point and the ideal change point P1 multiple times, and recording the detection scan result of each detection scan;

[0011] S4, establishing a statistical data model according to the scanning results, wherein the vertical columns of the statistical data model are sorted according to the time sequence of each sample point and the ideal change point P1, and the horizontal columns are sorted according to the order in which the signal changes are found in the scanning;

[0012] S5, obtaining a real change point V1 of the signal change of the ideal change point P1 according to the position of the signal change in the statistical data model;

[0013] S6, repeat steps S2-S5 to obtain the real change points V of 21 ideal change points n ;

[0014] S7, according to the ideal change point P n and the real change point V n Calculate the overall deviation time ∆t of the signal;

[0015] S8, compensating the overall deviation time ∆t at the signal input end of the chip tester;

[0016] The method for obtaining the real change point V1 of the signal change in step S5 is specifically as follows:

[0017] If the position of the signal change point is consistent in multiple detection scans, then this point is taken as the true change point V1 of the signal change; if the signal change point appears in multiple positions in multiple detection scans, then the point with the largest number of occurrences is taken as the true change point V1 of the signal change.

[0018] The number of repeated detection scans in step S3 is 99 times.

[0019] The calculation formula of the overall deviation time ∆t in step S7 is: .

[0020] Compared with the prior art, the present invention takes all points within a time period, and performs multi-point and multiple scans on all points to obtain the positions of several real points, and then averages the several real points to cover the changes of the signal at various positions within a period, fully considers the distribution of the signal, obtains the precise position of the signal change for compensation, thereby improving the signal capture accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a schematic diagram of the ideal signal changes in a chip tester.

[0022] Figure 2 This is a schematic diagram of the actual signal changes in the chip tester.

[0023] Figure 3 This is the data statistical model obtained in step S4 of the first embodiment of the present invention.

[0024] Figure 4 This is a table diagram of ideal change points and actual change points in step S6 of the first embodiment of the present invention. DETAILED DESCRIPTION

[0025] Embodiment 1:

[0026] This embodiment is a method for improving the accuracy of captured signals in a chip tester, which specifically includes the following steps:

[0027] S1, take 21 points at 100ps interval as the ideal change point P of the signal change n , respectively P1 = 10ns, P2 = 10.1ns, P3 = 10.2ns, P4 = 10.3ns, P5 = 10.4ns, P6 = 10.5ns, P7 = 10.6ns, P8 = 10.7ns, P9 = 10.8ns, P10 =10.9ns, P 11 =11ns, P 12 =11.1ns, P 13 =11.2ns, P 14 =11.3ns, P 15 =11.4ns, P 16 =11.5ns, P 17 =11.6ns, P 18 =11.7ns, P 19 =11.8ns, P 20 =11.9ns, P 21 =12ns;

[0028] S2, taking the ideal change point P110ns as the center, select 5 time points with a time interval of 100ps before and after as sample points, namely 9.5ns, 9.6ns, 9.7ns, 9.8ns, 9.9ns, 10.1ns, 10.2ns, 10.3ns, 10.4ns, and 10.5ns. Perform detection scans on each sample point and the ideal change point P110ns respectively, and record the detection scan results. Detected signal change is recorded as P, and no signal change is recorded as F;

[0029] S3, perform 99 detection scans on the ideal change point P1 and 10 sample points, and obtain 11 scan results each time;

[0030] S4, a statistical data model is established according to the scanning results. The vertical columns of the statistical data model are sorted according to the time sequence of the ideal change point P1 and the 10 sample points, and the horizontal columns are sorted according to the order in which the signal changes are found during scanning. The obtained statistical data model is as follows: Figure 3 shown.

[0031] S5, in the obtained statistical data model, it can be seen that the signal has changed at a certain point. Figure 3 It can be seen that the signal change point appears in multiple positions, so the point with the largest number of occurrences, 10.1ns, is taken as the real change point V1 of the signal change.

[0032] S6, repeat steps S2-S5 to obtain the real change points V of 21 ideal change points n , respectively V2=9.9, V3=10, V4=9.7, V5=10.2, V6=10.3, V7=10.4, V8=10.4, V9=10.5, V 10 =10.6, V 11 =10.7, V 12 =10.8, V 13 =10.9, V14 =11, V 15 =11.2, V 16 =11.3, V 17 =11.4, V 18 =11.5, V 19 =11.5, V 20 =11.6, V 21 =11.7, e.g. Figure 4 shown.

[0033] S7, according to the ideal change point P n and the real change point V n Calculate the overall deviation time ∆t of the signal, ;

[0034] S8, compensating the overall deviation time ∆t at the signal input end of the chip tester.

[0035] In step S1, the minimum unit of the chip tester signal is 100ps, and the signal has a period of 2ns, so 21 points can cover the positions where the signal appears in the entire period. This embodiment selects 21 points between 10-12ns to cover all positions where the signal appears in a signal period.

[0036] In step S2, 5 points are selected on each side because 10*100ps=1ns completely covers the possible range of the current signal change. In this step, the comparison unit of the channel in the chip tester is used to detect whether the signal rises at each of the 11 time points.

[0037] In step S4, the columns of the statistical data model are sorted according to the order in which the signal changes are detected by scanning, rather than according to the time order of the detection scan. Figure 3 In the example, the first detection scan found that the level change position was at 10.1ns, while the second detection scan found that the level change position was at 9.9ns. In the statistical data model, the result of the second detection scan should be arranged in the previous row of the first detection scan to facilitate the establishment of the statistical data model.

[0038] In step S5, if the position of the signal change point is consistent in multiple detection scans, then this point is taken as the real change point V of the signal change. n .

[0039] In step S6, in actual application, the signal may appear at any time step position within a cycle, and the probability of appearing at any time step is equal. Therefore, in order to meet the requirement of minimum position deviation of 21 steps, the time deviation of each point is averaged as the compensation value of the time signal deviation in the channel.

[0040] After compensating the overall deviation time ∆t in step S8, the EPA of the channel of the chip tester is tested, and the measured EPA is + / -120ps. Compared with the simple average processing of the traditional method, the signal capture accuracy is improved.

[0041] The present invention takes all points within a time period, and performs multi-point and multiple scans on all points to obtain the positions of several real points, and then averages the several real points to cover the changes of signals at various positions within a period, fully considering the distribution of the signal, obtaining the precise position of the signal change for compensation, thereby improving the signal capture accuracy.

Claims

1. A method for improving the accuracy of captured signals in a chip tester, characterized in that The steps include: S1, take 21 points at a time interval of 100ps as the ideal change point Pn of the signal change; S2, taking the ideal change point P1 as the center, select 5 time points at 100ps intervals before and after as sample points, perform detection scans on each sample point and the ideal change point P1, and record the results of each detection scan. If a signal change is detected, it is recorded as P, and if no signal change is detected, it is recorded as F; S3, repeating the detection scan of step S2 for each sample point and the ideal change point P1 multiple times, and recording the detection scan result of each detection scan; S4, establishing a statistical data model according to the scanning results, wherein the vertical columns of the statistical data model are sorted according to the time sequence of each sample point and the ideal change point P1, and the horizontal columns are sorted according to the order in which the signal changes are found in the scanning; S5, obtaining a real change point V1 of the signal change of the ideal change point P1 according to the position of the signal change in the statistical data model; S6, repeating steps S2-S5 to obtain the real change points Vn of 21 ideal change points; S7, calculating the overall deviation time ∆t of the signal according to the ideal change point Pn and the real change point Vn; S8, compensating the overall deviation time ∆t at the signal input end of the chip tester; The method for obtaining the real change point V1 of the signal change in step S5 is specifically as follows: If the position of the signal change point is consistent in multiple detection scans, then this point is taken as the real change point V1 of the signal change; if the signal change point appears in multiple positions in multiple detection scans, then the point with the largest number of occurrences is taken as the real change point V1 of the signal change; the number of repeated detection scans in step S3 is 99 times; the calculation formula of the overall deviation time ∆t in step S7 is: .

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