Wafer overlay measurement method, device, storage medium and electronic equipment

Abstract

The embodiment of the present invention provides a wafer overlay measurement method, device, storage medium and electronic device. In the embodiment of the present invention, the abnormal target is first determined according to the first data of the wafer in the first state, and then the second data of the abnormal target is obtained, and the detection result of the abnormal target is obtained according to the first data and the second data. Thus, only the first data of most targets and the first data and the second data of a small number of targets can be obtained to determine the detection results of each target in the wafer. The measurement efficiency can be improved while ensuring the measurement accuracy.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer overlay measurement method, device, storage medium and electronic equipment. Background Art

[0002] With the continuous development of semiconductor manufacturing technology, the integration of semiconductor devices is getting higher and higher, and the characteristic size of semiconductor devices is gradually shrinking. However, the production efficiency of semiconductor devices still needs to be improved. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides a wafer overlay measurement method to improve the production efficiency of semiconductor devices.

[0004] In a first aspect, an embodiment of the present invention provides a wafer overlay measurement method, the method comprising:

[0005] Acquire first data of each target of the current layer of the wafer in a first state; in response to the existence of an abnormal target with abnormal first data, acquire second data of the abnormal target of the current layer of the wafer in a second state; determine a measurement result based on the first data and the second data; wherein the first data and the second data are respectively used to characterize pattern information of the current layer of the wafer in different states; the target is an area used to form a chip unit.

[0006] Optionally, acquiring second data of an abnormal target in the second state of the current layer of the wafer includes: acquiring position coordinates of the abnormal target; rotating the wafer by a predetermined angle; and acquiring the second data of the abnormal target according to the position coordinates of the abnormal target.

[0007] Optionally, rotating the wafer by a predetermined angle is specifically rotating the wafer 180 degrees around the center of the wafer.

[0008] Optionally, the first data and the second data are the pattern of the current layer of the wafer; or the first data and the second data are light intensity information corresponding to the pattern of the current layer of the wafer.

[0009] Optionally, after acquiring first data of each target on the wafer in the first state of the current layer of the wafer, and before acquiring second data of abnormal targets in the second state of the current layer of the wafer, the method also includes: determining whether there is an abnormal target based on a fitting model and the first data, and the fitting model is predetermined based on a previous layer pattern and a current layer pattern.

[0010] Optionally, determining whether there is an abnormal target based on the fitting model and the first data specifically includes: in response to an error between the first data and the fitting model being greater than a predetermined value, determining that the target is an abnormal target.

[0011] Optionally, the first data is light intensity information corresponding to the pattern of the current layer of the wafer; the error between the first data and the fitting model is greater than a predetermined value, specifically: the difference between the light intensity of the coordinate in the first data and the light intensity of the coordinate corresponding to the fitting model is greater than a first threshold.

[0012] Optionally, the first data is the pattern of the current layer of the wafer; the error between the first data and the fitting model is greater than a predetermined value, specifically: the difference between the size of the pattern of the current layer in the first data and the size of the pattern of the fitting model is greater than a second threshold.

[0013] Optionally, the wafer in the second state is rotated around the center of the wafer by a predetermined angle relative to the wafer in the first state.

[0014] Optionally, determining the measurement result according to the first data and the second data is specifically:

[0015] The measurement result of the target whose first data and second data are both abnormal is determined to be unqualified.

[0016] In a second aspect, an embodiment of the present invention provides a wafer overlay measurement device, the device comprising: a first data acquisition unit, used to acquire first data of each target of the current layer of the wafer in a first state; a second data acquisition unit, used to acquire second data of abnormal targets of the current layer of the wafer in a second state in response to the existence of abnormal targets with abnormalities in the first data; a measurement result determination unit, used to determine a measurement result based on the first data and the second data; wherein the first data and the second data are respectively used to characterize pattern information of the current layer of the wafer in different states; the target is an area used to form a chip unit.

[0017] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer program instructions, wherein the computer program instructions implement the method described in the first aspect when executed by a processor.

[0018] In a fourth aspect, an embodiment of the present invention provides an electronic device, comprising a memory and a processor, the memory being used to store one or more computer program instructions, wherein the one or more computer program instructions are executed by the processor in the following steps: obtaining first data of each target of a current layer of a wafer in a first state; in response to the existence of an abnormal target that is abnormal to the first data, obtaining second data of an abnormal target of the current layer of the wafer in a second state; determining a measurement result based on the first data and the second data; wherein the first data and the second data are respectively used to characterize pattern information of the current layer of the wafer in different states; the target is an area used to form a chip unit.

[0019] In an embodiment of the present invention, an abnormal target is first determined based on the first data of the wafer in the first state, and then the second data of the abnormal target is obtained, and the detection result of the abnormal target is obtained based on the first data and the second data. Thus, only the first data of most targets and the first data and the second data of a small number of targets can be obtained to determine the detection result of each target in the wafer. The measurement efficiency can be improved while ensuring the measurement accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0021] Figure 1 This is a photo of the wafer measurement results for the first comparison;

[0022] Figure 2 is a schematic diagram of wafer partitioning of the third comparison ratio;

[0023] Figure 3 is a flow chart of a wafer overlay measurement method according to a first embodiment of the present invention;

[0024] Figure 4-Figure 6 is a schematic diagram of each step of a wafer overlay measurement method according to an embodiment of the present invention;

[0025] Figure 7 is a flow chart of a wafer overlay measurement method according to a first embodiment of the present invention;

[0026] Figure 8 is a schematic diagram of a wafer overlay measurement device according to a second embodiment of the present invention;

[0027] Fig. 9 is a schematic diagram of an electronic device according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0028] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0029] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0030] Unless the context clearly requires otherwise, words such as “include”, “including” and the like in the application documents should be interpreted as including rather than exclusive or exhaustive; that is, as meaning “including but not limited to”.

[0031] In the description of this application document, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" is two or more.

[0032] Semiconductor devices are electronic devices with conductivity between good conductors and insulators. They use the special electrical properties of semiconductor materials to complete specific functions. They can be used to generate, control, receive, transform, amplify signals and perform energy conversion. Photolithography is an important step in the semiconductor device manufacturing process. This step uses exposure and development to depict geometric structure on the photoresist layer, and then transfers the pattern on the photomask to the substrate through an etching process. The photolithography process specifically includes the steps of photoresist coating, photoresist baking, alignment, exposure and development. Alignment is an important step before exposure. Alignment refers to the process of determining the position of the reference layer pattern on the wafer and adjusting the exposure system so that the currently exposed pattern accurately overlaps with the pattern on the wafer. The alignment operation is completed by the alignment system in the photolithography machine. The accuracy of overlay (OVL) is a parameter to measure the alignment quality. It directly and quantitatively describes the position deviation between the current layer and the reference layer. If the overlay error of the photolithography exceeds the error tolerance between the current layer and the previous layer, the circuit between the two layers may be broken or short-circuited due to the error, thereby affecting the yield and performance of semiconductor manufacturing products. How to accurately and efficiently measure lithography patterns has become an urgent problem to be solved.

[0033] In the first comparative example, the wafer is measured once at 0 degrees and 180 degrees to obtain a measurement error (Tool Induce Shift, TIS), and the measurement value is obtained by eliminating the measurement error. The measurement method of this comparative example has good accuracy, but low measurement efficiency.

[0034] In the second comparison, in order to further improve the measurement speed, only 0 degrees is measured. Compared with the first comparison, the measurement time can be reduced by nearly 50%. By classifying the data into different types for calibration, and at the same time controlling the applicability of the original data to the calibration model, some measurement points are reported as errors because they exceed the control standard. These error points are considered to be measurement abnormalities / invalid points, and cannot receive values ​​normally and perform subsequent feedback actions. Figure 1 As shown, the dark area outside the wafer is the error point. Although the measurement method of this comparative example can improve the measurement efficiency, it will reduce the measurement accuracy because it only measures 0 degrees.

[0035] In the third comparative example, different regions are divided in the wafer, and different measurement schemes are used in different regions. Figure 2 As shown in the figure, the first comparison method is used for the dark area on the periphery of the wafer, and the second comparison method is used for the light area in the middle of the wafer. Compared with the first comparison method, the measurement speed is increased by 25%. However, the partitioning method is not very accurate because there are also abnormal points in the middle area of ​​the wafer, which will lead to insufficient measurement accuracy.

[0036] In view of this, in order to take into account both the accuracy and efficiency of measurement, the first embodiment of the present invention provides a wafer overlay measurement method, which can improve the efficiency of measurement without reducing the accuracy of measurement. It should be understood that the method of the embodiment of the present invention is applicable to wafer overlay measurement of various technology nodes, including but not limited to technology nodes above 130nm, 90nm, 65 / 55nm, 45 / 40nm, 32 / 28nm, 22 / 20nm, 16 / 14nm and below 10nm.

[0037] The method of the embodiment of the present invention is applicable to different measurement machines, including but not limited to measurement machines based on imaging base overlay (IBO) measurement method and diffraction base overlay (DBO) measurement method.

[0038] Figure 3 FIG. 1 is a flow chart of a wafer overlay measurement method according to a first embodiment of the present invention. Figure 3 As shown, the wafer overlay measurement method according to the embodiment of the present invention comprises the following steps:

[0039] Step S100: Acquire first data of each target of the current layer of the wafer in the first state.

[0040] Step S200: In response to the existence of an abnormal target with the first data abnormality, obtaining second data of the abnormal target in the second state of the current layer of the wafer.

[0041] Step S300: determining a measurement result according to the first data and the second data.

[0042] In an optional implementation, after step S100 and before step S200, the method of the embodiment of the present invention further includes:

[0043] Step S200a: determining whether there is an abnormal target according to a fitting model and the first data, wherein the fitting model is predetermined according to a previous layer pattern and a current layer pattern.

[0044] Figure 4-Figure 6 is a schematic diagram of each step of the measurement method according to an embodiment of the present invention.

[0045] like Figure 4 As shown, in step S100, first data of each target of the current layer of the wafer in the first state is obtained.

[0046] The first data is used to represent pattern information of a current layer of the wafer when the wafer is at 0 degrees.

[0047] Specifically, the first data is obtained by an OVL measurement machine. The OVL measurement machine may include a stepper and a detection device, which is used to obtain the first data of each target of the wafer one by one. The detection device may include a position sensor or an optical sensor.

[0048] When the wafer is at 0 degrees, it is the initial position of the wafer. The initial position of the wafer can be determined based on the position of the overlay mark or notch.

[0049] The target is an area used to form a chip unit. Specifically, the target is such as Figure 4 A square area in the wafer shown. The chip unit may be an intermediate structure of the chip. It may include active devices, passive devices, and circuits formed by multiple semiconductor layers or metal layers. Furthermore, the active devices and passive devices in the semiconductor substrate may be capacitors, inductors, resistors, and various transistors.

[0050] The wafer current layer may be a photoresist layer formed by an exposure and development process, and the photoresist layer has a pattern. It is used as a mask for subsequent etching of the front layer. Therefore, it is necessary to ensure that the shape and position of the photoresist layer actually formed are within a predetermined range to avoid a circuit break or short circuit between the two layers due to an error.

[0051] The first data is used to characterize the pattern information of the current layer of the wafer at 0 degrees. Depending on the detection device in the OVL measurement machine used, the first data can be the pattern of the current layer of the wafer or the light intensity information corresponding to the pattern of the current layer of the wafer. Specifically, the first data can reflect the maximum value, minimum value, average value and variance of the line width in the current layer pattern.

[0052] In an optional implementation, the detection device in the OVL measurement machine includes an illumination system and a light intensity detector, which uses the principle of light diffraction to determine the correspondence between light intensity and the pattern of the current layer, and determines the information of the pattern of the current layer by acquiring the light intensity.

[0053] In an optional implementation, the detection device in the OVL measurement machine includes a position sensor or an imaging system, etc., which can directly obtain the shape and size of the pattern of the current layer by the reflection pattern.

[0054] like Figure 4 As shown, in step S200a, it is determined whether there is an abnormal target 1 based on the fitting model and the first data, and the fitting model is predetermined based on the previous layer pattern and the current layer pattern.

[0055] Specifically, the fitting model is different in different types of OVL machines. Optionally, the fitting model can be a pattern of an ideal current layer to be formed according to optical approximation correction, and a pattern determined by a reasonable error range. It can also be a set of a series of coordinate points determined according to the corresponding relationship between the pattern and the light intensity, and each coordinate point corresponds to different light intensity data.

[0056] Specifically, in response to an error between the first data and the fitting model being greater than a predetermined value, the target is determined to be an abnormal target.

[0057] In an optional implementation, the machine uses the principle of light diffraction to obtain the first data, and the first data is the light intensity information corresponding to the pattern of the current layer of the wafer. Correspondingly, the fitting model is a set of coordinate points containing light intensity information. The error between the first data and the fitting model is greater than a predetermined value, specifically, the difference between the light intensity of the coordinate in the first data and the light intensity of the coordinate corresponding to the fitting model is greater than a first threshold. Specifically, the first threshold is the maximum difference that does not cause the chip unit to fail.

[0058] In an optional implementation, the machine uses the principle of reflected light and uses a position sensor or an imaging system to obtain the first data. The first data is the pattern of the current layer of the wafer. Correspondingly, the error between the first data and the fitting model is greater than a predetermined value, specifically, the difference between the size of the pattern of the current layer in the first data and the size of the pattern of the fitting model is greater than a second threshold. Specifically, the second threshold is the maximum difference that does not cause the chip unit to fail.

[0059] like Figure 4 As shown, in step S200, in response to the existence of an abnormal target with the first data abnormality, second data of the abnormal target in the second state of the current layer of the wafer is obtained.

[0060] refer to Figure 5 The step of obtaining the second data of the abnormal target of the current layer of the wafer in the second state comprises the following steps:

[0061] Step S201, obtaining the position coordinates of the abnormal target.

[0062] Step S202: rotating the wafer by a predetermined angle.

[0063] Step S203: Acquire second data of the abnormal target according to the position coordinates of the abnormal target.

[0064] In step S201, the position coordinates of the abnormal target 1 are obtained.

[0065] refer to Figure 6 In step S202, the wafer is rotated by a predetermined angle.

[0066] The wafer is rotated by a predetermined angle specifically by a predetermined angle around the center of the wafer, thereby placing the wafer in the second state. That is, the wafer in the second state is rotated by a predetermined angle around the center of the wafer relative to the wafer in the first state. The predetermined angle may be 45 degrees, 90 degrees, or 180 degrees, etc. In an optional implementation, the predetermined angle is 180 degrees.

[0067] The wafer is rotated by a predetermined angle to obtain pattern information of abnormal targets under different states, thereby reducing measurement errors.

[0068] In step S203, second data of the abnormal target is acquired according to the position coordinates of the abnormal target.

[0069] Specifically, the second data is used to characterize the pattern information of the current layer of the wafer in the second state. The method for obtaining the second data can refer to the method for obtaining the first data, which will not be described in detail here.

[0070] Only the second data of the abnormal target determined according to the first data is obtained, which can improve the measurement efficiency and ensure the measurement accuracy.

[0071] Optionally, when the number of abnormal targets is 10% of all targets, compared with the first comparative example, the measurement time of this embodiment is (100%+10%) / (100%+100%) of the first comparative example, that is, 55%, which improves the measurement efficiency. At the same time, compared with the second comparative example and the third comparative example, each abnormal target is measured twice, which improves the measurement accuracy.

[0072] In step S300, a measurement result is determined according to the first data and the second data.

[0073] The measurement result specifically refers to whether the target is qualified. That is, whether the photoresist pattern of the current layer meets the process requirements, and whether the subsequent etching using the photoresist pattern of the current layer will cause the chip unit to fail. Specifically, the measurement result determined based on the first data, the second data, and the error of the machine determines whether the current layer pattern of the abnormal target is qualified. Further, for the abnormal target, the measurement result of the abnormal target is determined based on the first data, the second data, and the error of the machine. For the target that is not abnormal, the measurement result of the target is determined based on the first data and the error of the machine.

[0074] In an optional implementation, the measurement result of the target with abnormal first data and abnormal second data is determined to be unqualified. That is, if the difference between the size of the first data and the second data of a target and the pattern of the fitting model is greater than a predetermined threshold at the same time, the target is determined to be an unqualified target. The predetermined threshold is determined based on the machine error. That is, the detection results of the abnormal target in the first state and the second state have a large deviation from the predetermined threshold.

[0075] In another optional implementation, it is determined that the measurement result of the target whose first data is abnormal and whose second data is normal is qualified.

[0076] In other optional implementations, the first data or the second data may be input into a mathematical model, and the mathematical model may be used to determine whether the measurement result of the target is qualified or unqualified.

[0077] In the subsequent process, the proportion of qualified targets on the wafer determines whether to reform the current layer or to advance the wafer to the next process.

[0078] In an embodiment of the present invention, an abnormal target is first determined based on the first data of the wafer in the first state, and then the second data of the abnormal target is obtained, and the detection result of the abnormal target is obtained based on the first data and the second data. Thus, only the first data of most targets and the first data and the second data of a small number of targets can be obtained to determine the detection result of each target in the wafer. The measurement efficiency can be improved while ensuring the measurement accuracy.

[0079] Figure 7 FIG. 1 is a flow chart of a wafer overlay measurement method according to a first embodiment of the present invention. Figure 7 As shown, the wafer overlay measurement method of this embodiment includes the following steps:

[0080] Step S701, obtaining first data of each target in the first state of the current layer of the wafer.

[0081] Specifically, please refer to step S100, which will not be described in detail here.

[0082] Step S702: Determine whether there is an abnormal target.

[0083] Specifically, it is determined whether there is an abnormal target according to the fitting model and the first data, wherein the fitting model is predetermined according to the previous layer pattern and the current layer pattern. Please refer to step S200a, which will not be described in detail here.

[0084] Step S703 : in response to the existence of an abnormal target with the first data abnormality, obtaining second data of the abnormal target in the second state of the current layer of the wafer.

[0085] Specifically, please refer to step S200, which will not be described in detail here.

[0086] Step S704: determine a measurement result based on the first data and the second data.

[0087] Specifically, please refer to step S300, which will not be described in detail here.

[0088] Step S705: In response to the absence of an abnormal target with the first data being abnormal, determining a measurement result according to the first data.

[0089] In an optional implementation, the measurement result of the target whose first data is normal is determined to be qualified.

[0090] like Figure 8 As shown, the second embodiment of the present invention provides a wafer overlay measurement device. The device of the second embodiment of the present invention comprises: a first data acquisition unit 801, a second data acquisition unit 802 and a measurement result determination unit 803.

[0091] The first data acquisition unit 801 is used to acquire first data of each target of the current layer of the wafer in the first state.

[0092] The second data acquisition unit 802 is used for acquiring second data of an abnormal target of a current layer of the wafer in a second state in response to the abnormal target having the first data abnormality.

[0093] The measurement result determination unit 803 is used to determine the measurement result according to the first data and the second data.

[0094] The first data and the second data are respectively used to represent pattern information of the current layer of the wafer in different states.

[0095] The target is an area for forming one chip unit.

[0096] Fig. 9 is a schematic diagram of an electronic device according to a third embodiment of the present invention. Fig. 9The electronic device shown is a general data processing device, which includes a general computer hardware structure, which includes at least a processor 91 and a memory 92. The processor 91 and the memory 92 are connected via a bus 93. The memory 92 is suitable for storing instructions or programs executable by the processor 91. The processor 91 can be an independent microprocessor or a collection of one or more microprocessors. Thus, the processor 91 executes the commands stored in the memory 92, thereby executing the method flow of the embodiment of the present invention as described above to realize the processing of data and the control of other devices. The bus 93 connects the above-mentioned multiple components together, and at the same time connects the above-mentioned components to the display controller 94 and the display device and the input / output (I / O) device 95. The input / output (I / O) device 95 can be a mouse, a keyboard, a modem, a network interface, a touch input device, a somatosensory input device, a printer, and other devices known in the art. Typically, the input / output (I / O) device 95 is connected to the system via an input / output (I / O) controller 96.

[0097] The memory 92 may store software components such as an operating system, a communication module, an interaction module, and an application program. Each of the modules and applications described above corresponds to a set of executable program instructions that implement one or more functions and methods described in the embodiments of the invention.

[0098] The above-mentioned flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present invention describes various aspects of the present invention.It should be understood that each block of the flowchart and / or block diagram and the combination of the blocks in the flowchart legend and / or block diagram can be implemented by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that (via the processor of a computer or other programmable data processing device) instructions are created to implement the device for the function / action specified in the flowchart and / or block diagram block or block.

[0099] A fourth embodiment of the present invention relates to a non-volatile storage medium for storing a computer-readable program, wherein the computer-readable program is used for a computer to execute part or all of the above method embodiments, thereby having corresponding beneficial effects.

[0100] At the same time, as will be appreciated by those skilled in the art, various aspects of the embodiments of the present invention may be implemented as a system, method or computer program product. Therefore, various aspects of the embodiments of the present invention may take the following forms: a complete hardware implementation, a complete software implementation (including firmware, resident software, microcode, etc.) or an implementation that combines software aspects with hardware aspects, which may generally be referred to herein as a "circuit", "module" or "system". In addition, aspects disclosed in the present invention may take the following forms: a computer program product implemented in one or more computer-readable media, the computer-readable media having a computer-readable program code implemented thereon.

[0101] Any combination of one or more computer-readable media can be utilized. Computer-readable media can be computer-readable signal media or computer-readable storage media. Computer-readable storage media can be, for example, (but not limited to) electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or apparatuses, or any suitable combination of the foregoing. More specific examples (non-exhaustive enumeration) of computer-readable storage media will include the following: an electrical connection with one or more wires, a portable computer floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of an embodiment of the present invention, a computer-readable storage medium can be any tangible medium that can contain or store a program used by an instruction execution system, device or apparatus or a program used in conjunction with an instruction execution system, device or apparatus.

[0102] A computer readable signal medium may include a propagated data signal having a computer readable program code implemented therein, such as in baseband or as part of a carrier wave. Such propagated signals may take any of a variety of forms, including but not limited to electromagnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any of the following computer readable media: not a computer readable storage medium, and may communicate, propagate, or transmit a program used by or in conjunction with an instruction execution system, device, or apparatus.

[0103] The computer program code for performing the operations for various aspects of the present disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, Smalltalk, C++, PHP, Python, etc.; and conventional process programming languages ​​such as "C" programming language or similar programming languages. The program code can be executed completely on the user's computer, partially on the user's computer as a stand-alone software package; partially on the user's computer and partially on a remote computer; or completely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any type of network including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., by using the Internet of an Internet service provider).

[0104] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A wafer overlay measurement method, characterized in that: The method comprises: Acquire first data of each target of the current layer of the wafer in the first state; In response to the presence of an abnormal target with the first data abnormality, acquiring second data of the abnormal target in the second state of the current layer of the wafer; and Determine a measurement result according to the first data and the second data; Wherein, the first data and the second data are respectively used to characterize the pattern information of the current layer of the wafer in different states; The target is an area used to form a chip unit; Wherein, the first state is used to characterize the state of the wafer at the initial position; The wafer in the second state is rotated by a predetermined angle around the center of the wafer relative to the wafer in the first state; The first data anomaly and the second data anomaly specifically include light intensity information anomaly and / or current layer pattern anomaly.

2. The wafer overlay measurement method according to claim 1, characterized in that: The acquiring second data of an abnormal target of the current layer of the wafer in the second state comprises: Obtaining the position coordinates of the abnormal target; rotating the wafer by a predetermined angle; and The second data of the abnormal target is acquired according to the position coordinates of the abnormal target.

3. The wafer overlay measurement method according to claim 2, characterized in that: The step of rotating the wafer by a predetermined angle specifically includes rotating the wafer 180 degrees around the center of the wafer.

4. The wafer overlay measurement method according to claim 1, characterized in that: The first data and the second data are patterns of a current layer of the wafer; or The first data and the second data are light intensity information corresponding to a pattern of a current layer of the wafer.

5. The wafer overlay measurement method according to claim 1, characterized in that: After acquiring first data of each target on the wafer in the first state of the current layer of the wafer, and before acquiring second data of the abnormal target on the current layer of the wafer in the second state, the method further includes: It is determined whether there is an abnormal target according to a fitting model and the first data, wherein the fitting model is predetermined according to a previous layer pattern and a current layer pattern.

6. The wafer overlay measurement method according to claim 5, characterized in that: The determining whether there is an abnormal target according to the fitting model and the first data is specifically as follows: In response to an error between the first data and the fitting model being greater than a predetermined value, the target is determined to be an abnormal target.

7. The wafer overlay measurement method according to claim 6, characterized in that: The first data is light intensity information corresponding to the pattern of the current layer of the wafer; the error between the first data and the fitting model is greater than a predetermined value, specifically: A difference between the light intensity of the coordinate in the first data and the light intensity of the coordinate corresponding to the fitting model is greater than a first threshold.

8. The wafer overlay measurement method according to claim 6, characterized in that: The first data is a pattern of a current layer of the wafer; the error between the first data and the fitting model is greater than a predetermined value specifically: A difference between a size of a pattern of a current layer in the first data and a size of a pattern of the fitting model is greater than a second threshold.

9. The wafer overlay measurement method according to claim 1, characterized in that: The determining of the measurement result according to the first data and the second data is specifically: The measurement result of the target whose first data and second data are both abnormal is determined to be unqualified.

10. A wafer overlay measurement device, characterized in that: The device comprises: A first data acquisition unit, used for acquiring first data of each target of the current layer of the wafer in the first state; A second data acquisition unit is configured to acquire second data of an abnormal target in a second state of a current layer of the wafer in response to the abnormal target having the first data abnormality; and a measurement result determining unit, configured to determine a measurement result according to the first data and the second data; Wherein, the first data and the second data are respectively used to characterize the pattern information of the current layer of the wafer in different states; The target is an area used to form a chip unit; Wherein, the first state is used to characterize the state of the wafer at the initial position; The wafer in the second state is rotated by a predetermined angle around the center of the wafer relative to the wafer in the first state; The first data anomaly and the second data anomaly specifically include light intensity information anomaly and / or current layer pattern anomaly.

11. A computer-readable storage medium storing computer program instructions, characterized in that: The computer program instructions, when executed by a processor, implement the method according to any one of claims 1 to 9.

12. An electronic device comprising a memory and a processor, characterized in that: The memory is used to store one or more computer program instructions, wherein the one or more computer program instructions are executed by the processor as follows: Acquire first data of each target of the current layer of the wafer in the first state; In response to the presence of an abnormal target with the first data abnormality, acquiring second data of an abnormal target in a second state of a current layer of the wafer; and Determine a measurement result according to the first data and the second data; Wherein, the first data and the second data are respectively used to characterize the pattern information of the current layer of the wafer in different states; The target is an area used to form a chip unit; Wherein, the first state is used to characterize the state of the wafer at the initial position; The wafer in the second state is rotated by a predetermined angle around the center of the wafer relative to the wafer in the first state; The first data anomaly and the second data anomaly specifically include light intensity information anomaly and / or current layer pattern anomaly.

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