Semiconductor circuit and method for manufacturing semiconductor circuit

Abstract

The invention relates to a semiconductor circuit and a method for preparing the semiconductor circuit, wherein a circuit layer is arranged on a circuit substrate; a circuit frame is provided with an inner cavity, the circuit substrate is arranged in a substrate mounting area, and the circuit layer is close to the opening of the inner cavity; a plurality of pins are respectively arranged in the pin mounting area; the first ends of the plurality of pins are respectively electrically connected to the circuit layer; a filling piece covers the circuit layer connected to the pins and fills the inner cavity; a sealing cover seals the opening of the inner cavity filled with the filling piece; the second end of each pin is respectively led out from the opening of the inner cavity, thereby avoiding welding voids in the pin mounting area and improving product reliability; there is no need to use rib cutting and forming equipment to cut and shape the pins, which simplifies the pin preparation process and does not cause copper leakage due to pin cutting; there is no need to use a step steel mesh with a complex process for printing, which reduces the equipment cost; the inner cavity of the circuit frame is filled with the filling piece, and the opening of the inner cavity is sealed with the sealing cover, and there is no need to use a plastic sealing equipment for plastic sealing, which reduces the preparation cost.

Description

Technical Field

[0001] The invention relates to a semiconductor circuit and a method for preparing the semiconductor circuit, belonging to the technical field of power semiconductor devices. Background Art

[0002] Semiconductor circuit is a power drive product that combines power electronics and integrated circuit technology. Semiconductor circuit integrates power switching devices and high-voltage drive circuits, and has built-in fault detection circuits such as overvoltage, overcurrent and overheating. On the one hand, the semiconductor circuit receives the control signal of the CPU or DSP to drive the subsequent circuit to work, and on the other hand, it sends the system status detection signal back to the CPU or DSP for processing. Compared with traditional discrete solutions, semiconductor circuits have won an increasingly large market with their advantages such as high integration and high reliability. They are especially suitable for frequency converters and various inverter power supplies for driving motors. They are an ideal power electronic device for variable frequency speed regulation, metallurgical machinery, electric traction, servo drive, and variable frequency home appliances. Semiconductor circuits are composed of high-speed and low-power consumption tube cores, optimized gate-level drive circuits, and fast protection circuits. Even if a load accident or improper use occurs, the semiconductor circuit itself can be protected from damage. Semiconductor circuits generally use IGBT as power switching elements, and have built-in current sensors and integrated structures of drive circuits. In the face of market miniaturization and low-cost competition, higher requirements are placed on the high integration and high heat dissipation technology of semiconductor circuits.

[0003] During the implementation process, the inventors found that there are at least the following problems in the traditional technology: in the existing semiconductor circuits, the pin preparation process is cumbersome, and usually cutting and shaping equipment is required to cut and shape the pins. The preparation cost of the semiconductor circuit is high, and copper leakage is easy to occur due to pin cutting, and voids are easy to exist in the pin area welding. Summary of the invention

[0004] Based on this, it is necessary to design and prepare semiconductor circuits in the traditional way. For existing semiconductor circuits, the pin preparation process is cumbersome, and usually a rib cutting and forming device is required to cut and shape the pins. The preparation cost of semiconductor circuits is high, and copper leakage is easily caused by pin cutting, and there is a problem of voids in the pin area welding. Provided is a semiconductor circuit and a method for preparing a semiconductor circuit.

[0005] Specifically, the present invention discloses a semiconductor circuit, comprising:

[0006] A circuit substrate, on which a circuit layer is arranged;

[0007] The circuit frame is provided with an inner cavity, and the inner cavity is provided with a substrate mounting area and a pin mounting area; the circuit substrate is arranged in the substrate mounting area, and the circuit layer is close to the opening of the inner cavity;

[0008] A plurality of pins, wherein the plurality of pins are respectively arranged in the pin installation area; and first ends of the plurality of pins are respectively electrically connected to the circuit layer;

[0009] A filling member, the filling member covers the circuit layer connected to each pin and fills the inner cavity;

[0010] A sealing cover, the sealing cover is sealed at the opening of the inner cavity filled with the filling member;

[0011] The second end of each pin is led out from the opening of the inner cavity respectively.

[0012] Optionally, the substrate installation area is located at the bottom of the inner cavity and is a hollow structure; the substrate installation area is provided with a first limiting frame edge and a second limiting frame edge; the first limiting frame edge and the second limiting frame edge are arranged opposite to each other.

[0013] Optionally, a plurality of first card slots are provided on the edge of the first limiting frame, and a second card slot corresponding to the first card slot is provided on the inner cavity side wall close to the first limiting frame edge; each first card slot is connected with each second card slot in a one-to-one correspondence; a plurality of third card slots are provided on the edge of the second limiting frame, and a fourth card slot corresponding to the third card slot is provided on the inner cavity side wall close to the second limiting frame edge; each third card slot is connected with each fourth card slot in a one-to-one correspondence; a pin installation area is formed between each first card slot and each second card slot, and between each third card slot and each fourth card slot.

[0014] Optionally, the pin includes a first pin segment and a second pin segment connected to the first pin segment; the first card slot and the third card slot are respectively used to accommodate the corresponding first pin segment, and the second card slot and the fourth card slot are respectively used to accommodate the corresponding second pin segment.

[0015] Optionally, each first pin segment is connected to the circuit layer through a metal wire; the height of each second pin segment is higher than the height of the side wall of the inner cavity, and each second pin segment is led out from the opening of the inner cavity.

[0016] Optionally, the first pin segment is located between the substrate and the filling piece, and the second pin segment is located between the inner cavity side wall and the filling piece.

[0017] Optionally, the first lead segment is arranged perpendicularly to the corresponding second lead segment.

[0018] Optionally, an insulating layer is provided on the circuit substrate, and the insulating layer is located between the circuit substrate and the circuit layer; the circuit layer includes a circuit wiring layer, and circuit elements configured on the circuit wiring layer; the circuit wiring layer is provided on the insulating layer.

[0019] The present invention also discloses a method for preparing the semiconductor circuit, comprising the following steps:

[0020] Providing a circuit substrate and a circuit frame;

[0021] preparing a circuit layer on a circuit substrate;

[0022] A plurality of pins are arranged in the pin mounting area of ​​the circuit frame, a circuit substrate having a circuit layer is fixedly arranged in the substrate mounting area of ​​the circuit frame by an adhesive, and each pin is electrically connected to the circuit layer by a metal wire;

[0023] Injecting a filling member into the inner cavity of a circuit frame provided with a circuit substrate and a plurality of pins, so that the circuit layer connected to each pin is covered with the filling member and the inner cavity is filled with the filling member;

[0024] A sealing cover is arranged on the inner cavity filled with the filling member, so that the sealing cover seals the opening of the inner cavity, and the second end of each pin is led out from the opening of the inner cavity to form a semiconductor circuit.

[0025] Optionally, the step of fixing the circuit substrate having the circuit layer on the substrate mounting area of ​​the circuit frame by an adhesive comprises:

[0026] Applying adhesive to the first limiting frame edge and the second limiting frame edge of the substrate installation area respectively, wherein the first limiting frame edge is arranged opposite to the second limiting frame edge;

[0027] The circuit substrate is placed in the substrate installation area so that the circuit substrate is limited and bonded to the first limiting frame edge and the second limiting frame edge, and the circuit layer faces the opening of the inner cavity. The circuit substrate is fixed on the circuit frame by curing the adhesive.

[0028] One of the above technical solutions has the following advantages and beneficial effects:

[0029] In each embodiment of the semiconductor circuit described above, a circuit layer is arranged on a circuit substrate; a circuit frame is provided with an inner cavity, and the inner cavity is provided with a substrate mounting area and a pin mounting area; the circuit substrate is arranged in the substrate mounting area, and the circuit layer is close to the opening of the inner cavity; a plurality of pins are respectively arranged in the pin mounting area; the first ends of the plurality of pins are respectively electrically connected to the circuit layer; a filler covers the circuit layer connected to each pin and fills the inner cavity; a sealing cover is sealed at the opening of the inner cavity filled with the filler; the second end of each pin is respectively led out from the opening of the inner cavity, thereby avoiding welding voids in the pin mounting area and improving product reliability; there is no need to use rib cutting and forming equipment to cut and shape the pins, which simplifies the pin preparation process and does not cause copper leakage due to pin cutting; there is no need to use a complex step steel mesh for printing, which reduces equipment cost; the inner cavity of the circuit frame is filled with a filler, and the opening of the inner cavity is sealed with a sealing cover, and there is no need to use a plastic sealing equipment for plastic sealing, which reduces the preparation cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic diagram of the structure of the pins of an embodiment of the present invention;

[0031] Figure 2 A schematic diagram of the structure of a circuit frame according to an embodiment of the present invention from a first perspective;

[0032] Figure 3 A schematic diagram of the structure of a circuit frame according to an embodiment of the present invention from a second viewing angle;

[0033] Figure 4 A schematic diagram of the structure of the pins and the circuit frame combined from a first perspective according to an embodiment of the present invention;

[0034] Figure 5 A schematic diagram of the structure of the pins and the circuit frame combined from a second viewing angle according to an embodiment of the present invention;

[0035] Figure 6 is a schematic structural diagram of a circuit substrate according to an embodiment of the present invention;

[0036] Figure 7 A schematic diagram of the structure of the circuit substrate, circuit frame and pin combination according to an embodiment of the present invention;

[0037] Figure 8 is a schematic diagram of the internal structure of a semiconductor circuit according to an embodiment of the present invention;

[0038] Fig. 9 is a schematic structural diagram of a sealing cover according to an embodiment of the present invention;

[0039] Fig.10 It is a schematic diagram of the exploded structure of a semiconductor circuit according to an embodiment of the present invention;

[0040] Fig.11 A schematic diagram of the structure of a semiconductor circuit according to an embodiment of the present invention from a first viewing angle;

[0041] Fig.12 A schematic diagram of the structure of a semiconductor circuit according to an embodiment of the present invention from a second viewing angle;

[0042] Fig.13 for Fig.12 Schematic diagram of the cross-sectional structure along the A-A' direction;

[0043] Fig.14 The figure is a schematic flow chart of a method for manufacturing a semiconductor circuit according to an embodiment of the present invention.

[0044] Reference numerals:

[0045] Semiconductor circuit 10, circuit substrate 100, circuit layer 200, metal wire 220, circuit frame 300, inner cavity 310, first limiting frame edge 320, first card slot 322, second limiting frame edge 330, second card slot 340, pin 400, first pin segment 410, second pin segment 420, filler 500, sealing cover 600. DETAILED DESCRIPTION

[0046] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0047] It should be noted that, in the case where the structures or functions do not conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0048] In order to overcome the above problems of conventional semiconductor circuits, in one embodiment, Figure 1-13 As shown, the present invention proposes a semiconductor circuit 10, which includes a circuit substrate 100, a circuit frame 300, a plurality of pins 400, a filler 500 and a sealing cover 600. A circuit layer 200 is arranged on the circuit substrate 100; the circuit frame 300 is provided with an inner cavity 310, and the inner cavity 310 is provided with a substrate mounting area and a pin 400 mounting area; the circuit substrate 100 is arranged in the substrate mounting area, and the circuit layer 200 is close to the opening of the inner cavity 310; a plurality of pins 400 are respectively arranged in the pin 400 mounting area; the first ends of the plurality of pins 400 are respectively electrically connected to the circuit layer 200; the filler 500 covers the circuit layer 200 connected with each pin 400, and fills the inner cavity 310; the sealing cover 600 is sealed and arranged at the opening of the inner cavity 310 filled with the filler 500; wherein the second end of each pin 400 is respectively led out from the opening of the inner cavity 310.

[0049] Among them, the circuit substrate 100 can be used to carry the high-voltage drive circuit and corresponding components of the entire semiconductor circuit 10. The circuit substrate 100 can be made of metal materials, such as a rectangular plate made of aluminum made of materials such as 1100, 5052, etc., and its thickness is much thicker than other layers, generally 0.8mm to 2mm, and the commonly used thickness is 1.5mm, mainly to achieve the heat conduction and heat dissipation of components such as power devices. For example, the circuit substrate 100 can also be made of other metal materials with good thermal conductivity, for example, it can be a rectangular plate made of copper. It should be noted that the shape of the circuit substrate 100 of the present application is not limited to a rectangular shape, and can also be a circular or trapezoidal shape. A circuit layer 200 is provided on the circuit substrate 100, and internal circuits such as power switching devices and high-voltage drive circuits are provided on the circuit layer 200. The power switching device and the high-voltage drive circuit are electrically connected through bonding metal wires.

[0050] The circuit frame 300 can be prepared by injecting non-metallic materials into a special mold. The circuit frame 300 is provided with an inner cavity 310. The inner cavity 310 is provided with a substrate mounting area and a pin 400 mounting area. The shape of the substrate mounting area is the same as that of the circuit substrate 100. The substrate mounting area is provided with a mounting port. The size of the circuit substrate 100 is larger than the size of the mounting port. In one example, the circuit substrate 100 is bonded to the substrate mounting area by providing an adhesive on the periphery of the mounting port. After the adhesive is cured, the circuit substrate 100 is firmly bonded to the substrate mounting area. In addition, the circuit layer 200 can penetrate the mounting port so that the circuit layer 200 faces the opening of the inner cavity 310. The pin 400 mounting area is arranged on both sides of the substrate mounting area. The pin 400 mounting area is provided with a plurality of pin 400 mounting positions, and the pin 400 mounting positions are in a card slot structure. In one example, the depth of the slot of the pin 400 installation position is greater than or equal to the thickness of the pin 400, so that the pin 400 can be completely inserted and assembled on the pin 400 installation position. It should be noted that the thickness of the circuit frame 300 can be determined according to the height of the internal components on the circuit layer 200, the height of the bonding metal wire arc, the insulation withstand voltage and the creepage distance design requirements. For example, the electrical clearance requires that the size of the circuit frame 300 is generally 3mm to 8mm.

[0051] The pin 400 can be used to transmit signals to the corresponding internal circuit on the circuit substrate 100, and transmit the signals output by the corresponding internal circuit on the circuit layer 200 to the external module. The plurality of pins 400 can be divided into a plurality of low-voltage pins 400 and a plurality of high-voltage pins 400 according to the voltage strength of the transmission signal. The low-voltage pin 400 refers to a pin 400 terminal for transmitting a low-voltage logic control signal, which is used to connect a low-voltage control circuit such as an MCU chip and an IC control circuit; for example, the first end of the low-voltage pin 400 can be electrically connected to the detection circuit or the low-voltage control circuit on the circuit layer 200 through a bonding metal wire, wherein the bonding metal wire can be a metal wire made of gold, aluminum, copper, etc. The high-voltage pin 400 refers to a pin 400 terminal for transmitting a high-voltage power output signal, which is used to connect the high-voltage drive circuit on the circuit layer 200; for example, the first end of the high-voltage pin 400 can be electrically connected to the power switch device and the high-voltage drive circuit on the circuit layer 200 through a bonding metal wire, wherein the bonding metal wire can be a metal wire made of gold, aluminum, copper, etc.

[0052] The material of pin 400 can be C194 (-1 / 2H) sheet (chemical composition: Cu (≧97.0), Fe: 2.4, P: 0.03, Zn: 0.12) or KFC (-1 / 2H) sheet (chemical composition: Cu (≧99.6), Fe: 0.1 (0.05~0.15), P: 0.03 (0.025~0.04)), and 0.5mm C194 or KFC sheet is processed by stamping or etching process, and then the surface is first nickel-plated with a thickness of 0.1-0.5um and then tin-plated with a thickness of 2-5um.

[0053] It should be noted that pin 400 is a discrete pin 400 structure. Pin 400 is set on the pin 400 mounting position of the pin 400 mounting area. The first end of pin 400 is connected to the corresponding components on the circuit layer 200 through a bonding metal wire. The second end of pin 400 is led out from the opening of the inner cavity 310, and the height of the second end of pin 400 is greater than the height of the side wall of the inner cavity 310.

[0054] The filler 500 can be soft silicone (i.e., thermally conductive silicone), which is a high-end thermally conductive compound with the characteristics of not solidifying and not conducting electricity, and can avoid risks such as circuit short circuits. For example, the filler 500 is a thermally conductive adhesive sealing silicone rubber, which is a single-component, thermally conductive, room temperature curing silicone adhesive sealant. Through the condensation reaction of moisture in the air, low molecules are released to cause cross-linking and curing, and vulcanized into a high-performance elastomer, so that the filler 500 has excellent resistance to cold and hot alternation, aging resistance and electrical insulation performance. It also has excellent moisture resistance, shock resistance, corona resistance, leakage resistance and chemical medium resistance. It can be used continuously in a temperature environment of -60 to 280°C, and can maintain the same performance, does not swell, and has good adhesion to most metal and non-metal materials. It can have high bonding performance and super thermal conductivity for electronic components. The sealing cover 600 is made of non-metallic insulating material, and the thickness of the sealing cover 600 can be 0.1mm-1mm. The function of the sealing cover 600 is to seal the filler 500 in the inner cavity 310 of the circuit frame 300 to prevent the filler 500 from leaking. The shape and size of the sealing cover 600 are the same as the shape and size of the opening of the inner cavity 310. By setting an adhesive at the opening of the inner cavity 310 of the circuit substrate 100, and then bonding the sealing cover 600 to the opening of the inner cavity 310, after curing the adhesive, the sealing cover 600 is sealed at the opening of the inner cavity 310. The sealing cover 600 can be used to seal the opening of the inner cavity 310 filled with the filler 500, so that the circuit layer 200 of the circuit substrate 100, the first end of the pin 400 and the filler 500 are sealed in the inner cavity 310 of the circuit frame 300, which plays a role in protecting the internal circuit and insulating and withstand voltage.

[0055] During the preparation of the circuit frame 300, the non-metallic material can be injected into a special mold through a plastic encapsulation process, and the circuit frame 300 can be obtained by demolding. The non-metallic material can be a thermosetting polymer, such as epoxy resin, phenolic resin, silica gel, amino, and unsaturated resin; in order to improve the heat dissipation capacity, the non-metallic material can be a composite material containing powders or fibers such as metal, ceramic, silicon oxide, and graphene. In one example, the material used for the non-metallic material can be a molding compound with epoxy resin as the base resin, high-performance phenolic resin as the curing agent, silicon micropowder as the filler, and a variety of additives. According to different design requirements, special molds of different shapes can be designed, and then circuit frames 300 of different shapes and structures can be obtained by injection molding. For example, the circuit frame 300 can be a rectangular parallelepiped structure.

[0056] Specifically, the circuit frame 300 is obtained by injection molding with a special mold, so that the circuit frame 300 has a substrate mounting area and a pin 400 mounting area; the circuit layer 200 is arranged on the first board surface of the circuit substrate 100, and the size of the first board surface is larger than the size of the circuit layer 200, that is, the outer periphery of the circuit layer 200 has a process edge bonded to the substrate mounting area. During the preparation process, each pin 400 is respectively arranged at a corresponding pin 400 mounting position on the pin 400 mounting area. superior , the first end of each pin 400 is close to the substrate mounting area, and the second end of each pin 400 is extended from the opening of the inner cavity 310 of the circuit frame 300. An adhesive is set on the back side of the substrate mounting area of ​​the circuit frame 300, and the circuit substrate 100 provided with the circuit layer 200 is placed on the substrate mounting area from the back of the bottom of the inner cavity 310 of the circuit frame 300, and the circuit layer 200 is close to the opening of the inner cavity 310, and the circuit substrate 100 is firmly bonded to the substrate mounting area by curing the adhesive. Then, the corresponding circuit elements on the circuit layer 200 are electrically connected through the bonding metal wire, and the first end of each pin 400 is electrically connected to the corresponding circuit element on the circuit layer 200 through the bonding metal wire. Then, a filler 500 is injected into the inner cavity 310 of the circuit frame 300, so that the filler 500 covers the circuit layer 200 and fills the inner cavity 310. For example, soft silicone is poured into the inner cavity 310 of the circuit frame 300 through a potting device, so that the soft silicone covers the circuit elements and bonding metal wires of the entire circuit layer 200, achieving electrical insulation, and having shock-proof, moisture-proof and heat-dissipating effects. Finally, a sealing cover 600 is covered on the surface of the filler 500 to obtain the semiconductor circuit 10 of the embodiment of the present application. The sealing cover 600 is sealed at the opening of the inner cavity 310 filled with the filler 500 to prevent the filler 500 from leaking.

[0057] Furthermore, the prepared circuit substrate 100 is first placed in a special carrier (the carrier can be aluminum, synthetic stone, ceramic, PPS and other materials with a high temperature resistance of more than 200°C), a copper foil layer is set on the circuit substrate 100, and the power device chip is mounted on the component mounting position reserved in the copper foil layer by brushing solder paste or dispensing silver glue through an automatic die bonding device (DA machine), and the resistor and capacitor are mounted on the component mounting position through an automatic SMT device, and then the entire semi-finished product including the carrier is passed through a reflow furnace to solder all the components to the corresponding mounting positions, and the welding quality of the components is inspected by a visual inspection AOI device; the flux and aluminum chips and other foreign matter remaining on the circuit substrate 100 are removed by spraying, ultrasonic and other cleaning methods, and then a circuit layer 200 is set on the circuit substrate 100.

[0058] In the above embodiment, a circuit layer 200 is arranged on the circuit substrate 100; the circuit frame 300 is provided with an inner cavity 310, and the inner cavity 310 is provided with a substrate mounting area and a pin 400 mounting area; the circuit substrate 100 is arranged in the substrate mounting area, and the circuit layer 200 is close to the opening of the inner cavity 310; a plurality of pins 400 are respectively arranged in the pin 400 mounting area; the first ends of the plurality of pins 400 are respectively electrically connected to the circuit layer 200; the filling member 500 covers the circuit layer 200 connected with each pin 400 and fills the inner cavity 310; the sealing cover 600 is sealed and arranged at the opening of the inner cavity 310 filled with the filling member 500; the second ends of each pin 400 are respectively led out from the opening of the inner cavity 310, thereby avoiding the welding void phenomenon in the pin 400 mounting area, and the pin 400 does not need to be connected to the circuit layer 200 by welding. 0 for electrical connection, which simplifies the production process and improves production efficiency and product reliability; the pin 400 does not need to be welded to the circuit layer 200, and there is no stress in the middle, which reduces the risk of delamination of the insulating layer 210; there is no need to use rib cutting and forming equipment to cut off the redundant dummy pin 400 and the reinforcing rib, which simplifies the preparation process of the pin 400 and does not cause copper leakage due to the removal of the pin 400; there is no need to apply welding paint to the welding position in advance, and there is no need to use a complex step steel mesh for printing, which simplifies the process and reduces the equipment cost; the filling piece 500 is encapsulated into the inner cavity 310 of the circuit frame 300, and the opening of the inner cavity 310 is sealed by the sealing cover 600, and there is no need to use a plastic encapsulation equipment for plastic encapsulation. Compared with the traditional plastic encapsulation process, the number of molds and equipment is reduced, there is no risk of packaging pores, and the preparation cost is reduced.

[0059] In some embodiments of the present invention, Figure 2 and 3 In the figure, the substrate installation area is located at the bottom of the inner cavity 310 and is a hollow structure; the substrate installation area is provided with a first limiting frame edge 320 and a second limiting frame edge 330; the first limiting frame edge 320 and the second limiting frame edge 330 are arranged opposite to each other.

[0060] The substrate installation area is a hollow structure, that is, the bottom of the inner cavity 310 has an installation opening, and the shape and size of the installation opening are the same as the shape and size of the circuit layer 200; for example, the installation opening can be, but is not limited to, a rectangular shape. The first limiting frame edge 320 and the second limiting frame edge 330 are respectively close to the side wall of the inner cavity 310 of the circuit frame 300, and the back side of the first limiting frame edge 320 (i.e., the side away from the inner cavity 310) is stepped, and the back side of the second limiting frame edge 330 (i.e., the side away from the inner cavity 310) is stepped. During assembly, a layer of adhesive is applied on the first limiting frame edge 320 and the second limiting frame edge 330, and the circuit substrate 100 is assembled from the bottom back of the circuit frame 300, so that the process edge on the circuit substrate 100 is limited and attached to the first limiting frame edge 320 and the second limiting frame edge 330, and the circuit layer 200 on the circuit substrate 100 passes through the installation opening and opens toward the inner cavity 310. It should be noted that the process edge on the circuit substrate 100 refers to a portion of the substrate edge outside the circuit layer 200. For example, one side of the circuit substrate 100 is divided into a circuit layer 200 area and a process edge area outside the circuit layer 200, the circuit layer 200 is arranged in the circuit layer 200 area, and the process edge area is used to fit with the first limiting frame edge 320 and the second limiting frame edge 330.

[0061] In some embodiments of the present invention, Figure 2 and 10 In the figure, the first limiting frame edge 320 is provided with a plurality of first card slots 322, and the side wall of the inner cavity 310 close to the first limiting frame edge 320 is provided with a second card slot 340 corresponding to the first card slot 322; each first card slot 322 is connected with each second card slot 340 in a one-to-one correspondence; the second limiting frame edge 330 is provided with a plurality of third card slots (not shown), and the side wall of the inner cavity 310 close to the second limiting frame edge 330 is provided with a fourth card slot (not shown) corresponding to the third card slot; each third card slot is connected with each fourth card slot in a one-to-one correspondence; a pin 400 installation area is formed between each first card slot 322 and each second card slot 340, and between each third card slot and each fourth card slot.

[0062] Among them, a plurality of first card slots 322 are arranged on the front side of the first limiting frame edge 320 (i.e., the side close to the opening of the inner cavity 310), and the spacing between each first card slot 322 can be determined according to the layout of the circuit components on the circuit layer 200 and the creepage distance requirements. A plurality of second card slots 340 are arranged on the side wall of the inner cavity 310 close to the first limiting frame edge 320, and each second card slot 340 is arranged one-to-one with each first card slot 322, and the first card slot 322 is connected with the corresponding second card slot 340. In one example, the first card slot 322 and the corresponding second card slot 340 are perpendicular to each other.

[0063] A plurality of third card slots are arranged on the front side of the second limiting frame edge 330 (i.e., the side close to the opening of the inner cavity 310), and the spacing between each third card slot can be determined according to the layout of the circuit components on the circuit layer 200 and the creepage distance requirements. A plurality of fourth card slots are arranged on the side wall of the inner cavity 310 close to the second limiting frame edge 330, and each third card slot is arranged in a one-to-one correspondence with each fourth card slot, and the third card slot is connected to the corresponding fourth card slot. In one example, the third card slot and the corresponding fourth card slot are perpendicular to each other.

[0064] Further, such as Figure 1 and 4 In the embodiment, the pin 400 includes a first pin segment 410 and a second pin segment 420 connected to the first pin segment 410; the first card slot 322 and the third card slot are respectively used to accommodate the corresponding first pin segment 410, and the second card slot 340 and the fourth card slot are respectively used to accommodate the corresponding second pin segment 420.

[0065] The pin 400 can be divided into a first pin segment 410 and a second pin segment 420. The size of the first pin segment 410 matches the size of the first slot 322, and the size of the second pin segment 420 matches the size of the second slot 340. In one example, the pin 400 can be bent so that the first pin segment 410 is perpendicular to the second pin segment 420. When assembling the pin 400, the first pin segment 410 of a part of the pins 400 is aligned with the first slot 322, and the second pin segment 420 is aligned with the second slot 340, and pressure is applied to the first pin segment 410 and the second pin segment 420 respectively, so that the first pin segment 410 is inserted into the first slot 322, and the second pin segment 420 is inserted into the second slot 340. In addition, the first pin segment 410 of another part of the pins 400 can be aligned with the third slot, and the second pin segment 420 can be aligned with the fourth slot, and pressure can be applied to the first pin segment 410 and the second pin segment 420 respectively, so that the first pin segment 410 is inserted into the third slot and the second pin segment 420 is inserted into the fourth slot.

[0066] Furthermore, each first pin segment 410 is connected to the circuit layer 200 through a metal wire; the height of each second pin segment 420 is higher than the height of the side wall of the inner cavity 310 , and each second pin segment 420 is led out from the opening of the inner cavity 310 .

[0067] After the pin 400 is arranged in the pin 400 installation area, the first pin segment 410 can be electrically connected to the corresponding circuit element on the circuit layer 200 through the metal wire (i.e., the bonding metal wire). The height of the second pin segment 420 is higher than the height of the side wall of the inner cavity 310, that is, part of the second pin segment 420 is not filled by the filler 500, so that the second pin segment 420 can be led out from the opening of the inner cavity 310 (i.e., part of the second pin segment 420 is led out from the second card slot 340, and the other part of the second pin segment 420 is led out from the fourth card slot), which facilitates the connection of the second pin segment 420 with the external module.

[0068] Furthermore, the first pin segment 410 is located between the substrate and the filling piece 500, so that the first pin segment 410 is limited between the substrate and the filling piece 500 to prevent the first pin segment 410 from moving; the second pin segment 420 is located between the side wall of the inner cavity 310 and the filling piece 500, so that the first pin segment 410 is limited between the substrate and the filling piece 500 to prevent the first pin segment 410 from moving, thereby achieving the fixation of the circuit frame 300 and the pin 400.

[0069] In the above embodiment, a discrete pin 400 is set on the corresponding pin 400 mounting position of the circuit frame 300, and the circuit substrate 100 is set on the corresponding substrate mounting position of the circuit frame 300, and the pin 400 is electrically connected to the circuit layer 200 through the bonding metal wire, and the filler 500 is filled into the inner cavity 310, and the opening of the inner cavity 310 filled with the filler 500 is sealed by the sealing cover 600, and the second end of the pin 400 is led out from the opening of the inner cavity 310, so as to obtain the semiconductor circuit 10 of the embodiment of the present application. In the embodiment of the present application, there is no need to use a rib cutting and forming device. Redundant dummy pins 400 and reinforcing ribs are removed to reduce equipment costs; the pin 400 does not need to be electrically connected to the circuit layer 200 through welding, and there is no risk of welding voids, which simplifies the production process and improves production efficiency; there is no need to pre-apply welding paint to the welding position, and there is no need to use a stepped steel mesh, which simplifies the process and reduces costs; the pin 400 does not need to be welded to the copper foil layer, and there is no stress in the middle, which reduces the risk of delamination of the insulating layer 210; there is no need to use plastic sealing equipment for plastic sealing, which reduces the number of molds and equipment compared to traditional plastic sealing processes, and there is no risk of packaging pores, which reduces the preparation cost.

[0070] It should be noted that the circuit frame 300 is also provided with a screw mounting hole, and the screw mounting hole is located on the outside of the circuit frame. In one example, the screw mounting hole is an open hole.

[0071] In some embodiments of the present invention, an insulating layer (not shown) is provided on the circuit substrate 100, and the insulating layer is located between the circuit substrate 100 and the circuit layer 200; the circuit layer 200 includes a circuit wiring layer, and circuit elements configured on the circuit wiring layer; the circuit wiring layer is provided on the insulating layer.

[0072] Among them, the insulating layer can be used to prevent the circuit layer 200 from conducting electricity with the circuit substrate 100. The insulating layer is arranged on the surface of the circuit substrate 100, and its thickness is relatively thinner than the circuit substrate 100, generally 50um to 150um, and 110um is commonly used. The circuit layer 200 is arranged on the insulating layer so that the circuit layer 200 is insulated from the circuit substrate 100. The circuit wiring layer is composed of metals such as copper and is insulated from the circuit substrate 100. The circuit wiring layer includes a circuit line composed of etched copper foil, and the thickness of the circuit layer is also relatively thin, such as about 70um. In one example, the circuit wiring layer also includes a pad arranged near the side position of the circuit substrate 100, and the above-mentioned circuit wiring layer can be formed by 2 ounces of copper foil. Finally, a thinner green oil layer can be coated on the circuit wiring layer to play a role in circuit isolation and cut off the electrical connection between circuit lines. Multiple circuit elements are arranged on the circuit wiring layer, and multiple circuit elements or circuit elements and the circuit wiring layer can be electrically connected through bonding metal wires; the circuit elements can be fixed to the circuit wiring layer by welding.

[0073] In one example, the circuit element may be an active element such as a transistor or a diode, or a passive element such as a capacitor or a resistor. In addition, a heat sink made of copper or the like may be used to fix a high-heat-generating element such as a power element on the circuit substrate 100. The insulating layer is formed by covering at least one surface of the circuit substrate 100. The resin material such as epoxy resin forming the sealing layer may be filled with fillers such as alumina and silicon carbide aluminum at a high concentration to improve the thermal conductivity. In order to improve the thermal conductivity, the filler may be angular, and in order to avoid the risk of the filler damaging the surface of the circuit element, the filler may be spherical.

[0074] In some embodiments of the present invention, Fig.14 As shown, a method for preparing the semiconductor circuit mentioned in the above embodiment is also proposed, and the preparation method comprises the following steps:

[0075] Step S100: providing a circuit substrate and a circuit frame.

[0076] Step S200: preparing a circuit layer on a circuit substrate.

[0077] Step S300: arranging a plurality of pins in the pin mounting area of ​​the circuit frame, fixing a circuit substrate having a circuit layer in the substrate mounting area of ​​the circuit frame by an adhesive, and electrically connecting each pin to the circuit layer by metal wires.

[0078] Step S400: injecting a filling member into the inner cavity of a circuit frame provided with a circuit substrate and a plurality of pins, so that the circuit layer connected to each pin is covered with the filling member and the inner cavity is fully filled with the filling member.

[0079] Step S500: arranging a sealing cover on the inner cavity filled with the filling member, so that the sealing cover seals the opening of the inner cavity, and the second ends of the pins are respectively led out from the opening of the inner cavity to form a semiconductor circuit.

[0080] Specifically, the specific preparation process of the semiconductor circuit is as follows: design a circuit substrate and a circuit frame of appropriate size according to the required circuit layout. For a general semiconductor circuit, the size of one can be selected as 64mm×30mm; put the prepared circuit substrate into a special carrier (the carrier can be aluminum, synthetic stone, ceramic, PPS and other materials with high temperature resistance above 200°C), prepare an insulating layer on the circuit substrate, and then press copper foil on the surface of the insulating layer, and then etch the copper foil and partially remove the copper foil to form a circuit wiring layer; in the reserved component installation position of the circuit layer, the power device chip is placed by brushing solder paste or applying silver glue. Automatic die bonding equipment (DA machine) is mounted on the component installation position, and resistors and capacitors are mounted on the component installation position by automatic SMT equipment. The pins are placed in the corresponding installation position by a robot or manually and fixed by a carrier; then the entire semi-finished product including the carrier is passed through a reflow furnace to solder all the components to the corresponding installation position, and the welding quality of the components is inspected by a visual inspection AOI device. The flux and aluminum chips remaining on the metal aluminum substrate are removed by spraying, ultrasonic and other cleaning methods, and the circuit elements and circuit wiring are connected by bonding metal wires, thereby forming a circuit layer on the circuit substrate. The circuit frame can be made of non-metallic materials, and a pre-set special mold is used to inject the non-metallic material into the special mold. After demolding, the circuit frame is formed, so that the circuit frame has an inner cavity, and the inner cavity is provided with a substrate installation area and a pin installation area.

[0081] All pins (such as low-voltage pins and high-voltage pins) are made of a metal substrate such as a copper substrate, such as a strip with a length C of 25mm, a width K of 1.5mm, and a thickness H of 1mm. For ease of assembly, the pins are bent and shaped into a first pin segment and a second pin segment (wherein the length of the first pin segment is less than the length of the second pin segment), and the first pin segment and the second pin segment are perpendicular to each other. Then a nickel layer is formed on the surface of the pin by chemical plating: a nickel layer is formed on the surface of the copper material that has formed a specific shape by a mixed solution of nickel salt and sodium hypophosphite, and an appropriate complexing agent is added. The metal nickel has a strong passivation ability and can quickly generate a very thin passivation film that can resist corrosion from the atmosphere, alkali and certain acids. The nickel plating crystals are extremely fine, and the thickness of the nickel layer is generally 0.1μm; then, through an acid sulfate process, the copper material that has formed a shape and a nickel layer is immersed in a plating solution with positive tin ions at room temperature and energized to form a nickel-tin alloy layer on the surface of the nickel layer. The thickness of the nickel layer is generally controlled at 5μm. The formation of the nickel layer greatly improves the protection and solderability. Thus, the preparation of the pins is completed. Then, each pin is respectively inserted into the corresponding pin installation position on the pin installation area.

[0082] After the pins are installed, the circuit frame is turned upside down so that the bottom of the inner cavity of the circuit frame faces upwards, and a layer of adhesive is applied to the edge of the limit frame of the substrate installation area. Then, the circuit substrate with the circuit layer is placed in the substrate installation area so that the process edge of the circuit substrate is attached to the edge of the limit frame through the adhesive. At the same time, the circuit layer passes through the installation opening on the substrate installation area, and the adhesive is cured to fix the circuit substrate on the circuit frame. Then, the first pin segment of each pin is electrically connected to the corresponding circuit element on the circuit layer through the bonding metal wire.

[0083] Then, a potting process can be used to pour a filler (such as soft silicone) into the inner cavity of the circuit frame through a potting device, so that the filler covers the components, bonding wires and part of the pins of the entire circuit in the inner cavity, that is, the circuit wiring, circuit elements and metal wires are at least sealed by the filler (such as soft silicone); at least the connection part between the pins and the circuit wiring is sealed by the filler (such as soft silicone), and at least a part of the pins extending outward are not sealed by the filler (such as soft silicone) and are exposed. Finally, a sealing cover is covered on the surface of the filler, that is, on the opening of the inner cavity, and the inner cavity opening is sealed by the sealing cover to prevent leakage of the filler.

[0084] Finally, after the marking process, the semi-finished packaged product is formed; the electrical performance of the semi-finished packaged product is tested by an electrical parameter testing machine to form a semiconductor circuit.

[0085] In the above embodiment, a circuit layer is prepared on a circuit substrate; the circuit substrate is arranged in a substrate mounting area of ​​a circuit frame, and the circuit layer is close to the opening of the inner cavity; a plurality of pins are arranged in the pin mounting area; the first ends of the plurality of pins are electrically connected to the circuit layer respectively; a filler covers the circuit layer connected to the pins and fills the inner cavity; a sealing cover is sealed at the opening of the inner cavity filled with the filler; the second end of each pin is led out from the opening of the inner cavity respectively, thereby avoiding the phenomenon of welding voids in the pin mounting area, and the pins do not need to be electrically connected to the circuit layer by welding, thereby simplifying the production process, improving production efficiency and product reliability; the pins do not It needs to be welded with the circuit layer, and there is no stress in the middle, which reduces the risk of delamination of the insulating layer; there is no need to use rib cutting and forming equipment to cut off the redundant dummy pins and reinforcing ribs, which simplifies the pin preparation process and does not cause copper leakage due to pin cutting; there is no need to apply welding paint to the welding position in advance, and there is no need to use a complex step steel mesh for printing, which simplifies the process and reduces equipment costs; the filling piece is encapsulated into the inner cavity of the circuit frame, and the opening of the inner cavity is sealed by a sealing cover, and there is no need to use plastic sealing equipment for plastic sealing. Compared with the traditional plastic sealing process, it reduces molds and equipment, and there is no risk of packaging pores, which reduces the preparation cost. In addition, the encapsulation process of the embodiment of the present application does not generate packaging stress like the traditional plastic sealing, and does not require PMC post-curing, which reduces the processing steps; and the encapsulation process does not produce the wire punching phenomenon, which improves the reliability of semiconductor circuit preparation.

[0086] In some embodiments of the present invention, the step of fixing the circuit substrate having the circuit layer on the substrate mounting area of ​​the circuit frame by an adhesive comprises:

[0087] Applying adhesive to the first limiting frame edge and the second limiting frame edge of the substrate installation area respectively, wherein the first limiting frame edge is arranged opposite to the second limiting frame edge;

[0088] The circuit substrate is placed in the substrate installation area so that the circuit substrate is limited and bonded to the first limiting frame edge and the second limiting frame edge, and the circuit layer faces the opening of the inner cavity. The circuit substrate is fixed on the circuit frame by curing the adhesive.

[0089] Specifically, a layer of adhesive is applied on the first limiting frame edge and the second limiting frame edge, and the circuit substrate is assembled from the bottom back of the circuit frame, so that the process edge on the circuit substrate is limited and fit on the first limiting frame edge and the second limiting frame edge, and the circuit layer on the circuit substrate passes through the mounting port and opens toward the inner cavity. It should be noted that the process edge on the circuit substrate refers to part of the substrate edge on the periphery of the circuit layer. For example, one side of the circuit substrate is divided into a circuit layer area and a process edge area located on the periphery of the circuit layer, the circuit layer is arranged in the circuit layer area, and the process edge area is used to fit with the first limiting frame edge and the second limiting frame edge. The first limiting frame edge and the second limiting frame edge are respectively close to the inner cavity side wall of the circuit frame, the back side of the first limiting frame edge (i.e., the side away from the inner cavity) is stepped, and the back side of the second limiting frame edge (i.e., the side away from the inner cavity) is stepped.

[0090] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0091] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0092] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0093] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0094] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0095] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A semiconductor circuit, characterized in that: include: A circuit substrate, wherein a circuit layer is provided on the circuit substrate; A circuit frame, wherein the circuit frame is provided with an inner cavity, wherein the inner cavity is provided with a substrate mounting area and a pin mounting area; the circuit substrate is arranged in the substrate mounting area, and the circuit layer is close to an opening of the inner cavity; A plurality of pins, wherein the plurality of pins are respectively arranged in the pin installation area; and first ends of the plurality of pins are respectively electrically connected to the circuit layer; A filling member, the filling member covers the circuit layer connected to the pins and fills the inner cavity; A sealing cover, the sealing cover is sealed at the opening of the inner cavity filled with the filling member, and the thickness of the sealing cover is 0.1 mm-1 mm; Wherein, the second end of each of the pins is led out from the opening of the inner cavity respectively; The substrate installation area is located at the bottom of the inner cavity and is a hollow structure; the substrate installation area is provided with a first limiting frame edge and a second limiting frame edge; the first limiting frame edge is arranged opposite to the second limiting frame edge; The first limit frame side is provided with a plurality of first card slots, and the inner cavity side wall close to the first limit frame side is provided with a second card slot corresponding to the first card slot; each of the first card slots is connected with each of the second card slots in a one-to-one correspondence; the second limit frame side is provided with a plurality of third card slots, and the inner cavity side wall close to the second limit frame side is provided with a fourth card slot corresponding to the third card slot; each of the third card slots is connected with each of the fourth card slots in a one-to-one correspondence; the pin installation area is formed between each of the first card slots and each of the second card slots, and between each of the third card slots and each of the fourth card slots; The pin includes a first pin segment and a second pin segment connected to the first pin segment; the first card slot and the third card slot are respectively used to accommodate the corresponding first pin segment, and the second card slot and the fourth card slot are respectively used to accommodate the corresponding second pin segment.

2. The semiconductor circuit according to claim 1, characterized in that Each of the first pin segments is connected to the circuit layer through a metal wire; the height of each of the second pin segments is higher than the height of the side wall of the inner cavity, and each of the second pin segments is led out from the opening of the inner cavity.

3. The semiconductor circuit according to claim 2, characterized in that The first pin segment is located between the substrate and the filling piece, and the second pin segment is located between the inner cavity side wall and the filling piece.

4. The semiconductor circuit according to claim 3, characterized in that The first lead segment is arranged perpendicularly to the corresponding second lead segment.

5. The semiconductor circuit according to any one of claims 1 to 4, characterized in that: An insulating layer is arranged on the circuit substrate, and the insulating layer is located between the circuit substrate and the circuit layer; the circuit layer includes a circuit wiring layer and circuit elements arranged on the circuit wiring layer; the circuit wiring layer is arranged on the insulating layer.

6. A method for preparing a semiconductor circuit according to any one of claims 1 to 5, characterized in that: The following steps are involved: Providing a circuit substrate and a circuit frame; preparing a circuit layer on the circuit substrate; A plurality of pins are arranged in the pin installation area of ​​the circuit frame, a circuit substrate having the circuit layer is fixedly arranged in the substrate installation area of ​​the circuit frame by an adhesive, and each of the pins is electrically connected to the circuit layer by a metal wire; Injecting a filling member into the inner cavity of the circuit frame provided with the circuit substrate and the plurality of pins, so that the circuit layer connected to each of the pins is covered with the filling member and the inner cavity is fully filled with the filling member; A sealing cover is arranged on the inner cavity filled with the filling member, so that the sealing cover seals the opening of the inner cavity, and the second ends of the pins are respectively led out from the opening of the inner cavity to form the semiconductor circuit.

7. A method for preparing a semiconductor circuit according to claim 6, characterized in that: The step of fixing the circuit substrate having the circuit layer in the substrate mounting area of ​​the circuit frame by an adhesive comprises: Applying adhesive to a first limiting frame edge and a second limiting frame edge of the substrate installation area respectively, wherein the first limiting frame edge is arranged opposite to the second limiting frame edge; The circuit substrate is placed in the substrate installation area so that the circuit substrate is limited and bonded to the first limiting frame edge and the second limiting frame edge, and the circuit layer faces the opening of the inner cavity. The circuit substrate is fixed to the circuit frame by curing the adhesive.

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