Circuit and method for determining the ratio between two frequencies

Abstract

Determining the ratio between two frequencies may be an electronic building block useful in a wide variety of different electronic circuits with a wide variety of functions. The present invention comprises a circuit for determining a frequency ratio between a first input signal having a first frequency and a second input signal having a second frequency, wherein the circuit comprises: a controllable fractional frequency divider configured to generate a divided signal having a divided frequency, the divided frequency being substantially the first frequency divided by a control signal; a frequency phase detector configured to generate a phase difference signal based on a frequency phase difference between the divided frequency of the divided signal and the second frequency of the second input signal; and a loop filter configured to generate the control signal based on the phase difference signal; wherein a loop is formed by the controllable fractional frequency divider, the divided frequency signal, the frequency phase detector, the phase difference signal, the loop filter and the control signal; wherein the loop filter filters the phase difference signal so as to prevent instability of the loop; and wherein the control signal, preferably the magnitude of the control signal, is indicative of the frequency ratio.

Description

Technical Field

[0001] The present invention relates to the field of circuits and methods for determining the ratio between two frequencies. Background Art

[0002] Determining the ratio between two frequencies could be a useful electronic building block in a wide variety of electronic circuits with very diverse functions.

[0003] Since WO 2013 / 066161 A1, in particular Figure 2 A known circuit for determining a frequency ratio is known in .

[0004] WO 2013 / 066161 A1 discloses an electronic oscillator circuit, which includes: a first oscillator for supplying a first oscillation signal; a second oscillator for supplying a second oscillation signal; a first controller for delivering a first control signal according to a phase difference between a first controller input and a second controller input of the first controller; a second controller for delivering a second control signal according to a phase difference between the first controller input and the second controller input of the second controller; a resonator; at least a second resonant frequency, wherein a first phase shift depends on a difference between a frequency of a second excitation signal and the second resonant frequency; and a processing component for receiving the first oscillation signal and the second oscillation signal, determining their mutual ratio, looking up a compensation factor in a pre-stored table and outputting a compensated oscillation signal.

[0005] In WO 2013 / 066161 A1 Figure 2 In the embodiment, the divider setting of the feedback divider determines the ratio between the resonator frequency and the output frequency.

[0006] WO 2013 / 066161 A1 Figure 2 The disadvantage of the circuit is that the frequency output is the output of the circuit rather than the input. In addition, the circuit uses a controllable oscillator, which is a bulky component. In addition, the controllable oscillator has the disadvantage of requiring a minimum frequency distance from another controllable oscillator to prevent crosstalk, which hinders miniaturization and integration.

[0007] US2013 / 0076415 A1 discloses one or more PLLs formed on an integrated circuit. Each PLL includes an interpolation divider configured as a digitally controllable oscillator, which receives a reference frequency signal and supplies an output signal divided according to a division ratio. A feedback divider is coupled to the output signal of the interpolation divider and supplies the divided output signal as a feedback signal. A phase detector receives the feedback signal and a frequency signal to which the PLL is locked. The phase detector supplies a phase error corresponding to the difference between the frequency signal and the feedback signal, and adjusts the division ratio according to the phase error. A disadvantage is that the phase noise on the divided output signal is relatively high. Summary of the invention

[0008] An object of the present invention is to overcome one or more of the above-mentioned disadvantages.

[0009] According to a first aspect of the present invention, a circuit for determining a frequency ratio between a first input signal having a first frequency and a second input signal having a second frequency, wherein the circuit comprises:

[0010] a controllable fractional frequency divider configured to generate a divided signal having a divided frequency that is substantially the first frequency divided by the control signal;

[0011] a resonator configured to be excited by an excitation signal having the divided frequency and based on the divided frequency signal and to generate a second input signal;

[0012] a frequency phase detector configured to generate a phase difference signal based on a frequency phase difference between the divided frequency of the divided frequency signal and a second frequency of the second input signal; and

[0013] a loop filter configured to generate a control signal based on the phase difference signal;

[0014] wherein a loop is formed by the controllable fractional frequency divider, the divided frequency signal, the frequency phase detector, the phase difference signal, the loop filter and the control signal;

[0015] The loop filter filters the phase difference signal to prevent instability of the loop; and

[0016] The control signal, preferably, the value of the control signal, indicates the frequency ratio.

[0017] The controllable frequency divider may be a digital controllable frequency divider. The controllable frequency divider may be a controllable multiple frequency divider or a controllable fractional frequency divider. The frequency phase detector may be a mixer, an analog multiplier, a digital circuit or a logic circuit configured as a phase detector. Alternatively, the frequency phase detector may be a digital mixer, such as an XOR port mixer.

[0018] The first input signal may be any repetitive signal and therefore has a frequency. The first input signal may be a blocking signal, such as a digital signal. Alternatively, the first input signal may be an analog signal, such as a triangular signal or a sinusoidal signal. The first input signal is typically a signal with low phase noise. In a frequency range of 8kHz to 24MHz, preferably 10kHz to 22MHz, more preferably 12kHz to 20MHz, and most preferably 14kHz to 18MHz, the phase noise may be less than 500fs, preferably less than 200fs, more preferably 100fs, and most preferably 80fs.

[0019] The controllable frequency divider divides the frequency of the first input signal depending on the control signal. Typically, the control signal is a stable signal with low jitter to prevent the introduction of significant additional jitter in the controllable frequency divider. The control signal may include an offset. The divided signal typically includes jitter or noise introduced by the controllable frequency divider as a dominant noise source.

[0020] Typically, at least in the short term, the second input signal also has a very stable frequency. The second input signal may vary over time due to temperature, but such variations may be considered relatively slow compared to other sources of frequency and phase shifts that perturb the second input signal. Typically, the second input signal may be generated using a resonator such as a crystal resonator.

[0021] The frequency phase detector that detects the phase between the divided frequency signal and the second input signal typically also introduces noise. Therefore, the value of the phase difference signal, such as the height, is typically dominated by the phase difference and typically additionally includes noise introduced by the controllable frequency divider and the frequency phase detector.

[0022] The loop filter filters the phase difference signal. The output signal of the loop filter is a control signal, which indicates the frequency ratio. The loop filter is typically a low pass filter. The loop filter cutoff frequency is selected based on two constraints. If the cutoff frequency is selected too low, the loop reacts too slowly to disturbances in the loop, resulting in loop instability. If the cutoff frequency is selected too high, the loop will not be able to fully reject noise in the phase difference signal, which may also cause loop instability. The instability of the loop can be detected from an unstable control signal. An unstable control signal may have a signal value that swings from one end of the range to the other end of its range, or is stuck in one of the extremes. The cutoff frequency is typically selected so low that the maximum amount of noise is rejected from the phase difference signal, while the control signal is still allowed to adapt quickly enough to any disturbance introduced in the loop.

[0023] Compared to the prior art, the circuit offers the advantage of extremely stable frequency ratio measurements. Since the prior art does not have an integrating effect, the circuit according to the invention has a feedback loop which has an integrating effect. The integrating effect offers the advantage of a 20 dB / decade rejection of low frequency noise in the phase. This effect in the frequency domain results in a 40 dB / decade rejection, whereas the known system has only a 20 dB / decade rejection.

[0024] Furthermore, the present invention provides for transposing the temperature characteristics of a filter component such as a loop filter to near DC, with the effect that small deviations only slightly change the effective bandwidth, but do not change the actual center frequency. In contrast, loop filters are known in the art, wherein the known loop maintains a certain frequency, and thus these known loop filters are bandpass filters. For example, if a component of the known loop filter changes value under the influence of temperature or aging, the center frequency of the known loop filter will change. Thus, the circuit according to the present invention provides the advantage of increased temperature stability.

[0025] As discussed below, this circuit is suitable for causing the resonator to provide a second input signal and providing an excitation signal to the resonator based on the divided signal. As discussed further below, this circuit has the advantage of not having to comply with the Barkhausen criterion. This does not comply with the Barkhausen criterion, which has the effect of reducing phase noise.

[0026] The prior art loops that comply with the Barkhausen criterion can be compared with AM signal transmission. The present invention that does not comply with the Barkhausen criterion can be compared with FM signal transmission. As is well known, FM signals are less susceptible to interference. One of such interferences in the present invention may be small and adjacent resonant frequencies. These small and adjacent resonant frequencies may even cross under the influence of temperature changes. In particular in such cases, not having to comply with the Barkhausen criterion has the advantage that the noise generated by small and adjacent resonant frequencies can be significantly rejected.

[0027] Generating a particular frequency with low phase noise requires a lot of power. This embodiment provides the advantage of generating two independent frequencies with low phase noise, a first frequency and a second frequency, without doubling the power, but the circuit consumes much less power.

[0028] In a specific embodiment of the invention, the phase difference signal has a magnitude based on the frequency phase difference, such as an amplitude or a value, and / or the control signal has a magnitude indicative of a frequency ratio, such as an amplitude or a value. If the phase or control signal is an analog signal, the signal information is typically advantageously contained in the amplitude of the signal. If the phase or control signal is a digital signal, the signal information is typically advantageously contained in the digital value of the signal. The digital value may be a binary code, a BCD code, a Gray code, or a combination of such codes or any other code having a defined value system.

[0029] In a specific embodiment of the present invention, the loop filter is a low pass filter, preferably having a cutoff frequency that is advantageously lower than the frequency noise introduced by the controllable frequency divider and advantageously higher than the rate of change of the first and second frequencies. In addition, the cutoff frequency should advantageously be selected so that the control signal is within a specified range and the circuit remains stable under changing conditions that cause disturbances in the circuit. The specified range is typically specified by the user. The specified range may also be determined based on noise introduced by other features in the circuit, such as the controllable frequency divider and the frequency phase detector. The specified range may also be affected by changes in the first input signal and the second input signal.

[0030] In a specific example of the present invention, the controllable frequency divider is a controllable fractional frequency divider. The phase difference between the divided signal and the second input signal can be caused by a static phase difference and / or a frequency difference and an elapsed time. In this specific example, the use of a controllable fractional frequency divider advantageously allows for improved frequency matching between the frequency of the divided signal and the second frequency, because the first frequency is divided with a higher granularity. In addition, the first frequency can be advantageously selected to be lower with higher granularity. The use of high frequencies has the disadvantages of crosstalk, increased energy losses, etc.

[0031] In an embodiment of the invention, the circuit further comprises an analog-to-digital converter configured to generate a digital second input signal based on the second input signal, wherein the digital second input signal is supplied to the frequency phase detector. The divided signal may be an analog signal, generating a mixed frequency phase detector having one analog input and one digital input. The divided signal may be a digital signal generating a digital frequency phase detector. Depending on the operation, the manipulation of the input signal in the digital or analog domain may be advantageously accomplished in one of the digital domain and the analog domain.

[0032] Under low power conditions, analog blocks (such as Gilbert cells used as analog frequency phase detectors) typically add a lot of noise because the signals in the analog blocks are not strong relative to the noise sources within the analog blocks. In addition, semiconductor components in analog blocks operating at their lowest power limits add relatively large amounts of noise. On the other hand, under low power conditions, digital blocks (such as digital mixers) can continue to operate as long as the conditions for the digital signals are met. Under such low power conditions, no additional noise is added. And when carefully designed, the digital blocks will not add any significant noise to the signals. Therefore, the present invention is advantageously implemented at least partially in the digital domain, preferably mostly in the digital domain, and more preferably as much as possible in the digital domain. The blocks in the present invention can be implemented partially in the digital domain.

[0033] In a specific example of the present invention, the circuit further includes a signal generator that generates a first frequency, wherein the rate of change of the frequency is within the dynamic frequency tracking range of the loop. Depending on the combination of components in the loop of the circuit, the circuit is able to track the frequency changes of the first frequency. If the rate of change of the first frequency is too high, the frequency division signal will have a different frequency compared to the second frequency, which will cause the deviation of the phase difference signal to increase over time. Since the increased deviation in the phase difference signal is mainly filtered out by the loop filter, the change of the control signal will not follow the increased deviation of the phase difference signal. Therefore, the control signal does not indicate the frequency difference between the first input signal and the second input signal at least temporarily. The loop may even stabilize at a point where the frequency of the frequency division signal is, for example, a multiple of the second frequency. This is typically referred to as the loop being unlocked. The maximum rate of change of the first frequency marks the edge of the dynamic frequency tracking range, and the control signal still indicates the maximum rate of change of the first frequency with a specified error margin indicating the frequency ratio. The circuit cannot lose lock for changes in the first frequency within the dynamic frequency tracking range.

[0034] According to the present invention, the circuit further comprises a resonator,

[0035] wherein the excitation signal having the divided frequency is based on the divided frequency signal;

[0036] wherein the resonator is excited based on the excitation signal; and

[0037] The resonator generates a second input signal.

[0038] Resonators can be added to the circuit. This provides the advantage of a simple frequency generator. In addition, a resonator loop is formed by a controllable frequency divider, an excitation signal, a resonator, a second input signal, a frequency phase detector, a phase difference signal, a loop filter and a control signal. Loops containing resonators or oscillators generally follow the Barkhausen criterion. The Barkhausen criterion includes the following constraints:

[0039] 1. The absolute value of the loop gain is equal to 1; and

[0040] 2. The phase shift of the loop is 2πx;

[0041] The Barkhausen criterion typically implies additional design constraints for the resonator loop. Loops that comply with the Barkhausen criterion are typically difficult to design and introduce additional phase noise. Typically, loops that include conventional amplifiers to make the loop comply with the Barkhausen criterion introduce considerable phase noise.

[0042] The controllable frequency divider divides the first frequency based on the control signal to generate an excitation signal having a divided frequency. The control signal is not used to determine the magnitude of the excitation signal, such as the amplitude or value. The magnitude of the excitation signal can be based on the magnitude of the first input signal. The magnitude of the excitation signal can be based on the specifications of the resonator, possibly taking into account the divided frequency. The magnitude of the excitation signal can be advantageously selected to optimize the function of the resonator. Therefore, the loop of the circuit advantageously does not have to comply with the Barkhausen criterion. Therefore, the loop does not include a conventional amplifier that complies with the Barkhausen criterion and therefore has reduced phase noise.

[0043] In a specific example of the present invention, the excitation signal is phase shifted relative to the second input signal. Typically, the phase shift is a constraint on the input of the controllable frequency divider. For example, a mixer as a frequency phase detector requires its input signal to be shifted 90 degrees in phase to produce a phase difference signal indicating that the input signals are in phase with each other. Since the resonator typically produces a 0 degree phase shift between the excitation signal and the second input signal when resonating, the excitation signal and the divided signal already need to have such a 90 degree phase shift between them. The controllable frequency divider advantageously provides this phase shift. If the frequency division is a multiple of four or a fractional divider, the controllable frequency divider can advantageously provide this phase shift.

[0044] In an embodiment of the invention, the excitation signal is substantially in phase with the second input signal. This provides an advantageously simple implementation.

[0045] In an embodiment of the present invention, the second frequency is the resonant frequency of the resonator. Selecting the resonant frequency of the resonator provides the advantage of low energy consumption in the resonator to generate a second input signal of sufficient magnitude to enable the frequency phase detector to detect the phase difference. Low energy consumption provides the advantage of low local temperature rise, enabling further integration of the circuit.

[0046] In an embodiment of the present invention, the resonator is a crystal resonator, and preferably the second frequency is an overtone resonance frequency of the crystal resonator. Crystal is a readable and usable solution for resonators.

[0047] Harmonic frequencies change frequency under the influence of temperature in a similar manner to the fundamental frequency. In contrast, overtone frequencies can change frequency under the influence of temperature in different ways. Furthermore, different overtones of a crystal can change frequency under the influence of temperature in different ways. Thus, different overtones may have different temperature gradients. Because the overtones of a crystal can be selected, it is advantageously possible to design a circuit to have predetermined temperature characteristics based on predetermined characteristics of the resonator.

[0048] In a specific example of the present invention, the circuit further includes a digital-to-analog converter (DAC) configured to generate a divided-frequency analog signal based on the divided-frequency signal, wherein the divided-frequency analog signal is supplied to the resonator. The divided-frequency analog signal may be an excitation signal for the resonator. The digitally controllable frequency divider is simple to implement and can be easily controlled. The resonator is an analog component. Adding a DAC between the digitally controllable frequency divider and the resonator provides the following advantages: two advantageous partial solutions are coupled in the digital domain and the analog domain, respectively.

[0049] In an embodiment of the invention, the circuit is configured to determine a second frequency ratio between a third input signal having a third frequency and a second input signal having a fourth frequency, wherein the circuit comprises:

[0050] A second controllable fractional frequency divider configured to generate a second divided signal having a second divided frequency, the second divided frequency being substantially the third frequency divided by the second control signal;

[0051] an adder configured to generate a summed signal supplied to the resonator, wherein the summed signal is based on adding the divided frequency signal and a second divided frequency signal;

[0052] a second frequency phase detector configured to generate a second phase difference signal based on a second frequency phase difference between a second frequency-divided frequency of the second frequency-divided signal and a fourth frequency of the second input signal; and

[0053] a second loop filter configured to generate a second control signal based on a second phase difference signal;

[0054] wherein a second loop is formed by the second controllable fractional frequency divider, the second frequency division signal, the second frequency phase detector, the second phase difference signal, the second loop filter and the second control signal;

[0055] The second loop filter filters the second phase difference signal to prevent instability of the second loop; and

[0056] The second control signal, preferably the value of the second control signal, indicates the second frequency ratio.

[0057] This specific example of the circuit advantageously utilizes the properties of a resonator, namely that the resonator can resonate at multiple frequencies simultaneously. Resonators are typically bulky compared to other components of the circuit. Therefore, using a resonator to resonate at multiple frequencies allows for integration and miniaturization of the circuit.

[0058] Furthermore, since the first loop and the second loop are parallel and evaluated at the same time, the temperature effect is measured at the same time. Known circuits may have a tendency to measure temperature effects at time intervals. If the temperature changes over time, this time interval leads to a temperature error in the known circuit. Therefore, the circuit according to the invention has the advantage of improved temperature measurement accuracy.

[0059] Furthermore, this embodiment advantageously allows the measurement of the hysteresis characteristics of the resonator in operation. Conventional circuits often compensate for the hysteresis in the resonator by designing countermeasures from theory. Conventional compensation methods make the system more coarse, thereby reducing the accuracy of the system. Therefore, this embodiment provides the advantage of improved accuracy due to the hysteresis measurement.

[0060] In an embodiment of the present invention, the second phase difference signal has a second magnitude based on the second frequency phase difference, and / or the second control signal has a magnitude indicative of the second frequency ratio. These advantages are comparable to those of the control signal.

[0061] In one embodiment of the present invention, the resonant frequency and the second resonant frequency are different. Since the noise generated by the circuit components at different frequencies may be different, the noise in the control signal and the second control signal may be uncorrelated. Since the noise is uncorrelated, it can be advantageously used to improve the accuracy of the determined frequency ratio.

[0062] In a specific example of the invention, the resonator is a crystal resonator, and the resonant frequency and / or the second resonant frequency is an overtone frequency of the crystal resonator. The overtone frequency has typical characteristics, especially temperature characteristics, which make the circuit suitable for a specific application. By selecting this overtone frequency, the circuit can be advantageously adapted to such applications.

[0063] Preferably, the resonant frequency and the second resonant frequency have different temperature gradients.Since overtone frequencies typically have different temperature gradients than other overtone frequencies, harmonic frequencies and the fundamental frequency, the circuit can advantageously be used to determine the temperature of a resonator, preferably a crystal resonator.

[0064] In a specific example of the present invention, the third input signal is the first input signal. This circuit configuration provides the following advantages: two frequency ratios can be measured with one reference. In combination with the characteristics that the resonant frequency and the second resonant frequency have different temperature gradients, the temperature variation of the first frequency can be eliminated by dividing the two ratios or weighted divisions of each other. Tracking the change of the resulting signal over time indicates the temperature of the resonator and also provides the following advantages: the effect of the temperature gradient provided to the first frequency of the circuit is minimized or even eliminated.

[0065] In an embodiment of the invention, the circuit is configured to determine a third frequency ratio between a fourth input signal having a fifth frequency and a second input signal having a sixth frequency, wherein the circuit comprises:

[0066] a third controllable fractional frequency divider configured to generate a third divided signal having a third divided frequency, the third divided frequency being substantially the fifth frequency divided by a third control signal;

[0067] a third frequency phase detector configured to generate a third phase difference signal based on a third frequency phase difference between the third frequency-divided frequency of the third frequency-divided signal and the sixth frequency of the second input signal; and

[0068] a third loop filter configured to generate the third control signal based on the third phase difference signal;

[0069] wherein the added signal is further based on the addition of the third frequency-divided signal;

[0070] wherein a third loop is formed by the third controllable fractional frequency divider, the third frequency division signal, the third frequency phase detector, the third phase difference signal, the third loop filter and the third control signal;

[0071] wherein the third loop filter filters the third phase difference signal to prevent instability of the third loop; and

[0072] The third control signal indicates the third frequency ratio.

[0073] This specific example of the circuit advantageously utilizes the properties of a resonator, namely that the resonator can resonate at multiple frequencies simultaneously. Resonators are typically bulky compared to other components of the circuit. Therefore, using a resonator to resonate at multiple frequencies allows for integration and miniaturization of the circuit.

[0074] Furthermore, since the first loop, the second loop and the third loop are parallel and evaluated at the same time, the temperature effect is measured at the same time. The known circuit may have a tendency to measure the temperature effect at time intervals. If the temperature changes over time, this time interval leads to a temperature error in the known circuit. Therefore, the circuit according to the present invention has the advantage of improved temperature measurement accuracy.

[0075] Furthermore, this embodiment advantageously allows the measurement of the hysteresis characteristics of the resonator in operation. Conventional circuits often compensate for the hysteresis in the resonator by designing countermeasures from theory. Conventional compensation methods make the system more coarse, thereby reducing the accuracy of the system. Therefore, this embodiment provides the advantage of improved accuracy due to the hysteresis measurement.

[0076] In an embodiment of the present invention, the third phase difference signal has a third magnitude based on the third frequency phase difference, and / or the third control signal has a magnitude indicative of a third frequency ratio. These advantages are comparable to those of the control signal.

[0077] In one embodiment of the invention, the second frequency and the fourth frequency are different; wherein the second frequency and the sixth frequency are different; and / or wherein the fourth frequency and the sixth frequency are different. Since the noise generated by the circuit components at different frequencies may be different, the noise in the control signal, the second control signal, and the third control signal may be uncorrelated. Since the noise is uncorrelated, it can be advantageously used to improve the accuracy of the determined frequency ratio.

[0078] In a specific example of the present invention, the sixth frequency is an overtone frequency of the crystal resonator. The overtone frequency has typical characteristics, especially temperature characteristics, which make the circuit suitable for a specific application. By selecting this overtone frequency, the circuit can be advantageously adapted to such applications.

[0079] Preferably, the resonant frequency, the second resonant frequency and the third resonant frequency have different temperature gradients. Since overtone frequencies typically have different temperature gradients than other overtone frequencies, harmonic frequencies and the fundamental frequency, the circuit can be advantageously used to determine the temperature of a resonator, preferably a crystal resonator.

[0080] In a specific example of the present invention, the fourth input signal is the first input signal. This circuit configuration provides the following advantages: three frequency ratios can be measured with one reference. In combination with the characteristics that the resonant frequency, the second resonant frequency and the third resonant frequency have different temperature gradients, the change of the first frequency with temperature can be eliminated by dividing the two ratios or weighted division of each other. Tracking the change of the resulting signal over time indicates the temperature of the resonator and provides the following advantages: the influence of the temperature gradient provided to the first frequency of the circuit is minimized or even eliminated.

[0081] Furthermore, this determination of the indication may also involve the first ratio and the third ratio, thereby providing a second indication that provides the advantage of an overall more stable and / or accurate indication.

[0082] Furthermore, the first indication and the second indication typically have temperatures, wherein a change in the indication with respect to a change in temperature is zero or substantially zero. If the following condition is met: the first indication and the second indication have different temperatures, wherein a change in the indication with respect to temperature is zero or substantially zero, then the temperature of the resonator can be advantageously measured with high accuracy within the operating temperature range.

[0083] According to another aspect of the invention, a system for determining an indication of a temperature of a resonator, wherein the system comprises:

[0084] The circuit of any circuit embodiment comprising a resonator and providing a control signal and a second control signal; and

[0085] a control signal divider configured to generate a divided control signal based on the control signal divided by a second control signal;

[0086] The frequency division control signal is the temperature indication. The temperature indication provides the advantages described in this specification.

[0087] Furthermore, the use of parallel simultaneous loops has the advantage that it makes possible a close correlation of certain effects. For example, suppose the value of the first input frequency changes by a small amount. This change can be seen as phase noise of the first input frequency. All loops will then see the same relative error contribution. This error contribution will result in a change of the respective ratios, but when divided by these ratios, thereby generating the divided control signal, the error contributions cancel each other. Thus, this system offers the advantage of being insensitive or substantially insensitive to the first input frequency phase noise.

[0088] According to another aspect of the invention, a system for determining an indication of a temperature of a resonator, wherein the system comprises:

[0089] The circuit of any circuit embodiment, comprising a resonator and providing a control signal, a second control signal, and a third control signal; and

[0090] a first control signal divider configured to generate a first divided control signal based on the control signal divided by a second control signal;

[0091] a second control signal divider configured to generate a second divided control signal based on the control signal divided by a third control signal; and

[0092] a subtractor configured to generate a subtraction signal based on subtracting the second frequency division control signal from the first frequency division control signal;

[0093] wherein the first frequency division control signal and the second frequency division control signal have different minimum temperature activities; and

[0094] The subtraction signal is the temperature indication. The temperature indication provides the advantages described in this specification. In addition, the use of parallel simultaneous loops has the following advantages: it makes it possible to closely correlate certain effects.

[0095] According to another aspect of the present invention, a method for determining a frequency ratio between a first input signal having a first frequency and a second input signal having a second frequency comprises the following steps:

[0096] generating a frequency-divided signal, the frequency-divided signal having a frequency-divided frequency, the frequency-divided frequency being substantially the first frequency divided by a control signal;

[0097] generating a phase difference signal based on a frequency phase difference between the divided frequency of the divided frequency signal and the second frequency of the second input signal; and

[0098] generating the control signal based on filtering the phase difference signal;

[0099] One loop is formed by the frequency division signal, the phase difference signal and the control signal;

[0100] The filtering performs filtering on the phase difference signal so as to prevent instability of the loop; and

[0101] The control signal indicates the frequency ratio. This method provides the advantages described throughout the text.

[0102] According to another aspect of the present invention, a method for determining an indication of a resonator temperature comprises the following steps:

[0103] Generate a first frequency-divided signal having a first frequency-divided frequency, wherein the first frequency-divided frequency is substantially a first frequency of a first input signal divided by a first control signal;

[0104] generating a second frequency-divided signal having a second frequency-divided frequency, wherein the second frequency-divided frequency is substantially the first frequency of the first input signal divided by a second control signal;

[0105] generating a sum signal supplied to the resonator, wherein the sum signal is based on the addition of the first frequency-divided signal and the second frequency-divided signal;

[0106] supplying the added signal to the resonator;

[0107] receiving a second input signal from the resonator, the second input signal comprising first and second frequencies, the first and second frequencies being responses of the resonator to the first and second divided frequencies;

[0108] generating a first phase difference signal based on a first frequency phase difference between the first frequency-divided frequency of the first frequency-divided signal and the first frequency of the second input signal;

[0109] generating the first control signal based on filtering the first phase difference signal;

[0110] generating a second phase difference signal based on a second frequency phase difference between the second frequency-divided frequency of the second frequency-divided signal and the second frequency of the second input signal;

[0111] generating the second control signal based on filtering the second phase difference signal;

[0112] Generating a frequency-divided control signal based on dividing the first control signal by the second control signal;

[0113] A first loop is formed by the first frequency-divided signal, the first phase difference signal and the first control signal;

[0114] A second loop is formed by the second frequency-divided signal, the second phase difference signal and the second control signal;

[0115] The filtering of the first control signal is provided to filter the first phase difference signal so as to prevent instability of the first loop;

[0116] The filtering of the second control signal is provided to filter the second phase difference signal so as to prevent instability of the second loop;

[0117] wherein the first frequency of the second input signal and the second frequency of the second input signal have different minimum temperature activities; and wherein the frequency division control signal is indicative of the temperature. This method provides the advantages described throughout.

[0118] According to another aspect of the present invention, a method for determining a hysteresis and / or temperature indication of a resonator comprises the following steps:

[0119] Generate a first frequency-divided signal having a first frequency-divided frequency, wherein the first frequency-divided frequency is substantially a first frequency of a first input signal divided by a first control signal;

[0120] generating a second frequency-divided signal having a second frequency-divided frequency, wherein the second frequency-divided frequency is substantially the first frequency of the first input signal divided by a second control signal;

[0121] generating a third frequency-divided signal having a third frequency-divided frequency, wherein the third frequency-divided frequency is substantially the first frequency of the first input signal divided by a third control signal;

[0122] generating a sum signal supplied to the resonator, wherein the sum signal is based on adding the first frequency-divided signal, the second frequency-divided signal, and the third frequency-divided signal;

[0123] supplying the added signal to the resonator;

[0124] receiving a second input signal from the resonator, the second input signal comprising first, second and third frequencies, the first, second and third frequencies being responses of the resonator to the first, second and third divided frequencies;

[0125] generating a first phase difference signal based on a first frequency phase difference between the first frequency-divided frequency of the first frequency-divided signal and the first frequency of the second input signal;

[0126] generating the first control signal based on filtering the first phase difference signal;

[0127] generating a second phase difference signal based on a second frequency phase difference between the second frequency-divided frequency of the second frequency-divided signal and the second frequency of the second input signal;

[0128] generating the second control signal based on filtering the second phase difference signal;

[0129] generating a third phase difference signal based on a third frequency phase difference between the third frequency-divided frequency of the third frequency-divided signal and the third frequency of the second input signal;

[0130] generating the third control signal based on filtering the third phase difference signal;

[0131] Generating a first frequency-divided control signal based on dividing the first control signal by the second control signal;

[0132] Generating a second frequency-divided control signal based on dividing the first control signal by the third control signal; and

[0133] generating a subtraction signal based on subtracting the second frequency-division control signal from the first frequency-division control signal;

[0134] A first loop is formed by the first frequency-divided signal, the first phase difference signal and the first control signal;

[0135] A second loop is formed by the second frequency-divided signal, the second phase difference signal and the second control signal;

[0136] A third loop is formed by the third frequency-divided signal, the third phase difference signal and the third control signal;

[0137] The filtering of the first control signal is provided to filter the first phase difference signal so as to prevent instability of the first loop;

[0138] The filtering of the second control signal is provided to filter the second phase difference signal so as to prevent instability of the second loop;

[0139] The filtering of the third control signal is provided to filter the third phase difference signal so as to prevent instability of the third loop;

[0140] wherein the first frequency of the second input signal, the second frequency of the second input signal, and the third frequency of the second input signal have different minimum temperature activities relative to each other; and

[0141] Wherein the subtraction signal is the hysteresis and / or temperature indication. This method provides the advantages described throughout the text. BRIEF DESCRIPTION OF THE DRAWINGS

[0142] The present invention will become apparent and further elucidated with reference to the specific examples described by way of example in the following description and with reference to the accompanying drawings, in which:

[0143] [ Figure 1 ] schematically illustrates a first circuit according to a first specific example of the present invention;

[0144] [ Figure 2 ] schematically illustrates a second circuit according to a second specific example of the present invention;

[0145] [ Figure 3 ] shows the resonant modes of the crystal near the fundamental resonant frequency;

[0146] [ Figure 4 ] shows the resonance mode of the crystal near the 3rd harmonic resonance frequency;

[0147] [ Figure 5 ] shows the resonant modes of the crystal near the 5th-subharmonic resonant frequency;

[0148] [ Figure 6 ] shows the temperature behavior of the resonance mode versus temperature;

[0149] [ Figure 7 ] schematically illustrates a third circuit according to a third specific example of the present invention;

[0150] [ Figure 8 ] schematically illustrates a first system according to a fourth specific example of the present invention; and

[0151] [ Fig. 9 ] schematically illustrates a second system according to a fifth specific example of the present invention;

[0152] 100: first specific example circuit 101: second specific example circuit 102: third specific example circuit 104: first input signal 105: third input signal 106: fourth input signal 107: first control signal 108: second control signal 109: third control signal 110: first controllable fractional frequency divider 111: second controllable fractional frequency divider 112: third controllable fractional frequency divider 115: first frequency division signal 116: second frequency division signal 117: third frequency division signal 120: adder 121: addition signal 125: digital to analog converter (DAC) 129: excitation signal 130: resonator 135: second input signal 140: analog to digital converter converter (ADC) 145: digital second signal 150: first frequency phase detector 151: second frequency phase detector 152: third frequency phase detector 155: first phase difference signal 156: second phase difference signal 157: third phase difference signal 160: first loop filter 161: second loop filter 162: third loop filter 200: first specific example system 201: second specific example system 210: first circuit including resonator 211: second circuit including resonator 220: first control signal frequency divider 221: second control signal frequency divider 225: first frequency division control signal 226: second frequency division control signal 230: subtractor 235: subtraction signal

[0153] The figures are schematic only and are not drawn to scale. In the figures, components corresponding to components already described may have the same reference numerals. DETAILED DESCRIPTION

[0154] The following figures may detail different specific examples. Specific examples may be combined to achieve enhanced or improved technical effects. Such combined specific examples may be explicitly mentioned in the full text, may be implied in the text, or may be implicit.

[0155] Figure 1 A first embodiment circuit 100 according to the present invention is schematically shown; the circuit comprises a first controllable fractional frequency divider 110, a first frequency phase detector 150 and a first loop filter 160. The controllable frequency divider may also be labeled as a first controllable frequency divider. The frequency phase detector may also be labeled as a phase detector, a first phase detector or a first frequency phase detector. The loop filter may also be labeled as a first loop filter.

[0156] The controllable frequency divider takes as input the first input signal 104 and the control signal and provides as output a first divided frequency signal 115. The control signal may also be labeled as a first control signal. The divided frequency signal may also be labeled as a first divided frequency signal. The first input signal is a periodic signal having a first frequency. The control signal is typically a signal having a large amount of energy in a relatively low frequency (such as substantially close to 0 Hz).

[0157] The controllable frequency divider generates a divided frequency signal. The divided frequency signal is a periodic signal having a divided frequency. The divided frequency is related to the first frequency based on the magnitude of the control signal. The magnitude of the signal may be the amplitude of the signal, the value of the signal, or any other property of the signal representing a measure. In the case where the control signal is an analog signal, the magnitude is typically the amplitude of the signal. In the case where the control signal is a digital signal, the magnitude is typically the value of the signal. Typically, the relationship between the input and output of the controllable frequency divider can be linearized as

[0158]

[0159] Where x is the magnitude of the control signal and a is the offset. In actual implementations, the set of numbers from which x and xa can be chosen is much more restricted.

[0160] The phase detector receives the divided signal and the second input signal 135 as inputs and provides a first phase difference signal 155 as output. The second input signal is a periodic signal having a second frequency. The first phase difference signal may also be labeled as a phase difference signal.

[0161] The magnitude of the phase difference signal is related to the phase difference between the divided frequency and the second frequency. Typically, the magnitude of the phase difference signal may have a minimum value at a phase difference of 0 degrees, 90 degrees or 90 degrees, depending on the implementation of the phase detector.

[0162] The loop filter takes the phase difference signal as input and provides a control signal as output. The loop filter is typically a low pass filter. The loop filter stabilizes a loop or feedback loop formed by a controllable frequency divider, a divided frequency signal, a frequency phase detector, a phase difference signal, a loop filter and a control signal.

[0163] Assume that the first frequency has not changed. Furthermore, assume that the crossover frequency is slightly higher than the second frequency, and that the crossover signal and the second input signal are in phase. Because the second input signal will begin to lag behind the crossover signal, the phase detector will detect an increase in the phase difference between the two signals. The increased phase difference will cause the magnitude of the phase difference signal to increase. Since it is implemented as a low pass filter, the loop filter will increase the magnitude of the control signal with some delay, damping and / or reduction. The increase in the control signal will result in the first frequency being divided by a larger magnitude, i.e., a higher value, to provide a lower crossover frequency. Thus, any frequency difference between the second frequency and the crossover frequency is reduced and / or minimized using a negative feedback loop. Furthermore, when the crossover frequency tracks the second frequency, the magnitude of the control signal will indicate the ratio between the first frequency and the second frequency.

[0164] In another case, assume that the first frequency is increasing. Furthermore, assume that the second frequency is stable. As the first frequency increases and the magnitude of the control signal stabilizes, the crossover frequency will increase. Because the second input signal will begin to lag behind the crossover signal, the phase detector will detect an increase in the phase difference between the two signals. The increased phase difference will cause the magnitude of the phase difference signal to increase. Since it is implemented as a low pass filter, the loop filter will increase the magnitude of the control signal with some delay, damping and / or reduction. The increase in the control signal will result in the first frequency (and therefore the higher value) being divided by a larger magnitude to provide a lower crossover frequency, which will essentially be the crossover frequency before the first frequency was increased. Therefore, due to the negative feedback loop, any change in the first frequency will result in the crossover frequency remaining essentially the same as the second frequency. Furthermore, as the crossover frequency tracks the second frequency, the magnitude of the control signal will indicate the ratio between the first frequency and the second frequency, which in this case will increase.

[0165] Since typically both the first and second frequencies vary, combinations of the above scenarios are possible.

[0166] In order to obtain an initial lock, the crossover frequency needs to be relatively close to the second frequency, such as the resonant frequency of the resonator that produces the second frequency, otherwise the locking procedure to obtain the initial lock may be quite complex and time-consuming. If the first or second frequency, or a combination of the first and second frequencies, moves faster than the resonator circuit can track, the lock may be lost. Preferably, the first frequency should not change so fast that the second frequency cannot be changed more quickly. Slow frequency movement of the first and second frequencies over a relatively large range allows the lock to be maintained. Fast frequency movement of the first and second frequencies over a relatively small range also allows the lock to be maintained.

[0167] For some circuits, the extent of the frequency shift may be known. Combining that knowledge with the circuit allows the resonator to be selected and the other components in the loop to be designed to maintain lock during operation. As a rule of thumb, if the dynamic frequency tracking speed of the loop is slower than the combined speed of the first and second frequency changes, lock will be lost.

[0168] Figure 2 A second specific example circuit 101 according to the present invention is schematically shown. The circuit comprises: Figure 1 The circuit may further include a second controllable frequency divider 111 , an adder 120 , a DAC 125 , a resonator 130 , an ADC 140 , a second frequency phase detector 151 and a second loop filter 161 .

[0169] The first controllable fractional frequency divider 110 takes the first input signal 104 and the first control signal 107 as input and provides a first divided frequency signal 115 as output. The second controllable frequency divider takes the third input signal 105 and the second control signal 108 as input and provides a second divided frequency signal 116 as output. The adder takes the first and second divided frequency signals as input and provides an added signal 121 as output. The added signal is the sum of the first and second divided frequency signals.

[0170] The optional DAC takes the summed signal as input and provides as output an excitation signal 129 suitable for causing the resonator to resonate. This provides the advantage of having many features of the circuit in the digital domain, while only requiring a single DAC to provide the excitation signal, which is typically an analog signal, to the resonator, which is typically a crystal or crystal oscillator. In addition, the divider is typically implemented in the digital domain, providing the advantages of ease of implementation and introduction of limited phase noise. The introduction of limited phase noise is primarily due to the higher granularity of the controllable digital fractional frequency divider compared to the integer divider.

[0171] In an alternative embodiment, there are two DACs at respective inputs of the adder, making the adder an analog adder. In another alternative embodiment, the circuit does not have any DACs in the loop. In yet another embodiment, the DAC is between the first loop filter output and the first controllable frequency divider, and preferably the second DAC is between the second loop filter output and the second controllable frequency divider.

[0172] The optional ADC takes the second input signal as input and provides a digital second signal 145 as output. This provides the advantage of having many features of the circuit in the digital domain while only requiring a single ADC to receive the second input signal (typically an analog signal) from the resonator (typically a crystal). In an alternative embodiment, the two ADCs are located between the respective phase detectors and the loop filters. In another embodiment, the two ADCs are located between the respective loop filters and the controllable frequency divider.

[0173] The first frequency phase detector 150 takes the first frequency-divided signal 115 and the digital second signal 145 as inputs, and provides a first phase difference signal 155 as output. The second frequency phase detector 151 takes the second frequency-divided signal 116 and the digital second signal 145 as inputs, and provides a second phase difference signal 156 as output. The first loop filter 160 takes the first phase difference signal as input, and provides a first control signal 107 as output. The second loop filter 161 takes the second phase difference signal as input, and provides a second control signal 108 as output.

[0174] Typically, the first crossover frequency and the second crossover frequency are different frequencies and are two resonant frequencies of the resonator. Therefore, the resonator is typically a resonator that allows resonances of different frequencies at the same time. Typically, the resonator is a crystal resonator. In addition, typically, at least one of the resonances is an overtone resonance, preferably, both resonances are overtone resonances.

[0175] As described before, if at least one of the first and second crossover frequencies is selected with an overtone frequency, the temperature behavior may be different. The temperature may vary within a temperature range of 40° C. to +125° C. Within this range, the temperature gradient of a certain overtone may vary.

[0176] Figure 3 The resonant modes of the crystal are shown around the fundamental resonant frequency. The crystal is a HC49U quartz crystal with a 3rd overtone resonance. This crystal is a normal AT cut crystal. The most dominant mode is marked. The measurement was performed at room temperature.

[0177] Figure 4 The resonance modes of the crystal around the 3rd harmonic resonance frequency are shown. The most dominant mode is marked. The measurements were performed at room temperature.

[0178] Figure 5 The resonance modes of the crystal around the 5th harmonic resonance frequency are shown. The most dominant mode is marked. The measurements were performed at room temperature.

[0179] The table below shows the measured resonant frequencies of the marked resonant modes.

[0180]

[0181] Figure 6 The temperature behavior of the resonant modes versus temperature is shown. The test setup contained a crystal mounted in an aluminum block with a thermal time constant of approximately one hour. The temperature of this block was stepped from room temperature to 120°C using a step size of 10°C.

[0182] Figure 6 Temperature is shown on the horizontal axis. Frequency deviation relative to a harmonic frequency, which may also be labeled as a first overtone frequency, is shown on the vertical axis.

[0183] The measurements show that the higher overtone frequencies deviate from the harmonic frequencies with temperature. It also shows that the rate of deviation changes with temperature. In addition, the relative frequency deviation shows a minimum value within the temperature range. This minimum value means that the rate of change of the frequency of the harmonic frequencies is equal to that of the higher overtone frequencies.

[0184] Figure 7 A third specific example circuit 102 according to the present invention is schematically shown. The circuit comprises: Figure 2 The circuit may further include a third controllable fractional frequency divider 112, a third frequency phase detector 152 and a third loop filter 162.

[0185] The first controllable fractional frequency divider 110 takes the first input signal 104 and the first control signal 107 as input and provides a first divided frequency signal 115 as output. The second controllable frequency divider takes the third input signal 105 and the second control signal 108 as input and provides a second divided frequency signal 116 as output. The third controllable frequency divider takes the fourth input signal 106 and the third control signal 109 as input and provides a third divided frequency signal 117 as output. The adder takes the first, second and third divided frequency signals as input and provides an added signal 121 as output. The added signal is the sum of the first, second and third divided frequency signals.

[0186] The first frequency phase detector 150 takes the first frequency division signal 115 and the digital second signal 145 as inputs, and provides a first phase difference signal 155 as output. The second frequency phase detector 151 takes the second frequency division signal 116 and the digital second signal 145 as inputs, and provides a second phase difference signal 156 as output. The third frequency phase detector 152 takes the third frequency division signal 117 and the digital third signal 145 as inputs, and provides a third phase difference signal 157 as output. The first loop filter 160 takes the first phase difference signal as input, and provides a first control signal 107 as output. The second loop filter 161 takes the second phase difference signal as input, and provides a second control signal 108 as output. The third loop filter 162 takes the third phase difference signal as input, and provides a third control signal 109 as output.

[0187] Typically, the first frequency division frequency, the second frequency division frequency and the third frequency division frequency are different frequencies and are all resonant frequencies of the resonator. Therefore, the resonator is typically a resonator that allows resonances of different frequencies at the same time. Typically, the resonator is a crystal resonator. In addition, typically, at least two of the resonances are overtone resonances, and preferably, all resonances are overtone resonances.

[0188] As described before, if at least one of the first and second crossover frequencies is selected with an overtone frequency, the temperature behavior may be different. The temperature may vary within a temperature range of 40° C. to +125° C. Within this range, the temperature gradient of a certain overtone may vary.

[0189] Figure 8 A system 200 according to a fourth embodiment of the invention is schematically shown. The system comprises a circuit 210 according to any embodiment of the invention, comprising a resonator and providing a control signal and a second control signal 108. The system further comprises a first control signal divider 220 configured to generate a first divided control signal 225 based on the control signal divided by the second control signal. The first divided control signal 225 is a first temperature indication.

[0190] Fig. 9 A system 201 according to a fifth specific example of the present invention is schematically shown. The system includes a circuit 211 according to any specific example of the present invention, which includes a resonator and provides a control signal, a second control signal 108 and a third control signal 109. The system further includes a first control signal divider 220, which is configured to generate a first frequency-divided control signal 225 based on the control signal divided by the second control signal. The first frequency-divided control signal 225 is a first temperature indication. The system further includes a second control signal divider 221, which is configured to generate a second frequency-divided control signal 226 based on the control signal divided by the third control signal. The second frequency-divided control signal 226 is a second temperature indication. The system further optionally includes a subtractor 230, which is configured to generate a subtraction signal 235 based on subtracting the second frequency-divided control signal from the first frequency-divided control signal. Typically, the first frequency-divided control signal and the second frequency-divided control signal have different minimum temperature activities. The subtraction signal is a temperature indication.

[0191] Combination with this feature Figure 2 The embodiment in which the embodiment is configured to resonate at two different resonant frequencies, the resonant frequencies being selected so that they have different activity dips, and the first and second control signals indicating the first and second ratios, respectively, are suitable for measuring temperature changes of a resonator (preferably a crystal resonator), such as Figure 8. In the context of the present application, a different minimum temperature activity is a minimum activity with a minimum frequency change at different or different temperatures. This minimum change may be related to another frequency of another signal. This specific example provides the advantage of being able to measure the temperature change of the resonator with high accuracy over the entire temperature range. Another advantage is that the division of the first ratio by the second ratio provides a ratio that is independent of the first frequency. Therefore, any temperature-related changes in the first frequency can be eliminated.

[0192] also, Figure 2 The specific examples in can be expanded to include Figure 7 . The third loop includes a third controllable fractional frequency divider 112, a third frequency phase detector 152 and a third loop filter 162, all of which are configured in a similar manner to the first and second loops. In addition, this specific example is extended with a first control signal divider, which generates a first divided control signal by dividing the control signal by a second control signal. In addition, this specific example is extended with a second control signal divider, which generates a second divided control signal by dividing the control signal by a third control signal. In addition, this specific example is extended with a subtractor, which is configured to generate a subtraction signal based on subtracting the second divided control signal from the first divided control signal, wherein the subtraction signal indicates the temperature of the resonator, such as Fig. 9 In addition, at least the first frequency division control signal and the second frequency division control signal have different minimum temperature activities.

[0193] This embodiment provides the advantage of being able to measure temperature changes of the resonator with high accuracy over the entire temperature range. Another advantage is that the division of the ratio provides a frequency division ratio that is independent of the first frequency. Thus, any temperature-related changes of the first frequency can be eliminated or at least minimized. Furthermore, any behavior of the resonator that changes the resonant frequency of the resonator, such as time-related characteristics, for example hysteresis, can be compensated.

[0194] The use of frequency measurement techniques allows a measurement accuracy of about 0.1 ppb to be achieved at a rate of 1 k samples / second. This shift to the system advantageously enables the measurement of small temperature changes of a resonator such as a crystal at a stable first frequency. Small temperature changes may be in the millikelvin range. In addition, the system is typically able to respond sufficiently quickly to the changes.

[0195] In an embodiment of the invention, an offset is added to the phase difference signal. This allows the loop to be locked at different angles. For example, if the frequency phase detector has a minimum output signal for a 0 degree phase shift at its input, the offset will cause the loop to be locked at a non-0 degree. For example, if the frequency phase detector has a minimum output signal for a 90 degree phase shift at its input, the offset will cause the loop to be locked at a non-90 degree.

[0196] In a specific example, an indirect readout resonator such as a crystal oscillator, a crystal or a crystal resonator may be used. This indirect readout may introduce a phase shift. As described above, this introduced phase shift may be corrected by introducing an offset.

[0197] In another specific example, the circuit includes a first input signal generator. Since the first frequency of the first input signal is divided by the controllable frequency divider, the first frequency will be higher, preferably much higher than the divided frequency. The high frequency generator uses a smaller inductor and / or capacitor. Therefore, the combination of the first input signal generator and the controllable frequency divider advantageously allows miniaturization and further integration of the circuit. The circuit can even be integrated on a chip, thereby allowing further reduction of noise-related problems of discrete electronic components and reducing crosstalk between such components. In addition, compared with directly generating the divided signal, the combination of the first input signal generator and the controllable frequency divider typically provides the advantage of lower phase noise.

[0198] The first input signal generator may be implemented as a VCO that is generating a first input signal having a first frequency that may be different from a second frequency of the second input signal. In the case of a resonator, the first frequency may be different from any resonant mode of the resonator. The first frequency may be higher and even a non-integer multiple of all modes.

[0199] This is different from the known method of using some crystals as resonators and applying a series PLL to obtain higher frequencies. This implementation provides the advantages of reducing component count and allowing further integration while allowing greater flexibility.

[0200] The signal may be a periodic signal. A periodic signal repeats itself after each period. The number of repetitions per second is equal to the frequency. In addition, the signal may have maximum values, such as amplitude or value, average signal level and RMS level. The signal in the context of this article may be an analog signal, such as a voltage signal, a current signal, a power signal and / or an energy signal. The signal in the context of this article may also be a digital signal representing a voltage signal, a current signal, a power signal and / or an energy signal. The frequency ratio is a frequency ratio signal.

[0201] The controllable frequency divider may be a digital controllable frequency divider. The controllable frequency divider may be a controllable multiple frequency divider. The controllable multiple frequency divider provides an output signal having an output frequency equal to the input frequency of the input signal divided by n, where n is the number of the set N. In the formula:

[0202]

[0203] Alternatively, the controllable frequency divider may be a controllable fractional frequency divider. In the formula:

[0204]

[0205] In practical implementations, controllable fractional frequency dividers may be limited to, for example:

[0206]

[0207] An exemplary embodiment of a digitally controllable multiple frequency divider, wherein the divider switches between a division number N and N + 1. The prerequisite is that if the divided signal is fed to a resonator, this resonator has a decent quality Q. By switching between N and N + 1, for example fractional numbers such as N + 3 / 4 or N + 5 / 7 are possible.

[0208] This digitally controllable multiple frequency divider can be implemented by adding an accumulator with a settable maximum value. In the example of N+3 / 4, an accumulator with a maximum capacity of 4 and a number of repeated additions of 3 will have a carry at 3 / 4 cycles. Whenever there is such a carry, the divider should be divided by the number N+1, and any other time dividers should be divided by N. This technique can be classified as shaping.

[0209] Higher order shaping can be accomplished by adding another accumulator and a small differentiator. Thus, for higher order shaping, the digitally controllable frequency divider can divide by N1, N, N+1, or N+2. Higher order shaping results in a spectral characteristic that shows a steeper roll-off, thereby generating less noise in the loop. Higher order shaping provides the circuit with the advantage of a more stable frequency ratio.

[0210] A DTC (Digital to Time Converter) can be used to shift the edges of a signal, such as the output of a digitally controllable multiple frequency divider. The digitally controllable multiple frequency divider divides by N and alternately divides by N+1 in a certain pattern, while the DTC interpolates the edges to near perfect timing. Thus, a DTC can reduce jitter introduced into the circuit, thereby providing the advantage of a more stable circuit and / or frequency ratio.

[0211] The two methods described above, digitally controllable multiple frequency dividers and DTC, have different performances in terms of noise and accuracy. Digitally controllable multiple frequency dividers provide a divided signal, where loop stability and, if applicable, accuracy depends on the filter rejection of the loop filter and whether there is a resonator. On the other hand, DTC provides better initial accuracy, but has the disadvantage that it adds a larger noise component to the spectrum. Since the advantages and disadvantages vary with the characteristics of other circuit components (especially with other circuit components in the loop) and the signal provided to the circuit, it is difficult to easily determine which advantage or disadvantage dominates.

[0212] The frequency phase detector may be a mixer, an analog multiplier, a digital circuit, or a logic circuit configured as a phase detector. The frequency phase detector, phase detector, or phase detector generates an output signal, such as a phase difference signal, which represents the phase difference between two input signals, such as between the divided signal and the second input signal. Depending on the type of frequency phase detector, it may be necessary to phase shift the input signal to provide an output signal that can be used to lock the loop. As an example, a logic circuit phase detector made of mutexes or logic gates typically locks the loop at a 90 degree phase shift between the input signals.

[0213] The loop filter stabilizes the loop. The loop filter can further stabilize the loop in view of the input signal provided to the circuit. If a resonator is present, the loop filter can further stabilize the circuit taking into account the characteristics of the resonator. The loop filter can be a first order or multi-order filter. The loop filter is typically a low pass filter. The cutoff frequency of the loop filter is typically a balance between the accuracy and speed of interference correction in the circuit. A lower cutoff frequency provides more accuracy because the entire loop filter allows less jitter, while a higher cutoff frequency provides a faster response to changes in the circuit (such as temperature changes). In addition, the loop locking characteristics of the circuit may be affected by the loop filter, especially the choice of cutoff frequency. An important factor in designing the loop filter is to consider the loop gain. The loop filter is typically implemented as a PID controller.

[0214] A resonator has a fundamental frequency, which is the lowest frequency at which it resonates. In addition, a resonator can resonate at harmonic frequencies, which follow the relationship:

[0215]

[0216] Additionally, a resonator may resonate at an overtone frequency that follows the relationship:

[0217]

[0218] The resonant frequency of a crystal, crystal oscillator or crystal resonator may be an even or odd harmonic and associated overtones. Typically, odd harmonics and associated overtones are used to make the crystal resonate.

[0219] It should be noted that the figures are diagrammatic only and are not drawn to scale. In the figures, components corresponding to components already described may have the same reference numerals.

[0220] It should be noted that the specific examples mentioned above illustrate rather than limit the present invention, and that a person skilled in the art will be able to design many alternative specific examples without departing from the scope of the appended claims. In the claims, any reference signs placed between brackets should not be interpreted as limiting the claims. The use of the verb "comprise" and its conjugations does not exclude the presence of components or stages other than those in the claims. The article "a" or "an" before a component does not exclude the presence of a plurality of such components. The present invention may be implemented by means of hardware comprising several distinct components and by means of a suitably programmed computer or processor. In a device claim that lists several components, several of these components may be embodied by the same hardware item. The fact that certain measures are recorded in mutually different dependent claims does not indicate that a combination of these measures cannot be used advantageously.

[0221] Examples, specific examples, or optional features, whether indicated as non-limiting, should not be construed as limiting the claimed invention.

Claims

1. A circuit for determining a frequency ratio between a first input signal (104) having a first frequency and a second input signal (135) having a second frequency, wherein the circuit comprises: a first controllable fractional frequency divider (110) configured to generate a first divided frequency signal (115) having a divided frequency that is substantially the first frequency divided by a magnitude of a control signal; a resonator (130) configured to be excited by an excitation signal (129) having the divided frequency and based on the first divided frequency signal, and to generate the second input signal; a first frequency phase detector (150) configured to generate a first phase difference signal (155) based on a frequency phase difference between the divided frequency of the first divided frequency signal and the second frequency of the second input signal; and a first loop filter (160) configured to generate the control signal based on the first phase difference signal; wherein a loop is formed by the first controllable fractional frequency divider, the first frequency division signal, the first frequency phase detector, the first phase difference signal, the first loop filter and the control signal; The first loop filter filters the first phase difference signal to prevent instability of the loop; and The control signal indicates the frequency ratio.

2. The circuit of claim 1, wherein the first phase difference signal has a magnitude based on the frequency phase difference, and / or the control signal has a magnitude indicative of the frequency ratio.

3. The circuit according to claim 1 or 2, wherein the first loop filter is a low pass filter.

4. The circuit according to claim 1 or 2, comprising an analog-to-digital converter, the analog-to-digital converter being configured to generate a digital second signal based on the second input signal, wherein the digital second signal is supplied to the first frequency phase detector.

5. The circuit of claim 1 or 2, comprising a signal generator generating the first frequency, wherein the frequency change rate is within a dynamic frequency tracking range of the loop, and a maximum change rate of the first frequency marks an edge of the dynamic frequency tracking range. 6 . The circuit of claim 5 , wherein the excitation signal is phase-shifted relative to the second input signal or is substantially in phase with the second input signal.

7. The circuit according to claim 1 or 2, wherein the second frequency is a resonant frequency of the resonator. The circuit of claim 7 , wherein the resonator is a crystal resonator. 9 . The circuit according to claim 1 , further comprising a digital-to-analog converter configured to generate the excitation signal based on the first frequency-divided signal.

10. The circuit according to claim 1 or 2, wherein the circuit is configured to determine a second frequency ratio between a third input signal (105) having a third frequency and the second input signal having a fourth frequency, wherein the circuit comprises: a second controllable fractional frequency divider (111) configured to generate a second divided signal (116), the second divided signal having a second divided frequency, the second divided frequency being substantially the third frequency divided by a magnitude of a second control signal (108); an adder (120) configured to generate a summed signal (121) supplied to the resonator, wherein the summed signal is based on adding the first frequency-divided signal and the second frequency-divided signal; a second frequency phase detector (151) configured to generate a second phase difference signal (156) based on a second frequency phase difference between the second divided frequency of the second divided frequency signal and the fourth frequency of the second input signal; and a second loop filter (161) configured to generate the second control signal based on the second phase difference signal; wherein a second loop is formed by the second controllable fractional frequency divider, the second frequency division signal, the second frequency phase detector, the second phase difference signal, the second loop filter and the second control signal; The second loop filter filters the second phase difference signal to prevent instability of the second loop; and The second control signal indicates the second frequency ratio.

11. The circuit of claim 10, wherein the second phase difference signal has a second magnitude based on the second frequency phase difference, and / or the second control signal has a magnitude indicative of the second frequency ratio.

12. The circuit of claim 10, wherein the second frequency and the fourth frequency are different.

13. The circuit of claim 10, wherein the resonator is a crystal resonator, and the fourth frequency is an overtone frequency of the crystal resonator. The circuit according to claim 10 , wherein the third input signal is the first input signal.

15. The circuit of claim 10, wherein the circuit is configured to determine a third frequency ratio between a fourth input signal (106) having a fifth frequency and the second input signal having a sixth frequency, wherein the circuit comprises: a third controllable fractional frequency divider (112) configured to generate a third divided signal (117), the third divided signal having a third divided frequency, the third divided frequency being substantially the fifth frequency divided by a value of a third control signal; a third frequency phase detector (152) configured to generate a third phase difference signal (157) based on a third frequency phase difference between the third divided frequency of the third divided frequency signal and the sixth frequency of the second input signal; and a third loop filter (162) configured to generate the third control signal based on the third phase difference signal; wherein the added signal is further based on the addition of the third frequency-divided signal; wherein a third loop is formed by the third controllable fractional frequency divider, the third frequency division signal, the third frequency phase detector, the third phase difference signal, the third loop filter and the third control signal; wherein the third loop filter filters the third phase difference signal to prevent instability of the third loop; and The third control signal indicates the third frequency ratio. 16 . The circuit of claim 15 , wherein the third phase difference signal has a third magnitude based on the third frequency phase difference, and / or the third control signal has a magnitude indicative of the third frequency ratio.

17. The circuit according to claim 15, wherein the second frequency and the fourth frequency are different; wherein the second frequency and the sixth frequency are different; and / or The fourth frequency and the sixth frequency are different.

18. The circuit of claim 15, wherein the resonator is a crystal resonator, and the sixth frequency is an overtone frequency of the crystal resonator. The circuit of claim 15 , wherein the fourth input signal is the first input signal.

20. A system for determining an indication of a temperature of a resonator, wherein the system comprises: A circuit according to any one of claims 10 to 14, comprising the resonator and providing the control signal and the second control signal; and a control signal divider configured to generate a divided control signal based on the control signal divided by the second control signal; The frequency division control signal is the temperature indication.

21. A system for determining an indication of a temperature of a resonator, wherein the system comprises: A circuit according to any one of claims 15 to 19, comprising the resonator and providing the control signal, the second control signal and the third control signal; and a first control signal divider (220) configured to generate a first divided control signal (225) based on the control signal divided by the second control signal; a second control signal frequency divider (221) configured to generate a second frequency-divided control signal (226) based on the control signal divided by the third control signal; and a subtractor (230) configured to generate a subtraction signal (235) based on subtracting the second frequency division control signal from the first frequency division control signal; wherein the first frequency division control signal and the second frequency division control signal have different minimum temperature activities; and The subtraction signal is the temperature indication.

22. A method for determining a frequency ratio between a first input signal (104) having a first frequency and a second input signal (135) having a second frequency, wherein the method comprises the following steps: Generating a first frequency-divided signal (115), the first frequency-divided signal having a frequency-divided frequency, the frequency-divided frequency being substantially the first frequency divided by a value of a control signal; generating an excitation signal (129), the excitation signal having the divided frequency and based on the first divided frequency signal; generating the second input signal through a resonator excited by the excitation signal; generating a first phase difference signal (155) based on a frequency phase difference between the divided frequency of the first divided frequency signal and the second frequency of the second input signal; and generating the control signal based on filtering the first phase difference signal; wherein a loop is formed by the first frequency-divided signal, the first phase difference signal and the control signal; wherein the first phase difference signal is filtered to prevent instability of the loop; and The control signal indicates the frequency ratio.

23. A method for determining an indication of a temperature of a resonator, wherein the method comprises the steps of: Generating a first frequency-divided signal (115) having a first frequency-divided frequency, the first frequency-divided frequency being substantially a first frequency of a first input signal (104) divided by a magnitude of a first control signal (107); generating a second divided-frequency signal (116) having a second divided-frequency frequency, the second divided-frequency frequency being substantially the first frequency of the first input signal divided by a magnitude of a second control signal (108); generating a sum signal (121) supplied to the resonator, wherein the sum signal is based on the addition of the first frequency-divided signal and the second frequency-divided signal; supplying the added signal to the resonator; Receive a second input signal (135) from the resonator, the second input signal comprising a second-first frequency and a second-second frequency, the second-first frequency and the second-second frequency being responses of the resonator to the first divided frequency and the second divided frequency; Generating a first phase difference signal (155) based on a first frequency phase difference between the first frequency division frequency of the first frequency division signal and the second frequency of the second input signal; generating the first control signal based on filtering the first phase difference signal; Generating a second phase difference signal (156) based on a second frequency phase difference between the second frequency division frequency of the second frequency division signal and the second second frequency of the second input signal; generating the second control signal based on filtering the second phase difference signal; Generating a first frequency-divided control signal (225) based on dividing the first control signal by the second control signal; A first loop is formed by the first frequency-divided signal, the first phase difference signal and the first control signal; A second loop is formed by the second frequency-divided signal, the second phase difference signal and the second control signal; The filtering of the first control signal is provided to filter the first phase difference signal so as to prevent instability of the first loop; The filtering of the second control signal is provided to filter the second phase difference signal so as to prevent instability of the second loop; wherein the second-first frequency of the second input signal and the second-second frequency of the second input signal have different minimum temperature activities; and The frequency division control signal is a temperature indication.

24. A method for determining a hysteresis and / or temperature indication of a resonator, wherein the method comprises the following steps: Generating a first frequency-divided signal (115) having a first frequency-divided frequency, the first frequency-divided frequency being substantially a first frequency of a first input signal (104) divided by a magnitude of a first control signal (107); generating a second divided-frequency signal (116) having a second divided-frequency frequency, the second divided-frequency frequency being substantially the first frequency of the first input signal divided by a magnitude of a second control signal (108); generating a third frequency-divided signal (117) having a third frequency-divided frequency, the third frequency-divided frequency being substantially the first frequency of the first input signal divided by a magnitude of a third control signal; generating a sum signal (121) supplied to the resonator, wherein the sum signal is based on adding the first frequency-divided signal, the second frequency-divided signal and the third frequency-divided signal; supplying the added signal to the resonator; Receive a second input signal (135) from the resonator, the second input signal comprising a second-first frequency, a second-second frequency and a second-third frequency, the second-first frequency, the second-second frequency and the second-third frequency being responses of the resonator to the first frequency division frequency, the second frequency division frequency and the third frequency division frequency; Generating a first phase difference signal (155) based on a first frequency phase difference between the first frequency division frequency of the first frequency division signal and the second frequency of the second input signal; generating the first control signal based on filtering the first phase difference signal; Generating a second phase difference signal (156) based on a second frequency phase difference between the second frequency division frequency of the second frequency division signal and the second second frequency of the second input signal; generating the second control signal based on filtering the second phase difference signal; generating a third phase difference signal based on a third frequency phase difference between the third frequency-divided frequency of the third frequency-divided signal and the second third frequency of the second input signal; generating the third control signal based on filtering the third phase difference signal; Generating a first frequency-divided control signal (225) based on dividing the first control signal by the second control signal; generating a second frequency-divided control signal (226) based on dividing the first control signal by the third control signal; and generating a subtraction signal (235) based on subtracting the second frequency division control signal from the first frequency division control signal; A first loop is formed by the first frequency-divided signal, the first phase difference signal and the first control signal; A second loop is formed by the second frequency-divided signal, the second phase difference signal and the second control signal; A third loop is formed by the third frequency-divided signal, the third phase difference signal and the third control signal; The filtering of the first control signal is provided to filter the first phase difference signal so as to prevent instability of the first loop; The filtering of the second control signal is provided to filter the second phase difference signal so as to prevent instability of the second loop; The filtering of the third control signal is provided to filter the third phase difference signal so as to prevent instability of the third loop; wherein the second-first frequency of the second input signal, the second-second frequency of the second input signal, and the second-third frequency of the second input signal have different minimum temperature activities relative to each other; and The subtraction signal is a hysteresis and / or temperature indicator.

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