Light-emitting device, light-emitting component, and flip-chip integrated circuit chip

Abstract

The present application discloses a light-emitting device, a light-emitting component, and a flip-chip integrated circuit chip. The flip-chip integrated circuit chip includes a flip-chip integrated circuit chip, a plurality of flip-chip light-emitting diode chips, and a substrate. The flip-chip integrated circuit chip has a plurality of flip-chip pads. The plurality of flip-chip light-emitting diode chips are arranged at intervals from the flip-chip integrated circuit chip. The substrate carries the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips, and the plurality of flip-chip pads of the flip-chip integrated circuit chip and the plurality of electrodes of the plurality of flip-chip light-emitting diode chips are arranged on the substrate in a welding manner, and the plurality of flip-chip light-emitting diode chips are electrically coupled to the flip-chip integrated circuit chip through the substrate. Accordingly, the flip-chip integrated circuit chip forms a plurality of flip-chip pads through the circuit reconstruction layer to be suitable for the flip-chip process.

Description

Technical Field

[0001] The present application relates to an integrated circuit chip, and more particularly to a light-emitting device, a light-emitting component, and a flip-chip integrated circuit chip. Background Art

[0002] The existing integrated circuit chip used to drive the light emitting diode chip has a plurality of wire bonding pads that are only suitable for wire bonding. Therefore, any light emitting device using the existing integrated circuit chip will have its structure affected by the plurality of wire bonding pads and will be difficult to further improve.

[0003] Therefore, the applicant believes that the above defects can be improved, and has devoted himself to research and applied scientific principles, and finally proposed an application that is reasonably designed and effectively improves the above defects. Summary of the invention

[0004] The embodiments of the present application provide a light emitting device, a light emitting component, and a flip-chip integrated circuit chip, which can effectively improve the defects that may occur in the existing integrated circuit chips.

[0005] The embodiment of the present application discloses a light-emitting device, characterized in that the light-emitting device includes: a flip-chip integrated circuit chip having a plurality of flip-chip pads; a plurality of flip-chip light-emitting diode chips, which are arranged at intervals from the flip-chip integrated circuit chip; and a substrate, carrying the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips, the plurality of flip-chip pads of the flip-chip integrated circuit chip and the plurality of electrodes of the plurality of flip-chip light-emitting diode chips being arranged on the substrate in a welding manner, and the plurality of flip-chip light-emitting diode chips being electrically coupled to the flip-chip integrated circuit chip through the substrate.

[0006] Preferably, the flip-chip integrated circuit chip comprises: a chip body; a plurality of metal pads, which are arranged on a surface of the chip body, and the edges of the plurality of metal pads define a layout boundary, and the plurality of metal pads are located within the layout boundary; a circuit reconstruction layer, which is formed on the surface of the chip body and buries the plurality of metal pads therein; a metal layer, which is arranged on the circuit reconstruction layer and is electrically coupled to the plurality of metal pads respectively through the circuit reconstruction layer; and a solder mask layer having a plurality of openings, the solder mask layer being arranged on the metal layer so that the metal layer defines a plurality of flip-chip pads exposed from the plurality of openings outside the solder mask layer, the plurality of flip-chip pads are located within the layout boundary, and at least one flip-chip pad is spaced apart from the layout boundary.

[0007] Preferably, the areas of the plurality of flip chip pads are the same, and the area of ​​any flip chip pad is larger than the area of ​​the metal pad to which it is electrically coupled.

[0008] Preferably, the substrate includes: a first insulating layer; a first metal layer formed on the first insulating layer, and the first metal layer includes an integrated circuit chip bonding area and a light-emitting diode chip bonding area; a second insulating layer, which is located on opposite sides of the first insulating layer as the first metal layer; and a second metal layer and a third metal layer, which are electrically coupled to each other, and the light-emitting diode chip bonding area is electrically coupled to the integrated circuit chip bonding area through the second metal layer; wherein the third metal layer is located on the side of the second insulating layer away from the first insulating layer.

[0009] Preferably, the substrate includes: an upper solder mask layer formed on the first insulating layer, and the upper solder mask layer is formed with a plurality of openings to expose the integrated circuit chip solid crystal area and the light-emitting diode chip solid crystal area; and a lower solder mask layer arranged on the second insulating layer and adjacent to the third metal layer.

[0010] Preferably, the upper solder mask layer comprises a light emitting diode chip solder mask area and an integrated circuit chip solder mask area, the light emitting diode chip solder mask area and the integrated circuit chip solder mask area are separated from each other and are respectively formed with a plurality of the openings.

[0011] Preferably, the light-emitting device includes: a wall, which is arranged on the substrate and forms a first accommodating space and a second accommodating space; wherein the flip-chip integrated circuit chip is located in the first accommodating space, and the plurality of flip-chip light-emitting diode chips are located in the second accommodating space; and a light-transmitting packaging body, which at least fills the second accommodating space and buries the plurality of flip-chip light-emitting diode chips therein.

[0012] Preferably, the light-transmitting package body comprises a light-emitting surface, and the light-emitting surface is parallel to the substrate and faces a side away from the substrate, or the light-emitting surface is perpendicular to the substrate and faces a side away from the flip-chip integrated circuit chip.

[0013] Preferably, the surrounding wall forms a third accommodating space, and the first accommodating space is located between the second accommodating space and the third accommodating space, and the light emitting device includes a light sensor located in the third accommodating space.

[0014] The embodiment of the present application discloses a light-emitting component, including: a flip-chip integrated circuit chip having a plurality of flip-chip pads; a plurality of flip-chip light-emitting diode chips, which are arranged at intervals from the flip-chip integrated circuit chip; and a light-transmitting package, which is an integrally formed single-piece structure and covers the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips; wherein the plurality of flip-chip pads of the flip-chip integrated circuit chip and the plurality of electrodes of the plurality of flip-chip light-emitting diode chips are exposed outside the light-transmitting package.

[0015] The embodiment of the present application discloses a flip-chip integrated circuit chip, comprising: a chip body; a plurality of metal pads disposed on a surface of the chip body; a circuit reconstruction layer formed on the surface of the chip body and burying the plurality of metal pads therein; and a plurality of flip-chip pads disposed on the circuit reconstruction layer and electrically coupled to the plurality of metal pads through the circuit reconstruction layer; wherein the layout distribution of the plurality of flip-chip pads is average compared to the layout distribution of the plurality of metal pads.

[0016] Preferably, a projection area formed by orthographically projecting the plurality of flip chip pads toward the surface of the chip body does not cover any of the metal pads.

[0017] Preferably, the layout boundary defines a nine-square grid area, and a projection area formed by the orthographic projection of the plurality of flip chip pads toward the surface of the chip body has a greater number of spaces located in the nine-square grid area than the number of spaces located in the nine-square grid area of ​​the plurality of metal pads.

[0018] Preferably, local edges of a portion of the plurality of flip chip pads fall on the layout boundary, and the remaining portions of the plurality of flip chip pads are spaced apart from the layout boundary.

[0019] Preferably, the circuit reconstruction layer includes: a first polymer layer formed on the surface and arranged around the plurality of metal pads; a circuit extension layer arranged on the first polymer layer and the plurality of metal pads and electrically coupled to the plurality of metal pads; and a second polymer layer arranged around the circuit extension layer, and the circuit extension layer protrudes out of the second polymer layer.

[0020] Preferably, the circuit reconstruction layer comprises a solder mask layer, and the solder mask layer is disposed on the second polymer layer and the circuit extension layer, and exposes a plurality of flip chip pads.

[0021] In summary, the light-emitting device, light-emitting component, and flip-chip integrated circuit chip disclosed in the embodiments of the present application adopt a flip-chip integrated circuit chip with multiple flip-chip pads, so that the flip-chip integrated circuit chip can be suitable for a flip-chip process. In the face of the trend of lightweight and thin terminal devices, the light-emitting device, light-emitting component, and flip-chip integrated circuit chip with the smallest size and thinnest area are provided.

[0022] To further understand the features and technical contents of the present application, please refer to the following detailed description and drawings of the present application. However, such description and drawings are only used to illustrate the present application and are not intended to limit the scope of protection of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a three-dimensional schematic diagram of the light emitting device according to the first embodiment of the present application.

[0024] Figure 2 for Figure 1 Schematic diagram of the decomposition.

[0025] Figure 3 for Figure 2 Schematic diagram of the exploded view of the flip chip integrated circuit chip in FIG.

[0026] Figure 4 for Figure 2 Schematic cross-sectional view along section line IV-IV.

[0027] Figure 5 for Figure 2 Schematic diagram of the bottom view of the flip-chip integrated circuit chip (the solder mask is omitted).

[0028] Figure 6 for Figure 2 Schematic diagram of the exploded view of the substrate in FIG.

[0029] Figure 7 for Figure 1 Schematic cross-sectional view along section line VII-VII.

[0030] Figure 8 It is a three-dimensional schematic diagram of a light emitting device according to the second embodiment of the present application.

[0031] Fig. 9 for Figure 8 Schematic cross-sectional view along section line IX-IX.

[0032] Fig.10 It is a three-dimensional schematic diagram of the light-emitting device of the third embodiment of the present application.

[0033] Fig.11 for Fig.10 Schematic cross-sectional view along section line XI-XI.

[0034] Fig.12 It is a three-dimensional schematic diagram of the light-emitting component of the fourth embodiment of the present application.

[0035] Fig.13 for Fig.12 Schematic cross-sectional view along section line XIII-XIII. DETAILED DESCRIPTION

[0036] The following is an explanation of the implementation methods of the "light-emitting device, light-emitting component, and flip-chip integrated circuit chip" disclosed in this application through specific embodiments. Those skilled in the art can understand the advantages and effects of this application from the contents disclosed in this specification. This application can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of this application. In addition, the drawings of this application are only simple schematic illustrations and are not depicted according to actual sizes. It is stated in advance. The following implementation methods will further explain the relevant technical contents of this application in detail, but the disclosed contents are not intended to limit the scope of protection of this application.

[0037] It should be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0038] [Example 1]

[0039] See also Figures 1 to 7 As shown, it is the first embodiment of the present application. Figure 1 and Figure 2As shown, the present embodiment discloses a light emitting device 100 or a light emitting diode package structure 100, comprising a flip-chip integrated circuit chip 1, a plurality of flip-chip light emitting diode chips 2, a substrate 3, a wall 4, and a light-transmitting package body 5. The flip-chip integrated circuit chip 1 and the plurality of flip-chip light emitting diode chips 2 are mounted on the substrate 3, for example, by a steel plate opening and tinning design to set solder paste on the substrate 3, so that the flip-chip integrated circuit chip 1 and the plurality of flip-chip light emitting diode chips 2 can be soldered on the substrate 3 by solder paste. The present application replaces solder balls / solder bumps by tinning, thereby reducing the overall thickness of the light emitting device 100. The wall 4 is formed on the substrate 3 and surrounds the outside of the flip-chip integrated circuit chip 1 and the plurality of flip-chip light emitting diode chips 2, and the light-transmitting package body 5 is arranged in the wall 4 and formed on the substrate 3 to bury the flip-chip integrated circuit chip 1 and the plurality of flip-chip light emitting diode chips 2 therein.

[0040] It should be noted that, although the flip-chip integrated circuit chip 1 is described in this embodiment as being used in combination with the above-mentioned components, the present application is not limited thereto. For example, in other embodiments not shown in the present application, the flip-chip integrated circuit chip 1 can be used alone (e.g., sold) or used in combination with other components. The following describes the structure of each component of the light-emitting device 100 and its connection relationship.

[0041] like Figures 3 to 5 As shown, the flip-chip integrated circuit chip 1 includes a chip body 11, a plurality of metal pads 12 electrically coupled to the chip body 11, a circuit reconstruction layer (redistribution layer, RDL) 13 connected to the plurality of metal pads 12, a metal layer 14 connected to the circuit reconstruction layer 13, and a solder mask 15 covering the metal layer 14. The solder mask 15 has a plurality of openings, so that the metal layer 14 defines a plurality of flip-chip pads 141 exposed outside the solder mask from the plurality of openings, and the flip-chip integrated circuit chip 1 is bonded to the substrate 3 through the plurality of flip-chip pads 141.

[0042] The function of the chip body 11 (eg, driving) corresponds to the plurality of flip-chip LED chips 2, and the plurality of metal pads 12 are disposed on a surface 111 of the chip body 11 (eg, Figure 3The circuit reconstruction layer 13 is formed on the surface 111 of the chip body 11 and buries a plurality of the metal pads 12 therein, and a plurality of the flip chip pads 141 are disposed on the circuit reconstruction layer 13 and are electrically coupled to the plurality of the metal pads 12 through the circuit reconstruction layer 13. For example, the metal pad 12 may be an aluminum pad suitable for wire bonding, that is, the metal pad 12 may be used as a wire bonding pad. The metal pad 12 may also include an alloy layer, such as gold or nickel-gold, and the alloy layer may be further disposed on the aluminum pad.

[0043] Furthermore, the plurality of metal pads 12 suitable only for wire bonding process can be extended through the circuit reconstruction layer 13 to form a plurality of flip chip pads 141 suitable for flip chip process. For ease of understanding, the circuit reconstruction layer 13 is described in the present embodiment with the following structure, but the specific structure of the circuit reconstruction layer 13 can be adjusted and changed according to design requirements and is not limited to the present embodiment.

[0044] The circuit reconstruction layer 13 is a multi-layer structure, which at least includes a first polymer layer 131, a second polymer layer 133, and a circuit extension layer 132. The first polymer layer 131 is formed on the surface 111 and disposed around the plurality of metal pads 12. In this embodiment, the first polymer layer 131 is disposed in the same plane as the plurality of metal pads 12 and covers the entire surface 111.

[0045] The second polymer layer 133 is disposed on the first polymer layer 131, and the circuit extension layer 132 is disposed on the first polymer layer 131 and the plurality of metal pads 12 and electrically coupled to the plurality of metal pads 12. The second polymer layer 133 is disposed around the circuit extension layer 132, and the circuit extension layer 132 and the second polymer layer 133 are disposed in the same plane. The metal layer 14 is disposed on the circuit extension layer 132 and protrudes out of the surfaces of the circuit extension layer 132 and the second polymer layer 133.

[0046] Furthermore, the circuit extension layer 132 can be made of a material that can be stably connected to the plurality of metal pads 12 (e.g., silver glue), and the metal layer 14 can be made of a metal / alloy material that can be stably connected to the circuit extension layer 132 and can absorb tin, so that the plurality of flip chip pads 141 are suitable for the material of the flip chip process. The metal layer 14 can be made of a metal material or alloy material that can absorb tin, such as gold or nickel gold.

[0047] The solder mask layer 15 is disposed on the metal layer 14 and exposes the plurality of flip chip pads 141 through openings. In other words, a portion of the metal layer 14 is buried in the solder mask layer 15 .

[0048] In more detail, the flip-chip integrated circuit chip 1 can be adjusted upward toward multiple faces suitable for the flip-chip process through the circuit reconstruction layer 13. For example, in this embodiment, the material of any flip-chip pad 141 (such as gold or nickel gold) is different from the material of any metal pad 12 (such as aluminum), and the areas of the flip-chip pads 141 are the same, and the area of ​​any flip-chip pad 141 is larger than the area of ​​the metal pad 12 to which it is electrically coupled, so that any flip-chip pad 141 can be stably connected during the flip-chip process.

[0049] Furthermore, the flip-chip integrated circuit chip 1 can also make the plurality of flip-chip pads 141 evenly distributed corresponding to the surface 111 through the circuit reconstruction layer 13, that is, the layout distribution of the plurality of flip-chip pads 141 is evenly distributed compared to the layout distribution of the plurality of metal pads 12, so as to facilitate the application in the flip-chip process. For the convenience of describing this embodiment, the edges of the plurality of metal pads 12 define a layout boundary B, and the plurality of metal pads 12 are located within the layout boundary B; wherein, the layout boundary B is described as a square in this embodiment, but the present application is not limited thereto.

[0050] Furthermore, the plurality of flip chip pads 141 are located within the layout boundary B, and at least one of the flip chip pads 141 is spaced apart from the layout boundary B. In this embodiment, a portion of the plurality of flip chip pads 141 (eg, located Figure 5 The partial edges of the two flip chip pads 141 at the lower left and upper right fall on the layout boundary B, while the rest of the flip chip pads 141 are spaced apart from the layout boundary B. Accordingly, the flip chip integrated circuit chip 1 can be provided with the circuit reconstruction layer 13 so that at least one flip chip pad 141 moves toward the inner side of the layout boundary B, thereby facilitating the even distribution of the flip chip pads 141 corresponding to the surface 111.

[0051] Furthermore, to facilitate explaining the extent to which the flip chip pads 141 are evenly distributed corresponding to the surface 111 , the layout boundary B may be further defined as a Jiugongge area J, and the nine spaces in the Jiugongge area J have substantially the same area.

[0052] The number of spaces where the metal pads 12 are located in the nine-square grid area J is less than the number of the flip chip pads 141. That is, at least one space in the nine-square grid area J corresponds to at least two metal pads 12, so the distribution of the flip chip pads 141 appears to be denser.

[0053] Furthermore, the number of spaces in the nine-square grid area J formed by the orthographic projection of the plurality of flip chip pads 141 toward the surface 111 of the chip body 11 is equal to the number of the plurality of flip chip pads 141. In other words, any space in the nine-square grid area J corresponds to at most one flip chip pad 141, so the distribution of the plurality of flip chip pads 141 is relatively even, which is conducive to evenly tinning and not easy to rotate during the flip chip process, thereby stably connecting.

[0054] To put it another way, the number of spaces (e.g., seven in this embodiment) located in the nine-square grid area J of the projection area formed by the orthographic projection of the multiple flip-chip pads 141 toward the surface 111 of the chip body 11 is greater than the number of spaces (e.g., five in this embodiment) located in the nine-square grid area J of the multiple metal pads 12.

[0055] In addition, the projection area formed by the positive projection of the plurality of flip chip pads 141 toward the surface 111 of the chip body 11 does not cover any of the metal pads 12, thereby preventing any of the flip chip pads 141 from interfering with the corresponding metal pad 12 due to the formation of the circuit reconstruction layer 13 and affecting the yield.

[0056] like Figure 2 , Figure 6 ,and Figure 7 As shown, the substrate 3 carries the flip-chip integrated circuit chip 1 and the plurality of flip-chip light-emitting diode chips 2, and the flip-chip integrated circuit chip 1 and the plurality of flip-chip light-emitting diode chips 2 are arranged at intervals. Furthermore, the substrate 3 electrically couples the plurality of flip-chip pads 141 of the flip-chip integrated circuit chip 1 with the plurality of electrodes 21 of the plurality of flip-chip light-emitting diode chips 2.

[0057] Furthermore, in order to enable the substrate 3 to be accurately connected to the substrate 3 to electrically couple the multiple flip-chip pads 141 of the flip-chip integrated circuit chip 1 and the multiple electrodes 21 of the flip-chip light-emitting diode chips 2 during the flip-chip process, the substrate 3 is described in the present embodiment with the following structure, but the specific structure of the substrate 3 can be adjusted and changed according to design requirements and is not limited to that contained in the present embodiment.

[0058] The substrate 3 includes a first insulating layer 31 , a first metal layer 32 and a second insulating layer 33 respectively located on opposite sides of the first insulating layer 31 , and a second metal layer 34 and a third metal layer 35 formed on the second insulating layer 33 .

[0059] The first insulating layer 31 is in a stepped shape in this embodiment and has a lower step portion 311 and two upper step portions 312 formed at intervals on the lower step portion 311, and the first metal layer 32 is formed on (the two upper step portions 312 of) the first insulating layer 31. In this embodiment, the first metal layer 32 includes an integrated circuit chip bonding area 321 and a light-emitting diode chip bonding area 322, which are respectively located on the two upper step portions 312.

[0060] The second insulating layer 33 is connected to the lower step portion 311 of the first insulating layer 31, the second metal layer 34 is buried in the first insulating layer 31 and the second insulating layer 33, and the third metal layer 35 is located on the side of the second insulating layer 33 away from the first insulating layer 31. The second metal layer 34 includes a plurality of extending wires 341 spanning the two upper step portions 312, and a plurality of conductive pillars 342 connected to the plurality of extending wires 341, and the second metal layer 34 is respectively connected to the light emitting diode chip bonding area 322, the integrated circuit chip bonding area 321, and the third metal layer 35 through the plurality of conductive pillars 342, so that the second metal layer 34 and the third metal layer 35 are electrically coupled to each other, and the light emitting diode chip bonding area 322 is electrically coupled to the integrated circuit chip bonding area 321 through the second metal layer 34.

[0061] Furthermore, the substrate 3 in this embodiment may further include an upper solder mask 36 and a lower solder mask 37 respectively located on opposite sides. The upper solder mask 36 is formed on the first insulating layer 31 (the two upper steps 312), and the upper solder mask 36 is formed with a plurality of openings 361 to expose the integrated circuit chip solid crystal area 321 and the light-emitting diode chip solid crystal area 322. In this embodiment, the upper solder mask 36 includes a light-emitting diode chip solder mask 363 and an integrated circuit chip solder mask 362, and the light-emitting diode chip solder mask 363 and the integrated circuit chip solder mask 362 are separated from each other (arranged on the two upper steps 312) and are respectively formed with a plurality of openings 361. In addition, the lower solder mask 37 is arranged on one side of the second insulating layer 33 and adjacent to the third metal layer 35.

[0062] The wall 4 is disposed on the substrate 3 and forms a first accommodation space 41 corresponding to the solder mask area 362 of the integrated circuit chip, and a second accommodation space 42 corresponding to the solder mask area 363 of the light-emitting diode chip. The flip-chip integrated circuit chip 1 is located in the first accommodation space 41, and the plurality of flip-chip light-emitting diode chips 2 are located in the second accommodation space 42.

[0063] The light-transmitting package 5 is disposed on the substrate 3 and filled in the first accommodation space 41 and the second accommodation space 42, so that the flip-chip integrated circuit chip 1 and the plurality of flip-chip light-emitting diode chips 2 are buried therein, but the present application is not limited thereto. For example, in other embodiments not shown in the present application, the light-transmitting package 5 may also be filled only in the second accommodation space 42, so that the plurality of flip-chip light-emitting diode chips 2 are buried therein. Accordingly, the light-transmitting package 5 in the present application is at least filled in the second accommodation space 42.

[0064] In more detail, the light-transmitting package body 5 in this embodiment includes a light-emitting surface 51, and the light-emitting surface 51 is parallel to the substrate 3 and faces a side away from the substrate 3. The light-emitting surface 51 in this embodiment is coplanar with the top surface of the wall 4, but the present application is not limited thereto.

[0065] [Example 2]

[0066] See also Figure 8 and Fig. 9 As shown, it is the second embodiment of the present application. Since this embodiment is similar to the above-mentioned first embodiment, the similarities between the two embodiments will not be repeated, and the differences between this embodiment and the above-mentioned first embodiment are roughly described as follows:

[0067] In this embodiment, the light emitting surface 51 is perpendicular to the substrate 3 and faces the side away from the flip-chip integrated circuit chip 1. The light emitting surface 51 is not located on the top surface of the light-transmitting package 5, that is, the light emitting surface 51 is located on the side of the light-emitting device 100 and is coplanar with the side end surface 44 of the enclosure 4. Furthermore, the first accommodating space 41 is a closed space enclosed in the enclosure 4; that is, the flip-chip integrated circuit chip 1 and the corresponding part of the light-transmitting package 5 located in the first accommodating space 41 are buried in the enclosure 4.

[0068] [Example 3]

[0069] See also Fig.10 and Fig.11As shown, it is the third embodiment of the present application. Since this embodiment is similar to the first embodiment, the similarities between the two embodiments will not be described in detail, and the differences between this embodiment and the first embodiment are roughly described as follows:

[0070] In this embodiment, the flip-chip integrated circuit chip 1 is wrapped and buried in the enclosure 4; that is, the space occupied by the flip-chip integrated circuit chip 1 is the first accommodation space 41. The enclosure 4 also forms a third accommodation space 43, and the first accommodation space 41 is located between the second accommodation space 42 and the third accommodation space 43. The light-emitting device 100 includes a light sensor 6 located in the third accommodation space 43, and the light-transmitting package 5 is filled in the second accommodation space 42 and the third accommodation space 43, so that the plurality of flip-chip light-emitting diode chips 2 and the light sensor 6 are buried therein. The plurality of flip-chip light-emitting diode chips 2 may include two green light-emitting diode chips and one infrared light chip, but is not limited thereto.

[0071] In more detail, the light-transmitting package body 5 in this embodiment includes a light-emitting surface 51 corresponding to the position of the plurality of flip-chip LED chips 2, and a light-entering surface 52 corresponding to the position of the light sensor 6, and the light-emitting surface 51 and the light-entering surface 52 are both substantially parallel to the substrate 3 and face the side away from the substrate 3. Among them, the light-emitting surface 51 and the light-entering surface 52 in this embodiment are coplanar on the top surface of the wall 4, but the present application is not limited thereto. The light-emitting device 100 of this embodiment simultaneously integrates a flip-chip integrated circuit chip 1 (such as an analog front-end chip), a light source and a light sensor 6, and is more suitable for lightweight wearable devices to provide a light-emitting diode packaging structure with the smallest area and the thinnest thickness.

[0072] [Example 4]

[0073] See also Fig.12 and Fig.13 As shown, it is the fourth embodiment of the present application. Since this embodiment is similar to the above-mentioned first embodiment, the similarities between the two embodiments will not be repeated, and the differences between this embodiment and the above-mentioned first embodiment are roughly described as follows:

[0074] This embodiment discloses a light-emitting component 10, which differs from the light-emitting device 100 of the first embodiment in that it does not include a substrate 3. The light-emitting component 10 includes a flip-chip integrated circuit chip 1, a plurality of flip-chip light-emitting diode chips 2 arranged at intervals from the flip-chip integrated circuit chip 1, and a light-transmitting package 5. The flip-chip integrated circuit chip 1 and the plurality of flip-chip light-emitting diode chips 2 of this embodiment are similar to those of the first embodiment, and are not described in detail here. The plurality of flip-chip light-emitting diode chips 2 may be one or a combination of a red light-emitting diode chip, a blue light-emitting diode chip, and a green light-emitting diode chip, but are not limited thereto.

[0075] In this embodiment, the light emitting component 10 does not include the substrate 3 of the first embodiment, and the light-transmitting package 5 is an integrally formed single-piece structure and covers the flip-chip integrated circuit chip 1 and the plurality of flip-chip light-emitting diode chips 2. The plurality of flip-chip pads 141 of the flip-chip integrated circuit chip 1 and the plurality of electrodes 21 of the flip-chip light-emitting diode chips 2 are exposed outside the light-transmitting package 5 for direct flip-chip mounting on a predetermined object (e.g., a circuit board or substrate 1).

[0076] [Technical Effects of the Embodiments of the Present Application]

[0077] In summary, the light-emitting device, light-emitting component, and flip-chip integrated circuit chip disclosed in the embodiments of the present application form a plurality of flip-chip pads with specific position conditions through the circuit reconstruction layer (such as: a plurality of the flip-chip pads are located within the layout boundary, and at least one of the flip-chip pads is spaced apart from the layout boundary), thereby enabling the flip-chip integrated circuit chip to be suitable for a flip-chip process.

[0078] Furthermore, a projection area formed by the orthographic projection of the plurality of flip-chip pads toward the surface of the chip body has a number of spaces located in the nine-square grid area that is equal to the number of the plurality of flip-chip pads, so that the plurality of flip-chip pads are distributed more evenly, thereby facilitating even soldering during the flip-chip process and preventing rotation, thereby achieving stable connection.

[0079] In addition, the projection area formed by the orthographic projection of the plurality of flip chip pads toward the surface of the chip body does not cover any of the metal pads, thereby preventing any of the flip chip pads from interfering with the corresponding metal pad due to the formation of the circuit reconstruction layer and affecting the yield.

[0080] The contents disclosed above are only preferred feasible embodiments of the present application, and are not intended to limit the patent scope of the present application. Therefore, all equivalent technical changes made using the description and drawings of the present application are included in the patent scope of the present application.

Claims

1. A light emitting device, characterized in that: The light emitting device comprises: A flip chip integrated circuit chip having a plurality of flip chip pads; a plurality of flip-chip light emitting diode chips, which are arranged at intervals from the flip-chip integrated circuit chip; and a substrate, carrying the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips, wherein the plurality of flip-chip pads of the flip-chip integrated circuit chip and the plurality of electrodes of the flip-chip light-emitting diode chips are disposed on the substrate in a welding manner, and the plurality of flip-chip light-emitting diode chips are electrically coupled to the flip-chip integrated circuit chip through the substrate; and A wall is disposed on the substrate and forms a first accommodation space and a second accommodation space; wherein the flip-chip integrated circuit chip is located in the first accommodation space, and a plurality of the flip-chip light emitting diode chips are located in the second accommodation space.

2. The light emitting device according to claim 1, characterized in that: The flip-chip integrated circuit chip comprises: A chip body; A plurality of metal pads are disposed on a surface of the chip body, and edges of the plurality of metal pads define a layout boundary, and the plurality of metal pads are located within the layout boundary; a circuit reconstruction layer formed on the surface of the chip body and burying a plurality of the metal pads therein; a metal layer, disposed on the circuit reconstruction layer and electrically coupled to the plurality of metal pads through the circuit reconstruction layer; and A solder mask layer has a plurality of openings, and the solder mask layer is disposed on the metal layer so that the metal layer is defined with a plurality of flip chip pads exposed from the plurality of openings outside the solder mask layer, the plurality of flip chip pads are located within the layout boundary, and at least one flip chip pad is spaced apart from the layout boundary.

3. The light emitting device according to claim 2, characterized in that: The areas of the flip chip pads are all the same, and the area of ​​any flip chip pad is larger than the area of ​​the metal pad electrically coupled thereto.

4. The light emitting device according to claim 1, characterized in that: The substrate comprises: a first insulating layer; A first metal layer is formed on the first insulating layer, and the first metal layer includes an integrated circuit chip bonding area and a light emitting diode chip bonding area; a second insulating layer, which is located on two opposite sides of the first insulating layer as well as the first metal layer; and A second metal layer and a third metal layer are electrically coupled to each other, and the light-emitting diode chip bonding area is electrically coupled to the integrated circuit chip bonding area through the second metal layer; wherein the third metal layer is located on a side of the second insulating layer away from the first insulating layer.

5. The light emitting device according to claim 4, characterized in that: The substrate comprises: an upper solder resist layer formed on the first insulating layer, wherein the upper solder resist layer is formed with a plurality of openings to expose the integrated circuit chip die-bonding region and the light-emitting diode chip die-bonding region; and A lower solder mask layer is disposed on the second insulating layer and adjacent to the third metal layer.

6. The light emitting device according to claim 5, characterized in that: The upper solder mask layer comprises a light emitting diode chip solder mask area and an integrated circuit chip solder mask area. The light emitting diode chip solder mask area and the integrated circuit chip solder mask area are separated from each other and are respectively formed with a plurality of the openings.

7. The light emitting device according to claim 1, characterized in that: The light emitting device comprises: A light-transmitting packaging body is filled in at least the second accommodation space and buries a plurality of the flip-chip light-emitting diode chips therein.

8. The light emitting device according to claim 7, characterized in that: The light-transmitting package body includes a light-emitting surface, and the light-emitting surface is parallel to the substrate and faces a side away from the substrate, or the light-emitting surface is perpendicular to the substrate and faces a side away from the flip-chip integrated circuit chip.

9. The light emitting device according to claim 7, characterized in that: The surrounding wall forms a third accommodating space, and the first accommodating space is located between the second accommodating space and the third accommodating space. The light emitting device includes a light sensor located in the third accommodating space.

10. A light emitting component, characterized in that: The light emitting component comprises: A flip chip integrated circuit chip having a plurality of flip chip pads; a plurality of flip-chip light emitting diode chips, which are arranged at intervals from the flip-chip integrated circuit chip; and A light-transmitting package body, which is an integrally formed single-piece structure and covers the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips; wherein the light-emitting component does not include any substrate for carrying the flip-chip integrated circuit chip and the plurality of flip-chip light-emitting diode chips; the plurality of flip-chip pads of the flip-chip integrated circuit chip and the plurality of electrodes of the flip-chip light-emitting diode chips are exposed outside the light-transmitting package body.

11. A flip-chip integrated circuit chip, characterized in that: The flip-chip integrated circuit chip comprises: A chip body; A plurality of metal pads are disposed on a surface of the chip body; a circuit reconstruction layer formed on the surface of the chip body and burying a plurality of the metal pads therein; and A plurality of flip chip pads are disposed on the circuit reconstruction layer and are electrically coupled to the plurality of metal pads through the circuit reconstruction layer. The layout distribution of the plurality of flip chip pads is more even than the layout distribution of the plurality of metal pads.

12. The flip chip integrated circuit chip according to claim 11, characterized in that: A projection area formed by orthographically projecting the plurality of flip chip pads toward the surface of the chip body does not cover any of the metal pads.

13. The flip chip integrated circuit chip according to claim 11, characterized in that: The edges of the multiple metal pads define a layout boundary, and the multiple metal pads are located within the layout boundary. The layout boundary defines a nine-square grid area. A projection area is formed by the orthographic projection of the multiple flip-chip pads toward the surface of the chip body, and the number of spaces located in the nine-square grid area is greater than the number of spaces where the multiple metal pads are located in the nine-square grid area.

14. The flip chip integrated circuit chip according to claim 11, characterized in that: The edges of the plurality of metal pads define a layout boundary, and the plurality of metal pads are located within the layout boundary, the local edges of a portion of the plurality of flip chip pads fall on the layout boundary, and the remaining portions of the plurality of flip chip pads are spaced apart from the layout boundary.

15. The flip chip integrated circuit chip according to claim 11, characterized in that: The line reconstruction layer comprises: a first polymer layer formed on the surface and disposed around the plurality of metal pads; a circuit extension layer, disposed on the first polymer layer and the plurality of metal pads and electrically coupled to the plurality of metal pads; and A second polymer layer is disposed around the circuit extension layer, and the circuit extension layer protrudes out of the second polymer layer.

16. The flip chip integrated circuit chip according to claim 15, characterized in that: The circuit reconstruction layer includes a solder mask layer, which is arranged on the second polymer layer and the circuit extension layer and exposes a plurality of flip chip pads.

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