HEMT device based on ohmic pattern modulation of multi-channel coupling and preparation method
By using an ohmic patterning modulation method to fabricate HEMT devices with multi-channel inter-coupling, the inter-channel coupling is optimized, solving the problem of poor linearity in high-frequency and high-power HEMT devices and achieving a significant improvement in device characteristics with high linearity.
Patent Information
- Application Number
- CN202111372202.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-18
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2041-11-18
AI Technical Summary
Existing HEMT devices exhibit poor linearity in high-frequency, high-power applications. Traditional improvement methods, such as nanowire channel devices, graded AlGaN channel devices, and dual-channel structures, suffer from etching damage, high process complexity, and limited linearity improvement during fabrication.
A HEMT device fabrication method using ohmic patterning modulation of multi-channel coupling is adopted. By designing the etching ratio, etching pattern shape and etching depth of the ohmic contact area, an array of ohmic contact trenches is formed, which optimizes the inter-channel coupling, reduces the distance from the lower channel to the source and drain ohmic metals, and realizes the collection of electrons from multiple channels.
It improves the linearity of the device, meets the application requirements of high frequency and high linearity, and enhances the electrical characteristics of the device.
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Figure CN114300359B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a HEMT device based on ohmic patterning to modulate multi-channel coupling and a preparation method thereof. Background Art
[0002] With the improvement of modern communication technology and the development of communication equipment, higher requirements are placed on wireless communication technology. For example, in the application fields of 5G communication, satellite communication and radar, the power amplifier (PA) has gradually increased its requirements on frequency, power, power added efficiency, linearity and other indicators.
[0003] In order to achieve high power, the input power needs to be increased. However, as the input power increases, the inherent characteristics of the device will cause nonlinear changes in the signal, resulting in poor linearity, and at the same time, it will increase power consumption, reduce power added efficiency, and reduce signal accuracy. In order to improve the linearity of PAs, a variety of circuit-level technologies have been proposed, such as feedforward linearization technology, feedback linearization technology, and pre-distortion technology. As the scale of the circuit increases and the frequency increases, the circuit-level technology will increase the complexity of the circuit, suppress the increase in frequency and power, so it is necessary to find a way to improve the linearity of the device at the device level. As a third-generation semiconductor, GaN has the advantages of high electron saturation velocity, high mobility, high breakdown field strength, high temperature resistance, and radiation resistance. Due to its polarization characteristics, GaN-based HEMT devices will produce a high concentration of two-dimensional electron gas (2DEG for short), which has greater potential than the most mature Si-based MOS devices in high-frequency and high-power applications. It has been used in power adapters and base stations. However, as the size of traditional HEMT devices decreases, the influence of short channel effect becomes more and more significant, the on-resistance is large, and the resistance of the source and drain region changes nonlinearly with the increase of input power. This causes linearity degradation and increased power consumption at higher input power in high-frequency and high-power applications.
[0004] For the above reasons, people have been exploring ways to improve device linearity at the device level for many years. In 2013, Tomas Palacios et al. of MIT proposed a nanowire channel device (Fin structure) in the paper “Lee DS, Wang H, Hsu A, et al. Nanowire Channel InAlN / GaN HEMTs With High Linearity of gm and ft[J]. IEEE Electron Device Letters, 2013, 34(8): 969-971”, which can suppress the change of access resistance with input current and improve the linearity of the device. In 2020, Shahadat H. Sohel et al. from Ohio State University proposed a gradient AlGaN channel HEMT device in the paper “Sohel SH, Rahman MW, Xie A, et al. Linearity Improvement With AlGaN Polarization-Graded Field Effect Transistors With Low Pressure Chemical Vapor Deposition Grown SiNx Passivation[J]. IEEE Electron Device Letters, 2020, 41(1): 19-22”. The paper shows that 3DEG in HEMT devices can further suppress the reduction of transconductance and the increase of access resistance, and the OIP3 / PDC value is 13.3dB. In 2021, Kevin J. Chen and others from the Hong Kong University of Science and Technology proposed a dual-channel strong coupling device in the document "Cui P, Jia M, Chen H, et al. InAlN / GaN HEMT on Si With fmax = 270GHz [J]. IEEE Transactions on Electron Devices, 2021, 68 (3): 994-999". The nonlinear change of access resistance is suppressed by coupling between the two channels. Compared with traditional single-channel devices, the OIP3 value is improved by 5.2dB.
[0005] However, the above three devices: the etching process of the device using the Fin structure will reduce the channel 2DEG concentration, reduce the device current, and cause greater etching damage to the gate area, introducing interface states, defects and other problems, resulting in poor device linearity; the device using the gradient AlGaN barrier layer structure has high process complexity and high requirements for process precision during the preparation process, and in order to achieve the gradient of the Al component in the barrier, a thicker barrier layer is required, which will lead to a short channel effect and poor device linearity; the preparation process of the dual-channel structure is generated by multiple heterojunctions, and the closer the channel is to the substrate, the farther it is from the source and drain ohmic metal. The electrons in the lower channel can only rely on channel coupling to jump to the upper channel and be collected by the drain, resulting in limited improvement in device linearity. The above three methods all limit the application demand of devices in the field of high frequency and high linearity. Summary of the invention
[0006] In order to solve the above problems existing in the prior art, the present invention provides a HEMT device based on ohmic patterning to modulate the coupling between multiple channels and a preparation method thereof.
[0007] The technical problem to be solved by the present invention is achieved through the following technical solutions:
[0008] In a first aspect, the present invention provides a method for preparing a HEMT device based on ohmic patterning to modulate multi-channel coupling, comprising:
[0009] obtaining a substrate;
[0010] A buffer layer, an N-channel barrier-channel composite layer, a first barrier layer and a cap layer are sequentially grown on the substrate, where N is an integer greater than 1; wherein the N-channel barrier-channel composite layer includes N-1 second barrier layers and N-1 channel layers, and the second barrier layer and the channel layer are grown in an alternating manner;
[0011] An ohmic patterned array region is photolithographically formed on the cap layer according to a preset etching ratio and a shape of an etching pattern, and the cap layer is etched in the ohmic patterned array region until an upper surface of a corresponding second barrier layer in the barrier-channel composite layer of the N-channel is formed to form an ohmic contact groove array; wherein the etching ratio is a ratio of a total area of the etching pattern to an area of the ohmic contact region; the ohmic contact groove array includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depths of the ohmic contact grooves in the same column are the same;
[0012] Photolithography is performed to form a source electrode region and a drain electrode region on the cap layer, and ohmic metal is deposited on the cap layer in the source electrode region and the drain electrode region and in each ohmic contact groove in the ohmic contact groove array to form a source electrode and a drain electrode;
[0013] growing a passivation layer on the cap layer, the source electrode and the drain electrode;
[0014] Etching the passivation layer in the middle region until a gate groove is formed on the upper surface of the cap layer;
[0015] Depositing gate metal in the gate groove and on the passivation layer at both sides of the gate groove to form a T-shaped gate electrode;
[0016] The passivation layer on the source electrode and the drain electrode is etched, and interconnect metal is deposited on the source electrode, the drain electrode and the T-type gate electrode.
[0017] In one embodiment of the present invention, the preset etching ratio is 1 / N.
[0018] In one embodiment of the present invention, 2≤N≤5.
[0019] In one embodiment of the present invention, the shape of the preset etching pattern includes a square, and the minimum spacing between the ohmic contact grooves in the corresponding ohmic contact groove array is Among them, a1 is the side length of the square, and R is the etching ratio.
[0020] In one embodiment of the present invention, the shape of the preset etching pattern includes a circle, and the minimum spacing between the ohmic contact grooves in the corresponding ohmic contact groove array is Among them, a2 is the radius of the circle, and R is the etching ratio.
[0021] In one embodiment of the present invention, the shape of the preset etching pattern includes a rectangle, and the minimum spacing between the ohmic contact grooves corresponding to the long sides in the ohmic contact groove array is The minimum spacing between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio.
[0022] In a second aspect, the present invention provides a HEMT device based on ohmic patterned modulation of multi-channel coupling, comprising:
[0023] substrate;
[0024] A buffer layer, an N-channel barrier-channel composite layer, a first barrier layer and a cap layer are sequentially arranged on the substrate, where N is an integer greater than 1; wherein the N-channel barrier-channel composite layer includes N-1 second barrier layers and N-1 channel layers, and the second barrier layers are spaced apart from the channel layers;
[0025] An ohmic contact groove array is arranged in the ohmic contact region at both ends of the cap layer; wherein the ohmic contact groove array is formed by etching according to a preset etching ratio and the shape of the etching pattern, and includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depth of the ohmic contact grooves in the same column is the upper surface of the corresponding second barrier layer in the barrier-channel composite layer of the N-channel; the etching ratio is the ratio of the total area of the etching pattern to the area of the ohmic contact region;
[0026] A source electrode and a drain electrode are disposed on the cap layer in the ohmic contact region and in each ohmic contact groove in the ohmic contact groove array;
[0027] A gate groove, penetrating the passivation layer in the middle region to the upper surface of the cap layer;
[0028] A T-shaped gate is disposed in the gate groove and on the passivation layer on both sides of the gate groove;
[0029] Interconnection metal is arranged on the source electrode and the drain electrode penetrating the passivation layer, and on the T-type gate electrode.
[0030] In one embodiment of the present invention, the preset etching ratio is 1 / N.
[0031] In one embodiment of the present invention, 2≤N≤5.
[0032] In one embodiment of the present invention, the preset etching pattern shape includes a square, a circle or a rectangle, wherein:
[0033] For a square, the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a1 is the side length of the square, and R is the etching ratio;
[0034] For a circle, the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a2 is the radius of the circle, and R is the etching ratio;
[0035] For a rectangle, the minimum spacing between the ohmic contact grooves corresponding to the long sides in the ohmic contact groove array is The minimum spacing between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio.
[0036] Beneficial effects of the present invention:
[0037] The preparation method of the HEMT device based on ohmic patterning modulation of coupling between multiple channels provided by the present invention modulates the coupling between channels by patterning ohms, specifically by designing the etching proportion of the ohmic contact area, the shape of the etching pattern, and the design of different etching depths for different channel devices, so as to reduce the distance from the lower channel to the source and drain ohmic metal, so that the device can collect electrons from multiple channels at the same time, realize the change of the device electrical characteristics with the sequential conduction of the channels, and finally realize the improvement of the device characteristics, so as to realize a high-linearity HEMT device and meet the application requirements in the field of high frequency and high linearity.
[0038] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] Figure 1 It is a schematic flow chart of a method for preparing a HEMT device based on ohmic patterned modulation of multi-channel coupling provided by an embodiment of the present invention;
[0040] Figure 2 (a)~ Figure 2 (g) is a schematic structural diagram corresponding to a HEMT device preparation process based on ohmic patterning to modulate multi-channel coupling provided by an embodiment of the present invention;
[0041] Figure 3 (a)~ Figure 3 (c) is a schematic diagram of a top view of a HEMT device based on ohmic patterning to modulate the coupling between multiple channels provided by an embodiment of the present invention after the ohmic contact groove array is etched;
[0042] Figure 4 It is a structural schematic diagram of a HEMT device based on ohmic patterned modulation of multi-channel coupling provided by an embodiment of the present invention.
[0043] Description of reference numerals:
[0044] 1-substrate; 2-buffer layer; 3-barrier-channel composite layer of N-channel; 4-first barrier layer; 5-cap layer; 6-drain electrode; 7-source electrode; 8-passivation layer; 9-T-type gate electrode; 10-interconnect metal; 31-second barrier layer; 32-channel layer. DETAILED DESCRIPTION
[0045] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.
[0046] In order to obtain a HEMT device for use in high-frequency fields, an embodiment of the present invention provides a HEMT device based on ohmic patterning to modulate multi-channel coupling and a method for preparing the same.
[0047] First, see Figure 1 The embodiment of the invention provides a method for preparing a HEMT device based on ohmic patterning to modulate the coupling between multiple channels, comprising the following steps:
[0048] S10, obtaining a substrate 1.
[0049] S20. A buffer layer 2, an N-channel barrier-channel composite layer 3, a first barrier layer 4 and a cap layer 5 are sequentially grown on the substrate 1, where N is an integer greater than 1; wherein the N-channel barrier-channel composite layer 3 includes N-1 second barrier layers 31 and N-1 channel layers 32, and the second barrier layer 31 and the channel layer 32 are grown alternately.
[0050] Specifically, see Figure 2 (a) An embodiment of the present invention provides an optional solution, using plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD) equipment to sequentially grow a buffer layer 2 with a thickness of 1.2μm to 1.5μm, an N-channel barrier channel composite layer 3, a first barrier layer 4 with a thickness of 15nm to 20nm, and a cap layer 5 with a thickness of 1nm to 3nm on a substrate 1, where N is an integer greater than 1. Among them, the N-channel barrier-channel composite layer 3 includes N-1 second barrier layers 31 and N-1 channel layers 32. The second barrier layer 31 and the channel layer 32 are grown alternately. Specifically, the buffer layer 2 and the first barrier layer 4 are alternately grown in a manner such that the second barrier layer 31 with a thickness of 15nm to 20nm and the channel layer 32 with a thickness of 8nm to 10nm are grown. The second barrier layer 31 is grown on the buffer layer 2, and the first barrier layer 4 is grown on the uppermost channel layer 32 in the N-channel barrier-channel composite layer 3.
[0051] In the specific embodiment of the present invention, the substrate 1 can be made of sapphire, SiC or Si layer material; the buffer layer 2 can be made of GaN material; the first barrier layer 4 and the second barrier layer 31 can be made of AlGaN, InAlN or AlN materials; the channel layer 32 can be made of GaN material; and the cap layer 5 can be made of GaN material.
[0052] S30, photolithography an ohmic patterned array area on the cap layer 5 according to a preset etching ratio and the shape of the etching pattern, and etching the cap layer 5 in the ohmic patterned array area until the upper surface of the second barrier layer 31 in the barrier channel composite layer 3 of the N-channel is formed into an ohmic contact groove array; wherein the etching ratio is the ratio of the total area of the etching pattern to the area of the ohmic contact area; the ohmic contact groove array includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depths of the ohmic contact grooves in the same column are the same.
[0053] Specifically, in order to improve the linearity of the device, most of the existing HEMT devices choose to adopt a multi-channel structure. Although the multi-channel structure can improve the linearity of the device to a certain extent, due to the generation of multiple heterojunctions, the channel closer to the substrate 1 is farther away from the source and drain ohmic metal, and the electrons in the lower channel can only rely on channel coupling to jump to the upper channel and be collected by the drain, resulting in limited improvement in the linearity of the device. The embodiment of the present invention proposes a new design idea. In the multi-channel structure, see Figure 2 (b) Using photoresist development technology, first photolithography is performed to form an ohmic patterned array region, and then an inductively coupled plasma (ICP) etching process is used to etch the cap layer 5 in the ohmic contact region to form an ohmic contact groove array. The ohmic contact groove array includes a plurality of ohmic contact grooves distributed in rows and columns.
[0054] During the etching process of the ohmic contact groove array, the inventors found that the etching ratio, the shape of the etching pattern, and the control of the etching depth have a great influence on the improvement of device performance. The specific analysis is as follows:
[0055] The inventors have found that for traditional devices that have not been ohm-patterned, the device transconductance curve has an inconspicuous double-peak characteristic. For example, the threshold voltages of adjacent channels in a dual-channel device generally differ by 2V to 3V, and the flatness between the double peaks is not enough. The inventors have found that the inconspicuous double-peak characteristic in the transconductance curve is mainly due to the fact that the electrons in the lower channel can only reach the upper channel through high-energy transitions to participate in conduction, and the effect of the lower channel on the device characteristics is relatively low. Therefore, the embodiment of the present invention considers improving the effect of the lower channel on the device characteristics, and proposes a design idea based on ohm-patterning. By reasonably designing the etching ratio R, ohm-patterning etching is performed, so that the device ohm contact area can collect electrons in the lower channel, and the upper and lower channels can achieve the optimal coupling. The etching ratio in the embodiment of the present invention is defined as the ratio of the total area of the etching pattern to the area of the ohm contact area, and further represents the ratio of the sum of the etching pattern areas corresponding to all ohm contact grooves in the ohm contact groove array to the area of the ohm contact area.
[0056] Through research on the etching ratio R, the inventors found that when the etching ratio R<1 / N, as the etching ratio R increases, the coupling effect of the lower channel becomes stronger and the transconductance gradually tends to be flat. When the etching ratio R>1 / N, as the etching ratio R increases, the etching ratio of the ohmic contact area connected to the upper channel decreases, and the flatness decreases. When the etching ratio R=1 / N, the flatness is greatly improved, and the upper and lower channels can achieve optimal coupling. Therefore, the etching ratio of the embodiment of the present invention is selected as R=1 / N. For example, for a dual-channel device, when the etching ratio R=1 / 2=0.5, that is, the ratio of the sum of the etched pattern areas of all ohmic contact grooves in the ohmic contact groove array to the area of the ohmic contact region is 0.5, the upper and lower channels can achieve optimal coupling; for a three-channel device, when the etching ratio R=1 / 3≈0.33, that is, the ratio of the sum of the etched pattern areas of all ohmic contact grooves in the ohmic contact groove array to the area of the ohmic contact region is 0.33, the upper and lower channels can achieve optimal coupling; and so on. The preferred value range of the number of channels N in the embodiment of the present invention is 2≤N≤5.
[0057] The inventors have found that the shape of the etched pattern also has a great influence on the improvement of device performance. The shape of the etched pattern in the patterning affects the accuracy of etching and etching damage, which ultimately affects the performance of the device. By testing structures with different graphic shapes, it was found that the etched pattern has little effect on the linear characteristics, but directly affects the ohmic contact resistance and the maximum output current. The shape of the etched pattern in the embodiment of the present invention includes a square, a rectangle, or a circle, but is not limited to these etched patterns. The area of the etched pattern of a single ohmic contact groove in the ohmic contact groove array should not be too small, for example, not less than 1 / 10 of the area of the ohmic contact region, and the etched pattern meets the etching ratio requirement. The spacing design between the ohmic contact grooves in the ohmic contact groove array corresponding to the etched pattern is also very important. Studies have found that if Figure 3 (a) to 3(c): When the shape of the etched pattern includes a square, such as Figure 3 The minimum spacing d1 between the ohmic contact grooves in the corresponding ohmic contact groove array shown in (a) is Where a1 is the side length of the square, and R is the etching ratio; when the shape of the etching pattern includes a circle, such as Figure 3 (b) The minimum spacing d2 between the ohmic contact grooves in the corresponding ohmic contact groove array is Where a2 is the radius of the circle, and R is the etching ratio; when the shape of the etching pattern includes a rectangle, such as Figure 3 The minimum spacing d3 between the ohmic contact grooves corresponding to the long sides of the ohmic contact groove array shown in (c) is The minimum spacing d4 between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio. The graphical design that meets the above etching interval can better ensure the etching accuracy and control of etching damage during the etching process, thereby ensuring the performance of the device.
[0058] The inventors also found that the etching depth is also a key factor affecting device performance. The etching depth affects the collection efficiency of the source electrode 7 and the drain electrode 6 for the electrons in the lower channel. For N-channel devices, it is easy to consider using the same etching depth for etching more ohmic contact groove arrays. Such etching treatment can improve the performance of the device to a certain extent, but such an etching method makes the effect of the lower channel on the device characteristics still not fully utilized, so that the upper and lower channels cannot achieve optimal coupling. Therefore, the embodiment of the present invention proposes to etch the ohmic contact groove array with different depths according to the number of device channels, specifically, etching the cap layer 5 in the ohmic patterned array area until the upper surface of the second barrier layer 31 corresponding to the barrier channel composite layer 3 of the N-channel, and the barrier channel composite layer 3 of the N-channel can form N-1 etching depths. The etching depths of the ohmic contact grooves in the same column of the ohmic contact groove array are the same, and whether the ohmic etching depths of the same row are the same is determined by the number of channels. When the number of channels is 2, the etching depths of the ohmic contact grooves in the same row are the same, because only one etching depth is required, and when the number of channels is greater than 2, more than one etching depth is formed, and multiple etching depths in the same row are distributed at intervals. For example, for a double-channel device, the barrier-channel composite layer includes one second barrier layer 31 and one channel layer 32, and only one etching depth is required, and the etching depth is from the etching cap layer 5 to the upper surface of the second barrier layer 31 in the barrier-channel composite layer; for a triple-channel device, the barrier-channel composite layer includes two second barrier layers 31 and two channel layers 32, and two etching depths are required, the first etching depth is the upper surface of the bottom second barrier layer 31, and the second etching depth is the upper surface of the top second barrier layer 31; and so on.
[0059] Taking a three-channel device as an example, in the etching process of the ohmic contact groove array in the embodiment of the present invention, the etching ratio R≈0.33, the etching pattern is a square, and the square is designed to be 10μm×10μm, that is, a1=10μm, and the interval d1 between the ohmic contact grooves in the corresponding ohmic contact groove array is The first etching depth is the upper surface of the bottom second barrier layer 31, and the second etching depth is the upper surface of the top second barrier layer 31. With this design, the top view of the corresponding device after etching the ohmic contact groove array is as follows Figure 3 As shown in (a), the white squares correspond to each ohmic contact groove in the etched ohmic contact groove array. The ohmic contact grooves in the same column are etched to the same depth, and the ohmic contact grooves in the same row are alternately distributed between the first etching depth and the second etching depth. For example, Figure 3In the same row in (a), from left to right, the first ohmic contact groove is the first etching depth, the second ohmic contact groove is the second etching depth, the third ohmic contact groove is the first etching depth, the fourth ohmic contact groove is the second etching depth, and so on. Each row is distributed in this way, so that the etching depth of the ohmic contact grooves in the same column of the ohmic contact groove array is the same, and the etching depths of different rows are distributed in an interval structure. Experiments also show that this design method ensures that the device performance is in an optimal state and has the characteristics of high linearity.
[0060] S40, photolithography is performed to form a source electrode region and a drain electrode region on the cap layer 5, and ohmic metal is deposited on the cap layer 5 in the source electrode region and the drain electrode region and in each ohmic contact groove in the ohmic contact groove array to form a source electrode 7 and a drain electrode 6.
[0061] Specifically, see Figure 2 (c), the embodiment of the present invention provides an optional solution, using photoresist development technology to first photolithography the source electrode region and the drain electrode region, and then using magnetron sputtering technology or electron beam evaporation technology to deposit ohmic metal on the cap layer 5 in the source electrode region and the drain electrode region and in each ohmic contact groove in the ohmic contact groove array, and then annealing treatment is performed to form a source electrode 7 with a thickness of 200nm to 230nm and a drain electrode 6 with a thickness of 200nm to 230nm. The ohmic metal can be a Ti / Al / Ni / Au stacked structure from bottom to top.
[0062] S50 , growing a passivation layer 8 on the cap layer 5 , the source electrode 7 and the drain electrode 6 .
[0063] Specifically, see Figure 2 (d) The embodiment of the present invention provides an optional solution, using PECVD or LPCVD process to grow a passivation layer 8 with a thickness of 20nm to 60nm on the cap layer 5, the source electrode 7 and the drain electrode 6. The material of the passivation layer 8 can be SiO2.
[0064] S60 , etching the passivation layer 8 in the middle region until the upper surface of the cap layer 5 forms a gate groove.
[0065] Specifically, see Figure 2 (e) The embodiment of the present invention provides an optional solution, which uses photoresist development technology to first photolithography a gate groove region, and then uses an ICP etching process to etch the passivation layer 8 in the middle region of the gate groove region until the upper surface of the cap layer 5 forms a gate groove.
[0066] S70 , depositing gate metal in the gate groove and on the passivation layer 8 on both sides of the gate groove to form a T-shaped gate electrode 9 .
[0067] Specifically, see Figure 2(f) The embodiment of the present invention provides an optional solution, using photoresist development technology to first photolithograph the gate electrode region, and using magnetron sputtering or electron beam evaporation technology to deposit gate metal on the passivation layer 8 in the gate groove and on both sides of the gate groove to form a T-shaped gate electrode 9, and the thickness of the gate metal on the passivation layer 8 is 300nm to 330nm. The gate metal can be a Ni / Au stacked structure from bottom to top.
[0068] S80 , etching the passivation layer 8 on the source electrode 7 and the drain electrode 6 , and depositing an interconnect metal 10 on the source electrode 7 , the drain electrode 6 and the T-shaped gate electrode 9 .
[0069] Specifically, see Figure 2 (g) The embodiment of the present invention provides an optional solution, using photoresist development technology to first photolithography the interconnection area on the passivation layer 8 on the source electrode 7 and the drain electrode 6, and using ICP etching technology to etch away the passivation layer 8 in the interconnection area, and then using magnetron sputtering technology or electron beam evaporation technology to deposit an interconnection metal 10 with a thickness of 200nm to 230nm on the exposed source electrode 7 and drain electrode 6, and on the T-type gate electrode 9. The interconnection metal 10 can be Ti / Au from bottom to top.
[0070] The operation methods such as PECVD, LPCVD, ICP etching method and annealing process mentioned in the embodiments of the present invention are all existing technologies and will not be described in detail here.
[0071] It should be noted that, under the above-mentioned design concept based on ohmic graphical modulation of multi-channel coupling, the device can be optimized. For example, in order to increase the concentration of two-dimensional electron gas in the channel, a 1nm to 1.5nm AlGaN, InAlN or AlN barrier layer can be added under the first barrier layer 4 and the second barrier layer 31 during the preparation process. Such structural adjustments are within the protection scope of the present invention.
[0072] In summary, the method for preparing a HEMT device based on ohmic patterning to modulate the coupling between multiple channels provided in an embodiment of the present invention modulates the coupling between channels by patterning ohms, and specifically reduces the distance from the lower channel to the source and drain ohmic metal by designing the etching ratio of the ohmic contact area, the shape of the etching pattern, and the design of different etching depths for different channel devices, so that the device can collect electrons from multiple channels at the same time, and realize that the electrical characteristics of the device change with the sequential conduction of the channels, and finally realize the improvement of the device characteristics, so as to realize a high-linearity HEMT device and meet the application requirements in the field of high frequency and high linearity.
[0073] Correspondingly, for the second aspect, see Figure 4 The embodiment of the present invention provides a HEMT device based on ohmic patterned modulation of multi-channel coupling, including:
[0074] Substrate 1;
[0075] A buffer layer 2, an N-channel barrier-channel composite layer 3, a first barrier layer 4 and a cap layer 5 are sequentially arranged on a substrate 1, wherein N is an integer greater than 1; wherein the N-channel barrier-channel composite layer 3 includes N-1 second barrier layers 31 and N-1 channel layers 32, and the second barrier layers 31 and the channel layers 32 are spaced apart from each other;
[0076] An ohmic contact groove array is arranged in the ohmic contact region at both ends of the cap layer 5; wherein the ohmic contact groove array is formed by etching according to a preset etching ratio and the shape of the etching pattern, and includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depth of the ohmic contact grooves in the same column is the upper surface of the corresponding second barrier layer 31 in the barrier channel composite layer 3 of the N channel; the etching ratio is the ratio of the total area of the etching pattern to the area of the ohmic contact region;
[0077] A source electrode 7 and a drain electrode 6 are disposed on the cap layer 5 in the ohmic contact region and in each ohmic contact groove in the ohmic contact groove array;
[0078] The gate groove penetrates the passivation layer 8 in the middle region and reaches the upper surface of the cap layer 5;
[0079] A T-shaped gate is disposed in the gate groove and on the passivation layer 8 on both sides of the gate groove;
[0080] The interconnection metal 10 is disposed on the source electrode 7 and the drain electrode 6 penetrating the passivation layer 8 , and on the T-shaped gate electrode 9 .
[0081] Preferably, the preset etching ratio is 1 / N.
[0082] Preferably, 2≤N≤5.
[0083] Preferably, the preset etching pattern shape includes a square, a circle or a rectangle, wherein:
[0084] For a square, the minimum spacing between ohmic contact grooves in the ohmic contact groove array is Among them, a1 is the side length of the square, and R is the etching ratio;
[0085] For a circular shape, the minimum spacing between ohmic contact grooves in the ohmic contact groove array is Among them, a2 is the radius of the circle, and R is the etching ratio;
[0086] For a rectangle, the minimum spacing between the ohmic contact grooves corresponding to the long sides in the ohmic contact groove array is The minimum spacing between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio.
[0087] Among them, the HEMT device based on ohmic patterning to modulate the coupling between multiple channels can be prepared by the above-mentioned method for preparing the HEMT device based on ohmic patterning to modulate the coupling between multiple channels.
[0088] As for the device embodiment, since it is basically similar to the preparation method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the preparation method embodiment.
[0089] In the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0090] In the description of the embodiments of the present invention, terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.
[0091] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.
[0092] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the present application for which protection is sought, a person skilled in the art may understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims.
[0093] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. A method for preparing a HEMT device based on ohmic patterning to modulate multi-channel coupling, characterized in that: include: obtaining a substrate; A buffer layer, an N-channel barrier-channel composite layer, a first barrier layer and a cap layer are sequentially grown on the substrate, where N is an integer greater than 1; wherein the N-channel barrier-channel composite layer includes N-1 second barrier layers and N-1 channel layers, and the second barrier layer and the channel layer are grown in an alternating manner; An ohmic patterned array region is photolithographically formed on the cap layer according to a preset etching ratio and a shape of an etching pattern, and the cap layer is etched in the ohmic patterned array region until an upper surface of a corresponding second barrier layer in the barrier-channel composite layer of the N-channel is formed. The preset etching ratio is 1 / N, and the etching ratio is a ratio of a total area of the etching pattern to an area of the ohmic contact region. The ohmic contact groove array includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depths of the ohmic contact grooves in the same column are the same. Photolithography is performed to form a source electrode region and a drain electrode region on the cap layer, and ohmic metal is deposited on the cap layer in the source electrode region and the drain electrode region and in each ohmic contact groove in the ohmic contact groove array to form a source electrode and a drain electrode; growing a passivation layer on the cap layer, the source electrode and the drain electrode; Etching the passivation layer in the middle region until a gate groove is formed on the upper surface of the cap layer; Depositing gate metal in the gate groove and on the passivation layer at both sides of the gate groove to form a T-shaped gate electrode; The passivation layer on the source electrode and the drain electrode is etched, and interconnect metal is deposited on the source electrode, the drain electrode and the T-type gate electrode.
2. The method for preparing a HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 1, characterized in that: 2≤N≤5。 3. The method for preparing a HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 1, characterized in that: The preset shape of the etching pattern includes a square, and the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a1 is the side length of the square, and R is the etching ratio.
4. The method for preparing a HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 1, characterized in that: The preset shape of the etching pattern includes a circle, and the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a2 is the radius of the circle, and R is the etching ratio.
5. The method for preparing a HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 1, characterized in that: The shape of the preset etching pattern includes a rectangle, and the minimum spacing between the ohmic contact grooves corresponding to the long sides in the ohmic contact groove array is The minimum spacing between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio.
6. A HEMT device based on ohmic patterning to modulate multi-channel coupling, characterized in that: include: substrate; A buffer layer, an N-channel barrier-channel composite layer, a first barrier layer and a cap layer are sequentially arranged on the substrate, where N is an integer greater than 1; wherein the N-channel barrier-channel composite layer includes N-1 second barrier layers and N-1 channel layers, and the second barrier layers are spaced apart from the channel layers; An ohmic contact groove array is arranged in the ohmic contact region at both ends of the cap layer; wherein the ohmic contact groove array is formed by etching according to a preset etching ratio and the shape of the etching pattern, and includes ohmic contact grooves distributed in a plurality of rows and columns, and the etching depth of the ohmic contact grooves in the same column is the upper surface of the corresponding second barrier layer in the barrier-channel composite layer of the N-channel; the preset etching ratio is 1 / N, and the etching ratio is the ratio of the total area of the etching pattern to the area of the ohmic contact region; A source electrode and a drain electrode are disposed on the cap layer in the ohmic contact region and in each ohmic contact groove in the ohmic contact groove array; A gate groove, penetrating the passivation layer in the middle region to the upper surface of the cap layer; A T-shaped gate is disposed in the gate groove and on the passivation layer on both sides of the gate groove; Interconnection metal is arranged on the source electrode and the drain electrode penetrating the passivation layer, and on the T-type gate electrode.
7. The HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 6, characterized in that: 2≤N≤5。 8. The HEMT device based on ohmic patterning modulation of multi-channel coupling according to claim 6, characterized in that: The preset etching pattern shape includes square, circle or rectangle, wherein: For a square, the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a1 is the side length of the square, and R is the etching ratio; For a circle, the minimum spacing between the ohmic contact grooves in the ohmic contact groove array is Among them, a2 is the radius of the circle, and R is the etching ratio; For a rectangle, the minimum spacing between the ohmic contact grooves corresponding to the long sides in the ohmic contact groove array is The minimum spacing between the ohmic contact grooves corresponding to the short sides is Among them, a3 and a4 are the long side and short side of the rectangle respectively, and R is the etching ratio.
Citation Information
Patent Citations
Semiconductor device and preparation method thereof
CN111916351A
Gallium nitride enhanced HEMT device and preparation method thereof
CN112086362A