A transient thermal resistance test method, system and electronic equipment

Abstract

The present application relates to a transient thermal resistance test method, system and electronic device, and to the field of thermal resistance test. The method includes collecting voltage drop data until a first preset condition is reached if a heating current is detected to be disconnected, and the voltage drop data includes the reverse PN junction voltage drop corresponding to any time point when the junction temperature of the MOSFET chip is reduced; the first preset condition includes: the junction temperature of the MOSFET chip drops to the ambient temperature, and a cooling curve is drawn, the cooling curve is a curve of the relationship between the junction temperature and time during the cooling process of the MOSFET chip, and the temperature rise transient thermal resistance change curve is determined based on the cooling curve, and the fitting transient thermal resistance mathematical model is determined based on the temperature rise transient thermal resistance change curve, the Foster thermal structure network of the MOSFET chip, and the fitting formula of the Foster thermal structure network of the MOSFET chip. The present application has the effect of making the determined fitting transient thermal resistance mathematical model of the MOSFET chip more accurate.

Description

Technical Field

[0001] The present application relates to the field of thermal resistance testing, and in particular to a transient thermal resistance testing method, a system and an electronic device. Background Art

[0002] Solid-state relays are hybrid integrated circuits that use power semiconductor devices (MOSFET chips) as switching elements. They are widely used in aerospace and other fields. When solid-state relays are used in the aerospace field, they are required to have a higher overload capacity.

[0003] At present, no manufacturer in the industry has conducted in-depth research on the overload characteristics of solid-state relays. Generally, users propose an application condition and the manufacturer conducts a preliminary test. There is no theoretical support, which wastes resources and is unreliable.

[0004] At present, most of the determination of the thermal resistance change of MOSFET chips is based on steady-state thermal resistance, and there is a lack of research on transient thermal resistance. When determining the overload capacity of solid-state relays, it is necessary to determine the mathematical model of the transient thermal resistance of the MOSFET chip. The research on the mathematical model of the transient thermal resistance needs to measure the temperature of the MOSFET chip, but the temperature of the MOSFET chip changes drastically in a very short time. At present, in the process of determining the fitting transient thermal resistance change curve of the MOSFET chip, it is not convenient to measure the data when the temperature changes drastically, which makes the determined mathematical model of the transient thermal resistance of the MOSFET chip inaccurate. Summary of the invention

[0005] In order to make the determined fitted transient thermal resistance mathematical model of the MOSFET chip more accurate, the present application provides a transient thermal resistance testing method, system and electronic equipment.

[0006] In a first aspect, the present application provides a transient thermal resistance testing method, which adopts the following technical solution:

[0007] A transient thermal resistance test method, comprising:

[0008] If the heating current is detected to be disconnected, the voltage drop data is obtained until the first preset condition is reached, and the voltage drop data includes the junction temperature of the MOSFET chip. The reverse PN junction voltage drop corresponding to any time point when the voltage is reduced ;

[0009] The first preset condition includes:

[0010] The junction temperature of the MOSFET chip Drop to ambient temperature ;

[0011] Plotting cooling curves , the cooling curve A curve showing the relationship between junction temperature and time during the cooling process of the MOSFET chip;

[0012] Based on the cooling curve Determine the transient thermal resistance change curve during temperature rise ;

[0013] Based on the transient thermal resistance change curve of temperature rise , the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model.

[0014] By adopting the above-mentioned technical solution, the present application uses the temperature-sensitive parameter method to indirectly test the junction temperature of the MOSFET chip, and adopts the cooling method to perform transient thermal resistance testing. The cooling method can avoid errors caused by current and voltage fluctuations that make power loss non-constant. Therefore, the solid relay is first heated to a thermally stable state by a heating current. After the solid relay is heated to a thermally stable state, a test current is applied to the solid relay at the moment the heating current is disconnected. After the electronic device detects that the heating current is disconnected, it obtains the voltage drop data of the solid relay, and measures the reverse PN junction voltage drop and the time point corresponding to the reverse PN junction voltage drop through the test current until the junction temperature of the MOSFET chip drops to the ambient temperature. The electronic device draws a cooling curve based on the voltage drop data. , electronic equipment based on cooling curve Determine the transient thermal resistance change curve during temperature rise Finally, the transient thermal resistance change curve of electronic equipment based on temperature rise The fitting formula of the Foster thermal structure of the MOSFET chip and the Foster thermal structure network of the MOSFET chip determines the fitting transient thermal resistance mathematical model, and the heating transient thermal resistance change curve is obtained through the cooling curve, and finally the fitting transient thermal resistance mathematical model is more accurate.

[0015] In another possible implementation manner, collecting the pressure drop data set until a first preset condition is reached includes:

[0016] Establishing a queue reference, wherein the queue reference includes a data queue, a data acquisition thread, and a data processing thread;

[0017] The data collection thread collects voltage drop data and inserts the collected voltage drop data into the data queue;

[0018] The data processing thread takes the pressure drop data out of the data queue, and performs sampling compression and segmented extraction on the pressure drop data to generate a plurality of data packets, each of which includes the pressure drop data corresponding to each sampling frequency.

[0019] Through the above technical solution, a reference queue is established to ensure that the received data is in order. The data acquisition thread is used to collect the pressure drop data and insert the collected pressure drop data into the queue. The data processing thread is used to perform subsequent processing and storage on the collected data. After the data processing thread takes out the data in the queue, the data processing thread performs sampling compression and segmented extraction on the pressure drop data to generate multiple data packets, each of which includes the pressure drop data corresponding to each sampling frequency.

[0020] In another possible implementation, the data collection thread collects the pressure drop data, including:

[0021] Collecting pressure drop data at a first sampling rate until a second preset number is reached;

[0022] Collecting voltage drop data at a second sampling rate until a third preset number is reached, wherein the second sampling rate is obtained by reducing the sampling rate corresponding to the previous collection period;

[0023] cyclically executing the step of collecting the voltage drop data at the second sampling rate until a third preset number is reached, or until a second preset condition is met;

[0024] The first preset condition includes: collecting voltage drop data at a first sampling rate until the collection cycle after reaching a second preset number reaches a first preset number of times;

[0025] The voltage drop data is collected by a third sampling rate until the first preset condition is met, and the third sampling rate is the second sampling rate corresponding to the last collection cycle in the first preset number of times.

[0026] By adopting the above technical solution, the temperature change is most drastic in the initial stage of cooling, and as time goes by, the temperature change of the MOSFET chip gradually becomes gentle. Therefore, the voltage drop data is collected by the above method to ensure the accuracy while also ensuring that the amount of voltage drop data is not too large, which is convenient for subsequent curve fitting.

[0027] In another possible implementation, the queue reference further includes a status monitoring thread, and the method further includes:

[0028] The status monitoring thread monitors the current status of the data queue.

[0029] If the status monitoring thread detects that data overflow occurs in the data queue, a warning message is output and prompts whether to choose to stop running.

[0030] By adopting the above technical solution, the status monitoring thread is used to monitor the current status of the queue, so as to promptly notify personnel when an abnormality occurs in the queue.

[0031] In another possible implementation, the cooling curve is drawn ,include:

[0032] Draw a cooling curve based on the first fitting formula and the pressure drop data , the first fitting formula is the pre-tested correspondence between the reverse PN junction voltage drop and the junction temperature, and the first fitting formula is:

[0033]

[0034] The first fitting formula is the reverse PN junction voltage drop, is the junction temperature, is the temperature change rate of the MOSFET chip, is a constant.

[0035] By adopting the above technical solution, a cooling curve is drawn based on the pressure drop data and the first fitting formula. This facilitates subsequent calculations.

[0036] In another possible implementation, the cooling curve Determine the transient thermal resistance change curve during temperature rise ,include:

[0037] Calculate the cooling thermal resistance value corresponding to each pressure drop data based on the cooling thermal resistance calculation formula , the calculation formula of the cooling thermal resistance value is:

[0038]

[0039] The calculation formula of the cooling thermal resistance value is is the difference between the temperature in any pressure drop data and the ambient temperature, is the ambient temperature, is the steady-state power loss of the relay when it is thermally stable. The calculation formula is:

[0040]

[0041] The heating power calculation formula is the heating current for heating the MOSFET chip, To test the test current for the PN junction voltage drop of the MOSFET chip, is the junction voltage drop of the MOSFET chip in thermal steady state;

[0042] Based on the cooling curve And each cooling thermal resistance value Determine the transient thermal resistance change curve during temperature drop ;

[0043] Based on the temperature drop transient thermal resistance change curve And the temperature rise thermal resistance calculation formula determines the temperature rise thermal resistance value corresponding to each pressure drop data , the calculation formula of the temperature rise thermal resistance is:

[0044]

[0045] The calculation formula of the temperature rise thermal resistance is The transient thermal resistance change curve of temperature drop middle The transient thermal resistance value corresponding to ;

[0046] Based on the temperature rise thermal resistance value Determine the transient thermal resistance change curve during temperature rise .

[0047] By adopting the above technical solution, the cooling curve And the calculated thermal resistance value of each cooling Determine the transient thermal resistance change curve of temperature drop Since heating is the reverse process of cooling, the transient thermal resistance change curve of cooling is And the temperature rise thermal resistance calculation formula can calculate each temperature rise thermal resistance ;Through each temperature rise thermal resistance The transient thermal resistance change curve of temperature rise can be determined .

[0048] In another possible implementation, the transient thermal resistance change curve based on the temperature increase , the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model, including:

[0049] The various order parameters of the Foster thermal structure network based on the MOSFET chip and , and the fitting formula of the Foster thermal structure network determines the fitting transient thermal resistance mathematical model, and the fitting formula of the Foster thermal structure network is:

[0050]

[0051] in, is the order of the Foster thermal structure network of the MOSFET chip.

[0052] By adopting the above technical solution, the various order parameters of the thermal structure network of the MOSFET chip are fitted in advance, and the various order parameters are substituted into the fitting formula of the Foster thermal structure network to obtain the fitted transient thermal resistance mathematical model.

[0053] In a second aspect, the present application provides a transient thermal resistance test system, which adopts the following technical solution: a transient thermal resistance test system, characterized in that it includes:

[0054] A data acquisition unit, used for collecting pressure drop data;

[0055] An electronic device, used to perform a transient thermal resistance testing method as described in any one of claims 1 to 7.

[0056] By adopting the above technical solution, the data acquisition unit collects voltage drop data, and after the electronic device obtains the voltage drop data collected by the data acquisition unit, it performs transient thermal resistance testing according to the method in the first aspect, so that the final fitted transient thermal resistance mathematical model is more accurate.

[0057] In another possible implementation, a transient thermal resistance test system further includes a hardware test unit; the hardware test unit includes an NPN transistor Q1, a gate driver U1, an NMOS field effect transistor Q2, a three-terminal regulator U2, and an electronic load U3;

[0058] The base of the NPN transistor Q1 is connected to the power supply VCC1, the collector of the NPN transistor Q1 is connected to the power supply VCC2, and the emitter of the NPN transistor Q1 is grounded; the solid relay SSR is connected in series between the power supply VCC2 and the collector of the NPN transistor Q1; the VDD end of the gate driver U1 is connected to the power supply VCC1, the same-direction input end of the gate driver U1 is connected in series with a switch S1, and the switch S1 is connected to the power supply VCC3; the reverse input end of the gate driver U1 is grounded, and the output end of the gate driver U1 is connected to the gate of the NMOS field effect tube Q2. One end of the electronic load U3 is connected to the collector of the NPN transistor Q1, and the other end is connected to the drain of the NMOS field effect transistor Q2, and the source of the NMOS field effect transistor Q2 is grounded; the reference electrode of the three-terminal voltage regulator U2 is connected to the emitter of the NPN transistor Q1, the cathode of the three-terminal voltage regulator U2 is connected to the base of the NPN transistor Q1, and the anode of the three-terminal voltage regulator U2 is grounded; a pull-up resistor R1 is connected between the power supply VCC1 and the cathode of the three-terminal voltage regulator U2, and a protection resistor R2 is connected in series between the cathode of the three-terminal voltage regulator U2 and the base of the NPN transistor Q1, A current limiting resistor R3 is connected in series between the emitter of the NPN transistor Q1 and the ground terminal, a pull-down resistor R4 is connected to the in-phase input terminal of the gate driver U1, one end of the pull-down resistor R4 is connected between the switch S1 and the in-phase input terminal of the gate driver U1, and the other end of the pull-down resistor R4 is grounded; a protection resistor R5 is connected in series between the output terminal of the gate driver U1 and the NMOS field effect transistor Q2.

[0059] By adopting the above technical solution, the hardware test unit can be completed from the switch being disconnected to the heating current completely disappearing in a very short time, and the switching speed is extremely fast, thereby minimizing the measurement error.

[0060] In a third aspect, the present application provides an electronic device, which adopts the following technical solution:

[0061] An electronic device, comprising:

[0062] one or more processors;

[0063] Memory;

[0064] One or more applications, wherein the one or more applications are stored in a memory and configured to be executed by one or more processors, and the one or more applications are configured to: execute a transient thermal resistance test method shown in any possible implementation of the first aspect.

[0065] In a fourth aspect, the present application provides a computer-readable storage medium, which adopts the following technical solution:

[0066] A computer-readable storage medium includes: a computer program that can be loaded and executed by a processor to implement a transient thermal resistance testing method shown in any possible implementation of the first aspect.

[0067] In summary, the present application includes at least one of the following beneficial technical effects:

[0068] 1. This application uses a temperature-sensitive parameter method to indirectly test the junction temperature of the MOSFET chip, and adopts a cooling method to perform transient thermal resistance testing. The cooling method can avoid errors caused by current and voltage fluctuations that make power loss non-constant. Therefore, the solid relay is first heated to a thermally stable state by a heating current. After the solid relay is heated to a thermally stable state, a test current is applied to the solid relay at the moment the heating current is disconnected. After the electronic device detects that the heating current is disconnected, it obtains the voltage drop data of the solid relay, and measures the reverse PN junction voltage drop and the time point corresponding to the reverse PN junction voltage drop through the test current until the junction temperature of the MOSFET chip drops to the ambient temperature. The electronic device draws a cooling curve based on the voltage drop data. , electronic equipment based on cooling curve Determine the transient thermal resistance change curve during temperature rise Finally, the transient thermal resistance change curve of electronic equipment based on temperature rise , the Foster thermal structure of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model, the heating transient thermal resistance change curve is obtained through the cooling curve, and finally the fitting transient thermal resistance mathematical model is more accurate;

[0069] 2. The temperature change is most dramatic in the initial stage of cooling, and as time goes by, the temperature change of the MOSFET chip gradually becomes gentle. Therefore, the voltage drop data is collected by gradually reducing the sampling rate so that the cooling curve obtained in the subsequent processing process , Temperature rising transient thermal resistance change curve And the fitting transient thermal resistance mathematical model is more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 It is a flow chart of a transient thermal resistance testing method according to an embodiment of the present application.

[0071] Figure 2 It is a structural schematic diagram of a transient thermal resistance testing system according to an embodiment of the present application.

[0072] Figure 3 It is a structural schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0073] The present application is further described in detail below in conjunction with the accompanying drawings.

[0074] After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed, but such modifications are protected by patent law as long as they are within the scope of the claims of this application.

[0075] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0076] In addition, the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article, unless otherwise specified, generally means that the associated objects before and after are in an "or" relationship.

[0077] The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification.

[0078] The embodiment of the present application provides a transient thermal resistance test method, and takes the transient thermal resistance of a solid relay using a MOSFET chip as a power device as an example, and is performed by an electronic device, which can be a server or a terminal device, wherein the server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides cloud computing services. The terminal device can be a smart phone, a tablet computer, a laptop computer, a desktop computer, etc., but is not limited thereto. The terminal device and the server can be directly or indirectly connected via wired or wireless communication, and the embodiment of the present application does not limit this. Figure 1 As shown, the method includes step S101, step S102, step S103 and step S104, wherein

[0079] S101: If it is detected that the heating current is disconnected, voltage drop data is acquired until a first preset condition is reached.

[0080] Among them, the voltage drop data includes the MOSFET chip junction temperature The reverse PN junction voltage drop corresponding to any time point when the voltage is reduced ;

[0081] The first precondition includes:

[0082] MOSFET chip junction temperature Drop to ambient temperature .

[0083] In the embodiment of the present application, the junction temperature of the MOSFET chip is tested by the temperature-sensitive parameter method, wherein the reverse PN junction voltage drop of the MOSFET chip is used as a temperature-sensitive parameter. The cooling method is used to test the thermal resistance on the basis of testing the junction temperature of the MOSFET chip by the temperature-sensitive parameter method. In other embodiments, the heating method can also be used to test the thermal resistance. Compared with the cooling method, the error of the heating method is larger, so the cooling method is used to test in the embodiment of the present application. That is, cooling is the reverse process of heating, and the thermal resistance curve of the heating process is inverted using the thermal resistance curve of the cooling stage. Therefore, as long as a long-term constant heating current is applied to the reverse PN junction of the MOSFET to make it reach thermal stability, at the moment of removing the heating current, the PN junction voltage drop is measured in real time with a tiny measurement current. After removing the heating current, the temperature of the MOSFET chip decreases over time, so the electronic device can obtain the voltage drop data after removing the heating current.

[0084] When the junction temperature of the MOSFET chip drops to the ambient temperature When, for example, the ambient temperature is 25℃, the electronic device collects the voltage drop data to the MOSFET chip junction temperature The collection is stopped when the temperature drops to 25° C. In other embodiments, the first preset condition may also be that the collected pressure drop data reaches a preset number, for example, when the number of collected pressure drop data reaches 2000, the electronic device stops collecting when collecting 2000 pressure drop data.

[0085] S102, draw cooling curve .

[0086] The cooling curve The junction temperature of the MOSFET chip is reduced during the cooling process. With time relationship curve.

[0087] For the embodiment of the present application, firstly, in a normal room temperature environment, a heating current is applied to the reverse PN junction of the MOSFET chip, for example, the heating current is 1 A. The heating state is maintained until the MOSFET chip is heated to a thermally stable state.

[0088] Based on the voltage drop data, the junction temperature of the MOSFET chip during cooling is plotted With time The relationship curve, also known as the cooling curve , cooling curve Serves as the basis for subsequent steps.

[0089] S103, based on cooling curve Determine the transient thermal resistance change curve during temperature rise .

[0090] For the embodiment of the present application, since cooling is the reverse process of heating, the heating transient thermal resistance change curve can be determined based on the cooling curve of the MOSFET chip. .

[0091] S104, based on the transient thermal resistance change curve during temperature rise , the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model.

[0092] For the embodiments of the present application, the thermal resistance of the MOSFET chip is related to its thermal structure network. The order of the thermal structure network mainly affects the thermal resistance of the MOSFET chip. Therefore, when fitting the transient thermal resistance mathematical model, the curve fitting degree and calculation amount must be considered comprehensively.

[0093] In a possible implementation of the embodiment of the present application, in step S101, a pressure drop data set is collected until a first preset condition is reached, specifically including step S1011 (not shown in the figure), step S1012 (not shown in the figure), and step S1013 (not shown in the figure), wherein:

[0094] S1011, establish a queue reference.

[0095] The queue reference includes a data queue, a data collection thread, and a data processing thread.

[0096] For the embodiment of the present application, the queue reference can be created through LabView. The LabView program adopts the "producer-consumer" architecture, creates a queue reference and opens up a data queue, a data acquisition thread and a data processing thread. The data acquisition thread is used for data acquisition (equivalent to the producer in the architecture), and the data processing thread is used to process the data collected by the data acquisition thread (equivalent to the consumer in the architecture). The data queue is located between the data acquisition thread and the data processing thread. The data queue avoids data loss and duplication caused by loop asynchrony. On the other hand, since the elements in the data queue are "first in, first out", it can also ensure that the received voltage drop data is orderly.

[0097] S1012, the data collection thread collects voltage drop data and inserts the collected voltage drop data into a data queue.

[0098] For the embodiment of the present application, the voltage drop data can be collected by the data acquisition card NI6353. The data acquisition thread configures the data acquisition card NI6353 and controls its sampling. The data acquisition thread inserts the collected voltage drop data into the data queue.

[0099] S1013, the data processing thread takes the pressure drop data out of the data queue, and performs sampling compression and segmented extraction on the pressure drop data to generate multiple data packets.

[0100] Each data packet includes voltage drop data corresponding to each sampling frequency.

[0101] For the embodiment of the present application, the data processing thread is used to perform subsequent processing and storage on the collected data. The data processing thread takes out the voltage drop data at the exit of the data queue, and then the data processing thread extracts the voltage drop data corresponding to each sampling frequency according to different sampling frequencies. For example, the sampling rates are 1MHz, 100KHz, 10KHz and 1KHz, etc. The data processing thread matches the voltage drop data taken out from the data queue with the above sampling rates. Finally, the data processing thread processes the voltage drop data corresponding to each sampling rate into a data packet. In the embodiment of the present application, the data packet can be in the "txt" format, and in other embodiments the data packet can also be in other formats, as long as the data packet can be subsequently processed.

[0102] In a possible implementation of the embodiment of the present application, in step S1012, the data acquisition thread collects the pressure drop data, specifically including step S10121 (not shown in the figure), step S10122 (not shown in the figure), step S10123 (not shown in the figure), step S10124 (not shown in the figure) and step S10125 (not shown in the figure), wherein:

[0103] S10121, collecting voltage drop data at a first sampling rate until a second preset number is reached.

[0104] For the embodiment of the present application, since the temperature of the MOSFET chip changes dramatically when the temperature starts to drop, and the voltage drop data of the MOSFET chip when the temperature starts to drop is more important, it is necessary to collect as much voltage drop data as possible when the MOSFET chip starts to cool down. Collecting as much voltage drop data as possible can be achieved through a higher sampling frequency. For example, a sampling frequency of 1MHz is used to collect voltage drop data when the temperature starts to drop. Collecting voltage drop data at a sampling frequency of 1MHz means collecting one voltage drop data every 1μs.

[0105] Assume that the first sampling rate is 1 MHz and the second preset number is 100. After the electronic device collects 100 voltage drop data, it stops using the first sampling rate for collection, indicating that after collecting 100 voltage drop data, the temperature change of the MOSFET chip gradually slows down.

[0106] S10122, collecting voltage drop data at a second sampling rate until a third preset number is reached.

[0107] The second sampling rate is obtained by reducing the sampling rate corresponding to the previous acquisition period.

[0108] For an embodiment of the present application, taking step S10121 as an example, when the voltage drop data collected at a sampling rate of 1MHz reaches the second preset number, it takes 100μs for the MOSFET chip to cool down from the beginning to collect 100 voltage drop data. The electronic device reduces the first sampling rate to obtain the second sampling rate. Assume that the second sampling rate is 100KHz, and the third preset number is 90. The electronic device collects voltage drop data at a sampling rate of 100KHz, that is, collects one voltage drop data every 10μs. When the voltage drop data collected at a sampling rate of 100KHz reaches 90, it takes 1ms for the MOSFET chip to cool down from the beginning to collect 90 voltage drop data at a sampling rate of 100KHz.

[0109] S10123, looping and collecting voltage drop data at a second sampling rate until a third preset number is reached, or until a second preset condition is met.

[0110] The second preset condition includes: collecting voltage drop data at a first sampling rate until the collection cycle after the second preset number reaches a first preset number of times.

[0111] For the embodiment of the present application, as time goes by, the temperature change of the MOSFET chip gradually becomes gentle, so the electronic device no longer needs to collect voltage drop data at a higher sampling rate, and continuing to collect voltage drop data at a higher sampling rate will generate a large amount of voltage drop data, which will bring a processing burden to the data processing thread, resulting in the inability to perform data processing and curve fitting later. In order to reduce the processing pressure of the data processing thread, the electronic device gradually reduces the sampling rate to collect voltage drop data.

[0112] Taking step S10122 as an example, it is assumed that the first preset number of times is 3 times. When the data acquisition process collects 90 voltage drop data at a sampling rate of 100KHz, it means that the cycle of collecting voltage drop data at a sampling rate of 100KHZ is over. The data acquisition process controls the data acquisition card NI6353 to reduce the sampling rate. For example, when the sampling period of the 100KHz sampling rate ends, the data acquisition card NI6353 reduces the sampling rate to 10Khz, that is, the voltage drop data is collected once every 100μs. After collecting 90 voltage drop data at a sampling rate of 10KHz, the sampling period of the 10KHz sampling rate ends. The data acquisition card NI6353 continues to reduce the sampling rate on the basis of the 10KHz sampling rate, for example, to 1KHz. The sampling rate is 1KHz, that is, the voltage drop data is collected once every 1ms. After collecting 90 voltage drop data at a sampling rate of 1KHz, it means that the sampling period of the 1KHz sampling rate is over. After the acquisition cycle of the 1KHz sampling rate ends, the acquisition cycle after collecting the voltage drop data at the 1MHz sampling rate reaches 3 times.

[0113] S10124: Collect voltage drop data at a third sampling rate until a first preset condition is met.

[0114] The third sampling rate is the second sampling rate corresponding to the last acquisition cycle in the first preset number of times.

[0115] For the embodiment of the present application, taking step S10123 as an example, the third sampling rate is 1KHz. In the process of reducing the sampling rate from 1MHz to 1KHz, the cooling process of the MOSFET chip is more obvious. As time goes by, the cooling trend of the MOSFET chip tends to be flat. Therefore, after the sampling rate is reduced to 1KHz, continuing to collect voltage drop data at a sampling rate of 1KHz can maintain the continuity of the collected voltage drop data. When the junction temperature of the MOSFET chip When the temperature drops to 25°C, stop collecting the pressure drop data.

[0116] In a possible implementation of the embodiment of the present application, the queue reference further includes a status monitoring thread, and the method further includes step S105 (not shown in the figure) and step S106 (not shown in the figure), wherein:

[0117] S105: The status monitoring thread monitors the current status of the data queue.

[0118] For the embodiment of the present application, when the data acquisition thread inserts the voltage drop data into the data queue, the sampling rate may be too high, causing the data acquisition thread to be unable to retrieve the voltage drop data from the data queue in time, thereby causing data overflow in the data queue. Therefore, the status monitoring thread monitors the data queue to monitor the current status of the queue.

[0119] S106: If the status monitoring thread detects that data overflow occurs in the data queue, a warning message is output and a prompt is given as to whether to stop the operation.

[0120] For an embodiment of the present application, for example, the data queue can store 10 data. After the data processing thread takes out 1 data at the end of the data queue, the data acquisition thread inserts a data into the starting position of the data queue. At this time, no data is removed from the data queue. When the sampling rate is too high, the data acquisition thread may work abnormally. For example, after the data processing thread takes out 1 data at the end of the data queue, the data acquisition thread inserts 2 data into the data queue, thus causing data overflow in the data queue. When the status monitoring thread detects that the data queue has overflowed, the warning message output by the electronic device may be a text message of "data overflow is currently occurring", and the electronic device controls the display screen to display "data overflow is currently occurring", so that the user is informed of the data overflow in a timely manner. After the user learns of the data overflow, he can choose whether to stop the operation.

[0121] In a possible implementation of the embodiment of the present application, drawing a cooling curve in step S102 specifically includes step S1026 (not shown in the figure), wherein:

[0122] S1026, drawing a cooling curve based on the first fitting formula and the pressure drop data , the first fitting formula is the pre-tested corresponding relationship between the reverse PN junction voltage drop and the junction temperature. The first fitting formula is:

[0123]

[0124] The first fitting formula is the reverse PN junction voltage drop, is the junction temperature, is the temperature change rate of the MOSFET chip, is a constant.

[0125] For the embodiment of the present application, the standard calibration curve is obtained by the first fitting formula. The standard calibration curve refers to the reverse PN junction voltage drop of the MOSFET chip. and junction temperature The relationship between the product and the oil bath is the basis for all subsequent calculations. The product is placed in an oil bath to measure the standard calibration curve. In the absence of such measurement conditions, this application proposes a method for measuring the standard calibration curve. The results are basically consistent with those of the oil bath measurement method.

[0126] The method for measuring the standard calibration curve is as follows:

[0127] Place the solid-state relay to be tested in a constant temperature box, and place a high-precision PTC thermistor near the MOSFET chip on the solid-state relay housing. The PTC thermistor is used to accurately measure the ambient temperature near the housing. The constant temperature box is set to 25℃-145℃, and every 20℃ is used as a temperature measurement point. To ensure that the junction temperature of the MOSFET chip is consistent with the ambient temperature of the constant temperature box, each temperature point is maintained for more than 20 minutes before reading the resistance value of the thermistor and Use a high-precision digital multimeter to measure the resistance of the temperature sensitive resistor and The value makes the measured data more accurate.

[0128] For example, suppose =-0.0023, =0.6389. Set the heating current to 1A, and heat the solid relay with a heating current of 1A to heat the outer shell of the solid relay to about 80°C. In a normal room temperature environment without forced convection, keep the solid relay heated for 20 minutes to ensure that the solid relay is heated to a thermally stable state. Use the Kelvin method to measure the The value is 0.67026V. Then the heating current is turned off, and the moment of turning off the heating current is = 0, and trigger the data acquisition card NI6353 to record and store The data is recorded for several tens of minutes until the junction temperature of the MOSFET chip drops to near room temperature. Finally, the relationship between the junction voltage drop and time is obtained. - Converted to junction temperature by the first fitting formula and time The relationship curve , and then use mathematical processing software to draw the logarithmic coordinate system to obtain the cooling curve of the MOSFET chip .

[0129] Fast switching circuits in = 0 is in an unstable state for a few microseconds. This is due to the signal fluctuation caused by current switching. The data in this period is very important and directly related to the accuracy of the final measurement, so compensation must be made. According to the one-dimensional heat diffusion principle, the data in this period is With time The square root of is approximately linear, so the data in the first few microseconds are corrected to obtain the corrected cooling curve .

[0130] For example, if the hardware test unit is stable at t=10μs, then the data collected before 10μs All of them are inaccurate, and the corresponding derived junction temperature is also inaccurate. All data less than 10μs need to be removed, and then the temperature correction method is used. =10μs junction temperature, =0μs, = the junction temperature at the moment 1 μs or 10 μs ago. The above temperature correction method is a prior art and will not be described in detail here.

[0131] In a possible implementation of the embodiment of the present application, in step S103, based on the cooling curve Determine the transient thermal resistance change curve during temperature rise , specifically including step S1031 (not shown in the figure), step S1032 (not shown in the figure), step S1033 (not shown in the figure) and step S1034 (not shown in the figure), wherein,

[0132] S1031, calculate the cooling thermal resistance value corresponding to each pressure drop data based on the cooling thermal resistance calculation formula , cooling thermal resistance The calculation formula is:

[0133]

[0134] Cooling thermal resistance In the calculation formula is the difference between the temperature in any pressure drop data and the ambient temperature, is the ambient temperature, is the steady-state power loss when the relay is thermally stable, the heating power The calculation formula is:

[0135]

[0136] Heating power calculation formula is the heating current for heating the MOSFET chip, To test the test current of the PN junction voltage drop of the MOSFET chip, It is the junction voltage drop of the MOSFET chip in thermal steady state.

[0137] For the embodiment of the present application, the junction temperature corresponding to each voltage drop data is calculated according to the first fitting formula: Difference from ambient temperature . Based on the Kelvin method measured before disconnecting the heating current value, get heating power , =0.67026V×1.01A≈0.68W. Then use each Divide by Get the cooling thermal resistance value at each moment .For example = 1s, the collected Junction temperature ( =1)≈67.7℃, the ambient temperature is 24.3℃, and the calculated =43.4℃, =43.4 / 0.68≈63.82 (K / W). The electronic device calculates the thermal resistance corresponding to each voltage drop data , and then the transient thermal resistance change curve of cooling can be drawn .

[0138] S1032, based on cooling curve And each cooling thermal resistance value Determine the transient thermal resistance change curve during temperature drop .

[0139] For the present embodiment, the cooling curve Characterization Junction Temperature With time The relationship between the change of temperature and the transient thermal resistance change curve Characterize the cooling thermal resistance With time The electronic device determines the change relationship at each time Junction temperature corresponding to the lower voltage drop data After that, the cooling curve is obtained Electronic devices based on cooling curves And cooling thermal resistance The calculation formula is used to calculate each time Thermal resistance after temperature drop , by each cooling thermal resistance value Get the transient thermal resistance change curve of cooling Then the transient thermal resistance change curve of temperature drop is Get the transient thermal resistance change curve of temperature rise Electronic equipment determines the transient thermal resistance change curve of cooling After cooling, the transient thermal resistance change curve Draw it out, so that the transient thermal resistance change curve of cooling More intuitive.

[0140] S1033, based on the transient thermal resistance change curve of cooling And the temperature rise thermal resistance calculation formula determines the temperature rise thermal resistance value corresponding to each pressure drop data , the calculation formula of temperature rise thermal resistance is:

[0141]

[0142] The calculation formula of thermal resistance The transient thermal resistance change curve of temperature drop middle The corresponding transient thermal resistance value.

[0143] For the embodiment of the present application, since heating is the reverse process of cooling, the transient thermal resistance change curve of cooling can be used. Determine the transient thermal resistance change curve of temperature rise .

[0144] Transient thermal resistance change curve of electronic equipment according to temperature drop Thermal resistance And the temperature rise thermal resistance calculation formula in step S1033 is used to calculate the temperature rise thermal resistance . The transient thermal resistance curve of the temperature drop The transient thermal resistance value corresponding to and The difference between the two can be used to obtain the corresponding thermal resistance of each pressure drop data. .

[0145] S1034, based on thermal resistance at rising temperature Determine the transient thermal resistance change curve during temperature rise .

[0146] For the embodiment of the present application, the electronic device obtains each temperature rise thermal resistance by calculation. After that, the transient thermal resistance change curve of temperature rise can be determined. . Temperature rise transient thermal resistance change curve It is drawn through data points and is a discrete quantity. The transient thermal resistance change curve of the electronic device when the temperature rises After it is determined, the transient thermal resistance change curve of temperature rise can be analyzed by mathematical processing software. Fitting is performed to obtain the transient thermal resistance mathematical model and its curve (continuous quantity). Intuitively and continuously represented.

[0147] In a possible implementation of the embodiment of the present application, in step S104, based on the temperature increase transient thermal resistance change curve , the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model, specifically including step S1041 (not shown in the figure), wherein,

[0148] S1041, various order parameters of Foster thermal structure network based on MOSFET chip and , and the fitting formula of Foster thermal structure network determine the fitting transient thermal resistance mathematical model. The fitting formula of Foster thermal structure network is:

[0149]

[0150] in, is the order of the Foster thermal structure network of the MOSFET chip.

[0151] For the embodiment of the present application, since there are relatively complex multi-layer wiring inside the solid-state relay, the curve fitting degree and the amount of calculation should be considered when fitting the curve. Assuming that the order of the heat transfer structure network is 7th order, that is, =7, and assuming the first order: =13.6543, =16.1885; Second order: =0.774902, = 0.000146995; third order: = 4.60471, = 0.00520964; Fourth order: =27.66, =1.0994; fifth order: =19.3798, =4.32979; Sixth order: =4.04335, =3.15194; Seventh order: =9.58901, = 0.0728496. The various order parameters of the Foster thermal structure network of the above MOSFET chip and It can be obtained by fitting in advance, and the various order parameters of the Foster thermal structure network of the above MOSFET chip are and Input into electronic devices and store them, so that subsequent electronic devices can calculate the various order parameters of the Foster thermal structure network of the MOSFET chip and Make a call.

[0152] For the embodiment of the present application, the staff can input the fitting formula of the Foster thermal structure network into the electronic device. The electronic device converts the various order parameters of the above Foster thermal structure network into and By substituting it into the fitting formula of the above Foster thermal structure network, the fitted transient thermal resistance mathematical model can be determined.

[0153] Among them, the Foster thermal structure network has no actual physical meaning, so the order parameters of the Foster thermal structure network and Only used to substitute into the fitting formula of Foster thermal structure network to obtain continuous Curve to analyze and calculate the overload characteristics of subsequent products.

[0154] The above embodiment introduces a transient thermal resistance test method from the perspective of the method flow. The transient thermal resistance test method is not limited to the transient thermal resistance test of solid relays using MOSFET chips as power devices, but can also be applied to other types of solid relays. The following embodiment introduces a transient thermal resistance test system, which is described in detail in the following embodiment.

[0155] The present application embodiment provides a transient thermal resistance test system, such as Figure 2 As shown, the transient thermal resistance testing system 20 includes a data acquisition unit 201 and an electronic device 202. The data acquisition unit 201 is used to collect voltage drop data; the electronic device 202 is used to execute the transient thermal resistance testing method in the embodiment of the present application.

[0156] For the embodiment of the present application, the data acquisition unit 201 is used to collect the pressure drop data, the data acquisition unit may include a NI6353 acquisition card, and the electronic device 202 may include Labview software and mathematical processing software. The electronic device 202 controls the NI6353 acquisition card to collect the pressure drop data through the Labview software. The electronic device 202 processes the pressure drop data collected by the data acquisition unit 201.

[0157] Reference Figure 2 , a transient thermal resistance test system of an embodiment of the present application further includes a hardware test unit 203. The hardware test unit 203 enables the measurement current to be applied to the solid-state relay in a very short time after the heating current is turned off. The hardware test unit includes an NPN transistor Q1, a gate driver U1, an NMOS field effect transistor Q2, a three-terminal regulator U2, and an electronic load U3;

[0158] The base of the NPN transistor Q1 is connected to the power supply VCC1, the collector of the NPN transistor Q1 is connected to the power supply VCC2, and the emitter of the NPN transistor Q1 is grounded; the solid relay SSR is connected in series between the power supply VCC2 and the collector of the NPN transistor Q1; the VDD end of the gate driver U1 is connected to the power supply VCC1, the same-direction input end of the gate driver U1 is connected in series with a switch S1, and the switch S1 is connected to the power supply VCC3; the reverse input end of the gate driver U1 is grounded, and the output end of the gate driver U1 is connected to the gate of the NMOS field effect tube Q2. One end of the electronic load U3 is connected to the collector of the NPN transistor Q1, and the other end is connected to the drain of the NMOS field effect transistor Q2, and the source of the NMOS field effect transistor Q2 is grounded; the reference electrode of the three-terminal voltage regulator U2 is connected to the emitter of the NPN transistor Q1, the cathode of the three-terminal voltage regulator U2 is connected to the base of the NPN transistor Q1, and the anode of the three-terminal voltage regulator U2 is grounded; a pull-up resistor R1 is connected between the power supply VCC1 and the cathode of the three-terminal voltage regulator U2, and a protection resistor R2 is connected in series between the cathode of the three-terminal voltage regulator U2 and the base of the NPN transistor Q1, A current limiting resistor R3 is connected in series between the emitter of the NPN transistor Q1 and the ground terminal, a pull-down resistor R4 is connected to the in-phase input terminal of the gate driver U1, one end of the pull-down resistor R4 is connected between the switch S1 and the in-phase input terminal of the gate driver U1, and the other end of the pull-down resistor R4 is grounded; a protection resistor R5 is connected in series between the output terminal of the gate driver U1 and the NMOS field effect transistor Q2.

[0159] The power supply VCC1 pulls up the base of the NPN transistor Q1 through the pull-up resistor R1, and the NPN transistor Q1 is turned on. The power supply VCC2, the solid relay, and the loop where the NPN transistor Q1 is located are turned on, so that the test current provided by the power supply VCC2 flows through the solid relay SSR. The model of the three-terminal voltage regulator U2 can be TL431. The three-terminal voltage regulator U2 keeps the test current as stable as possible to reduce the measurement error. The three-terminal voltage regulator U2 keeps the voltage across the current limiting resistor R3 constant, so that the current (test current) flowing through the current limiting resistor R3 is maintained at a fixed value. The emitter current of the NPN transistor Q1 is approximately equal to the collector current. Therefore, the current flowing through the solid relay SSR is the test current.

[0160] The model of the gate driver U1 may be UCC27517. When the switch S1 is closed, the same-direction input terminal of the gate driver U1 is at a high level, and the reverse input terminal of the gate driver U1 is at a low level. It can be seen from the truth table of UCC27517 that at this time, the output terminal of the gate driver U1 is at a high level, and the NMOS field effect tube Q2 is turned on. At this time, the heating current flows through the electronic load U3 and the NMOS field effect tube Q2 to heat the solid relay SSR.

[0161] When the switch S1 is turned off, the same-direction input terminal of the gate driver U1 is pulled to a low level by the pull-down resistor R4. It can be seen from the truth table of UCC27517 that at this time, the output terminal of the gate driver U1 is at a low level, and the NMOS tube Q2 is turned off, so that the heating current is turned off, the circuit where the electronic load U3 is located is not conducting, and the current flowing through the solid-state relay SSR is switched to the test current. The voltage drop data of the MOSFET chip can be collected through the "output +" and "output -" pins on the solid-state relay SSR. The circuit can be completed within a few μs from the switch being turned off to the heating current completely disappearing, and the switching speed is extremely fast, so that the final fitting curve is more in line with the actual situation.

[0162] An electronic device is provided in an embodiment of the present application, such as Figure 3 As shown, Figure 3 The electronic device 30 shown includes: a processor 301 and a memory 303. The processor 301 and the memory 303 are connected, such as through a bus 302. Optionally, the electronic device 30 may also include a transceiver 304. It should be noted that in actual applications, the transceiver 304 is not limited to one, and the structure of the electronic device 30 does not constitute a limitation on the embodiments of the present application.

[0163] The processor 301 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processor 301 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0164] The bus 302 may include a path to transmit information between the above components. The bus 302 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus 302 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 3 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0165] The memory 303 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical disk storage, optical disk storage (including compressed optical disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0166] The memory 303 is used to store the application code for executing the solution of the present application, and the execution is controlled by the processor 401. The processor 301 is used to execute the application code stored in the memory 303 to implement the contents shown in the above method embodiment.

[0167] The electronic devices include, but are not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), and fixed terminals such as digital TVs, desktop computers, etc. It can also be a server, etc. Figure 3 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0168] The embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when it is run on a computer, the computer can execute the corresponding content in the aforementioned method embodiment. Compared with the related art, the embodiment of the present application uses a temperature-sensitive parameter method to indirectly test the junction temperature of the MOSFET chip, and adopts a cooling method to perform transient thermal resistance testing. The cooling method can avoid errors caused by current and voltage fluctuations that make power loss non-constant. Therefore, the solid relay is first heated to a thermally stable state by a heating current. After the solid relay is heated to a thermally stable state, a test current is applied to the solid relay at the moment when the heating current is disconnected. After the electronic device detects that the heating current is disconnected, it obtains the voltage drop data of the solid relay, and measures the reverse PN junction voltage drop and the time point corresponding to the reverse PN junction voltage drop by the test current until the junction temperature of the MOSFET chip drops to the ambient temperature. The electronic device draws a cooling curve based on the voltage drop data, determines the temperature rise transient thermal resistance change curve based on the cooling curve, and finally determines the fitted transient thermal resistance mathematical model based on the temperature rise transient thermal resistance change curve, the Foster thermal structure of the MOSFET chip, and the fitting formula of the Foster thermal structure network of the MOSFET chip. The temperature rise transient thermal resistance change curve is obtained through the cooling curve, and finally the fitted transient thermal resistance mathematical model is obtained more accurately.

[0169] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0170] The above are only some implementation methods of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A transient thermal resistance test method, characterized in that: include: If it is detected that the heating current is disconnected, the voltage drop data is obtained until the first preset condition is reached, and the voltage drop data includes the MOSFET chip junction temperature T j The reverse PN junction voltage drop V corresponding to any time point when it decreases PN ; The first preset condition includes: The junction temperature of the MOSFET chip T j Drop to ambient temperature T a ; Plotting the cooling curve T j (t), the cooling curve T j (t) is the junction temperature T of the MOSFET chip during cooling process j The relationship curve with time t; Based on the cooling curve T j (t) Determine the transient thermal resistance change curve Z during temperature rise ja (t); Based on the temperature rising transient thermal resistance change curve Z ja (t), the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip to determine the fitting transient thermal resistance mathematical model; The step of obtaining a pressure drop data set until a first preset condition is reached includes: Establishing a queue reference, wherein the queue reference includes a data queue, a data acquisition thread, and a data processing thread; The data collection thread collects voltage drop data and inserts the collected voltage drop data into the data queue; The data processing thread takes the voltage drop data out of the data queue, and performs sampling compression and segmented extraction on the voltage drop data to generate a plurality of data packets, each of which includes the voltage drop data corresponding to each sampling frequency; The data collection thread collects pressure drop data, including: Collecting pressure drop data at a first sampling rate until a second preset number is reached; Collecting voltage drop data at a second sampling rate until a third preset number is reached, wherein the second sampling rate is obtained by reducing the sampling rate corresponding to the previous collection period; The step of collecting the voltage drop data at the second sampling rate is cyclically executed until a third preset number is reached, and until a second preset condition is satisfied; the second preset condition includes: collecting the voltage drop data at the first sampling rate until the collection cycle after the second preset number is reached reaches a first preset number of times; Collecting voltage drop data at a third sampling rate until a first preset condition is met, wherein the third sampling rate corresponds to the second sampling rate for the last collection cycle in the first preset number of times; Based on the cooling curve T j (t) Determine the transient thermal resistance change curve Z during temperature rise ja (t), including: Calculate the cooling thermal resistance value Z′ corresponding to each pressure drop data based on the cooling thermal resistance calculation formula ja , the cooling thermal resistance value Z′ ja The calculation formula is: The cooling thermal resistance value Z' ja In the calculation formula, ΔT is the difference between the temperature in any pressure drop data and the ambient temperature, T a is the ambient temperature, P is the steady-state power loss of the relay when it is thermally stable, and the calculation formula for the heating power P is: <h2 style=";text-align:left;direction:ltr">P = (A1 + A2) × V<h2 style=";text-align:left;direction:ltr"> PN1 In the heating power calculation formula, A1 is the heating current for heating the MOSFET chip, A2 is the test current for testing the PN junction voltage drop of the MOSFET chip, V PN1 is the junction voltage drop of the MOSFET chip in thermal steady state; Based on the cooling curve T j (t) and each cooling thermal resistance value Z′ ja Determine the transient thermal resistance change curve Z′ during temperature drop ja (t); Based on the temperature drop transient thermal resistance change curve Z′ ja (t) and the temperature rise thermal resistance calculation formula to determine the temperature rise thermal resistance value Z corresponding to each pressure drop data ja , the calculation formula of the temperature rise thermal resistance is: Z ja =Z′ ja (t=0)-Z′ ja (t) In the calculation formula of the temperature rise thermal resistance, Z' ja (t=0) is the transient thermal resistance change curve Z′ during temperature drop ja (t) The transient thermal resistance value corresponding to t = 0; Based on the temperature rise thermal resistance value Z ja Determine the transient thermal resistance change curve Z during temperature rise ja (t).

2. A transient thermal resistance testing method according to claim 1, characterized in that: The queue reference also includes a status monitoring thread, and the method further includes: The status monitoring thread monitors the current status of the data queue; If the status monitoring thread detects that data overflow occurs in the data queue, a warning message is output and prompts whether to choose to stop running.

3. A transient thermal resistance testing method according to claim 1, characterized in that: The cooling curve T j (t), including: Draw a cooling curve T based on the first fitting formula and the pressure drop data j (t), the first fitting formula is the pre-tested correspondence between the reverse PN junction voltage drop and the junction temperature, and the first fitting formula is: V PN =aT j +b The V in the first fitting formula PN is the reverse PN junction voltage drop, T j is the junction temperature, a is the temperature change rate of the MOSFET chip, and b is a constant.

4. A transient thermal resistance testing method according to claim 1, characterized in that: The transient thermal resistance change curve Z based on the temperature rise ja (t), the Foster thermal structure network of the MOSFET chip and the fitting formula of the Foster thermal structure network of the MOSFET chip determine the fitting transient thermal resistance mathematical model, including: The parameters R of each order of the Foster thermal structure network based on the MOSFET chip i and C i , and the fitting formula of the Foster thermal structure network determines the fitting transient thermal resistance mathematical model, and the fitting formula of the Foster thermal structure network is: Wherein, n is the order of the Foster thermal structure network of the MOSFET chip.

5. A system for transient thermal resistance testing, characterized in that: include: A data acquisition unit, used for collecting pressure drop data; An electronic device, used to perform a transient thermal resistance testing method as described in any one of claims 1 to 4.

6. The system for transient thermal resistance testing according to claim 5, characterized in that: It also includes a hardware testing unit; the hardware testing unit includes an NPN transistor Q1, a gate driver U1, an NMOS field effect transistor Q2, a three-terminal regulator U2 and an electronic load U3; The base of the NPN transistor Q1 is connected to the power supply VCC1, the collector of the NPN transistor Q1 is connected to the power supply VCC2, and the emitter of the NPN transistor Q1 is grounded; the solid relay SSR is connected in series between the power supply VCC2 and the collector of the NPN transistor Q1; the VDD terminal of the gate driver U1 is connected to the power supply VCC1, the non-inverting input terminal of the gate driver U1 is connected in series with the switch S1, the switch S1 is connected to the power supply VCC3, the reverse input terminal of the gate driver U1 is grounded, the output terminal of the gate driver U1 is connected to the gate of the NMOS field effect transistor Q2, one end of the electronic load U3 is connected to the collector of the NPN transistor Q1, and the other end is connected to the drain of the NMOS field effect transistor Q2, and the source of the NMOS field effect transistor Q2 is grounded; the three-terminal steady state relay SSR is connected in series between the power supply VCC2 and the collector of the NMOS field effect transistor Q2 ...1 and the non-inverting input terminal of the gate driver U1 is connected in series with the switch S1, and the switch S1 is connected to the power supply VCC3; the reverse input terminal of the gate driver U1 is grounded, the output terminal of the gate driver U1 is connected to the gate of the NMOS field effect transistor Q2, one end of the electronic load U3 is connected to the collector of the NPN transistor Q1, and the other end is connected to the drain of the NMOS field effect transistor Q2, and the source of the NMOS field effect transistor Q2 is grounded; the three-terminal steady state relay SSR is connected in series between the power supply VCC2 and the collector of the NPN transistor Q1; the three-terminal steady state relay SSR is connected in series between the power supply VCC2 and the collector The reference electrode of the three-terminal voltage regulator U2 is connected to the emitter of the NPN transistor Q1, the cathode of the three-terminal voltage regulator U2 is connected to the base of the NPN transistor Q1, and the anode of the three-terminal voltage regulator U2 is grounded; a pull-up resistor R1 is connected between the power supply VCC1 and the cathode of the three-terminal voltage regulator U2, a protection resistor R2 is connected in series between the cathode of the three-terminal voltage regulator U2 and the base of the NPN transistor Q1, a current-limiting resistor R3 is connected in series between the emitter of the NPN transistor Q1 and the ground terminal, a pull-down resistor R4 is connected to the in-phase input terminal of the gate driver U1, one end of the pull-down resistor R4 is connected between the switch S1 and the in-phase input terminal of the gate driver U1, and the other end of the pull-down resistor R4 is grounded; a protection resistor R5 is connected in series between the output terminal of the gate driver U1 and the NMOS field effect transistor Q2.

7. An electronic device, characterized in that: It includes: One or more processors; Memory; One or more application programs, wherein the one or more application programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are configured to: execute a transient thermal resistance test method according to any one of claims 1 to 4.

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