Fan control circuit, method and cloud terminal device

Abstract

The embodiments of the present application provide a fan control circuit, method and cloud terminal device, which relate to the field of electronic circuit technology. The circuit includes: a central processing unit, having a universal input and output interface and an adjustable pulse width output interface, which is used to control the adjustable pulse width output interface to output a level signal when powered on. An AND gate circuit is connected to the adjustable pulse width output interface through a first input terminal, and is respectively connected to the universal input and output interface and a first resistor through a second input terminal, and is used to receive the level signal output by the adjustable pulse width output interface and the low level output by the universal input and output interface under the action of the first resistor, and the low level output after the level signal and the low level are ANDed is input to the speed input signal pin, so that the fan stops rotating. The present application can realize the control of the fan without using a customized expansion chip, which is not only low in cost, but also can stop the fan in the first few seconds before the central processing unit is turned on to avoid noise.

Description

Technical Field

[0001] The present application relates to the field of electronic circuit technology, and in particular to a fan control circuit, method and cloud terminal device. Background Art

[0002] Cloud terminals refer to terminal devices that use cloud desktop technology. With the continuous development of science and technology, people have smaller and smaller requirements for the size of cloud terminals. However, as the performance of cloud terminals continues to improve, their heat dissipation power consumption is getting higher and higher. Based on this, cloud terminals need to be equipped with fans with higher speeds to meet the heat dissipation requirements. However, higher speeds will bring greater noise. Therefore, a complete set of strategies is needed to control noise, requiring that there should be no noise impact when the cloud terminal is powered on.

[0003] Related technologies mainly control the speed of the fan in the cloud terminal through the following two methods:

[0004] First, customize an input / output interface expansion chip and connect the chip to the central processor of the cloud terminal and the fan respectively. In actual application, the chip reads the temperature data of the central processor and outputs an adjustable pulse width signal according to the temperature data to control the speed of the fan, ensuring that the fan does not always run at a high speed. While achieving the heat dissipation function, the noise generated by the fan is reduced. However, this method requires a specially customized input / output interface expansion chip, which is relatively expensive.

[0005] Second, the adjustable pulse width signal is directly output from the central processing unit to control the fan speed. However, the voltage level of the adjustable pulse width pin of the central processing unit is always high in the first few seconds before powering on, causing the fan to always keep running at full speed in the first few seconds of powering on, resulting in a lot of noise. Summary of the invention

[0006] Multiple aspects of the present application provide a fan control circuit, method and cloud terminal device, which can realize fan control without using a customized expansion chip. Not only is the cost low, but the fan can also be stopped within the first few seconds of the central processing unit being turned on to avoid noise.

[0007] An embodiment of the present application provides a fan control circuit, including:

[0008] A central processing unit, having a general input and output interface and an adjustable pulse width output interface, for controlling the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level;

[0009] An AND gate circuit is connected to the adjustable pulse width output interface through a first input end, is respectively connected to the universal input / output interface and a first resistor through a second input end, and is connected to a speed input signal pin of a fan base through an output end. The AND gate circuit is used to receive a level signal output by the adjustable pulse width output interface and a low level output by the universal input / output interface under the action of the first resistor, and inputs the low level output after the level signal is ANDed with the low level into the speed input signal pin to stop the fan from rotating.

[0010] The present application also provides a cloud terminal device, including:

[0011] A fan seat having a fan and a fan control circuit connected to the fan seat;

[0012] The fan control circuit is provided with:

[0013] A central processing unit, having a general input and output interface and an adjustable pulse width output interface, for controlling the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level;

[0014] An AND gate circuit is connected to the adjustable pulse width output interface through a first input end, is respectively connected to the universal input / output interface and a first resistor through a second input end, and is connected to a speed input signal pin of a fan base through an output end. The AND gate circuit is used to receive a level signal output by the adjustable pulse width output interface and a low level output by the universal input / output interface under the action of the first resistor, and inputs the low level output after the level signal is ANDed with the low level into the speed input signal pin to stop the fan from rotating.

[0015] The embodiment of the present application also provides a fan control method, which is applied to a cloud terminal device, wherein the cloud terminal device includes a fan seat having a fan and a fan control circuit connected to the fan seat; the fan control circuit is provided with a central processing unit and an AND gate circuit; the central processing unit has a general input and output interface and an adjustable pulse width output interface, which is used to control the adjustable pulse width output interface to output a level signal when powered on, and the level signal is a high level or a low level; the AND gate circuit is connected to the adjustable pulse width output interface through a first input terminal, is connected to the general input and output interface and a first resistor through a second input terminal, and is connected to a speed input signal pin of the fan seat through an output terminal; the method includes:

[0016] Receiving the level signal output by the adjustable pulse width output interface and the low level signal output by the universal input and output interface under the action of the first resistor;

[0017] The low level output after the level signal is ANDed with the low level is input into the speed input signal pin, so that the fan stops rotating.

[0018] In the embodiment of the present application, a central processing unit and an AND gate circuit are set, and when the central processing unit is powered on, its general input and output interface outputs a low level under the action of the first resistor, and the adjustable pulse width output interface is controlled to output a high level or a low level. After the AND gate circuit and the two are ANDed, they output a low level, and the fan can be stopped by inputting the low level to the speed input signal pin of the fan seat. In summary, the present application can realize the control of the fan without using a customized expansion chip, which is not only low-cost, but also can stop the fan in the first few seconds of the central processing unit starting up to avoid noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0020] Figure 1 A schematic diagram of the structure of a fan control circuit provided in an embodiment of the present application;

[0021] Figure 2 A schematic diagram of the structure of a cloud terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0023] Cloud terminal devices refer to terminal devices that use cloud desktop technology. With the continuous development of science and technology, people have smaller and smaller requirements for the size of cloud terminals. However, as the performance of cloud terminals continues to improve, their heat dissipation power consumption is getting higher and higher. Based on this, cloud terminals need to be equipped with fans with higher speeds to meet the heat dissipation requirements. However, higher speeds will bring greater noise. Therefore, a complete set of strategies is needed to control noise, requiring that there should be no noise impact when the cloud terminal is powered on.

[0024] Based on this, an embodiment of the present application provides a fan control circuit, which is suitable for any cloud terminal.

[0025] How the fan control circuit controls the fan is described in detail below in conjunction with the following embodiments.

[0026] Figure 1 A schematic diagram of a fan control circuit provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the fan control circuit includes: a central processing unit and an AND gate circuit. Among them:

[0027] CPU( Figure 1 The device is not shown), and has a general input / output interface and an adjustable pulse width output interface, and is used to control the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level.

[0028] The AND gate circuit U1 is connected to the adjustable pulse width output interface through the first input terminal (pin 1 of U1), is connected to the general input and output interface and the first resistor R1 through the second input terminal (pin 2 of U1), and is connected to the speed input signal pin (pin 1 of JP1) of the fan seat JP1 through the output terminal (pin 3 of U1). It is used to receive the level signal output by the adjustable pulse width output interface and the low level output by the general input and output interface under the action of the first resistor R1, and inputs the low level output after the level signal (high level or low level) is ANDed with the low level into the speed input signal pin, so that the fan stops rotating.

[0029] The fan control circuit is used to control the fan. The principle is as follows: when the CPU is powered on, its general input / output interface outputs a low level under the action of the first resistor R1, and the adjustable pulse width output interface outputs a high level or a low level (depending on the actual situation). After the two are ANDed by the gate circuit U1, they output a low level. By inputting the low level to the speed input signal pin of the fan base JP1, the fan can be stopped. In summary, the present application can control the fan without using a customized expansion chip. Not only is the cost low, but the fan can also be stopped within the first few seconds of the CPU startup to avoid noise.

[0030] It should be understood that the CPU will not only generate a lot of noise in the first few seconds after startup, but will also have overheating problems after running for a period of time if the radiator is not installed properly or the operation is abnormal. If not handled in time, it will affect the normal use of the cloud terminal and the service life of the CPU. Based on this, the embodiment of the present application also takes into account the temperature problem of the CPU. Figure 1 As shown, the central processing unit provided in the embodiment of the present application also has an overheat output signal interface, which is used to control the overheat output signal interface to output a high level when the temperature is less than a set threshold, and to control the overheat output signal interface to output a low level when the temperature is greater than the set threshold.

[0031] The fan control circuit also includes:

[0032] The switch circuit Q1 is connected to the output end of the AND gate circuit U1 through the first input end (pin 1 of Q1), connected to the overheat output signal interface through the second input end (pin 2 of Q1), and connected to the speed input signal pin of the fan seat JP1 through the output end (pin 3 of Q1), and is used to turn on the switch circuit Q1 according to the low level output by the AND gate circuit U1 and the high level output by the overheat output signal interface, so that the speed input signal pin inputs a low level. Among them, the switch circuit Q1 can be a field effect tube.

[0033] In actual application, when the CPU is powered on, its general input and output interface outputs a low level under the action of the first resistor R1, and controls the adjustable pulse width output interface to output a high level or a low level. After the two are ANDed by the AND gate circuit U1, they output a low level. At this time, the temperature of the CPU is less than the set threshold, that is, the temperature of the CPU is normal, and the overheat output signal interface outputs a high level. The voltage difference formed by the low level output by the AND gate circuit U1 and the high level output by the overheat output signal interface turns on the switch circuit Q1, and then the low level is input to the speed input signal pin, so that the fan is in a stopped state to avoid noise.

[0034] In order to ensure that the overheat output signal interface outputs a high level when the CPU is powered on, in the embodiment of the present application, Figure 1 As shown, the fan control circuit further includes: a fourth resistor R4. One end of the fourth resistor R4 is connected to the power supply, and the other end is connected to the second input end (pin 2 of Q1) of the switch circuit Q1.

[0035] The fourth resistor R4 is a pull-up resistor, which is used to pull up the level output by the overheat output signal interface to a high level during the power-on or reset process of the central processing unit.

[0036] Furthermore, the central processing unit is also used to control the overheat output signal interface to output a low level when it detects that the temperature of the central processing unit is greater than a set threshold value (overheat), so as to cut off the switch circuit.

[0037] like Figure 1 As shown, the fan control circuit also includes: a second resistor R2 and a third resistor R3, wherein one end of the second resistor R2 is connected to the output end of the switch circuit Q1, and the other end of the second resistor R2 is connected to the power supply; one end of the third resistor R3 is connected to the output end of the switch circuit Q1, and the other end is connected to the speed input signal pin.

[0038] In actual applications, when the radiator is not installed properly or is operating abnormally, the CPU may overheat, that is, the temperature of the CPU is detected to be greater than the set threshold. At this time, the overheat output signal interface will output a low level, the switch circuit Q1 will be cut off, and the low level will be pulled up to a high level through the second resistor R2, and the high level will be transmitted to the speed input signal pin, so that the fan rotates at full speed to dissipate heat from the CPU (it should be understood that when the input speed input signal pin is at a low level, the fan stops rotating, and when the input speed input signal pin is at a high level, the higher the level, the faster the speed). Among them, the second resistor R2 is a pull-up resistor, which is used to pull the low level up to a high level. The third resistor R3 is used to limit the current to prevent the switch circuit Q1 from being impacted when the fan seat JP1 is plugged in and out.

[0039] However, if the fan is running at full speed for any period of time to cool the CPU, it will not only waste resources but also increase operating costs.

[0040] Based on this, in the fan control circuit provided in the embodiment of the present application, the central processing unit is also used to control the general input and output interface to output a high level after the adjustable pulse width output interface is configured with an adjustable pulse width function; and to control the adjustable pulse width output interface to output a corresponding pulse width signal according to the temperature of the central processing unit.

[0041] Specifically, the CPU configures the adjustable pulse width function for the adjustable pulse width output interface, and after the preset running time remains stable, controls the general input and output interface to output a high level. When the CPU is running normally and there is no overheating, the adjustable pulse width output interface can be controlled to output a corresponding pulse width signal according to the current temperature of the CPU. The higher the temperature of the CPU, the stronger the corresponding pulse width signal is output. The greater the duty cycle of the high level time input to the speed input signal pin after being ANDed with the level signal output by the general input and output interface, the faster the speed of the fan.

[0042] For example, when the temperature of the CPU is medium, after the pulse width signal and the high level output by the general input and output interface are ANDed, a 50% high level can be output to control the fan to rotate at half speed, and when the temperature of the CPU is low, after the pulse width signal and the high level output by the general input and output interface are ANDed, a high level less than 50% can be output, such as a high level of 20%, 30%, etc. It should be noted that if it is high temperature (such as outputting a high level of 61%-100%), it means that the CPU is overheated, and the above low temperature (such as outputting a high level of 40%-60%) and medium temperature (such as outputting a high level of 0%-39%) are only relative to high temperature.

[0043] In the embodiments of the present application, Figure 1As shown, the fan base JP1 has a speed output signal pin (pin 2 of JP1) and a power pin (pin 3 of JP1), and the power pin provides the power supply voltage required by the fan; the central processing unit has a speed feedback input interface. The fan control circuit also includes: a voltage divider circuit and a diode D1. Among them, the first end of the diode D1 is connected to the power supply, and the second end is connected to the speed output signal pin, which is used to clamp the voltage of the speed output signal pin to a set voltage. The first end of the voltage divider circuit is connected to the speed feedback input interface, and the second end is connected to the second end of the diode D1.

[0044] By setting the diode D1 and making the diode D1 clamp the voltage of the speed output signal pin to the set voltage, it is avoided that the signal output by the speed output signal pin overshoots and damages the central processing unit.

[0045] In actual applications, the speed output signal pin of the fan base JP1 transmits the fan speed output signal to the speed feedback input interface of the CPU in real time. This signal is 12V level, which needs to be divided by the voltage divider circuit and converted into a 3V voltage that the CPU can withstand, and then transmitted to the speed feedback input interface of the CPU for identification. If the speed output signal received by the speed feedback input interface does not reach the set value, then the CPU will control the fan through the pulse width signal output by the adjustable pulse width output interface to increase the fan speed.

[0046] Specifically, the voltage divider circuit includes a sixth resistor R6 and a seventh resistor R7. One end of the sixth resistor R6 is grounded, and the other end is connected to the speed feedback input interface and one end of the seventh resistor R7. The other end of the seventh resistor R7 is connected to the second end of the diode D1.

[0047] In order to further ensure the high-speed rotation of the fan, Figure 1 As shown, the fan control circuit provided in the embodiment of the present application also includes: a fifth resistor R5, one end of which is connected to a power supply of a set voltage, and the other end is connected to a speed output signal pin. Wherein, the fifth resistor R5 is a pull-up resistor. Since there is no pull-up inside the fan, it is necessary to pull it up through the fifth resistor R5 to obtain a high level. The set voltage can be a 12V voltage. It should be noted that the pull-up resistor (fifth resistor R5) here is not directly related to the above-mentioned voltage divider circuit. By setting the fifth resistor R5, the embodiment of the present application can further ensure that the fan can rotate at a high speed.

[0048] In the embodiments of the present application, Figure 1 As shown, the fan control circuit further includes a first capacitor C1 connected to the third input terminal (pin 4 of U1 ) of the AND gate circuit U1 , and the third input terminal is connected to a power supply.

[0049] By connecting a power source to the third input terminal of the AND gate circuit U1 , the AND gate circuit Q1 can be smoothly powered, and the power source can be filtered through the first capacitor C1 .

[0050] In addition, in order to filter out the high-frequency interference in the signal output by the speed output signal pin, such as Figure 1 As shown, the fan control circuit further includes: a second capacitor C2. The second capacitor C2 is connected to the speed output signal pin.

[0051] In the embodiment of the present application, the fan base JP1 also has a power pin (pin 3 of JP1) to filter the fan power supply. Figure 1 As shown, the fan control circuit further includes: a third capacitor C3. The third capacitor C3 is connected to the power pin.

[0052] A specific embodiment is provided below to illustrate the solution of the present application:

[0053] The general input and output interface of the CPU is configured to the default pull-down state, that is, to ensure that the output is low level when the CPU is reset. At the same time, the first resistor R1 is set as a pull-down resistor to further ensure that the output is low level before the CPU is reset and the software does not configure the interface state.

[0054] When the CPU is powered on, the adjustable pulse width output interface outputs a high level, and the high level and the low level are ANDed through the AND gate circuit U1 to output a low level, which is input to the speed input signal pin of the fan base JP1 to stop the fan. It should be noted that at this time, the CPU has just started, the temperature is normal, and the switch circuit Q1 is in the on state, that is, the output end of the AND gate circuit U1 is connected to the speed input signal pin.

[0055] After the CPU configures the adjustable pulse width function for the adjustable pulse width output interface, the CPU controls the general input and output interface to output a high level, and controls the adjustable pulse width output interface to output a corresponding pulse width signal according to the temperature of the CPU. The high level and the pulse width signal are ANDed together and then output from the output end of the CPU. At this time, the CPU has not yet reached an overheating state, so the switch circuit Q1 is still in the on state. At this time, the fan is controlled to rotate according to the pulse width signal outputted after the high level and the pulse width signal are ANDed together. It should be noted that during normal operation, the CPU will adjust the signal outputted by the adjustable pulse width output interface according to the change in temperature, and the speed of the fan will be adjusted according to the signal outputted by the adjustable pulse width output interface. The higher the temperature, the faster the fan speed.

[0056] The signal output by the speed output signal pin of the fan base JP1 is converted into a pulse width signal with a 12V level amplitude under the pull-up effect of the fifth resistor R5, and after voltage division by the sixth resistor R6 and the seventh resistor R7, it is converted into a pulse width signal voltage with a 3V level amplitude that the central processor can withstand, and is given to the speed feedback input interface of the central processor for identification. If the speed does not reach the set value, the central processor will control the fan through the signal output by the adjustable pulse width output interface to increase the fan speed and achieve the purpose of closed loop.

[0057] When the CPU is overheated, the overheat output signal interface outputs a low level, turning off the switch circuit Q1, that is, disconnecting the output end of the AND gate circuit U1 from the speed input signal pin. At this time, the low level output by the overheat output signal interface is pulled up to a high level of 5V by the pull-up action of the second resistor R2, and the fan runs at full speed to dissipate heat for the CPU, cooling the CPU to the maximum extent and achieving the effect of overheat protection.

[0058] In summary, the present application can suppress the noise impact of fan startup within a few seconds of CPU startup. When the CPU temperature is too high, the fan is guaranteed to run at full speed to achieve the best heat dissipation effect. The voltage of the speed output signal pin is clamped to the set voltage through a diode, avoiding the signal output from the speed output signal pin from overshooting and damaging the CPU.

[0059] Figure 2 A schematic diagram of the structure of a cloud terminal device provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the cloud terminal device includes: a fan seat having a fan, and a fan control circuit connected to the fan seat.

[0060] The fan control circuit is provided with: a central processing unit and an AND gate circuit.

[0061] The central processing unit has a general input and output interface and an adjustable pulse width output interface, and is used to control the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level.

[0062] The AND gate circuit is connected to the adjustable pulse width output interface through the first input terminal, is respectively connected to the universal input and output interface and the first resistor through the second input terminal, and is connected to the speed input signal pin of the fan seat through the output terminal. The AND gate circuit is used to receive the level signal output by the adjustable pulse width output interface and the low level output by the universal input and output interface under the action of the first resistor, and inputs the low level output after the level signal and the low level are ANDed into the speed input signal pin to stop the fan from rotating.

[0063] The embodiment of the present application also provides a fan control method, which is applied to a cloud terminal device, wherein the cloud terminal device includes a fan seat having a fan, and a fan control circuit connected to the fan seat; a central processing unit and an AND gate circuit are provided on the fan control circuit; the central processing unit has a general input and output interface and an adjustable pulse width output interface, which is used to control the adjustable pulse width output interface to output a level signal when powered on, and the level signal is a high level or a low level; the AND gate circuit is connected to the adjustable pulse width output interface through a first input terminal, is connected to the general input and output interface and a first resistor through a second input terminal, and is connected to a speed input signal pin of the fan seat through an output terminal; the method includes:

[0064] Receiving the level signal output by the adjustable pulse width output interface and the low level signal output by the universal input and output interface under the action of the first resistor;

[0065] The low level signal is input to the speed input signal pin after the level signal is ANDed with the low level signal, so that the fan stops rotating.

[0066] The working process of the fan control circuit in this embodiment can refer to the relevant descriptions in other aforementioned embodiments, which will not be described here in detail.

[0067] It should be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of further restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0068] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A fan control circuit, characterized in that: include: A central processing unit, having a general input and output interface and an adjustable pulse width output interface, for controlling the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level; An AND gate circuit, connected to the adjustable pulse width output interface through a first input terminal, connected to the universal input / output interface and the first resistor respectively through a second input terminal, and connected to the speed input signal pin of the fan seat through an output terminal, for receiving the level signal output by the adjustable pulse width output interface and the low level output by the universal input / output interface under the action of the first resistor, and inputting the low level output after the level signal and the low level are ANDed into the speed input signal pin, so that the fan stops rotating; The central processor is further used to control the general input and output interface to output a high level after configuring the adjustable pulse width function on the adjustable pulse width output interface; and to control the adjustable pulse width output interface to output a corresponding pulse width signal according to the temperature of the central processor; The central processing unit also has an overheat output signal interface, which is used to control the overheat output signal interface to output a high level when the temperature is less than a set threshold, and to control the overheat output signal interface to output a low level when the temperature is greater than the set threshold.

2. The fan control circuit according to claim 1, characterized in that: It also includes a first capacitor connected to the third input terminal of the AND gate circuit, and the third input terminal is connected to a power supply.

3. The fan control circuit according to claim 1, characterized in that: The fan control circuit further includes: A switch circuit is connected to the output end of the AND gate circuit through a first input end, is connected to the overheat output signal interface through a second input end, and is connected to the speed input signal pin of the fan seat through an output end, and is used to turn on the switch circuit according to the low level output by the AND gate circuit and the high level output by the overheat output signal interface, so that the speed input signal pin inputs a low level.

4. The fan control circuit according to claim 3, characterized in that: The central processor is further used to control the overheat output signal interface to output a low level when it is detected that the temperature of the central processor is greater than a set threshold value, so as to cut off the switch circuit; The fan control circuit also includes: a second resistor and a third resistor; one end of the second resistor is connected to the output end of the switch circuit, and the other end of the second resistor is connected to a power supply; one end of the third resistor is connected to the output end of the switch circuit, and the other end is connected to the speed input signal pin.

5. The fan control circuit according to claim 3, characterized in that: The fan control circuit further includes: a fourth resistor; one end of the fourth resistor is connected to the power supply, and the other end of the fourth resistor is connected to the second input end of the switch circuit.

6. The fan control circuit according to claim 1, characterized in that: The fan seat has a speed output signal pin and a power pin, and the power pin is connected to a power supply with a set voltage; the central processor has a speed feedback input interface; The fan control circuit further includes: Voltage divider circuits and diodes; The first end of the diode is connected to the power supply, and the second end is connected to the speed output signal pin, and is used to clamp the voltage of the speed output signal pin to the set voltage; The first end of the voltage divider circuit is connected to the speed feedback input interface, and the second end is connected to the second end of the diode.

7. The fan control circuit according to claim 6, characterized in that: Also includes: A fifth resistor has one end connected to the power supply of the set voltage, and the other end connected to the speed output signal pin.

8. The fan control circuit according to claim 7, characterized in that: Also includes: The second capacitor is connected to the speed output signal pin.

9. A cloud terminal device, characterized in that: include: A fan seat having a fan and a fan control circuit connected to the fan seat; The fan control circuit is provided with: A central processing unit, having a general input and output interface and an adjustable pulse width output interface, for controlling the adjustable pulse width output interface to output a level signal when powered on, wherein the level signal is a high level or a low level; An AND gate circuit, connected to the adjustable pulse width output interface through a first input terminal, connected to the universal input / output interface and the first resistor respectively through a second input terminal, and connected to the speed input signal pin of the fan seat through an output terminal, for receiving the level signal output by the adjustable pulse width output interface and the low level output by the universal input / output interface under the action of the first resistor, and inputting the low level output after the level signal and the low level are ANDed into the speed input signal pin, so that the fan stops rotating; The central processor is further used to control the general input and output interface to output a high level after configuring the adjustable pulse width function on the adjustable pulse width output interface; and to control the adjustable pulse width output interface to output a corresponding pulse width signal according to the temperature of the central processor; The central processing unit also has an overheat output signal interface, which is used to control the overheat output signal interface to output a high level when the temperature is less than a set threshold, and to control the overheat output signal interface to output a low level when the temperature is greater than the set threshold.

10. A fan control method, characterized in that: Applied to a cloud terminal device, the cloud terminal device comprises a fan seat with a fan, and a fan control circuit connected to the fan seat; the fan control circuit is provided with a central processing unit and an AND gate circuit; the central processing unit has a general input and output interface and an adjustable pulse width output interface, which is used to control the adjustable pulse width output interface to output a level signal when powered on, and the level signal is a high level or a low level; the AND gate circuit is connected to the adjustable pulse width output interface through a first input end, is respectively connected to the general input and output interface and a first resistor through a second input end, and is connected to a speed input signal pin of the fan seat through an output end; the method comprises: Receiving the level signal output by the adjustable pulse width output interface and the low level signal output by the universal input and output interface under the action of the first resistor; The low level output after the level signal and the low level are ANDed is input into the speed input signal pin, so that the fan stops rotating; The central processor is further used to control the general input and output interface to output a high level after configuring the adjustable pulse width function on the adjustable pulse width output interface; and to control the adjustable pulse width output interface to output a corresponding pulse width signal according to the temperature of the central processor; The central processing unit also has an overheat output signal interface, which is used to control the overheat output signal interface to output a high level when the temperature is less than a set threshold, and to control the overheat output signal interface to output a low level when the temperature is greater than the set threshold.

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